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ngspice
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new separate bsim3v32simd model directory

This commit is contained in:
Florian Ballenegger 2020-07-24 20:12:33 +02:00
parent aa8afe9d94
commit 47249ad57f
51 changed files with 14305 additions and 177 deletions
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1
configure.ac
View File

@ -1261,6 +1261,7 @@ AC_CONFIG_FILES([Makefile
src/spicelib/devices/bsim3v0/Makefile
src/spicelib/devices/bsim3v1/Makefile
src/spicelib/devices/bsim3v32/Makefile
src/spicelib/devices/bsim3v32simd/Makefile
src/spicelib/devices/bsim4/Makefile
src/spicelib/devices/bsim4v5/Makefile
src/spicelib/devices/bsim4v6/Makefile

4
examples/digital/adder_mos.cir
View File

@ -58,8 +58,8 @@ X1 1 2 3 4 5 6 7 8 9 10 11 12 0 13 99 FOURBIT
.save V(1) V(2) V(3) V(4) V(5) V(6) V(7) V(8)
* use BSIM3 model with default parameters
.model n1 nmos level=49 version=3.3.0
.model p1 pmos level=49 version=3.3.0
.model n1 nmos level=88 version=3.2.4
.model p1 pmos level=88 version=3.2.4
*.include ./Modelcards/modelcard32.nmos
*.include ./Modelcards/modelcard32.pmos

14
src/Makefile.am
View File

@ -134,6 +134,10 @@ if NDEV_WANTED
ngspice_LDADD += spicelib/devices/ndev/libndev.la
endif
if WANT_MODSIMD
ngspice_LDADD += spicelib/devices/bsim3v32simd/libbsim3v32simd.la
endif
if NUMDEV_WANTED
ngspice_LDADD += \
spicelib/devices/nbjt/libnbjt.la \
@ -413,6 +417,11 @@ libspice_la_LIBADD += \
spicelib/devices/ndev/libndev.la
endif
if WANT_MODSIMD
libspice_la_LIBADD += \
spicelib/devices/bsim3v32simd/libbsim3v32simd.la
endif
if NUMDEV_WANTED
libspice_la_LIBADD += \
spicelib/devices/nbjt/libnbjt.la \
@ -528,6 +537,11 @@ libngspice_la_LIBADD += \
spicelib/devices/ndev/libndev.la
endif
if WANT_MODSIMD
libngspice_la_LIBADD += \
spicelib/devices/bsim3v32simd/libbsim3v32simd.la
endif
if NUMDEV_WANTED
libngspice_la_LIBADD += \
spicelib/devices/nbjt/libnbjt.la \

5
src/spicelib/devices/Makefile.am
View File

@ -61,6 +61,10 @@ if NUMDEV_WANTED
SUBDIRS += nbjt nbjt2 numd numd2 numos
endif
if WANT_MODSIMD
SUBDIRS += bsim3v32simd
endif
DIST_SUBDIRS = \
asrc \
bjt \
@ -75,6 +79,7 @@ DIST_SUBDIRS = \
bsim3v0 \
bsim3v1 \
bsim3v32 \
bsim3v32simd \
bsim3soi_pd \
bsim3soi_fd \
bsim3soi_dd \

10
src/spicelib/devices/bsim3v32/Makefile.am
View File

@ -2,7 +2,6 @@
noinst_LTLIBRARIES = libbsim3v32.la
libbsim3v32_la_SOURCES = \
b3v32.c \
b3v32acld.c \
@ -27,19 +26,10 @@ libbsim3v32_la_SOURCES = \
bsim3v32init.h \
bsim3v32itf.h
if WANT_MODSIMD
libbsim3v32_la_SOURCES += \
b3v32ldseq.c \
b3v32ldsel.c \
b3v32ldsimd.c
endif
AM_CPPFLAGS = @AM_CPPFLAGS@ -I$(top_srcdir)/src/include
AM_CFLAGS = $(STATIC)
if WANT_MODSIMD
AM_CFLAGS += -fno-math-errno -ffast-math -fopenmp-simd
endif
MAINTAINERCLEANFILES = Makefile.in

51
src/spicelib/devices/bsim3v32/b3v32ld.c
View File

@ -2747,17 +2747,9 @@ finished:
/*
* check convergence
*/
#ifdef USE_OMP
here->BSIM3v32noncon=0;
#endif
if ((here->BSIM3v32off == 0) || (!(ckt->CKTmode & MODEINITFIX)))
{ if (Check == 1)
{
#ifdef USE_OMP
here->BSIM3v32noncon++;
#else
ckt->CKTnoncon++;
#endif
{ ckt->CKTnoncon++;
#ifndef NEWCONV
}
else
@ -2777,12 +2769,7 @@ finished:
tol = ckt->CKTreltol * MAX(fabs(cbhat), fabs(Ibtot))
+ ckt->CKTabstol;
if (fabs(cbhat - Ibtot) > tol)
{
#ifdef USE_OMP
here->BSIM3v32noncon++;
#else
ckt->CKTnoncon++;
#endif
{ ckt->CKTnoncon++;
}
}
#endif /* NEWCONV */
@ -3323,13 +3310,8 @@ line900:
here->BSIM3v32rhsD = m * (ceqbd - cdreq - ceqqd);
here->BSIM3v32rhsS = m * (cdreq + ceqbs + ceqqg
+ ceqqb + ceqqd);
#ifndef OMP_EFFMEM
if (here->BSIM3v32nqsMod)
here->BSIM3v32rhsQ = m * (cqcheq - cqdef);
#else
if (here->BSIM3v32nqsMod)
*(ckt->CKTrhs + here->BSIM3v32qNode) += m * (cqcheq - cqdef);
#endif
#else
(*(ckt->CKTrhs + here->BSIM3v32gNode) -= m * ceqqg);
(*(ckt->CKTrhs + here->BSIM3v32bNode) -= m * (ceqbs + ceqbd + ceqqb));
@ -3383,8 +3365,8 @@ line900:
- T1 * dsxpart_dVb - gbspb);
here->BSIM3v32SPdpPt = m * (here->BSIM3v32gds + RevSum - gcsdb
- sxpart * ggtd - T1 * dsxpart_dVd - gbspdp);
#ifndef OMP_EFFMEM
if (here->BSIM3v32nqsMod)
if (here->BSIM3v32nqsMod)
{
here->BSIM3v32QqPt = m * (gqdef + here->BSIM3v32gtau);
@ -3397,24 +3379,7 @@ line900:
here->BSIM3v32QspPt = m * (ggts - gcqsb);
here->BSIM3v32QbPt = m * (ggtb - gcqbb);
}
#else
if (here->BSIM3v32nqsMod)
{
*(here->BSIM3v32QqPtr) += m * (gqdef + here->BSIM3v32gtau);
*(here->BSIM3v32DPqPtr) += m * (dxpart * here->BSIM3v32gtau);
*(here->BSIM3v32SPqPtr) += m * (sxpart * here->BSIM3v32gtau);
*(here->BSIM3v32GqPtr) -= m * here->BSIM3v32gtau;
*(here->BSIM3v32QgPtr) += m * (ggtg - gcqgb);
*(here->BSIM3v32QdpPtr) += m * (ggtd - gcqdb);
*(here->BSIM3v32QspPtr) += m * (ggts - gcqsb);
*(here->BSIM3v32QbPtr) += m * (ggtb - gcqbb);
}
#endif
#endif /* ifdef USE_OMP */
#ifndef USE_OMP
#else
(*(here->BSIM3v32DdPtr) += m * here->BSIM3v32drainConductance);
(*(here->BSIM3v32GgPtr) += m * (gcggb - ggtg));
(*(here->BSIM3v32SsPtr) += m * here->BSIM3v32sourceConductance);
@ -3497,10 +3462,8 @@ void BSIM3v32LoadRhsMat(GENmodel *inModel, CKTcircuit *ckt)
(*(ckt->CKTrhs + here->BSIM3v32bNode) -= here->BSIM3v32rhsB);
(*(ckt->CKTrhs + here->BSIM3v32dNodePrime) += here->BSIM3v32rhsD);
(*(ckt->CKTrhs + here->BSIM3v32sNodePrime) += here->BSIM3v32rhsS);
#ifndef OMP_EFFMEM
if (here->BSIM3v32nqsMod)
(*(ckt->CKTrhs + here->BSIM3v32qNode) += here->BSIM3v32rhsQ);
#endif
/* Update A for Ax = b */
(*(here->BSIM3v32DdPtr) += here->BSIM3v32DdPt);
@ -3526,8 +3489,7 @@ void BSIM3v32LoadRhsMat(GENmodel *inModel, CKTcircuit *ckt)
(*(here->BSIM3v32SPbPtr) -= here->BSIM3v32SPbPt);
(*(here->BSIM3v32SPdpPtr) -= here->BSIM3v32SPdpPt);
#ifndef OMP_EFFMEM
if (here->BSIM3v32nqsMod)
if (here->BSIM3v32nqsMod)
{
*(here->BSIM3v32QqPtr) += here->BSIM3v32QqPt;
@ -3540,7 +3502,6 @@ void BSIM3v32LoadRhsMat(GENmodel *inModel, CKTcircuit *ckt)
*(here->BSIM3v32QspPtr) += here->BSIM3v32QspPt;
*(here->BSIM3v32QbPtr) += here->BSIM3v32QbPt;
}
#endif
}
}

75
src/spicelib/devices/bsim3v32/b3v32set.c
View File

@ -6,7 +6,6 @@
* Author: 1995 Min-Chie Jeng and Mansun Chan.
* Author: 1997-1999 Weidong Liu.
* Author: 2001 Xuemei Xi
* Modified by Florian Ballenegger 2020 (for SIMD evaluation)
**********/
#include "ngspice/ngspice.h"
@ -17,9 +16,6 @@
#include "ngspice/sperror.h"
#include "ngspice/devdefs.h"
#include "ngspice/suffix.h"
#include "ngspice/cpextern.h"
extern SPICEdev BSIM3v32info;
#define MAX_EXP 5.834617425e14
#define MIN_EXP 1.713908431e-15
@ -43,7 +39,7 @@ CKTnode *tmp;
CKTnode *tmpNode;
IFuid tmpName;
#if defined(USE_OMP) || defined(BSIM3v32SIMD)
#ifdef USE_OMP
int idx, InstCount;
BSIM3v32instance **InstArray;
#endif
@ -1038,7 +1034,7 @@ BSIM3v32instance **InstArray;
/* process drain series resistance */
if (DrainResistance != 0)
{
if(here->BSIM3v32dNodePrime == 0) {
if(here->BSIM3v32dNodePrime == 0) {
error = CKTmkVolt(ckt,&tmp,here->BSIM3v32name,"drain");
if(error) return(error);
here->BSIM3v32dNodePrime = tmp->number;
@ -1139,7 +1135,7 @@ do { if((here->ptr = SMPmakeElt(matrix, here->first, here->second)) == NULL){\
}
}
#if defined(USE_OMP) || defined(BSIM3v32SIMD)
#ifdef USE_OMP
InstCount = 0;
model = (BSIM3v32model*)inModel;
/* loop through all the BSIM3 device models
@ -1161,7 +1157,6 @@ do { if((here->ptr = SMPmakeElt(matrix, here->first, here->second)) == NULL){\
/* store this in the first model only */
model->BSIM3v32InstCount = InstCount;
model->BSIM3v32InstanceArray = InstArray;
#ifndef BSIM3v32SIMD
idx = 0;
for (; model != NULL; model = BSIM3v32nextModel(model))
{
@ -1173,51 +1168,7 @@ do { if((here->ptr = SMPmakeElt(matrix, here->first, here->second)) == NULL){\
idx++;
}
}
#else
idx=0;
int ngroups=0;
for (; model != NULL; model = BSIM3v32nextModel(model))
{
BSIM3v32group *group;
BSIM3v32instance *first;
model->groupHead=NULL;
first = BSIM3v32instances(model);
while((idx<InstCount) && (first!=NULL))
{
ngroups++;
group = TMALLOC(BSIM3v32group, 1);
group->InstArray=&InstArray[idx];
group->InstArray[0] = first;
group->InstCount=0;
/* build linked list of groups */
group->next = model->groupHead;
model->groupHead=group;
/* init the for loop below */
here = first; first=NULL;
for (; here != NULL; here = BSIM3v32nextInstance(here))
{
if((here->BSIM3v32nqsMod == group->InstArray[0]->BSIM3v32nqsMod)
&& (here->BSIM3v32w == group->InstArray[0]->BSIM3v32w)
&& (here->BSIM3v32l == group->InstArray[0]->BSIM3v32l)
&& (here->BSIM3v32geo == group->InstArray[0]->BSIM3v32geo)
&& (here->BSIM3v32off == group->InstArray[0]->BSIM3v32off) )
{ /* instance can be grouped with the current group */
InstArray[idx++] = here;
group->InstCount++;
}
else if (first!=NULL)
first=here; /* first different instance, start from here at next while iteration */
}
}
}
printf("BSIM3v32 has %d groups\n",ngroups);
if (cp_getvar("no_modsimd", CP_BOOL, NULL, 0))
{
printf("BSIM3v32 simd disabled at runtime\n");
BSIM3v32info.DEVload = BSIM3v32load; /* use original load function */
}
#endif
#endif
return(OK);
}
@ -1230,20 +1181,14 @@ BSIM3v32unsetup(
BSIM3v32model *model;
BSIM3v32instance *here;
#ifdef USE_OMP
model = (BSIM3v32model*)inModel;
tfree(model->BSIM3v32InstanceArray);
#endif
for (model = (BSIM3v32model *)inModel; model != NULL;
model = BSIM3v32nextModel(model))
{
#ifdef BSIM3v32SIMD
BSIM3v32group *group,*ngroup;
group=model->groupHead;
while(group) {
ngroup=group->next;
tfree(group);
group=ngroup;
}
#endif
for (here = BSIM3v32instances(model); here != NULL;
here=BSIM3v32nextInstance(here))
{
@ -1262,12 +1207,6 @@ BSIM3v32unsetup(
here->BSIM3v32dNodePrime = 0;
}
}
#if defined(USE_OMP) || defined(BSIM3v32SIMD)
model = (BSIM3v32model*)inModel;
tfree(model->BSIM3v32InstanceArray);
#endif
return OK;
}

46
src/spicelib/devices/bsim3v32/bsim3v32def.h
View File

@ -4,7 +4,6 @@ Author: 1995 Min-Chie Jeng and Mansun Chan.
Author: 1997-1999 Weidong Liu.
Author: 2001 Xuemei Xi
Modified by Paolo Nenzi 2002 and Dietmar Warning 2003
Modified by Florian Ballenegger 2020 (for SIMD evaluation)
File: bsim3v32def.h
**********/
@ -17,12 +16,6 @@ File: bsim3v32def.h
#include "ngspice/complex.h"
#include "ngspice/noisedef.h"
#ifdef BSIM3v32SIMD
#define NSIMD 4
#endif
#define OMP_EFFMEM
typedef struct sBSIM3v32instance
{
@ -43,7 +36,7 @@ typedef struct sBSIM3v32instance
/* MCJ */
double BSIM3v32ueff;
double BSIM3v32thetavth; /* F.B. It is not useful to store this here, should be removed */
double BSIM3v32thetavth;
double BSIM3v32von;
double BSIM3v32vdsat;
double BSIM3v32cgdo;
@ -181,29 +174,15 @@ typedef struct sBSIM3v32instance
double *BSIM3v32GqPtr;
double *BSIM3v32SPqPtr;
double *BSIM3v32BqPtr;
#ifdef USE_OMP
#ifdef BSIM3v32SIMD
/* store here values calculated before SIMD evaluation really start */
double BSIM3v32SIMDvbs;
double BSIM3v32SIMDvgs;
double BSIM3v32SIMDvds;
double BSIM3v32SIMDqdef;
double BSIM3v32SIMDcdhat;
double BSIM3v32SIMDcbhat;
int BSIM3v32SIMDCheck;
#endif
#endif
#ifdef USE_OMP
/* per instance storage of results, to update matrix at a later stge */
int BSIM3v32noncon; /* F.B. bug fix potential race when writing ckt->CKTnoncon */
double BSIM3v32rhsG;
double BSIM3v32rhsB;
double BSIM3v32rhsD;
double BSIM3v32rhsS;
#ifndef OMP_EFFMEM
double BSIM3v32rhsQ;
#endif
double BSIM3v32DdPt;
double BSIM3v32GgPt;
double BSIM3v32SsPt;
@ -226,7 +205,7 @@ typedef struct sBSIM3v32instance
double BSIM3v32DPbPt;
double BSIM3v32SPbPt;
double BSIM3v32SPdpPt;
#ifndef OMP_EFFMEM
double BSIM3v32QqPt;
double BSIM3v32QdpPt;
double BSIM3v32QgPt;
@ -236,7 +215,6 @@ typedef struct sBSIM3v32instance
double BSIM3v32GqPt;
double BSIM3v32SPqPt;
double BSIM3v32BqPt;
#endif
#endif
#define BSIM3v32vbd BSIM3v32states+ 0
@ -419,16 +397,6 @@ struct bsim3v32SizeDependParam
struct bsim3v32SizeDependParam *pNext;
};
#ifdef BSIM3v32SIMD
/* Group by same pParam, nqsMode, geo, off for more efficient SIMD processing */
typedef struct sBSIM3v32group {
int InstCount;
int EvalCount;
int SimdCount;
BSIM3v32instance** InstArray; /* actually sub-array of one allocated array globally */
struct sBSIM3v32group* next;
} BSIM3v32group;
#endif
typedef struct sBSIM3v32model
{
@ -919,12 +887,8 @@ typedef struct sBSIM3v32model
double BSIM3v32vbdrMax;
struct bsim3v32SizeDependParam *pSizeDependParamKnot;
#ifdef BSIM3v32SIMD
BSIM3v32group* groupHead;
#endif
#if defined(USE_OMP) || defined(BSIM3v32SIMD)
#ifdef USE_OMP
int BSIM3v32InstCount;
struct sBSIM3v32instance **BSIM3v32InstanceArray;
#endif

3
src/spicelib/devices/bsim3v32/bsim3v32ext.h
View File

@ -28,6 +28,3 @@ extern int BSIM3v32trunc(GENmodel*,CKTcircuit*,double*);
extern int BSIM3v32noise(int,int,GENmodel*,CKTcircuit*,Ndata*,double*);
extern int BSIM3v32unsetup(GENmodel*,CKTcircuit*);
extern int BSIM3v32soaCheck(CKTcircuit *, GENmodel *);
#ifdef BSIM3v32SIMD
extern int BSIM3v32loadSel(GENmodel*,CKTcircuit*);
#endif

4
src/spicelib/devices/bsim3v32/bsim3v32init.c
View File

@ -33,11 +33,7 @@ SPICEdev BSIM3v32info = {
.DEVparam = BSIM3v32param,
.DEVmodParam = BSIM3v32mParam,
#ifdef BSIM3v32SIMD
.DEVload = BSIM3v32loadSel, /*F.B: point to load function wrapper */
#else
.DEVload = BSIM3v32load,
#endif
.DEVsetup = BSIM3v32setup,
.DEVunsetup = BSIM3v32unsetup,
.DEVpzSetup = BSIM3v32setup,

30
src/spicelib/devices/bsim3v32simd/B3TERMS_OF_USE Normal file
View File

@ -0,0 +1,30 @@
The terms under which the software is provided are as the following.
Software is distributed as is, completely without warranty or service
support. The University of California and its employees are not liable
for the condition or performance of the software.
The University owns the copyright but shall not be liable for any
infringement of copyright or other proprietary rights brought by third
parties against the users of the software.
The University of California hereby disclaims all implied warranties.
The University of California grants the users the right to modify, copy,
and redistribute the software and documentation, both within the user's
organization and externally, subject to the following restrictions:
1. The users agree not to charge for the University of California code
itself but may charge for additions, extensions, or support.
2. In any product based on the software, the users agree to acknowledge
the UC Berkeley BSIM Research Group that developed the software. This
acknowledgment shall appear in the product documentation.
3. The users agree to obey all U.S. Government restrictions governing
redistribution or export of the software.
4. The users agree to reproduce any copyright notice which appears on
the software on any copy or modification of such made available
to others.

0
src/spicelib/devices/bsim3v32/INSTALL → src/spicelib/devices/bsim3v32simd/INSTALL
View File

46
src/spicelib/devices/bsim3v32simd/Makefile.am Normal file
View File

@ -0,0 +1,46 @@
## Process this file with automake to produce Makefile.in
noinst_LTLIBRARIES = libbsim3v32simd.la
libbsim3v32simd_la_SOURCES = \
b3v32.c \
b3v32acld.c \
b3v32ask.c \
b3v32check.c \
b3v32cvtest.c \
b3v32getic.c \
b3v32ld.c \
b3v32mask.c \
b3v32mdel.c \
b3v32mpar.c \
b3v32noi.c \
b3v32par.c \
b3v32pzld.c \
b3v32set.c \
b3v32soachk.c \
b3v32temp.c \
b3v32trunc.c \
bsim3v32def.h \
bsim3v32ext.h \
bsim3v32init.c \
bsim3v32init.h \
bsim3v32itf.h
if WANT_MODSIMD
libbsim3v32simd_la_SOURCES += \
b3v32ldseq.c \
b3v32ldsel.c \
b3v32ldsimd.c
endif
AM_CPPFLAGS = @AM_CPPFLAGS@ -I$(top_srcdir)/src/include
AM_CFLAGS = $(STATIC)
if WANT_MODSIMD
AM_CFLAGS += -fno-math-errno -ffast-math -fopenmp-simd
endif
MAINTAINERCLEANFILES = Makefile.in
EXTRA_DIST = B3TERMS_OF_USE

0
src/spicelib/devices/bsim3v32/README → src/spicelib/devices/bsim3v32simd/README
View File

534
src/spicelib/devices/bsim3v32simd/b3v32.c Normal file
View File

@ -0,0 +1,534 @@
/**** BSIM3v3.2.4, Released by Xuemei Xi 12/14/2001 ****/
/**********
* Copyright 2001 Regents of the University of California. All rights reserved.
* File: b3.c of BSIM3v3.2.4
* Author: 1995 Min-Chie Jeng and Mansun Chan
* Author: 1997-1999 Weidong Liu.
* Author: 2001 Xuemei Xi
* Modified by Paolo Nenzi 2002 and Dietmar Warning 2003
**********/
#include "ngspice/ngspice.h"
#include "ngspice/devdefs.h"
#include "bsim3v32def.h"
#include "ngspice/suffix.h"
IFparm BSIM3v32pTable[] = { /* parameters */
IOP( "l", BSIM3v32_L, IF_REAL , "Length"),
IOP( "w", BSIM3v32_W, IF_REAL , "Width"),
IOP( "m", BSIM3v32_M, IF_REAL , "Parallel multiplier"),
IOP( "ad", BSIM3v32_AD, IF_REAL , "Drain area"),
IOP( "as", BSIM3v32_AS, IF_REAL , "Source area"),
IOP( "pd", BSIM3v32_PD, IF_REAL , "Drain perimeter"),
IOP( "ps", BSIM3v32_PS, IF_REAL , "Source perimeter"),
IOP( "nrd", BSIM3v32_NRD, IF_REAL , "Number of squares in drain"),
IOP( "nrs", BSIM3v32_NRS, IF_REAL , "Number of squares in source"),
IOP( "off", BSIM3v32_OFF, IF_FLAG , "Device is initially off"),
IOP( "nqsmod", BSIM3v32_NQSMOD, IF_INTEGER, "Non-quasi-static model selector"),
IOP( "geo", BSIM3v32_GEO, IF_INTEGER, "ACM model drain/source connection"),
IOP( "delvto", BSIM3v32_DELVTO, IF_REAL , "Zero bias threshold voltage variation"),
IOP( "mulu0", BSIM3v32_MULU0, IF_REAL , "Low field mobility multiplier"),
IP( "ic", BSIM3v32_IC, IF_REALVEC , "Vector of DS,GS,BS initial voltages"),
OP( "gmbs", BSIM3v32_GMBS, IF_REAL, "Gmb"),
OP( "gm", BSIM3v32_GM, IF_REAL, "Gm"),
OP( "gds", BSIM3v32_GDS, IF_REAL, "Gds"),
OP( "vdsat", BSIM3v32_VDSAT, IF_REAL, "Vdsat"),
OP( "vth", BSIM3v32_VON, IF_REAL, "Vth"),
OP( "id", BSIM3v32_CD, IF_REAL, "Ids"),
OP( "vbs", BSIM3v32_VBS, IF_REAL, "Vbs"),
OP( "vgs", BSIM3v32_VGS, IF_REAL, "Vgs"),
OP( "vds", BSIM3v32_VDS, IF_REAL, "Vds"),
OP( "ibd", BSIM3v32_CBD, IF_REAL, "Ibd"), /* newly added from here */
OP( "ibs", BSIM3v32_CBS, IF_REAL, "Ibs"),
OP( "gbd", BSIM3v32_GBD, IF_REAL, "gbd"),
OP( "gbs", BSIM3v32_GBS, IF_REAL, "gbs"),
OP( "qb", BSIM3v32_QB, IF_REAL, "Qbulk"),
OP( "cqb", BSIM3v32_CQB, IF_REAL, "CQbulk"),
OP( "qg", BSIM3v32_QG, IF_REAL, "Qgate"),
OP( "cqg", BSIM3v32_CQG, IF_REAL, "CQgate"),
OP( "qd", BSIM3v32_QD, IF_REAL, "Qdrain"),
OP( "cqd", BSIM3v32_CQD, IF_REAL, "CQdrain"),
OP( "cgg", BSIM3v32_CGG, IF_REAL, "Cggb"),
OP( "cgd", BSIM3v32_CGD, IF_REAL, "Cgdb"),
OP( "cgs", BSIM3v32_CGS, IF_REAL, "Cgsb"),
OP( "cdg", BSIM3v32_CDG, IF_REAL, "Cdgb"),
OP( "cdd", BSIM3v32_CDD, IF_REAL, "Cddb"),
OP( "cds", BSIM3v32_CDS, IF_REAL, "Cdsb"),
OP( "cbg", BSIM3v32_CBG, IF_REAL, "Cbgb"),
OP( "cbd", BSIM3v32_CBDB, IF_REAL, "Cbdb"),
OP( "cbs", BSIM3v32_CBSB, IF_REAL, "Cbsb"),
OP( "capbd", BSIM3v32_CAPBD, IF_REAL, "Capbd"),
OP( "capbs", BSIM3v32_CAPBS, IF_REAL, "Capbs"),
};
IFparm BSIM3v32mPTable[] = { /* model parameters */
IOP( "capmod", BSIM3v32_MOD_CAPMOD, IF_INTEGER, "Capacitance model selector"),
IOP( "mobmod", BSIM3v32_MOD_MOBMOD, IF_INTEGER, "Mobility model selector"),
IOP( "noimod", BSIM3v32_MOD_NOIMOD, IF_INTEGER, "Noise model selector"),
IOP( "nqsmod", BSIM3v32_MOD_NQSMOD, IF_INTEGER, "Non-quasi-static model selector"),
IOP( "acm", BSIM3v32_MOD_ACMMOD, IF_INTEGER, "Area calculation method selector"),
IOP( "calcacm", BSIM3v32_MOD_CALCACM, IF_INTEGER, "Area calculation method ACM=12"),
IOP( "paramchk", BSIM3v32_MOD_PARAMCHK, IF_INTEGER, "Model parameter checking selector"),
IOP( "binunit", BSIM3v32_MOD_BINUNIT, IF_INTEGER, "Bin unit selector"),
IOP( "version", BSIM3v32_MOD_VERSION, IF_STRING, " parameter for model version"),
IOP( "tox", BSIM3v32_MOD_TOX, IF_REAL, "Gate oxide thickness in meters"),
IOP( "toxm", BSIM3v32_MOD_TOXM, IF_REAL, "Gate oxide thickness used in extraction"),
IOP( "cdsc", BSIM3v32_MOD_CDSC, IF_REAL, "Drain/Source and channel coupling capacitance"),
IOP( "cdscb", BSIM3v32_MOD_CDSCB, IF_REAL, "Body-bias dependence of cdsc"),
IOP( "cdscd", BSIM3v32_MOD_CDSCD, IF_REAL, "Drain-bias dependence of cdsc"),
IOP( "cit", BSIM3v32_MOD_CIT, IF_REAL, "Interface state capacitance"),
IOP( "nfactor", BSIM3v32_MOD_NFACTOR, IF_REAL, "Subthreshold swing Coefficient"),
IOP( "xj", BSIM3v32_MOD_XJ, IF_REAL, "Junction depth in meters"),
IOP( "vsat", BSIM3v32_MOD_VSAT, IF_REAL, "Saturation velocity at tnom"),
IOP( "at", BSIM3v32_MOD_AT, IF_REAL, "Temperature coefficient of vsat"),
IOP( "a0", BSIM3v32_MOD_A0, IF_REAL, "Non-uniform depletion width effect coefficient."),
IOP( "ags", BSIM3v32_MOD_AGS, IF_REAL, "Gate bias coefficient of Abulk."),
IOP( "a1", BSIM3v32_MOD_A1, IF_REAL, "Non-saturation effect coefficient"),
IOP( "a2", BSIM3v32_MOD_A2, IF_REAL, "Non-saturation effect coefficient"),
IOP( "keta", BSIM3v32_MOD_KETA, IF_REAL, "Body-bias coefficient of non-uniform depletion width effect."),
IOP( "nsub", BSIM3v32_MOD_NSUB, IF_REAL, "Substrate doping concentration"),
IOP( "nch", BSIM3v32_MOD_NPEAK, IF_REAL, "Channel doping concentration"),
IOP( "ngate", BSIM3v32_MOD_NGATE, IF_REAL, "Poly-gate doping concentration"),
IOP( "gamma1", BSIM3v32_MOD_GAMMA1, IF_REAL, "Vth body coefficient"),
IOP( "gamma2", BSIM3v32_MOD_GAMMA2, IF_REAL, "Vth body coefficient"),
IOP( "vbx", BSIM3v32_MOD_VBX, IF_REAL, "Vth transition body Voltage"),
IOP( "vbm", BSIM3v32_MOD_VBM, IF_REAL, "Maximum body voltage"),
IOP( "xt", BSIM3v32_MOD_XT, IF_REAL, "Doping depth"),
IOP( "k1", BSIM3v32_MOD_K1, IF_REAL, "Bulk effect coefficient 1"),
IOP( "kt1", BSIM3v32_MOD_KT1, IF_REAL, "Temperature coefficient of Vth"),
IOP( "kt1l", BSIM3v32_MOD_KT1L, IF_REAL, "Temperature coefficient of Vth"),
IOP( "kt2", BSIM3v32_MOD_KT2, IF_REAL, "Body-coefficient of kt1"),
IOP( "k2", BSIM3v32_MOD_K2, IF_REAL, "Bulk effect coefficient 2"),
IOP( "k3", BSIM3v32_MOD_K3, IF_REAL, "Narrow width effect coefficient"),
IOP( "k3b", BSIM3v32_MOD_K3B, IF_REAL, "Body effect coefficient of k3"),
IOP( "w0", BSIM3v32_MOD_W0, IF_REAL, "Narrow width effect parameter"),
IOP( "nlx", BSIM3v32_MOD_NLX, IF_REAL, "Lateral non-uniform doping effect"),
IOP( "dvt0", BSIM3v32_MOD_DVT0, IF_REAL, "Short channel effect coeff. 0"),
IOP( "dvt1", BSIM3v32_MOD_DVT1, IF_REAL, "Short channel effect coeff. 1"),
IOP( "dvt2", BSIM3v32_MOD_DVT2, IF_REAL, "Short channel effect coeff. 2"),
IOP( "dvt0w", BSIM3v32_MOD_DVT0W, IF_REAL, "Narrow Width coeff. 0"),
IOP( "dvt1w", BSIM3v32_MOD_DVT1W, IF_REAL, "Narrow Width effect coeff. 1"),
IOP( "dvt2w", BSIM3v32_MOD_DVT2W, IF_REAL, "Narrow Width effect coeff. 2"),
IOP( "drout", BSIM3v32_MOD_DROUT, IF_REAL, "DIBL coefficient of output resistance"),
IOP( "dsub", BSIM3v32_MOD_DSUB, IF_REAL, "DIBL coefficient in the subthreshold region"),
IOP( "vth0", BSIM3v32_MOD_VTH0, IF_REAL,"Threshold voltage"),
IOPR("vtho", BSIM3v32_MOD_VTH0, IF_REAL,"Threshold voltage"),
IOP( "ua", BSIM3v32_MOD_UA, IF_REAL, "Linear gate dependence of mobility"),
IOP( "ua1", BSIM3v32_MOD_UA1, IF_REAL, "Temperature coefficient of ua"),
IOP( "ub", BSIM3v32_MOD_UB, IF_REAL, "Quadratic gate dependence of mobility"),
IOP( "ub1", BSIM3v32_MOD_UB1, IF_REAL, "Temperature coefficient of ub"),
IOP( "uc", BSIM3v32_MOD_UC, IF_REAL, "Body-bias dependence of mobility"),
IOP( "uc1", BSIM3v32_MOD_UC1, IF_REAL, "Temperature coefficient of uc"),
IOP( "u0", BSIM3v32_MOD_U0, IF_REAL, "Low-field mobility at Tnom"),
IOP( "ute", BSIM3v32_MOD_UTE, IF_REAL, "Temperature coefficient of mobility"),
IOP( "voff", BSIM3v32_MOD_VOFF, IF_REAL, "Threshold voltage offset"),
IOP( "tnom", BSIM3v32_MOD_TNOM, IF_REAL, "Parameter measurement temperature"),
IOP( "cgso", BSIM3v32_MOD_CGSO, IF_REAL, "Gate-source overlap capacitance per width"),
IOP( "cgdo", BSIM3v32_MOD_CGDO, IF_REAL, "Gate-drain overlap capacitance per width"),
IOP( "cgbo", BSIM3v32_MOD_CGBO, IF_REAL, "Gate-bulk overlap capacitance per length"),
IOP( "xpart", BSIM3v32_MOD_XPART, IF_REAL, "Channel charge partitioning"),
IOP( "elm", BSIM3v32_MOD_ELM, IF_REAL, "Non-quasi-static Elmore Constant Parameter"),
IOP( "delta", BSIM3v32_MOD_DELTA, IF_REAL, "Effective Vds parameter"),
IOP( "rsh", BSIM3v32_MOD_RSH, IF_REAL, "Source-drain sheet resistance"),
IOP( "rdsw", BSIM3v32_MOD_RDSW, IF_REAL, "Source-drain resistance per width"),
IOP( "prwg", BSIM3v32_MOD_PRWG, IF_REAL, "Gate-bias effect on parasitic resistance "),
IOP( "prwb", BSIM3v32_MOD_PRWB, IF_REAL, "Body-effect on parasitic resistance "),
IOP( "prt", BSIM3v32_MOD_PRT, IF_REAL, "Temperature coefficient of parasitic resistance "),
IOP( "eta0", BSIM3v32_MOD_ETA0, IF_REAL, "Subthreshold region DIBL coefficient"),
IOP( "etab", BSIM3v32_MOD_ETAB, IF_REAL, "Subthreshold region DIBL coefficient"),
IOP( "pclm", BSIM3v32_MOD_PCLM, IF_REAL, "Channel length modulation Coefficient"),
IOP( "pdiblc1", BSIM3v32_MOD_PDIBL1, IF_REAL, "Drain-induced barrier lowering coefficient"),
IOP( "pdiblc2", BSIM3v32_MOD_PDIBL2, IF_REAL, "Drain-induced barrier lowering coefficient"),
IOP( "pdiblcb", BSIM3v32_MOD_PDIBLB, IF_REAL, "Body-effect on drain-induced barrier lowering"),
IOP( "pscbe1", BSIM3v32_MOD_PSCBE1, IF_REAL, "Substrate current body-effect coefficient"),
IOP( "pscbe2", BSIM3v32_MOD_PSCBE2, IF_REAL, "Substrate current body-effect coefficient"),
IOP( "pvag", BSIM3v32_MOD_PVAG, IF_REAL, "Gate dependence of output resistance parameter"),
IOP( "js", BSIM3v32_MOD_JS, IF_REAL, "Source/drain junction reverse saturation current density"),
IOP( "jsw", BSIM3v32_MOD_JSW, IF_REAL, "Sidewall junction reverse saturation current density"),
IOP( "pb", BSIM3v32_MOD_PB, IF_REAL, "Source/drain junction built-in potential"),
IOP( "nj", BSIM3v32_MOD_NJ, IF_REAL, "Source/drain junction emission coefficient"),
IOP( "xti", BSIM3v32_MOD_XTI, IF_REAL, "Junction current temperature exponent"),
IOP( "mj", BSIM3v32_MOD_MJ, IF_REAL, "Source/drain bottom junction capacitance grading coefficient"),
IOP( "pbsw", BSIM3v32_MOD_PBSW, IF_REAL, "Source/drain sidewall junction capacitance built in potential"),
IOP( "mjsw", BSIM3v32_MOD_MJSW, IF_REAL, "Source/drain sidewall junction capacitance grading coefficient"),
IOP( "pbswg", BSIM3v32_MOD_PBSWG, IF_REAL, "Source/drain (gate side) sidewall junction capacitance built in potential"),
IOP( "mjswg", BSIM3v32_MOD_MJSWG, IF_REAL, "Source/drain (gate side) sidewall junction capacitance grading coefficient"),
IOP( "cj", BSIM3v32_MOD_CJ, IF_REAL, "Source/drain bottom junction capacitance per unit area"),
IOP( "vfbcv", BSIM3v32_MOD_VFBCV, IF_REAL, "Flat Band Voltage parameter for capmod=0 only"),
IOP( "vfb", BSIM3v32_MOD_VFB, IF_REAL, "Flat Band Voltage"),
IOP( "cjsw", BSIM3v32_MOD_CJSW, IF_REAL, "Source/drain sidewall junction capacitance per unit periphery"),
IOP( "cjswg", BSIM3v32_MOD_CJSWG, IF_REAL, "Source/drain (gate side) sidewall junction capacitance per unit width"),
IOP( "tpb", BSIM3v32_MOD_TPB, IF_REAL, "Temperature coefficient of pb"),
IOP( "tcj", BSIM3v32_MOD_TCJ, IF_REAL, "Temperature coefficient of cj"),
IOP( "tpbsw", BSIM3v32_MOD_TPBSW, IF_REAL, "Temperature coefficient of pbsw"),
IOP( "tcjsw", BSIM3v32_MOD_TCJSW, IF_REAL, "Temperature coefficient of cjsw"),
IOP( "tpbswg", BSIM3v32_MOD_TPBSWG, IF_REAL, "Temperature coefficient of pbswg"),
IOP( "tcjswg", BSIM3v32_MOD_TCJSWG, IF_REAL, "Temperature coefficient of cjswg"),
IOP( "acde", BSIM3v32_MOD_ACDE, IF_REAL, "Exponential coefficient for finite charge thickness"),
IOP( "moin", BSIM3v32_MOD_MOIN, IF_REAL, "Coefficient for gate-bias dependent surface potential"),
IOP( "noff", BSIM3v32_MOD_NOFF, IF_REAL, "C-V turn-on/off parameter"),
IOP( "voffcv", BSIM3v32_MOD_VOFFCV, IF_REAL, "C-V lateral-shift parameter"),
IOP( "lint", BSIM3v32_MOD_LINT, IF_REAL, "Length reduction parameter"),
IOP( "ll", BSIM3v32_MOD_LL, IF_REAL, "Length reduction parameter"),
IOP( "llc", BSIM3v32_MOD_LLC, IF_REAL, "Length reduction parameter for CV"),
IOP( "lln", BSIM3v32_MOD_LLN, IF_REAL, "Length reduction parameter"),
IOP( "lw", BSIM3v32_MOD_LW, IF_REAL, "Length reduction parameter"),
IOP( "lwc", BSIM3v32_MOD_LWC, IF_REAL, "Length reduction parameter for CV"),
IOP( "lwn", BSIM3v32_MOD_LWN, IF_REAL, "Length reduction parameter"),
IOP( "lwl", BSIM3v32_MOD_LWL, IF_REAL, "Length reduction parameter"),
IOP( "lwlc", BSIM3v32_MOD_LWLC, IF_REAL, "Length reduction parameter for CV"),
IOP( "lmin", BSIM3v32_MOD_LMIN, IF_REAL, "Minimum length for the model"),
IOP( "lmax", BSIM3v32_MOD_LMAX, IF_REAL, "Maximum length for the model"),
IOP( "xl", BSIM3v32_MOD_XL, IF_REAL, "Length correction parameter"),
IOP( "xw", BSIM3v32_MOD_XW, IF_REAL, "Width correction parameter"),
IOP( "wr", BSIM3v32_MOD_WR, IF_REAL, "Width dependence of rds"),
IOP( "wint", BSIM3v32_MOD_WINT, IF_REAL, "Width reduction parameter"),
IOP( "dwg", BSIM3v32_MOD_DWG, IF_REAL, "Width reduction parameter"),
IOP( "dwb", BSIM3v32_MOD_DWB, IF_REAL, "Width reduction parameter"),
IOP( "wl", BSIM3v32_MOD_WL, IF_REAL, "Width reduction parameter"),
IOP( "wlc", BSIM3v32_MOD_WLC, IF_REAL, "Width reduction parameter for CV"),
IOP( "wln", BSIM3v32_MOD_WLN, IF_REAL, "Width reduction parameter"),
IOP( "ww", BSIM3v32_MOD_WW, IF_REAL, "Width reduction parameter"),
IOP( "wwc", BSIM3v32_MOD_WWC, IF_REAL, "Width reduction parameter for CV"),
IOP( "wwn", BSIM3v32_MOD_WWN, IF_REAL, "Width reduction parameter"),
IOP( "wwl", BSIM3v32_MOD_WWL, IF_REAL, "Width reduction parameter"),
IOP( "wwlc", BSIM3v32_MOD_WWLC, IF_REAL, "Width reduction parameter for CV"),
IOP( "wmin", BSIM3v32_MOD_WMIN, IF_REAL, "Minimum width for the model"),
IOP( "wmax", BSIM3v32_MOD_WMAX, IF_REAL, "Maximum width for the model"),
IOP( "b0", BSIM3v32_MOD_B0, IF_REAL, "Abulk narrow width parameter"),
IOP( "b1", BSIM3v32_MOD_B1, IF_REAL, "Abulk narrow width parameter"),
IOP( "cgsl", BSIM3v32_MOD_CGSL, IF_REAL, "New C-V model parameter"),
IOP( "cgdl", BSIM3v32_MOD_CGDL, IF_REAL, "New C-V model parameter"),
IOP( "ckappa", BSIM3v32_MOD_CKAPPA, IF_REAL, "New C-V model parameter"),
IOP( "cf", BSIM3v32_MOD_CF, IF_REAL, "Fringe capacitance parameter"),
IOP( "clc", BSIM3v32_MOD_CLC, IF_REAL, "Vdsat parameter for C-V model"),
IOP( "cle", BSIM3v32_MOD_CLE, IF_REAL, "Vdsat parameter for C-V model"),
IOP( "dwc", BSIM3v32_MOD_DWC, IF_REAL, "Delta W for C-V model"),
IOP( "dlc", BSIM3v32_MOD_DLC, IF_REAL, "Delta L for C-V model"),
IOP( "hdif", BSIM3v32_MOD_HDIF, IF_REAL, "ACM Parameter: Distance Gate - contact"),
IOP( "ldif", BSIM3v32_MOD_LDIF, IF_REAL, "ACM Parameter: Length of LDD Gate-Source/Drain"),
IOP( "ld", BSIM3v32_MOD_LD, IF_REAL, "ACM Parameter: Length of LDD under Gate"),
IOP( "rd", BSIM3v32_MOD_RD, IF_REAL, "ACM Parameter: Resistance of LDD drain side"),
IOP( "rs", BSIM3v32_MOD_RS, IF_REAL, "ACM Parameter: Resistance of LDD source side"),
IOP( "rdc", BSIM3v32_MOD_RDC, IF_REAL, "ACM Parameter: Resistance contact drain side"),
IOP( "rsc", BSIM3v32_MOD_RSC, IF_REAL, "ACM Parameter: Resistance contact source side"),
IOP( "wmlt", BSIM3v32_MOD_WMLT, IF_REAL, "ACM Parameter: Width shrink factor"),
IOP( "lmlt", BSIM3v32_MOD_LMLT, IF_REAL, "Channel length shrink factor"),
IOP( "alpha0", BSIM3v32_MOD_ALPHA0, IF_REAL, "substrate current model parameter"),
IOP( "alpha1", BSIM3v32_MOD_ALPHA1, IF_REAL, "substrate current model parameter"),
IOP( "beta0", BSIM3v32_MOD_BETA0, IF_REAL, "substrate current model parameter"),
IOP( "ijth", BSIM3v32_MOD_IJTH, IF_REAL, "Diode limiting current"),
IOP( "lcdsc", BSIM3v32_MOD_LCDSC, IF_REAL, "Length dependence of cdsc"),
IOP( "lcdscb", BSIM3v32_MOD_LCDSCB, IF_REAL, "Length dependence of cdscb"),
IOP( "lcdscd", BSIM3v32_MOD_LCDSCD, IF_REAL, "Length dependence of cdscd"),
IOP( "lcit", BSIM3v32_MOD_LCIT, IF_REAL, "Length dependence of cit"),
IOP( "lnfactor", BSIM3v32_MOD_LNFACTOR, IF_REAL, "Length dependence of nfactor"),
IOP( "lxj", BSIM3v32_MOD_LXJ, IF_REAL, "Length dependence of xj"),
IOP( "lvsat", BSIM3v32_MOD_LVSAT, IF_REAL, "Length dependence of vsat"),
IOP( "lat", BSIM3v32_MOD_LAT, IF_REAL, "Length dependence of at"),
IOP( "la0", BSIM3v32_MOD_LA0, IF_REAL, "Length dependence of a0"),
IOP( "lags", BSIM3v32_MOD_LAGS, IF_REAL, "Length dependence of ags"),
IOP( "la1", BSIM3v32_MOD_LA1, IF_REAL, "Length dependence of a1"),
IOP( "la2", BSIM3v32_MOD_LA2, IF_REAL, "Length dependence of a2"),
IOP( "lketa", BSIM3v32_MOD_LKETA, IF_REAL, "Length dependence of keta"),
IOP( "lnsub", BSIM3v32_MOD_LNSUB, IF_REAL, "Length dependence of nsub"),
IOP( "lnch", BSIM3v32_MOD_LNPEAK, IF_REAL, "Length dependence of nch"),
IOP( "lngate", BSIM3v32_MOD_LNGATE, IF_REAL, "Length dependence of ngate"),
IOP( "lgamma1", BSIM3v32_MOD_LGAMMA1, IF_REAL, "Length dependence of gamma1"),
IOP( "lgamma2", BSIM3v32_MOD_LGAMMA2, IF_REAL, "Length dependence of gamma2"),
IOP( "lvbx", BSIM3v32_MOD_LVBX, IF_REAL, "Length dependence of vbx"),
IOP( "lvbm", BSIM3v32_MOD_LVBM, IF_REAL, "Length dependence of vbm"),
IOP( "lxt", BSIM3v32_MOD_LXT, IF_REAL, "Length dependence of xt"),
IOP( "lk1", BSIM3v32_MOD_LK1, IF_REAL, "Length dependence of k1"),
IOP( "lkt1", BSIM3v32_MOD_LKT1, IF_REAL, "Length dependence of kt1"),
IOP( "lkt1l", BSIM3v32_MOD_LKT1L, IF_REAL, "Length dependence of kt1l"),
IOP( "lkt2", BSIM3v32_MOD_LKT2, IF_REAL, "Length dependence of kt2"),
IOP( "lk2", BSIM3v32_MOD_LK2, IF_REAL, "Length dependence of k2"),
IOP( "lk3", BSIM3v32_MOD_LK3, IF_REAL, "Length dependence of k3"),
IOP( "lk3b", BSIM3v32_MOD_LK3B, IF_REAL, "Length dependence of k3b"),
IOP( "lw0", BSIM3v32_MOD_LW0, IF_REAL, "Length dependence of w0"),
IOP( "lnlx", BSIM3v32_MOD_LNLX, IF_REAL, "Length dependence of nlx"),
IOP( "ldvt0", BSIM3v32_MOD_LDVT0, IF_REAL, "Length dependence of dvt0"),
IOP( "ldvt1", BSIM3v32_MOD_LDVT1, IF_REAL, "Length dependence of dvt1"),
IOP( "ldvt2", BSIM3v32_MOD_LDVT2, IF_REAL, "Length dependence of dvt2"),
IOP( "ldvt0w", BSIM3v32_MOD_LDVT0W, IF_REAL, "Length dependence of dvt0w"),
IOP( "ldvt1w", BSIM3v32_MOD_LDVT1W, IF_REAL, "Length dependence of dvt1w"),
IOP( "ldvt2w", BSIM3v32_MOD_LDVT2W, IF_REAL, "Length dependence of dvt2w"),
IOP( "ldrout", BSIM3v32_MOD_LDROUT, IF_REAL, "Length dependence of drout"),
IOP( "ldsub", BSIM3v32_MOD_LDSUB, IF_REAL, "Length dependence of dsub"),
IOP( "lvth0", BSIM3v32_MOD_LVTH0, IF_REAL,"Length dependence of vth0"),
IOPR("lvtho", BSIM3v32_MOD_LVTH0, IF_REAL,"Length dependence of vtho"),
IOP( "lua", BSIM3v32_MOD_LUA, IF_REAL, "Length dependence of ua"),
IOP( "lua1", BSIM3v32_MOD_LUA1, IF_REAL, "Length dependence of ua1"),
IOP( "lub", BSIM3v32_MOD_LUB, IF_REAL, "Length dependence of ub"),
IOP( "lub1", BSIM3v32_MOD_LUB1, IF_REAL, "Length dependence of ub1"),
IOP( "luc", BSIM3v32_MOD_LUC, IF_REAL, "Length dependence of uc"),
IOP( "luc1", BSIM3v32_MOD_LUC1, IF_REAL, "Length dependence of uc1"),
IOP( "lu0", BSIM3v32_MOD_LU0, IF_REAL, "Length dependence of u0"),
IOP( "lute", BSIM3v32_MOD_LUTE, IF_REAL, "Length dependence of ute"),
IOP( "lvoff", BSIM3v32_MOD_LVOFF, IF_REAL, "Length dependence of voff"),
IOP( "lelm", BSIM3v32_MOD_LELM, IF_REAL, "Length dependence of elm"),
IOP( "ldelta", BSIM3v32_MOD_LDELTA, IF_REAL, "Length dependence of delta"),
IOP( "lrdsw", BSIM3v32_MOD_LRDSW, IF_REAL, "Length dependence of rdsw "),
IOP( "lprwg", BSIM3v32_MOD_LPRWG, IF_REAL, "Length dependence of prwg "),
IOP( "lprwb", BSIM3v32_MOD_LPRWB, IF_REAL, "Length dependence of prwb "),
IOP( "lprt", BSIM3v32_MOD_LPRT, IF_REAL, "Length dependence of prt "),
IOP( "leta0", BSIM3v32_MOD_LETA0, IF_REAL, "Length dependence of eta0"),
IOP( "letab", BSIM3v32_MOD_LETAB, IF_REAL, "Length dependence of etab"),
IOP( "lpclm", BSIM3v32_MOD_LPCLM, IF_REAL, "Length dependence of pclm"),
IOP( "lpdiblc1", BSIM3v32_MOD_LPDIBL1, IF_REAL, "Length dependence of pdiblc1"),
IOP( "lpdiblc2", BSIM3v32_MOD_LPDIBL2, IF_REAL, "Length dependence of pdiblc2"),
IOP( "lpdiblcb", BSIM3v32_MOD_LPDIBLB, IF_REAL, "Length dependence of pdiblcb"),
IOP( "lpscbe1", BSIM3v32_MOD_LPSCBE1, IF_REAL, "Length dependence of pscbe1"),
IOP( "lpscbe2", BSIM3v32_MOD_LPSCBE2, IF_REAL, "Length dependence of pscbe2"),
IOP( "lpvag", BSIM3v32_MOD_LPVAG, IF_REAL, "Length dependence of pvag"),
IOP( "lwr", BSIM3v32_MOD_LWR, IF_REAL, "Length dependence of wr"),
IOP( "ldwg", BSIM3v32_MOD_LDWG, IF_REAL, "Length dependence of dwg"),
IOP( "ldwb", BSIM3v32_MOD_LDWB, IF_REAL, "Length dependence of dwb"),
IOP( "lb0", BSIM3v32_MOD_LB0, IF_REAL, "Length dependence of b0"),
IOP( "lb1", BSIM3v32_MOD_LB1, IF_REAL, "Length dependence of b1"),
IOP( "lcgsl", BSIM3v32_MOD_LCGSL, IF_REAL, "Length dependence of cgsl"),
IOP( "lcgdl", BSIM3v32_MOD_LCGDL, IF_REAL, "Length dependence of cgdl"),
IOP( "lckappa", BSIM3v32_MOD_LCKAPPA, IF_REAL, "Length dependence of ckappa"),
IOP( "lcf", BSIM3v32_MOD_LCF, IF_REAL, "Length dependence of cf"),
IOP( "lclc", BSIM3v32_MOD_LCLC, IF_REAL, "Length dependence of clc"),
IOP( "lcle", BSIM3v32_MOD_LCLE, IF_REAL, "Length dependence of cle"),
IOP( "lalpha0", BSIM3v32_MOD_LALPHA0, IF_REAL, "Length dependence of alpha0"),
IOP( "lalpha1", BSIM3v32_MOD_LALPHA1, IF_REAL, "Length dependence of alpha1"),
IOP( "lbeta0", BSIM3v32_MOD_LBETA0, IF_REAL, "Length dependence of beta0"),
IOP( "lvfbcv", BSIM3v32_MOD_LVFBCV, IF_REAL, "Length dependence of vfbcv"),
IOP( "lvfb", BSIM3v32_MOD_LVFB, IF_REAL, "Length dependence of vfb"),
IOP( "lacde", BSIM3v32_MOD_LACDE, IF_REAL, "Length dependence of acde"),
IOP( "lmoin", BSIM3v32_MOD_LMOIN, IF_REAL, "Length dependence of moin"),
IOP( "lnoff", BSIM3v32_MOD_LNOFF, IF_REAL, "Length dependence of noff"),
IOP( "lvoffcv", BSIM3v32_MOD_LVOFFCV, IF_REAL, "Length dependence of voffcv"),
IOP( "wcdsc", BSIM3v32_MOD_WCDSC, IF_REAL, "Width dependence of cdsc"),
IOP( "wcdscb", BSIM3v32_MOD_WCDSCB, IF_REAL, "Width dependence of cdscb"),
IOP( "wcdscd", BSIM3v32_MOD_WCDSCD, IF_REAL, "Width dependence of cdscd"),
IOP( "wcit", BSIM3v32_MOD_WCIT, IF_REAL, "Width dependence of cit"),
IOP( "wnfactor", BSIM3v32_MOD_WNFACTOR, IF_REAL, "Width dependence of nfactor"),
IOP( "wxj", BSIM3v32_MOD_WXJ, IF_REAL, "Width dependence of xj"),
IOP( "wvsat", BSIM3v32_MOD_WVSAT, IF_REAL, "Width dependence of vsat"),
IOP( "wat", BSIM3v32_MOD_WAT, IF_REAL, "Width dependence of at"),
IOP( "wa0", BSIM3v32_MOD_WA0, IF_REAL, "Width dependence of a0"),
IOP( "wags", BSIM3v32_MOD_WAGS, IF_REAL, "Width dependence of ags"),
IOP( "wa1", BSIM3v32_MOD_WA1, IF_REAL, "Width dependence of a1"),
IOP( "wa2", BSIM3v32_MOD_WA2, IF_REAL, "Width dependence of a2"),
IOP( "wketa", BSIM3v32_MOD_WKETA, IF_REAL, "Width dependence of keta"),
IOP( "wnsub", BSIM3v32_MOD_WNSUB, IF_REAL, "Width dependence of nsub"),
IOP( "wnch", BSIM3v32_MOD_WNPEAK, IF_REAL, "Width dependence of nch"),
IOP( "wngate", BSIM3v32_MOD_WNGATE, IF_REAL, "Width dependence of ngate"),
IOP( "wgamma1", BSIM3v32_MOD_WGAMMA1, IF_REAL, "Width dependence of gamma1"),
IOP( "wgamma2", BSIM3v32_MOD_WGAMMA2, IF_REAL, "Width dependence of gamma2"),
IOP( "wvbx", BSIM3v32_MOD_WVBX, IF_REAL, "Width dependence of vbx"),
IOP( "wvbm", BSIM3v32_MOD_WVBM, IF_REAL, "Width dependence of vbm"),
IOP( "wxt", BSIM3v32_MOD_WXT, IF_REAL, "Width dependence of xt"),
IOP( "wk1", BSIM3v32_MOD_WK1, IF_REAL, "Width dependence of k1"),
IOP( "wkt1", BSIM3v32_MOD_WKT1, IF_REAL, "Width dependence of kt1"),
IOP( "wkt1l", BSIM3v32_MOD_WKT1L, IF_REAL, "Width dependence of kt1l"),
IOP( "wkt2", BSIM3v32_MOD_WKT2, IF_REAL, "Width dependence of kt2"),
IOP( "wk2", BSIM3v32_MOD_WK2, IF_REAL, "Width dependence of k2"),
IOP( "wk3", BSIM3v32_MOD_WK3, IF_REAL, "Width dependence of k3"),
IOP( "wk3b", BSIM3v32_MOD_WK3B, IF_REAL, "Width dependence of k3b"),
IOP( "ww0", BSIM3v32_MOD_WW0, IF_REAL, "Width dependence of w0"),
IOP( "wnlx", BSIM3v32_MOD_WNLX, IF_REAL, "Width dependence of nlx"),
IOP( "wdvt0", BSIM3v32_MOD_WDVT0, IF_REAL, "Width dependence of dvt0"),
IOP( "wdvt1", BSIM3v32_MOD_WDVT1, IF_REAL, "Width dependence of dvt1"),
IOP( "wdvt2", BSIM3v32_MOD_WDVT2, IF_REAL, "Width dependence of dvt2"),
IOP( "wdvt0w", BSIM3v32_MOD_WDVT0W, IF_REAL, "Width dependence of dvt0w"),
IOP( "wdvt1w", BSIM3v32_MOD_WDVT1W, IF_REAL, "Width dependence of dvt1w"),
IOP( "wdvt2w", BSIM3v32_MOD_WDVT2W, IF_REAL, "Width dependence of dvt2w"),
IOP( "wdrout", BSIM3v32_MOD_WDROUT, IF_REAL, "Width dependence of drout"),
IOP( "wdsub", BSIM3v32_MOD_WDSUB, IF_REAL, "Width dependence of dsub"),
IOP( "wvth0", BSIM3v32_MOD_WVTH0, IF_REAL,"Width dependence of vth0"),
IOPR("wvtho", BSIM3v32_MOD_WVTH0, IF_REAL,"Width dependence of vtho"),
IOP( "wua", BSIM3v32_MOD_WUA, IF_REAL, "Width dependence of ua"),
IOP( "wua1", BSIM3v32_MOD_WUA1, IF_REAL, "Width dependence of ua1"),
IOP( "wub", BSIM3v32_MOD_WUB, IF_REAL, "Width dependence of ub"),
IOP( "wub1", BSIM3v32_MOD_WUB1, IF_REAL, "Width dependence of ub1"),
IOP( "wuc", BSIM3v32_MOD_WUC, IF_REAL, "Width dependence of uc"),
IOP( "wuc1", BSIM3v32_MOD_WUC1, IF_REAL, "Width dependence of uc1"),
IOP( "wu0", BSIM3v32_MOD_WU0, IF_REAL, "Width dependence of u0"),
IOP( "wute", BSIM3v32_MOD_WUTE, IF_REAL, "Width dependence of ute"),
IOP( "wvoff", BSIM3v32_MOD_WVOFF, IF_REAL, "Width dependence of voff"),
IOP( "welm", BSIM3v32_MOD_WELM, IF_REAL, "Width dependence of elm"),
IOP( "wdelta", BSIM3v32_MOD_WDELTA, IF_REAL, "Width dependence of delta"),
IOP( "wrdsw", BSIM3v32_MOD_WRDSW, IF_REAL, "Width dependence of rdsw "),
IOP( "wprwg", BSIM3v32_MOD_WPRWG, IF_REAL, "Width dependence of prwg "),
IOP( "wprwb", BSIM3v32_MOD_WPRWB, IF_REAL, "Width dependence of prwb "),
IOP( "wprt", BSIM3v32_MOD_WPRT, IF_REAL, "Width dependence of prt"),
IOP( "weta0", BSIM3v32_MOD_WETA0, IF_REAL, "Width dependence of eta0"),
IOP( "wetab", BSIM3v32_MOD_WETAB, IF_REAL, "Width dependence of etab"),
IOP( "wpclm", BSIM3v32_MOD_WPCLM, IF_REAL, "Width dependence of pclm"),
IOP( "wpdiblc1", BSIM3v32_MOD_WPDIBL1, IF_REAL, "Width dependence of pdiblc1"),
IOP( "wpdiblc2", BSIM3v32_MOD_WPDIBL2, IF_REAL, "Width dependence of pdiblc2"),
IOP( "wpdiblcb", BSIM3v32_MOD_WPDIBLB, IF_REAL, "Width dependence of pdiblcb"),
IOP( "wpscbe1", BSIM3v32_MOD_WPSCBE1, IF_REAL, "Width dependence of pscbe1"),
IOP( "wpscbe2", BSIM3v32_MOD_WPSCBE2, IF_REAL, "Width dependence of pscbe2"),
IOP( "wpvag", BSIM3v32_MOD_WPVAG, IF_REAL, "Width dependence of pvag"),
IOP( "wwr", BSIM3v32_MOD_WWR, IF_REAL, "Width dependence of wr"),
IOP( "wdwg", BSIM3v32_MOD_WDWG, IF_REAL, "Width dependence of dwg"),
IOP( "wdwb", BSIM3v32_MOD_WDWB, IF_REAL, "Width dependence of dwb"),
IOP( "wb0", BSIM3v32_MOD_WB0, IF_REAL, "Width dependence of b0"),
IOP( "wb1", BSIM3v32_MOD_WB1, IF_REAL, "Width dependence of b1"),
IOP( "wcgsl", BSIM3v32_MOD_WCGSL, IF_REAL, "Width dependence of cgsl"),
IOP( "wcgdl", BSIM3v32_MOD_WCGDL, IF_REAL, "Width dependence of cgdl"),
IOP( "wckappa", BSIM3v32_MOD_WCKAPPA, IF_REAL, "Width dependence of ckappa"),
IOP( "wcf", BSIM3v32_MOD_WCF, IF_REAL, "Width dependence of cf"),
IOP( "wclc", BSIM3v32_MOD_WCLC, IF_REAL, "Width dependence of clc"),
IOP( "wcle", BSIM3v32_MOD_WCLE, IF_REAL, "Width dependence of cle"),
IOP( "walpha0", BSIM3v32_MOD_WALPHA0, IF_REAL, "Width dependence of alpha0"),
IOP( "walpha1", BSIM3v32_MOD_WALPHA1, IF_REAL, "Width dependence of alpha1"),
IOP( "wbeta0", BSIM3v32_MOD_WBETA0, IF_REAL, "Width dependence of beta0"),
IOP( "wvfbcv", BSIM3v32_MOD_WVFBCV, IF_REAL, "Width dependence of vfbcv"),
IOP( "wvfb", BSIM3v32_MOD_WVFB, IF_REAL, "Width dependence of vfb"),
IOP( "wacde", BSIM3v32_MOD_WACDE, IF_REAL, "Width dependence of acde"),
IOP( "wmoin", BSIM3v32_MOD_WMOIN, IF_REAL, "Width dependence of moin"),
IOP( "wnoff", BSIM3v32_MOD_WNOFF, IF_REAL, "Width dependence of noff"),
IOP( "wvoffcv", BSIM3v32_MOD_WVOFFCV, IF_REAL, "Width dependence of voffcv"),
IOP( "pcdsc", BSIM3v32_MOD_PCDSC, IF_REAL, "Cross-term dependence of cdsc"),
IOP( "pcdscb", BSIM3v32_MOD_PCDSCB, IF_REAL, "Cross-term dependence of cdscb"),
IOP( "pcdscd", BSIM3v32_MOD_PCDSCD, IF_REAL, "Cross-term dependence of cdscd"),
IOP( "pcit", BSIM3v32_MOD_PCIT, IF_REAL, "Cross-term dependence of cit"),
IOP( "pnfactor", BSIM3v32_MOD_PNFACTOR, IF_REAL, "Cross-term dependence of nfactor"),
IOP( "pxj", BSIM3v32_MOD_PXJ, IF_REAL, "Cross-term dependence of xj"),
IOP( "pvsat", BSIM3v32_MOD_PVSAT, IF_REAL, "Cross-term dependence of vsat"),
IOP( "pat", BSIM3v32_MOD_PAT, IF_REAL, "Cross-term dependence of at"),
IOP( "pa0", BSIM3v32_MOD_PA0, IF_REAL, "Cross-term dependence of a0"),
IOP( "pags", BSIM3v32_MOD_PAGS, IF_REAL, "Cross-term dependence of ags"),
IOP( "pa1", BSIM3v32_MOD_PA1, IF_REAL, "Cross-term dependence of a1"),
IOP( "pa2", BSIM3v32_MOD_PA2, IF_REAL, "Cross-term dependence of a2"),
IOP( "pketa", BSIM3v32_MOD_PKETA, IF_REAL, "Cross-term dependence of keta"),
IOP( "pnsub", BSIM3v32_MOD_PNSUB, IF_REAL, "Cross-term dependence of nsub"),
IOP( "pnch", BSIM3v32_MOD_PNPEAK, IF_REAL, "Cross-term dependence of nch"),
IOP( "pngate", BSIM3v32_MOD_PNGATE, IF_REAL, "Cross-term dependence of ngate"),
IOP( "pgamma1", BSIM3v32_MOD_PGAMMA1, IF_REAL, "Cross-term dependence of gamma1"),
IOP( "pgamma2", BSIM3v32_MOD_PGAMMA2, IF_REAL, "Cross-term dependence of gamma2"),
IOP( "pvbx", BSIM3v32_MOD_PVBX, IF_REAL, "Cross-term dependence of vbx"),
IOP( "pvbm", BSIM3v32_MOD_PVBM, IF_REAL, "Cross-term dependence of vbm"),
IOP( "pxt", BSIM3v32_MOD_PXT, IF_REAL, "Cross-term dependence of xt"),
IOP( "pk1", BSIM3v32_MOD_PK1, IF_REAL, "Cross-term dependence of k1"),
IOP( "pkt1", BSIM3v32_MOD_PKT1, IF_REAL, "Cross-term dependence of kt1"),
IOP( "pkt1l", BSIM3v32_MOD_PKT1L, IF_REAL, "Cross-term dependence of kt1l"),
IOP( "pkt2", BSIM3v32_MOD_PKT2, IF_REAL, "Cross-term dependence of kt2"),
IOP( "pk2", BSIM3v32_MOD_PK2, IF_REAL, "Cross-term dependence of k2"),
IOP( "pk3", BSIM3v32_MOD_PK3, IF_REAL, "Cross-term dependence of k3"),
IOP( "pk3b", BSIM3v32_MOD_PK3B, IF_REAL, "Cross-term dependence of k3b"),
IOP( "pw0", BSIM3v32_MOD_PW0, IF_REAL, "Cross-term dependence of w0"),
IOP( "pnlx", BSIM3v32_MOD_PNLX, IF_REAL, "Cross-term dependence of nlx"),
IOP( "pdvt0", BSIM3v32_MOD_PDVT0, IF_REAL, "Cross-term dependence of dvt0"),
IOP( "pdvt1", BSIM3v32_MOD_PDVT1, IF_REAL, "Cross-term dependence of dvt1"),
IOP( "pdvt2", BSIM3v32_MOD_PDVT2, IF_REAL, "Cross-term dependence of dvt2"),
IOP( "pdvt0w", BSIM3v32_MOD_PDVT0W, IF_REAL, "Cross-term dependence of dvt0w"),
IOP( "pdvt1w", BSIM3v32_MOD_PDVT1W, IF_REAL, "Cross-term dependence of dvt1w"),
IOP( "pdvt2w", BSIM3v32_MOD_PDVT2W, IF_REAL, "Cross-term dependence of dvt2w"),
IOP( "pdrout", BSIM3v32_MOD_PDROUT, IF_REAL, "Cross-term dependence of drout"),
IOP( "pdsub", BSIM3v32_MOD_PDSUB, IF_REAL, "Cross-term dependence of dsub"),
IOP( "pvth0", BSIM3v32_MOD_PVTH0, IF_REAL,"Cross-term dependence of vth0"),
IOPR("pvtho", BSIM3v32_MOD_PVTH0, IF_REAL,"Cross-term dependence of vtho"),
IOP( "pua", BSIM3v32_MOD_PUA, IF_REAL, "Cross-term dependence of ua"),
IOP( "pua1", BSIM3v32_MOD_PUA1, IF_REAL, "Cross-term dependence of ua1"),
IOP( "pub", BSIM3v32_MOD_PUB, IF_REAL, "Cross-term dependence of ub"),
IOP( "pub1", BSIM3v32_MOD_PUB1, IF_REAL, "Cross-term dependence of ub1"),
IOP( "puc", BSIM3v32_MOD_PUC, IF_REAL, "Cross-term dependence of uc"),
IOP( "puc1", BSIM3v32_MOD_PUC1, IF_REAL, "Cross-term dependence of uc1"),
IOP( "pu0", BSIM3v32_MOD_PU0, IF_REAL, "Cross-term dependence of u0"),
IOP( "pute", BSIM3v32_MOD_PUTE, IF_REAL, "Cross-term dependence of ute"),
IOP( "pvoff", BSIM3v32_MOD_PVOFF, IF_REAL, "Cross-term dependence of voff"),
IOP( "pelm", BSIM3v32_MOD_PELM, IF_REAL, "Cross-term dependence of elm"),
IOP( "pdelta", BSIM3v32_MOD_PDELTA, IF_REAL, "Cross-term dependence of delta"),
IOP( "prdsw", BSIM3v32_MOD_PRDSW, IF_REAL, "Cross-term dependence of rdsw "),
IOP( "pprwg", BSIM3v32_MOD_PPRWG, IF_REAL, "Cross-term dependence of prwg "),
IOP( "pprwb", BSIM3v32_MOD_PPRWB, IF_REAL, "Cross-term dependence of prwb "),
IOP( "pprt", BSIM3v32_MOD_PPRT, IF_REAL, "Cross-term dependence of prt "),
IOP( "peta0", BSIM3v32_MOD_PETA0, IF_REAL, "Cross-term dependence of eta0"),
IOP( "petab", BSIM3v32_MOD_PETAB, IF_REAL, "Cross-term dependence of etab"),
IOP( "ppclm", BSIM3v32_MOD_PPCLM, IF_REAL, "Cross-term dependence of pclm"),
IOP( "ppdiblc1", BSIM3v32_MOD_PPDIBL1, IF_REAL, "Cross-term dependence of pdiblc1"),
IOP( "ppdiblc2", BSIM3v32_MOD_PPDIBL2, IF_REAL, "Cross-term dependence of pdiblc2"),
IOP( "ppdiblcb", BSIM3v32_MOD_PPDIBLB, IF_REAL, "Cross-term dependence of pdiblcb"),
IOP( "ppscbe1", BSIM3v32_MOD_PPSCBE1, IF_REAL, "Cross-term dependence of pscbe1"),
IOP( "ppscbe2", BSIM3v32_MOD_PPSCBE2, IF_REAL, "Cross-term dependence of pscbe2"),
IOP( "ppvag", BSIM3v32_MOD_PPVAG, IF_REAL, "Cross-term dependence of pvag"),
IOP( "pwr", BSIM3v32_MOD_PWR, IF_REAL, "Cross-term dependence of wr"),
IOP( "pdwg", BSIM3v32_MOD_PDWG, IF_REAL, "Cross-term dependence of dwg"),
IOP( "pdwb", BSIM3v32_MOD_PDWB, IF_REAL, "Cross-term dependence of dwb"),
IOP( "pb0", BSIM3v32_MOD_PB0, IF_REAL, "Cross-term dependence of b0"),
IOP( "pb1", BSIM3v32_MOD_PB1, IF_REAL, "Cross-term dependence of b1"),
IOP( "pcgsl", BSIM3v32_MOD_PCGSL, IF_REAL, "Cross-term dependence of cgsl"),
IOP( "pcgdl", BSIM3v32_MOD_PCGDL, IF_REAL, "Cross-term dependence of cgdl"),
IOP( "pckappa", BSIM3v32_MOD_PCKAPPA, IF_REAL, "Cross-term dependence of ckappa"),
IOP( "pcf", BSIM3v32_MOD_PCF, IF_REAL, "Cross-term dependence of cf"),
IOP( "pclc", BSIM3v32_MOD_PCLC, IF_REAL, "Cross-term dependence of clc"),
IOP( "pcle", BSIM3v32_MOD_PCLE, IF_REAL, "Cross-term dependence of cle"),
IOP( "palpha0", BSIM3v32_MOD_PALPHA0, IF_REAL, "Cross-term dependence of alpha0"),
IOP( "palpha1", BSIM3v32_MOD_PALPHA1, IF_REAL, "Cross-term dependence of alpha1"),
IOP( "pbeta0", BSIM3v32_MOD_PBETA0, IF_REAL, "Cross-term dependence of beta0"),
IOP( "pvfbcv", BSIM3v32_MOD_PVFBCV, IF_REAL, "Cross-term dependence of vfbcv"),
IOP( "pvfb", BSIM3v32_MOD_PVFB, IF_REAL, "Cross-term dependence of vfb"),
IOP( "pacde", BSIM3v32_MOD_PACDE, IF_REAL, "Cross-term dependence of acde"),
IOP( "pmoin", BSIM3v32_MOD_PMOIN, IF_REAL, "Cross-term dependence of moin"),
IOP( "pnoff", BSIM3v32_MOD_PNOFF, IF_REAL, "Cross-term dependence of noff"),
IOP( "pvoffcv", BSIM3v32_MOD_PVOFFCV, IF_REAL, "Cross-term dependence of voffcv"),
IOP( "noia", BSIM3v32_MOD_NOIA, IF_REAL, "Flicker noise parameter"),
IOP( "noib", BSIM3v32_MOD_NOIB, IF_REAL, "Flicker noise parameter"),
IOP( "noic", BSIM3v32_MOD_NOIC, IF_REAL, "Flicker noise parameter"),
IOP( "em", BSIM3v32_MOD_EM, IF_REAL, "Flicker noise parameter"),
IOP( "ef", BSIM3v32_MOD_EF, IF_REAL, "Flicker noise frequency exponent"),
IOP( "af", BSIM3v32_MOD_AF, IF_REAL, "Flicker noise exponent"),
IOP( "kf", BSIM3v32_MOD_KF, IF_REAL, "Flicker noise coefficient"),
IOP("vgs_max", BSIM3v32_MOD_VGS_MAX, IF_REAL, "maximum voltage G-S branch"),
IOP("vgd_max", BSIM3v32_MOD_VGD_MAX, IF_REAL, "maximum voltage G-D branch"),
IOP("vgb_max", BSIM3v32_MOD_VGB_MAX, IF_REAL, "maximum voltage G-B branch"),
IOP("vds_max", BSIM3v32_MOD_VDS_MAX, IF_REAL, "maximum voltage D-S branch"),
IOP("vbs_max", BSIM3v32_MOD_VBS_MAX, IF_REAL, "maximum voltage B-S branch"),
IOP("vbd_max", BSIM3v32_MOD_VBD_MAX, IF_REAL, "maximum voltage B-D branch"),
IOP("vgsr_max", BSIM3v32_MOD_VGSR_MAX, IF_REAL, "maximum voltage G-S branch"),
IOP("vgdr_max", BSIM3v32_MOD_VGDR_MAX, IF_REAL, "maximum voltage G-D branch"),
IOP("vgbr_max", BSIM3v32_MOD_VGBR_MAX, IF_REAL, "maximum voltage G-B branch"),
IOP("vbsr_max", BSIM3v32_MOD_VBSR_MAX, IF_REAL, "maximum voltage B-S branch"),
IOP("vbdr_max", BSIM3v32_MOD_VBDR_MAX, IF_REAL, "maximum voltage B-D branch"),
IP( "nmos", BSIM3v32_MOD_NMOS, IF_FLAG, "Flag to indicate NMOS"),
IP( "pmos", BSIM3v32_MOD_PMOS, IF_FLAG, "Flag to indicate PMOS"),
};
char *BSIM3v32names[] = {
"Drain",
"Gate",
"Source",
"Bulk",
"Charge"
};
int BSIM3v32nSize = NUMELEMS(BSIM3v32names);
int BSIM3v32pTSize = NUMELEMS(BSIM3v32pTable);
int BSIM3v32mPTSize = NUMELEMS(BSIM3v32mPTable);
int BSIM3v32iSize = sizeof(BSIM3v32instance);
int BSIM3v32mSize = sizeof(BSIM3v32model);

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src/spicelib/devices/bsim3v32simd/b3v32acld.c Normal file
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/**** BSIM3v3.2.4, Released by Xuemei Xi 12/14/2001 ****/
/**********
* Copyright 2001 Regents of the University of California. All rights reserved.
* File: b3acld.c of BSIM3v3.2.4
* Author: 1995 Min-Chie Jeng and Mansun Chan
* Author: 1997-1999 Weidong Liu.
* Author: 2001 Xuemei Xi
* Modified by Paolo Nenzi 2002 and Dietmar Warning 2003
**********/
#include "ngspice/ngspice.h"
#include "ngspice/cktdefs.h"
#include "bsim3v32def.h"
#include "ngspice/sperror.h"
#include "ngspice/suffix.h"
int
BSIM3v32SIMDacLoad (GENmodel *inModel, CKTcircuit *ckt)
{
BSIM3v32model *model = (BSIM3v32model*)inModel;
BSIM3v32instance *here;
double xcggb, xcgdb, xcgsb, xcbgb, xcbdb, xcbsb, xcddb, xcssb, xcdgb;
double gdpr, gspr, gds, gbd, gbs, capbd, capbs, xcsgb, xcdsb, xcsdb;
double cggb, cgdb, cgsb, cbgb, cbdb, cbsb, cddb, cdgb, cdsb, omega;
double GSoverlapCap, GDoverlapCap, GBoverlapCap, FwdSum, RevSum, Gm, Gmbs;
double dxpart, sxpart, xgtg, xgtd, xgts, xgtb;
double xcqgb = 0.0, xcqdb = 0.0, xcqsb = 0.0, xcqbb = 0.0;
double gbspsp, gbbdp, gbbsp, gbspg, gbspb;
double gbspdp, gbdpdp, gbdpg, gbdpb, gbdpsp;
double ddxpart_dVd, ddxpart_dVg, ddxpart_dVb, ddxpart_dVs;
double dsxpart_dVd, dsxpart_dVg, dsxpart_dVb, dsxpart_dVs;
double T1, CoxWL, qcheq, Cdg, Cdd, Cds, Csg, Csd, Css;
double ScalingFactor = 1.0e-9;
double m;
omega = ckt->CKTomega;
for (; model != NULL; model = BSIM3v32nextModel(model))
{ for (here = BSIM3v32instances(model); here!= NULL;
here = BSIM3v32nextInstance(here))
{
if (here->BSIM3v32mode >= 0)
{ Gm = here->BSIM3v32gm;
Gmbs = here->BSIM3v32gmbs;
FwdSum = Gm + Gmbs;
RevSum = 0.0;
gbbdp = -here->BSIM3v32gbds;
gbbsp = here->BSIM3v32gbds + here->BSIM3v32gbgs + here->BSIM3v32gbbs;
gbdpg = here->BSIM3v32gbgs;
gbdpb = here->BSIM3v32gbbs;
gbdpdp = here->BSIM3v32gbds;
gbdpsp = -(gbdpg + gbdpb + gbdpdp);
gbspdp = 0.0;
gbspg = 0.0;
gbspb = 0.0;
gbspsp = 0.0;
if (here->BSIM3v32nqsMod == 0)
{ cggb = here->BSIM3v32cggb;
cgsb = here->BSIM3v32cgsb;
cgdb = here->BSIM3v32cgdb;
cbgb = here->BSIM3v32cbgb;
cbsb = here->BSIM3v32cbsb;
cbdb = here->BSIM3v32cbdb;
cdgb = here->BSIM3v32cdgb;
cdsb = here->BSIM3v32cdsb;
cddb = here->BSIM3v32cddb;
xgtg = xgtd = xgts = xgtb = 0.0;
sxpart = 0.6;
dxpart = 0.4;
ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
= ddxpart_dVs = 0.0;
dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
= dsxpart_dVs = 0.0;
}
else
{ cggb = cgdb = cgsb = 0.0;
cbgb = cbdb = cbsb = 0.0;
cdgb = cddb = cdsb = 0.0;
xgtg = here->BSIM3v32gtg;
xgtd = here->BSIM3v32gtd;
xgts = here->BSIM3v32gts;
xgtb = here->BSIM3v32gtb;
xcqgb = here->BSIM3v32cqgb * omega;
xcqdb = here->BSIM3v32cqdb * omega;
xcqsb = here->BSIM3v32cqsb * omega;
xcqbb = here->BSIM3v32cqbb * omega;
CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV
* here->pParam->BSIM3v32leffCV;
qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk);
if (fabs(qcheq) <= 1.0e-5 * CoxWL)
{ if (model->BSIM3v32xpart < 0.5)
{ dxpart = 0.4;
}
else if (model->BSIM3v32xpart > 0.5)
{ dxpart = 0.0;
}
else
{ dxpart = 0.5;
}
ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
= ddxpart_dVs = 0.0;
}
else
{ dxpart = here->BSIM3v32qdrn / qcheq;
Cdd = here->BSIM3v32cddb;
Csd = -(here->BSIM3v32cgdb + here->BSIM3v32cddb
+ here->BSIM3v32cbdb);
ddxpart_dVd = (Cdd - dxpart * (Cdd + Csd)) / qcheq;
Cdg = here->BSIM3v32cdgb;
Csg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb
+ here->BSIM3v32cbgb);
ddxpart_dVg = (Cdg - dxpart * (Cdg + Csg)) / qcheq;
Cds = here->BSIM3v32cdsb;
Css = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb
+ here->BSIM3v32cbsb);
ddxpart_dVs = (Cds - dxpart * (Cds + Css)) / qcheq;
ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg
+ ddxpart_dVs);
}
sxpart = 1.0 - dxpart;
dsxpart_dVd = -ddxpart_dVd;
dsxpart_dVg = -ddxpart_dVg;
dsxpart_dVs = -ddxpart_dVs;
dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs);
}
}
else
{ Gm = -here->BSIM3v32gm;
Gmbs = -here->BSIM3v32gmbs;
FwdSum = 0.0;
RevSum = -(Gm + Gmbs);
gbbsp = -here->BSIM3v32gbds;
gbbdp = here->BSIM3v32gbds + here->BSIM3v32gbgs + here->BSIM3v32gbbs;
gbdpg = 0.0;
gbdpsp = 0.0;
gbdpb = 0.0;
gbdpdp = 0.0;
gbspg = here->BSIM3v32gbgs;
gbspsp = here->BSIM3v32gbds;
gbspb = here->BSIM3v32gbbs;
gbspdp = -(gbspg + gbspsp + gbspb);
if (here->BSIM3v32nqsMod == 0)
{ cggb = here->BSIM3v32cggb;
cgsb = here->BSIM3v32cgdb;
cgdb = here->BSIM3v32cgsb;
cbgb = here->BSIM3v32cbgb;
cbsb = here->BSIM3v32cbdb;
cbdb = here->BSIM3v32cbsb;
cdgb = -(here->BSIM3v32cdgb + cggb + cbgb);
cdsb = -(here->BSIM3v32cddb + cgsb + cbsb);
cddb = -(here->BSIM3v32cdsb + cgdb + cbdb);
xgtg = xgtd = xgts = xgtb = 0.0;
sxpart = 0.4;
dxpart = 0.6;
ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
= ddxpart_dVs = 0.0;
dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
= dsxpart_dVs = 0.0;
}
else
{ cggb = cgdb = cgsb = 0.0;
cbgb = cbdb = cbsb = 0.0;
cdgb = cddb = cdsb = 0.0;
xgtg = here->BSIM3v32gtg;
xgtd = here->BSIM3v32gts;
xgts = here->BSIM3v32gtd;
xgtb = here->BSIM3v32gtb;
xcqgb = here->BSIM3v32cqgb * omega;
xcqdb = here->BSIM3v32cqsb * omega;
xcqsb = here->BSIM3v32cqdb * omega;
xcqbb = here->BSIM3v32cqbb * omega;
CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV
* here->pParam->BSIM3v32leffCV;
qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk);
if (fabs(qcheq) <= 1.0e-5 * CoxWL)
{ if (model->BSIM3v32xpart < 0.5)
{ sxpart = 0.4;
}
else if (model->BSIM3v32xpart > 0.5)
{ sxpart = 0.0;
}
else
{ sxpart = 0.5;
}
dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
= dsxpart_dVs = 0.0;
}
else
{ sxpart = here->BSIM3v32qdrn / qcheq;
Css = here->BSIM3v32cddb;
Cds = -(here->BSIM3v32cgdb + here->BSIM3v32cddb
+ here->BSIM3v32cbdb);
dsxpart_dVs = (Css - sxpart * (Css + Cds)) / qcheq;
Csg = here->BSIM3v32cdgb;
Cdg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb
+ here->BSIM3v32cbgb);
dsxpart_dVg = (Csg - sxpart * (Csg + Cdg)) / qcheq;
Csd = here->BSIM3v32cdsb;
Cdd = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb
+ here->BSIM3v32cbsb);
dsxpart_dVd = (Csd - sxpart * (Csd + Cdd)) / qcheq;
dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg
+ dsxpart_dVs);
}
dxpart = 1.0 - sxpart;
ddxpart_dVd = -dsxpart_dVd;
ddxpart_dVg = -dsxpart_dVg;
ddxpart_dVs = -dsxpart_dVs;
ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs);
}
}
T1 = *(ckt->CKTstate0 + here->BSIM3v32qdef) * here->BSIM3v32gtau;
gdpr = here->BSIM3v32drainConductance;
gspr = here->BSIM3v32sourceConductance;
gds = here->BSIM3v32gds;
gbd = here->BSIM3v32gbd;
gbs = here->BSIM3v32gbs;
capbd = here->BSIM3v32capbd;
capbs = here->BSIM3v32capbs;
GSoverlapCap = here->BSIM3v32cgso;
GDoverlapCap = here->BSIM3v32cgdo;
GBoverlapCap = here->pParam->BSIM3v32cgbo;
xcdgb = (cdgb - GDoverlapCap) * omega;
xcddb = (cddb + capbd + GDoverlapCap) * omega;
xcdsb = cdsb * omega;
xcsgb = -(cggb + cbgb + cdgb + GSoverlapCap) * omega;
xcsdb = -(cgdb + cbdb + cddb) * omega;
xcssb = (capbs + GSoverlapCap - (cgsb + cbsb + cdsb)) * omega;
xcggb = (cggb + GDoverlapCap + GSoverlapCap + GBoverlapCap)
* omega;
xcgdb = (cgdb - GDoverlapCap ) * omega;
xcgsb = (cgsb - GSoverlapCap) * omega;
xcbgb = (cbgb - GBoverlapCap) * omega;
xcbdb = (cbdb - capbd ) * omega;
xcbsb = (cbsb - capbs ) * omega;
m = here->BSIM3v32m;
*(here->BSIM3v32GgPtr + 1) += m * xcggb;
*(here->BSIM3v32BbPtr + 1) -=
m * (xcbgb + xcbdb + xcbsb);
*(here->BSIM3v32DPdpPtr + 1) += m * xcddb;
*(here->BSIM3v32SPspPtr + 1) += m * xcssb;
*(here->BSIM3v32GbPtr + 1) -=
m * (xcggb + xcgdb + xcgsb);
*(here->BSIM3v32GdpPtr + 1) += m * xcgdb;
*(here->BSIM3v32GspPtr + 1) += m * xcgsb;
*(here->BSIM3v32BgPtr + 1) += m * xcbgb;
*(here->BSIM3v32BdpPtr + 1) += m * xcbdb;
*(here->BSIM3v32BspPtr + 1) += m * xcbsb;
*(here->BSIM3v32DPgPtr + 1) += m * xcdgb;
*(here->BSIM3v32DPbPtr + 1) -=
m * (xcdgb + xcddb + xcdsb);
*(here->BSIM3v32DPspPtr + 1) += m * xcdsb;
*(here->BSIM3v32SPgPtr + 1) += m * xcsgb;
*(here->BSIM3v32SPbPtr + 1) -=
m * (xcsgb + xcsdb + xcssb);
*(here->BSIM3v32SPdpPtr + 1) += m * xcsdb;
*(here->BSIM3v32DdPtr) += m * gdpr;
*(here->BSIM3v32SsPtr) += m * gspr;
*(here->BSIM3v32BbPtr) +=
m * (gbd + gbs - here->BSIM3v32gbbs);
*(here->BSIM3v32DPdpPtr) +=
m * (gdpr + gds + gbd + RevSum +
dxpart * xgtd + T1 * ddxpart_dVd +
gbdpdp);
*(here->BSIM3v32SPspPtr) +=
m * (gspr + gds + gbs + FwdSum +
sxpart * xgts + T1 * dsxpart_dVs +
gbspsp);
*(here->BSIM3v32DdpPtr) -= m * gdpr;
*(here->BSIM3v32SspPtr) -= m * gspr;
*(here->BSIM3v32BgPtr) -= m * here->BSIM3v32gbgs;
*(here->BSIM3v32BdpPtr) -= m * (gbd - gbbdp);
*(here->BSIM3v32BspPtr) -= m * (gbs - gbbsp);
*(here->BSIM3v32DPdPtr) -= m * gdpr;
*(here->BSIM3v32DPgPtr) +=
m * (Gm + dxpart * xgtg + T1 * ddxpart_dVg +
gbdpg);
*(here->BSIM3v32DPbPtr) -=
m * (gbd - Gmbs - dxpart * xgtb -
T1 * ddxpart_dVb - gbdpb);
*(here->BSIM3v32DPspPtr) -=
m * (gds + FwdSum - dxpart * xgts -
T1 * ddxpart_dVs - gbdpsp);
*(here->BSIM3v32SPgPtr) -=
m * (Gm - sxpart * xgtg - T1 * dsxpart_dVg -
gbspg);
*(here->BSIM3v32SPsPtr) -= m * gspr;
*(here->BSIM3v32SPbPtr) -=
m * (gbs + Gmbs - sxpart * xgtb -
T1 * dsxpart_dVb - gbspb);
*(here->BSIM3v32SPdpPtr) -=
m * (gds + RevSum - sxpart * xgtd -
T1 * dsxpart_dVd - gbspdp);
*(here->BSIM3v32GgPtr) -= m * xgtg;
*(here->BSIM3v32GbPtr) -= m * xgtb;
*(here->BSIM3v32GdpPtr) -= m * xgtd;
*(here->BSIM3v32GspPtr) -= m * xgts;
if (here->BSIM3v32nqsMod)
{
*(here->BSIM3v32QqPtr + 1) +=
m * omega * ScalingFactor;
*(here->BSIM3v32QgPtr + 1) -= m * xcqgb;
*(here->BSIM3v32QdpPtr + 1) -= m * xcqdb;
*(here->BSIM3v32QspPtr + 1) -= m * xcqsb;
*(here->BSIM3v32QbPtr + 1) -= m * xcqbb;
*(here->BSIM3v32QqPtr) += m * here->BSIM3v32gtau;
*(here->BSIM3v32DPqPtr) +=
m * (dxpart * here->BSIM3v32gtau);
*(here->BSIM3v32SPqPtr) +=
m * (sxpart * here->BSIM3v32gtau);
*(here->BSIM3v32GqPtr) -= m * here->BSIM3v32gtau;
*(here->BSIM3v32QgPtr) += m * xgtg;
*(here->BSIM3v32QdpPtr) += m * xgtd;
*(here->BSIM3v32QspPtr) += m * xgts;
*(here->BSIM3v32QbPtr) += m * xgtb;
}
}
}
return(OK);
}

0
src/spicelib/devices/bsim3v32/b3v32acm.c → src/spicelib/devices/bsim3v32simd/b3v32acm.c
View File

0
src/spicelib/devices/bsim3v32/b3v32acm.h → src/spicelib/devices/bsim3v32simd/b3v32acm.h
View File

239
src/spicelib/devices/bsim3v32simd/b3v32ask.c Normal file
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@ -0,0 +1,239 @@
/**** BSIM3v3.2.4, Released by Xuemei Xi 12/14/2001 ****/
/**********
* Copyright 2001 Regents of the University of California. All rights reserved.
* File: b3ask.c of BSIM3v3.2.4
* Author: 1995 Min-Chie Jeng and Mansun Chan
* Author: 1997-1999 Weidong Liu.
* Author: 2001 Xuemei Xi
* Modified bt Paolo Nenzi 2002 and Dietmar Warning 2003
**********/
#include "ngspice/ngspice.h"
#include "ngspice/ifsim.h"
#include "ngspice/cktdefs.h"
#include "ngspice/devdefs.h"
#include "bsim3v32def.h"
#include "ngspice/sperror.h"
#include "ngspice/suffix.h"
int
BSIM3v32SIMDask (CKTcircuit *ckt, GENinstance *inst, int which, IFvalue *value,
IFvalue *select)
{
BSIM3v32instance *here = (BSIM3v32instance*)inst;
BSIM3v32model *model = BSIM3v32modPtr(here); /* for lmlt */
NG_IGNORE(select);
switch(which)
{ case BSIM3v32_L:
value->rValue = here->BSIM3v32l;
value->rValue *= model->BSIM3v32lmlt;
return(OK);
case BSIM3v32_W:
value->rValue = here->BSIM3v32w;
return(OK);
case BSIM3v32_M:
value->rValue = here->BSIM3v32m;
return (OK);
case BSIM3v32_AS:
value->rValue = here->BSIM3v32sourceArea;
return(OK);
case BSIM3v32_AD:
value->rValue = here->BSIM3v32drainArea;
return(OK);
case BSIM3v32_PS:
value->rValue = here->BSIM3v32sourcePerimeter;
return(OK);
case BSIM3v32_PD:
value->rValue = here->BSIM3v32drainPerimeter;
return(OK);
case BSIM3v32_NRS:
value->rValue = here->BSIM3v32sourceSquares;
return(OK);
case BSIM3v32_NRD:
value->rValue = here->BSIM3v32drainSquares;
return(OK);
case BSIM3v32_OFF:
value->rValue = here->BSIM3v32off;
return(OK);
case BSIM3v32_NQSMOD:
value->iValue = here->BSIM3v32nqsMod;
return(OK);
case BSIM3v32_GEO:
value->iValue = here->BSIM3v32geo;
return(OK);
case BSIM3v32_DELVTO:
value->rValue = here->BSIM3v32delvto;
return(OK);
case BSIM3v32_MULU0:
value->rValue = here->BSIM3v32mulu0;
return(OK);
case BSIM3v32_IC_VBS:
value->rValue = here->BSIM3v32icVBS;
return(OK);
case BSIM3v32_IC_VDS:
value->rValue = here->BSIM3v32icVDS;
return(OK);
case BSIM3v32_IC_VGS:
value->rValue = here->BSIM3v32icVGS;
return(OK);
case BSIM3v32_DNODE:
value->iValue = here->BSIM3v32dNode;
return(OK);
case BSIM3v32_GNODE:
value->iValue = here->BSIM3v32gNode;
return(OK);
case BSIM3v32_SNODE:
value->iValue = here->BSIM3v32sNode;
return(OK);
case BSIM3v32_BNODE:
value->iValue = here->BSIM3v32bNode;
return(OK);
case BSIM3v32_DNODEPRIME:
value->iValue = here->BSIM3v32dNodePrime;
return(OK);
case BSIM3v32_SNODEPRIME:
value->iValue = here->BSIM3v32sNodePrime;
return(OK);
case BSIM3v32_SOURCECONDUCT:
value->rValue = here->BSIM3v32sourceConductance;
value->rValue *= here->BSIM3v32m;
return(OK);
case BSIM3v32_DRAINCONDUCT:
value->rValue = here->BSIM3v32drainConductance;
value->rValue *= here->BSIM3v32m;
return(OK);
case BSIM3v32_VBD:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32vbd);
return(OK);
case BSIM3v32_VBS:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32vbs);
return(OK);
case BSIM3v32_VGS:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32vgs);
return(OK);
case BSIM3v32_VDS:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32vds);
return(OK);
case BSIM3v32_CD:
value->rValue = here->BSIM3v32cd;
value->rValue *= here->BSIM3v32m;
return(OK);
case BSIM3v32_CBS:
value->rValue = here->BSIM3v32cbs;
value->rValue *= here->BSIM3v32m;
return(OK);
case BSIM3v32_CBD:
value->rValue = here->BSIM3v32cbd;
value->rValue *= here->BSIM3v32m;
return(OK);
case BSIM3v32_GM:
value->rValue = here->BSIM3v32gm;
value->rValue *= here->BSIM3v32m;
return(OK);
case BSIM3v32_GDS:
value->rValue = here->BSIM3v32gds;
value->rValue *= here->BSIM3v32m;
return(OK);
case BSIM3v32_GMBS:
value->rValue = here->BSIM3v32gmbs;
value->rValue *= here->BSIM3v32m;
return(OK);
case BSIM3v32_GBD:
value->rValue = here->BSIM3v32gbd;
value->rValue *= here->BSIM3v32m;
return(OK);
case BSIM3v32_GBS:
value->rValue = here->BSIM3v32gbs;
value->rValue *= here->BSIM3v32m;
return(OK);
case BSIM3v32_QB:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qb);
value->rValue *= here->BSIM3v32m;
return(OK);
case BSIM3v32_CQB:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32cqb);
value->rValue *= here->BSIM3v32m;
return(OK);
case BSIM3v32_QG:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qg);
value->rValue *= here->BSIM3v32m;
return(OK);
case BSIM3v32_CQG:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32cqg);
value->rValue *= here->BSIM3v32m;
return(OK);
case BSIM3v32_QD:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qd);
value->rValue *= here->BSIM3v32m;
return(OK);
case BSIM3v32_CQD:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32cqd);
value->rValue *= here->BSIM3v32m;
return(OK);
case BSIM3v32_CGG:
value->rValue = here->BSIM3v32cggb;
value->rValue *= here->BSIM3v32m;
return(OK);
case BSIM3v32_CGD:
value->rValue = here->BSIM3v32cgdb;
value->rValue *= here->BSIM3v32m;
return(OK);
case BSIM3v32_CGS:
value->rValue = here->BSIM3v32cgsb;
value->rValue *= here->BSIM3v32m;
return(OK);
case BSIM3v32_CDG:
value->rValue = here->BSIM3v32cdgb;
value->rValue *= here->BSIM3v32m;
return(OK);
case BSIM3v32_CDD:
value->rValue = here->BSIM3v32cddb;
value->rValue *= here->BSIM3v32m;
return(OK);
case BSIM3v32_CDS:
value->rValue = here->BSIM3v32cdsb;
value->rValue *= here->BSIM3v32m;
return(OK);
case BSIM3v32_CBG:
value->rValue = here->BSIM3v32cbgb;
value->rValue *= here->BSIM3v32m;
return(OK);
case BSIM3v32_CBDB:
value->rValue = here->BSIM3v32cbdb;
value->rValue *= here->BSIM3v32m;
return(OK);
case BSIM3v32_CBSB:
value->rValue = here->BSIM3v32cbsb;
value->rValue *= here->BSIM3v32m;
return(OK);
case BSIM3v32_CAPBD:
value->rValue = here->BSIM3v32capbd;
value->rValue *= here->BSIM3v32m;
return(OK);
case BSIM3v32_CAPBS:
value->rValue = here->BSIM3v32capbs;
value->rValue *= here->BSIM3v32m;
return(OK);
case BSIM3v32_VON:
value->rValue = here->BSIM3v32von;
return(OK);
case BSIM3v32_VDSAT:
value->rValue = here->BSIM3v32vdsat;
return(OK);
case BSIM3v32_QBS:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qbs);
value->rValue *= here->BSIM3v32m;
return(OK);
case BSIM3v32_QBD:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qbd);
value->rValue *= here->BSIM3v32m;
return(OK);
default:
return(E_BADPARM);
}
/* NOTREACHED */
}

458
src/spicelib/devices/bsim3v32simd/b3v32check.c Normal file
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@ -0,0 +1,458 @@
/**** BSIM3v3.2.4, Released by Xuemei Xi 12/14/2001 ****/
/**********
* Copyright 2001 Regents of the University of California. All rights reserved.
* File: b3check.c of BSIM3v3.2.4
* Author: 1995 Min-Chie Jeng
* Author: 1997-1999 Weidong Liu.
* Author: 2001 Xuemei Xi
* Modified by Xuemei Xi, 10/05, 12/14, 2001.
* Modified by Paolo Nenzi 2002 and Dietmar Warning 2003
**********/
#include "ngspice/ngspice.h"
#include "ngspice/cktdefs.h"
#include "bsim3v32def.h"
#include "ngspice/trandefs.h"
#include "ngspice/const.h"
#include "ngspice/sperror.h"
#include "ngspice/devdefs.h"
#include "ngspice/suffix.h"
int
BSIM3v32checkModel (BSIM3v32model *model, BSIM3v32instance *here, CKTcircuit *ckt)
{
struct bsim3v32SizeDependParam *pParam;
int Fatal_Flag = 0;
FILE *fplog;
NG_IGNORE(ckt);
if ((fplog = fopen("b3v32check.log", "w")) != NULL)
{ pParam = here->pParam;
fprintf (fplog,
"BSIM3 Model (Supports: v3.2, v3.2.2, v3.2.3, v3.2.4)\n");
fprintf (fplog, "Parameter Checking.\n");
fprintf (fplog, "Model = %s\n", model->BSIM3v32modName);
fprintf (fplog, "W = %g, L = %g, M = %g\n", here->BSIM3v32w,
here->BSIM3v32l, here->BSIM3v32m);
if ((strcmp(model->BSIM3v32version, "3.2.4")) && (strncmp(model->BSIM3v32version, "3.24", 4))
&& (strcmp(model->BSIM3v32version, "3.2.3")) && (strncmp(model->BSIM3v32version, "3.23", 4))
&& (strcmp(model->BSIM3v32version, "3.2.2")) && (strncmp(model->BSIM3v32version, "3.22", 4))
&& (strncmp(model->BSIM3v32version, "3.2", 3)) && (strncmp(model->BSIM3v32version, "3.20", 4)))
{
fprintf (fplog,
"Warning: This model supports BSIM3v3.2, BSIM3v3.2.2, BSIM3v3.2.3, BSIM3v3.2.4\n");
fprintf (fplog,
"You specified a wrong version number. Working now with BSIM3v3.2.4.\n");
printf ("Warning: This model supports BSIM3v3.2, BSIM3v3.2.2, BSIM3v3.2.3, BSIM3v3.2.4\n");
printf ("You specified a wrong version number. Working now with BSIM3v3.2.4.\n");
}
if (pParam->BSIM3v32nlx < -pParam->BSIM3v32leff)
{ fprintf(fplog, "Fatal: Nlx = %g is less than -Leff.\n",
pParam->BSIM3v32nlx);
printf("Fatal: Nlx = %g is less than -Leff.\n",
pParam->BSIM3v32nlx);
Fatal_Flag = 1;
}
if (model->BSIM3v32tox <= 0.0)
{ fprintf(fplog, "Fatal: Tox = %g is not positive.\n",
model->BSIM3v32tox);
printf("Fatal: Tox = %g is not positive.\n", model->BSIM3v32tox);
Fatal_Flag = 1;
}
if (model->BSIM3v32toxm <= 0.0)
{ fprintf(fplog, "Fatal: Toxm = %g is not positive.\n",
model->BSIM3v32toxm);
printf("Fatal: Toxm = %g is not positive.\n", model->BSIM3v32toxm);
Fatal_Flag = 1;
}
if (pParam->BSIM3v32npeak <= 0.0)
{ fprintf(fplog, "Fatal: Nch = %g is not positive.\n",
pParam->BSIM3v32npeak);
printf("Fatal: Nch = %g is not positive.\n",
pParam->BSIM3v32npeak);
Fatal_Flag = 1;
}
if (pParam->BSIM3v32nsub <= 0.0)
{ fprintf(fplog, "Fatal: Nsub = %g is not positive.\n",
pParam->BSIM3v32nsub);
printf("Fatal: Nsub = %g is not positive.\n",
pParam->BSIM3v32nsub);
Fatal_Flag = 1;
}
if (pParam->BSIM3v32ngate < 0.0)
{ fprintf(fplog, "Fatal: Ngate = %g is not positive.\n",
pParam->BSIM3v32ngate);
printf("Fatal: Ngate = %g Ngate is not positive.\n",
pParam->BSIM3v32ngate);
Fatal_Flag = 1;
}
if (pParam->BSIM3v32ngate > 1.e25)
{ fprintf(fplog, "Fatal: Ngate = %g is too high.\n",
pParam->BSIM3v32ngate);
printf("Fatal: Ngate = %g Ngate is too high\n",
pParam->BSIM3v32ngate);
Fatal_Flag = 1;
}
if (pParam->BSIM3v32xj <= 0.0)
{ fprintf(fplog, "Fatal: Xj = %g is not positive.\n",
pParam->BSIM3v32xj);
printf("Fatal: Xj = %g is not positive.\n", pParam->BSIM3v32xj);
Fatal_Flag = 1;
}
if (pParam->BSIM3v32dvt1 < 0.0)
{ fprintf(fplog, "Fatal: Dvt1 = %g is negative.\n",
pParam->BSIM3v32dvt1);
printf("Fatal: Dvt1 = %g is negative.\n", pParam->BSIM3v32dvt1);
Fatal_Flag = 1;
}
if (pParam->BSIM3v32dvt1w < 0.0)
{ fprintf(fplog, "Fatal: Dvt1w = %g is negative.\n",
pParam->BSIM3v32dvt1w);
printf("Fatal: Dvt1w = %g is negative.\n", pParam->BSIM3v32dvt1w);
Fatal_Flag = 1;
}
if (pParam->BSIM3v32w0 == -pParam->BSIM3v32weff)
{ fprintf(fplog, "Fatal: (W0 + Weff) = 0 causing divided-by-zero.\n");
printf("Fatal: (W0 + Weff) = 0 causing divided-by-zero.\n");
Fatal_Flag = 1;
}
if (pParam->BSIM3v32dsub < 0.0)
{ fprintf(fplog, "Fatal: Dsub = %g is negative.\n", pParam->BSIM3v32dsub);
printf("Fatal: Dsub = %g is negative.\n", pParam->BSIM3v32dsub);
Fatal_Flag = 1;
}
if (pParam->BSIM3v32b1 == -pParam->BSIM3v32weff)
{ fprintf(fplog, "Fatal: (B1 + Weff) = 0 causing divided-by-zero.\n");
printf("Fatal: (B1 + Weff) = 0 causing divided-by-zero.\n");
Fatal_Flag = 1;
}
if (pParam->BSIM3v32u0temp <= 0.0)
{ fprintf(fplog, "Fatal: u0 at current temperature = %g is not positive.\n", pParam->BSIM3v32u0temp);
printf("Fatal: u0 at current temperature = %g is not positive.\n",
pParam->BSIM3v32u0temp);
Fatal_Flag = 1;
}
/* Check delta parameter */
if (pParam->BSIM3v32delta < 0.0)
{ fprintf(fplog, "Fatal: Delta = %g is less than zero.\n",
pParam->BSIM3v32delta);
printf("Fatal: Delta = %g is less than zero.\n", pParam->BSIM3v32delta);
Fatal_Flag = 1;
}
if (pParam->BSIM3v32vsattemp <= 0.0)
{ fprintf(fplog, "Fatal: Vsat at current temperature = %g is not positive.\n", pParam->BSIM3v32vsattemp);
printf("Fatal: Vsat at current temperature = %g is not positive.\n",
pParam->BSIM3v32vsattemp);
Fatal_Flag = 1;
}
/* Check Rout parameters */
if (pParam->BSIM3v32pclm <= 0.0)
{ fprintf(fplog, "Fatal: Pclm = %g is not positive.\n", pParam->BSIM3v32pclm);
printf("Fatal: Pclm = %g is not positive.\n", pParam->BSIM3v32pclm);
Fatal_Flag = 1;
}
if (pParam->BSIM3v32drout < 0.0)
{ fprintf(fplog, "Fatal: Drout = %g is negative.\n", pParam->BSIM3v32drout);
printf("Fatal: Drout = %g is negative.\n", pParam->BSIM3v32drout);
Fatal_Flag = 1;
}
if (pParam->BSIM3v32pscbe2 <= 0.0)
{ fprintf(fplog, "Warning: Pscbe2 = %g is not positive.\n",
pParam->BSIM3v32pscbe2);
printf("Warning: Pscbe2 = %g is not positive.\n", pParam->BSIM3v32pscbe2);
}
/* ACM model */
if (model->BSIM3v32acmMod == 0) {
if (model->BSIM3v32unitLengthSidewallJctCap > 0.0 ||
model->BSIM3v32unitLengthGateSidewallJctCap > 0.0)
{
if (here->BSIM3v32drainPerimeter < pParam->BSIM3v32weff)
{ fprintf(fplog, "Warning: Pd = %g is less than W.\n",
here->BSIM3v32drainPerimeter);
printf("Warning: Pd = %g is less than W.\n",
here->BSIM3v32drainPerimeter);
}
if (here->BSIM3v32sourcePerimeter < pParam->BSIM3v32weff)
{ fprintf(fplog, "Warning: Ps = %g is less than W.\n",
here->BSIM3v32sourcePerimeter);
printf("Warning: Ps = %g is less than W.\n",
here->BSIM3v32sourcePerimeter);
}
}
}
if ((model->BSIM3v32calcacm > 0) && (model->BSIM3v32acmMod != 12))
{ fprintf(fplog, "Warning: CALCACM = %d is wrong. Set back to 0.\n",
model->BSIM3v32calcacm);
printf("Warning: CALCACM = %d is wrong. Set back to 0.\n", model->BSIM3v32calcacm);
model->BSIM3v32calcacm = 0;
}
if (pParam->BSIM3v32noff < 0.1)
{ fprintf(fplog, "Warning: Noff = %g is too small.\n",
pParam->BSIM3v32noff);
printf("Warning: Noff = %g is too small.\n", pParam->BSIM3v32noff);
}
if (pParam->BSIM3v32noff > 4.0)
{ fprintf(fplog, "Warning: Noff = %g is too large.\n",
pParam->BSIM3v32noff);
printf("Warning: Noff = %g is too large.\n", pParam->BSIM3v32noff);
}
if (pParam->BSIM3v32voffcv < -0.5)
{ fprintf(fplog, "Warning: Voffcv = %g is too small.\n",
pParam->BSIM3v32voffcv);
printf("Warning: Voffcv = %g is too small.\n", pParam->BSIM3v32voffcv);
}
if (pParam->BSIM3v32voffcv > 0.5)
{ fprintf(fplog, "Warning: Voffcv = %g is too large.\n",
pParam->BSIM3v32voffcv);
printf("Warning: Voffcv = %g is too large.\n", pParam->BSIM3v32voffcv);
}
if (model->BSIM3v32ijth < 0.0)
{ fprintf(fplog, "Fatal: Ijth = %g cannot be negative.\n",
model->BSIM3v32ijth);
printf("Fatal: Ijth = %g cannot be negative.\n", model->BSIM3v32ijth);
Fatal_Flag = 1;
}
/* Check capacitance parameters */
if (pParam->BSIM3v32clc < 0.0)
{ fprintf(fplog, "Fatal: Clc = %g is negative.\n", pParam->BSIM3v32clc);
printf("Fatal: Clc = %g is negative.\n", pParam->BSIM3v32clc);
Fatal_Flag = 1;
}
if (pParam->BSIM3v32moin < 5.0)
{ fprintf(fplog, "Warning: Moin = %g is too small.\n",
pParam->BSIM3v32moin);
printf("Warning: Moin = %g is too small.\n", pParam->BSIM3v32moin);
}
if (pParam->BSIM3v32moin > 25.0)
{ fprintf(fplog, "Warning: Moin = %g is too large.\n",
pParam->BSIM3v32moin);
printf("Warning: Moin = %g is too large.\n", pParam->BSIM3v32moin);
}
if(model->BSIM3v32capMod ==3) {
if (pParam->BSIM3v32acde < 0.4)
{ fprintf(fplog, "Warning: Acde = %g is too small.\n",
pParam->BSIM3v32acde);
printf("Warning: Acde = %g is too small.\n", pParam->BSIM3v32acde);
}
if (pParam->BSIM3v32acde > 1.6)
{ fprintf(fplog, "Warning: Acde = %g is too large.\n",
pParam->BSIM3v32acde);
printf("Warning: Acde = %g is too large.\n", pParam->BSIM3v32acde);
}
}
if (model->BSIM3v32paramChk ==1)
{
/* Check L and W parameters */
if (pParam->BSIM3v32leff <= 5.0e-8)
{ fprintf(fplog, "Warning: Leff = %g may be too small.\n",
pParam->BSIM3v32leff);
printf("Warning: Leff = %g may be too small.\n",
pParam->BSIM3v32leff);
}
if (pParam->BSIM3v32leffCV <= 5.0e-8)
{ fprintf(fplog, "Warning: Leff for CV = %g may be too small.\n",
pParam->BSIM3v32leffCV);
printf("Warning: Leff for CV = %g may be too small.\n",
pParam->BSIM3v32leffCV);
}
if (pParam->BSIM3v32weff <= 1.0e-7)
{ fprintf(fplog, "Warning: Weff = %g may be too small.\n",
pParam->BSIM3v32weff);
printf("Warning: Weff = %g may be too small.\n",
pParam->BSIM3v32weff);
}
if (pParam->BSIM3v32weffCV <= 1.0e-7)
{ fprintf(fplog, "Warning: Weff for CV = %g may be too small.\n",
pParam->BSIM3v32weffCV);
printf("Warning: Weff for CV = %g may be too small.\n",
pParam->BSIM3v32weffCV);
}
/* Check threshold voltage parameters */
if (pParam->BSIM3v32nlx < 0.0)
{ fprintf(fplog, "Warning: Nlx = %g is negative.\n", pParam->BSIM3v32nlx);
printf("Warning: Nlx = %g is negative.\n", pParam->BSIM3v32nlx);
}
if (model->BSIM3v32tox < 1.0e-9)
{ fprintf(fplog, "Warning: Tox = %g is less than 10A.\n",
model->BSIM3v32tox);
printf("Warning: Tox = %g is less than 10A.\n", model->BSIM3v32tox);
}
if (pParam->BSIM3v32npeak <= 1.0e15)
{ fprintf(fplog, "Warning: Nch = %g may be too small.\n",
pParam->BSIM3v32npeak);
printf("Warning: Nch = %g may be too small.\n",
pParam->BSIM3v32npeak);
}
else if (pParam->BSIM3v32npeak >= 1.0e21)
{ fprintf(fplog, "Warning: Nch = %g may be too large.\n",
pParam->BSIM3v32npeak);
printf("Warning: Nch = %g may be too large.\n",
pParam->BSIM3v32npeak);
}
if (pParam->BSIM3v32nsub <= 1.0e14)
{ fprintf(fplog, "Warning: Nsub = %g may be too small.\n",
pParam->BSIM3v32nsub);
printf("Warning: Nsub = %g may be too small.\n",
pParam->BSIM3v32nsub);
}
else if (pParam->BSIM3v32nsub >= 1.0e21)
{ fprintf(fplog, "Warning: Nsub = %g may be too large.\n",
pParam->BSIM3v32nsub);
printf("Warning: Nsub = %g may be too large.\n",
pParam->BSIM3v32nsub);
}
if ((pParam->BSIM3v32ngate > 0.0) &&
(pParam->BSIM3v32ngate <= 1.e18))
{ fprintf(fplog, "Warning: Ngate = %g is less than 1.E18cm^-3.\n",
pParam->BSIM3v32ngate);
printf("Warning: Ngate = %g is less than 1.E18cm^-3.\n",
pParam->BSIM3v32ngate);
}
if (pParam->BSIM3v32dvt0 < 0.0)
{ fprintf(fplog, "Warning: Dvt0 = %g is negative.\n",
pParam->BSIM3v32dvt0);
printf("Warning: Dvt0 = %g is negative.\n", pParam->BSIM3v32dvt0);
}
if (fabs(1.0e-6 / (pParam->BSIM3v32w0 + pParam->BSIM3v32weff)) > 10.0)
{ fprintf(fplog, "Warning: (W0 + Weff) may be too small.\n");
printf("Warning: (W0 + Weff) may be too small.\n");
}
/* Check subthreshold parameters */
if (pParam->BSIM3v32nfactor < 0.0)
{ fprintf(fplog, "Warning: Nfactor = %g is negative.\n",
pParam->BSIM3v32nfactor);
printf("Warning: Nfactor = %g is negative.\n", pParam->BSIM3v32nfactor);
}
if (pParam->BSIM3v32cdsc < 0.0)
{ fprintf(fplog, "Warning: Cdsc = %g is negative.\n",
pParam->BSIM3v32cdsc);
printf("Warning: Cdsc = %g is negative.\n", pParam->BSIM3v32cdsc);
}
if (pParam->BSIM3v32cdscd < 0.0)
{ fprintf(fplog, "Warning: Cdscd = %g is negative.\n",
pParam->BSIM3v32cdscd);
printf("Warning: Cdscd = %g is negative.\n", pParam->BSIM3v32cdscd);
}
/* Check DIBL parameters */
if (pParam->BSIM3v32eta0 < 0.0)
{ fprintf(fplog, "Warning: Eta0 = %g is negative.\n",
pParam->BSIM3v32eta0);
printf("Warning: Eta0 = %g is negative.\n", pParam->BSIM3v32eta0);
}
/* Check Abulk parameters */
if (fabs(1.0e-6 / (pParam->BSIM3v32b1 + pParam->BSIM3v32weff)) > 10.0)
{ fprintf(fplog, "Warning: (B1 + Weff) may be too small.\n");
printf("Warning: (B1 + Weff) may be too small.\n");
}
/* Check Saturation parameters */
if (pParam->BSIM3v32a2 < 0.01)
{ fprintf(fplog, "Warning: A2 = %g is too small. Set to 0.01.\n", pParam->BSIM3v32a2);
printf("Warning: A2 = %g is too small. Set to 0.01.\n",
pParam->BSIM3v32a2);
pParam->BSIM3v32a2 = 0.01;
}
else if (pParam->BSIM3v32a2 > 1.0)
{ fprintf(fplog, "Warning: A2 = %g is larger than 1. A2 is set to 1 and A1 is set to 0.\n",
pParam->BSIM3v32a2);
printf("Warning: A2 = %g is larger than 1. A2 is set to 1 and A1 is set to 0.\n",
pParam->BSIM3v32a2);
pParam->BSIM3v32a2 = 1.0;
pParam->BSIM3v32a1 = 0.0;
}
if (pParam->BSIM3v32rdsw < 0.0)
{ fprintf(fplog, "Warning: Rdsw = %g is negative. Set to zero.\n",
pParam->BSIM3v32rdsw);
printf("Warning: Rdsw = %g is negative. Set to zero.\n",
pParam->BSIM3v32rdsw);
pParam->BSIM3v32rdsw = 0.0;
pParam->BSIM3v32rds0 = 0.0;
}
else if ((pParam->BSIM3v32rds0 > 0.0) && (pParam->BSIM3v32rds0 < 0.001))
{ fprintf(fplog, "Warning: Rds at current temperature = %g is less than 0.001 ohm. Set to zero.\n",
pParam->BSIM3v32rds0);
printf("Warning: Rds at current temperature = %g is less than 0.001 ohm. Set to zero.\n",
pParam->BSIM3v32rds0);
pParam->BSIM3v32rds0 = 0.0;
}
if (pParam->BSIM3v32vsattemp < 1.0e3)
{ fprintf(fplog, "Warning: Vsat at current temperature = %g may be too small.\n", pParam->BSIM3v32vsattemp);
printf("Warning: Vsat at current temperature = %g may be too small.\n", pParam->BSIM3v32vsattemp);
}
if (pParam->BSIM3v32pdibl1 < 0.0)
{ fprintf(fplog, "Warning: Pdibl1 = %g is negative.\n",
pParam->BSIM3v32pdibl1);
printf("Warning: Pdibl1 = %g is negative.\n", pParam->BSIM3v32pdibl1);
}
if (pParam->BSIM3v32pdibl2 < 0.0)
{ fprintf(fplog, "Warning: Pdibl2 = %g is negative.\n",
pParam->BSIM3v32pdibl2);
printf("Warning: Pdibl2 = %g is negative.\n", pParam->BSIM3v32pdibl2);
}
/* Check overlap capacitance parameters */
if (model->BSIM3v32cgdo < 0.0)
{ fprintf(fplog, "Warning: cgdo = %g is negative. Set to zero.\n", model->BSIM3v32cgdo);
printf("Warning: cgdo = %g is negative. Set to zero.\n", model->BSIM3v32cgdo);
model->BSIM3v32cgdo = 0.0;
}
if (model->BSIM3v32cgso < 0.0)
{ fprintf(fplog, "Warning: cgso = %g is negative. Set to zero.\n", model->BSIM3v32cgso);
printf("Warning: cgso = %g is negative. Set to zero.\n", model->BSIM3v32cgso);
model->BSIM3v32cgso = 0.0;
}
if (model->BSIM3v32cgbo < 0.0)
{ fprintf(fplog, "Warning: cgbo = %g is negative. Set to zero.\n", model->BSIM3v32cgbo);
printf("Warning: cgbo = %g is negative. Set to zero.\n", model->BSIM3v32cgbo);
model->BSIM3v32cgbo = 0.0;
}
}/* loop for the parameter check for warning messages */
fclose(fplog);
}
else
{ fprintf(stderr, "Warning: Can't open log file. Parameter checking skipped.\n");
}
return(Fatal_Flag);
}

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src/spicelib/devices/bsim3v32simd/b3v32cvtest.c Normal file
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@ -0,0 +1,106 @@
/**** BSIM3v3.2.4, Released by Xuemei Xi 12/14/2001 ****/
/**********
* Copyright 2001 Regents of the University of California. All rights reserved.
* File: b3cvtest.c of BSIM3v3.2.4
* Author: 1995 Min-Chie Jeng and Mansun Chan
* Author: 1997-1999 Weidong Liu.
* Author: 2001 Xuemei Xi
* Modified by Paolo Nenzi 2002
**********/
#include "ngspice/ngspice.h"
#include "ngspice/cktdefs.h"
#include "bsim3v32def.h"
#include "ngspice/trandefs.h"
#include "ngspice/const.h"
#include "ngspice/devdefs.h"
#include "ngspice/sperror.h"
#include "ngspice/suffix.h"
int
BSIM3v32SIMDconvTest (GENmodel *inModel, CKTcircuit *ckt)
{
BSIM3v32model *model = (BSIM3v32model*)inModel;
BSIM3v32instance *here;
double delvbd, delvbs, delvds, delvgd, delvgs, vbd, vbs, vds;
double cbd, cbhat, cbs, cd, cdhat, tol, vgd, vgdo, vgs;
/* loop through all the BSIM3v32 device models */
for (; model != NULL; model = BSIM3v32nextModel(model))
{ /* loop through all the instances of the model */
for (here = BSIM3v32instances(model); here != NULL ;
here=BSIM3v32nextInstance(here))
{
vbs = model->BSIM3v32type
* (*(ckt->CKTrhsOld+here->BSIM3v32bNode)
- *(ckt->CKTrhsOld+here->BSIM3v32sNodePrime));
vgs = model->BSIM3v32type
* (*(ckt->CKTrhsOld+here->BSIM3v32gNode)
- *(ckt->CKTrhsOld+here->BSIM3v32sNodePrime));
vds = model->BSIM3v32type
* (*(ckt->CKTrhsOld+here->BSIM3v32dNodePrime)
- *(ckt->CKTrhsOld+here->BSIM3v32sNodePrime));
vbd = vbs - vds;
vgd = vgs - vds;
vgdo = *(ckt->CKTstate0 + here->BSIM3v32vgs)
- *(ckt->CKTstate0 + here->BSIM3v32vds);
delvbs = vbs - *(ckt->CKTstate0 + here->BSIM3v32vbs);
delvbd = vbd - *(ckt->CKTstate0 + here->BSIM3v32vbd);
delvgs = vgs - *(ckt->CKTstate0 + here->BSIM3v32vgs);
delvds = vds - *(ckt->CKTstate0 + here->BSIM3v32vds);
delvgd = vgd-vgdo;
cd = here->BSIM3v32cd - here->BSIM3v32cbd;
if (here->BSIM3v32mode >= 0)
{ cd += here->BSIM3v32csub;
cdhat = cd - here->BSIM3v32gbd * delvbd
+ (here->BSIM3v32gmbs + here->BSIM3v32gbbs) * delvbs
+ (here->BSIM3v32gm + here->BSIM3v32gbgs) * delvgs
+ (here->BSIM3v32gds + here->BSIM3v32gbds) * delvds;
}
else
{ cdhat = cd + (here->BSIM3v32gmbs - here->BSIM3v32gbd) * delvbd
+ here->BSIM3v32gm * delvgd - here->BSIM3v32gds * delvds;
}
/*
* check convergence
*/
if ((here->BSIM3v32off == 0) || (!(ckt->CKTmode & MODEINITFIX)))
{ tol = ckt->CKTreltol * MAX(fabs(cdhat), fabs(cd))
+ ckt->CKTabstol;
if (fabs(cdhat - cd) >= tol)
{ ckt->CKTnoncon++;
return(OK);
}
cbs = here->BSIM3v32cbs;
cbd = here->BSIM3v32cbd;
if (here->BSIM3v32mode >= 0)
{ cbhat = cbs + cbd - here->BSIM3v32csub
+ here->BSIM3v32gbd * delvbd
+ (here->BSIM3v32gbs - here->BSIM3v32gbbs) * delvbs
- here->BSIM3v32gbgs * delvgs
- here->BSIM3v32gbds * delvds;
}
else
{ cbhat = cbs + cbd - here->BSIM3v32csub
+ here->BSIM3v32gbs * delvbs
+ (here->BSIM3v32gbd - here->BSIM3v32gbbs) * delvbd
- here->BSIM3v32gbgs * delvgd
+ here->BSIM3v32gbds * delvds;
}
tol = ckt->CKTreltol * MAX(fabs(cbhat),
fabs(cbs + cbd - here->BSIM3v32csub)) + ckt->CKTabstol;
if (fabs(cbhat - (cbs + cbd - here->BSIM3v32csub)) > tol)
{ ckt->CKTnoncon++;
return(OK);
}
}
}
}
return(OK);
}

44
src/spicelib/devices/bsim3v32simd/b3v32getic.c Normal file
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/**** BSIM3v3.2.4, Released by Xuemei Xi 12/14/2001 ****/
/**********
* Copyright 2001 Regents of the University of California. All rights reserved.
* File: b3getic.c of BSIM3v3.2.4
* Author: 1995 Min-Chie Jeng and Mansun Chan.
* Author: 1997-1999 Weidong Liu.
* Author: 2001 Xuemei Xi
**********/
#include "ngspice/ngspice.h"
#include "ngspice/cktdefs.h"
#include "bsim3v32def.h"
#include "ngspice/sperror.h"
#include "ngspice/suffix.h"
int
BSIM3v32SIMDgetic (GENmodel *inModel, CKTcircuit *ckt)
{
BSIM3v32model *model = (BSIM3v32model*)inModel;
BSIM3v32instance *here;
for (; model ; model = BSIM3v32nextModel(model))
{ for (here = BSIM3v32instances(model); here; here = BSIM3v32nextInstance(here))
{
if (!here->BSIM3v32icVBSGiven)
{ here->BSIM3v32icVBS = *(ckt->CKTrhs + here->BSIM3v32bNode)
- *(ckt->CKTrhs + here->BSIM3v32sNode);
}
if (!here->BSIM3v32icVDSGiven)
{ here->BSIM3v32icVDS = *(ckt->CKTrhs + here->BSIM3v32dNode)
- *(ckt->CKTrhs + here->BSIM3v32sNode);
}
if (!here->BSIM3v32icVGSGiven)
{ here->BSIM3v32icVGS = *(ckt->CKTrhs + here->BSIM3v32gNode)
- *(ckt->CKTrhs + here->BSIM3v32sNode);
}
}
}
return(OK);
}

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4
src/spicelib/devices/bsim3v32/b3v32ldsel.c → src/spicelib/devices/bsim3v32simd/b3v32ldsel.c
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@ -48,7 +48,7 @@ extern int BSIM3v32LoadSIMD(BSIM3v32instance **heres, CKTcircuit *ckt);
#ifndef USE_OMP
int
BSIM3v32loadSel (GENmodel *inModel, CKTcircuit *ckt)
BSIM3v32SIMDloadSel (GENmodel *inModel, CKTcircuit *ckt)
{
#ifndef USE_OMP
double data[NDATASIMD][NSIMD];
@ -106,7 +106,7 @@ BSIM3v32loadSel (GENmodel *inModel, CKTcircuit *ckt)
#ifdef USE_OMP
int
BSIM3v32loadSel (GENmodel *inModel, CKTcircuit *ckt)
BSIM3v32SIMDloadSel (GENmodel *inModel, CKTcircuit *ckt)
{
/*
This version do omp parallel only inside groups

0
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0
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0
src/spicelib/devices/bsim3v32/b3v32ldseq_simd4d_omp.c → src/spicelib/devices/bsim3v32simd/b3v32ldseq_simd4d_omp.c
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0
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0
src/spicelib/devices/bsim3v32/b3v32ldseq_simd8d_omp.c → src/spicelib/devices/bsim3v32simd/b3v32ldseq_simd8d_omp.c
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0
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0
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0
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/**** BSIM3v3.2.4, Released by Xuemei Xi 12/21/2001 ****/
/**********
* Copyright 2001 Regents of the University of California. All rights reserved.
* File: b3mdel.c of BSIM3v3.2.4
* Author: 1995 Min-Chie Jeng and Mansun Chan.
* Author: 1997-1999 Weidong Liu.
* Author: 2001 Xuemei Xi
* Modified by Paolo Nenzi 2002
**********/
#include "ngspice/ngspice.h"
#include "bsim3v32def.h"
#include "ngspice/sperror.h"
#include "ngspice/suffix.h"
int
BSIM3v32SIMDmDelete(GENmodel *gen_model)
{
BSIM3v32model *model = (BSIM3v32model *) gen_model;
#ifdef USE_OMP
FREE(model->BSIM3v32InstanceArray);
#endif
struct bsim3v32SizeDependParam *p = model->pSizeDependParamKnot;
while (p) {
struct bsim3v32SizeDependParam *next_p = p->pNext;
FREE(p);
p = next_p;
}
FREE(model->BSIM3v32version);
return OK;
}

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/**** BSIM3v3.2.4, Released by Xuemei Xi 12/21/2001 ****/
/**********
* Copyright 2001 Regents of the University of California. All rights reserved.
* File: b3noi.c of BSIM3v3.2.4
* Author: 1995 Gary W. Ng and Min-Chie Jeng.
* Author: 1997-1999 Weidong Liu.
* Author: 2001 Xuemei Xi
* Modified by Xuemei Xi, 10/05, 12/21, 2001.
* Modified bt Paolo Nenzi 2002 and Dietmar Warning 2003
**********/
#include "ngspice/ngspice.h"
#include "bsim3v32def.h"
#include "ngspice/cktdefs.h"
#include "ngspice/iferrmsg.h"
#include "ngspice/noisedef.h"
#include "ngspice/suffix.h"
#include "ngspice/const.h" /* jwan */
/*
* BSIM3v32SIMDnoise (mode, operation, firstModel, ckt, data, OnDens)
* This routine names and evaluates all of the noise sources
* associated with MOSFET's. It starts with the model *firstModel and
* traverses all of its insts. It then proceeds to any other models
* on the linked list. The total output noise density generated by
* all of the MOSFET's is summed with the variable "OnDens".
*/
/*
Channel thermal and flicker noises are calculated based on the value
of model->BSIM3v32noiMod.
If model->BSIM3v32noiMod = 1,
Channel thermal noise = SPICE2 model
Flicker noise = SPICE2 model
If model->BSIM3v32noiMod = 2,
Channel thermal noise = BSIM3v32 model
Flicker noise = BSIM3v32 model
If model->BSIM3v32noiMod = 3,
Channel thermal noise = SPICE2 model
Flicker noise = BSIM3v32 model
If model->BSIM3v32noiMod = 4,
Channel thermal noise = BSIM3v32 model
Flicker noise = SPICE2 model
*/
/*
* The StrongInversionNoiseEval function has been modified in
* the release 3.2.4 of BSIM3v32 model. To accomodate both the old
* and the new code, I have renamed according to the following:
*
*
* BSIM3v3.2.4 -> StrongInversionNoiseEvalNew
* Previous -> StrongInversionNoiseEvalOld
*
* 2002 Paolo Nenzi
*/
/*
* JX: 1/f noise model is smoothed out 12/18/01.
*/
static double
StrongInversionNoiseEvalNew(double Vds, BSIM3v32model *model,
BSIM3v32instance *here, double freq, double temp)
{
struct bsim3v32SizeDependParam *pParam;
double cd, esat, DelClm, EffFreq, N0, Nl;
double T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, Ssi;
pParam = here->pParam;
cd = fabs(here->BSIM3v32cd);
esat = 2.0 * pParam->BSIM3v32vsattemp / here->BSIM3v32ueff;
if(model->BSIM3v32em<=0.0) DelClm = 0.0;
else {
T0 = ((((Vds - here->BSIM3v32Vdseff) / pParam->BSIM3v32litl)
+ model->BSIM3v32em) / esat);
DelClm = pParam->BSIM3v32litl * log (MAX(T0, N_MINLOG));
}
EffFreq = pow(freq, model->BSIM3v32ef);
T1 = CHARGE * CHARGE * 8.62e-5 * cd * temp * here->BSIM3v32ueff;
T2 = 1.0e8 * EffFreq * here->BSIM3v32Abulk * model->BSIM3v32cox
* pParam->BSIM3v32leff * pParam->BSIM3v32leff;
N0 = model->BSIM3v32cox * here->BSIM3v32Vgsteff / CHARGE;
Nl = model->BSIM3v32cox * here->BSIM3v32Vgsteff
* (1.0 - here->BSIM3v32AbovVgst2Vtm * here->BSIM3v32Vdseff) / CHARGE;
T3 = model->BSIM3v32oxideTrapDensityA
* log(MAX(((N0 + 2.0e14) / (Nl + 2.0e14)), N_MINLOG));
T4 = model->BSIM3v32oxideTrapDensityB * (N0 - Nl);
T5 = model->BSIM3v32oxideTrapDensityC * 0.5 * (N0 * N0 - Nl * Nl);
T6 = 8.62e-5 * temp * cd * cd;
T7 = 1.0e8 * EffFreq * pParam->BSIM3v32leff
* pParam->BSIM3v32leff * pParam->BSIM3v32weff;
T8 = model->BSIM3v32oxideTrapDensityA + model->BSIM3v32oxideTrapDensityB * Nl
+ model->BSIM3v32oxideTrapDensityC * Nl * Nl;
T9 = (Nl + 2.0e14) * (Nl + 2.0e14);
Ssi = T1 / T2 * (T3 + T4 + T5) + T6 / T7 * DelClm * T8 / T9;
return Ssi;
}
/*
* The code for releases: BSIM3V32, BSIM3V322, BSIM3V323
* follows
*/
static double
StrongInversionNoiseEvalOld(double vgs, double vds, BSIM3v32model *model,
BSIM3v32instance *here, double freq, double temp)
{
struct bsim3v32SizeDependParam *pParam;
double cd, esat, DelClm, EffFreq, N0, Nl, Vgst;
double T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, Ssi;
pParam = here->pParam;
cd = fabs (here->BSIM3v32cd);
/* Added revision dependent code */
if (model->BSIM3v32intVersion < BSIM3v32V323)
{
if (vds > here->BSIM3v32vdsat)
{
esat = 2.0 * pParam->BSIM3v32vsattemp / here->BSIM3v32ueff;
T0 = ((((vds - here->BSIM3v32vdsat) / pParam->BSIM3v32litl) +
model->BSIM3v32em) / esat);
DelClm = pParam->BSIM3v32litl * log (MAX (T0, N_MINLOG));
}
else
DelClm = 0.0;
}
else
{
if (model->BSIM3v32em <= 0.0) /* flicker noise modified -JX */
DelClm = 0.0;
else if (vds > here->BSIM3v32vdsat)
{
esat = 2.0 * pParam->BSIM3v32vsattemp / here->BSIM3v32ueff;
T0 = ((((vds - here->BSIM3v32vdsat) / pParam->BSIM3v32litl) +
model->BSIM3v32em) / esat);
DelClm = pParam->BSIM3v32litl * log (MAX (T0, N_MINLOG));
}
else
DelClm = 0.0;
}
EffFreq = pow (freq, model->BSIM3v32ef);
T1 = CHARGE * CHARGE * 8.62e-5 * cd * temp * here->BSIM3v32ueff;
T2 = 1.0e8 * EffFreq * model->BSIM3v32cox
* pParam->BSIM3v32leff * pParam->BSIM3v32leff;
Vgst = vgs - here->BSIM3v32von;
N0 = model->BSIM3v32cox * Vgst / CHARGE;
if (N0 < 0.0)
N0 = 0.0;
Nl = model->BSIM3v32cox * (Vgst - MIN (vds, here->BSIM3v32vdsat)) / CHARGE;
if (Nl < 0.0)
Nl = 0.0;
T3 = model->BSIM3v32oxideTrapDensityA
* log (MAX (((N0 + 2.0e14) / (Nl + 2.0e14)), N_MINLOG));
T4 = model->BSIM3v32oxideTrapDensityB * (N0 - Nl);
T5 = model->BSIM3v32oxideTrapDensityC * 0.5 * (N0 * N0 - Nl * Nl);
T6 = 8.62e-5 * temp * cd * cd;
T7 = 1.0e8 * EffFreq * pParam->BSIM3v32leff
* pParam->BSIM3v32leff * pParam->BSIM3v32weff;
T8 = model->BSIM3v32oxideTrapDensityA + model->BSIM3v32oxideTrapDensityB * Nl
+ model->BSIM3v32oxideTrapDensityC * Nl * Nl;
T9 = (Nl + 2.0e14) * (Nl + 2.0e14);
Ssi = T1 / T2 * (T3 + T4 + T5) + T6 / T7 * DelClm * T8 / T9;
return Ssi;
}
int
BSIM3v32SIMDnoise (int mode, int operation, GENmodel *inModel, CKTcircuit *ckt,
Ndata *data, double *OnDens)
{
NOISEAN *job = (NOISEAN *) ckt->CKTcurJob;
BSIM3v32model *model = (BSIM3v32model *)inModel;
BSIM3v32instance *here;
struct bsim3v32SizeDependParam *pParam;
double tempOnoise;
double tempInoise;
double noizDens[BSIM3v32NSRCS];
double lnNdens[BSIM3v32NSRCS];
double vgs, vds, Slimit;
double T1, T10, T11;
double Ssi, Swi;
double m;
int i;
/* define the names of the noise sources */
static char *BSIM3v32nNames[BSIM3v32NSRCS] =
{ /* Note that we have to keep the order */
".rd", /* noise due to rd */
/* consistent with the index definitions */
".rs", /* noise due to rs */
/* in BSIM3v32defs.h */
".id", /* noise due to id */
".1overf", /* flicker (1/f) noise */
"" /* total transistor noise */
};
for (; model != NULL; model = BSIM3v32nextModel(model))
{ for (here = BSIM3v32instances(model); here != NULL;
here = BSIM3v32nextInstance(here))
{ pParam = here->pParam;
switch (operation)
{ case N_OPEN:
/* see if we have to to produce a summary report */
/* if so, name all the noise generators */
if (job->NStpsSm != 0)
{ switch (mode)
{ case N_DENS:
for (i = 0; i < BSIM3v32NSRCS; i++)
{ NOISE_ADD_OUTVAR(ckt, data, "onoise.%s%s", here->BSIM3v32name, BSIM3v32nNames[i]);
}
break;
case INT_NOIZ:
for (i = 0; i < BSIM3v32NSRCS; i++)
{ NOISE_ADD_OUTVAR(ckt, data, "onoise_total.%s%s", here->BSIM3v32name, BSIM3v32nNames[i]);
NOISE_ADD_OUTVAR(ckt, data, "inoise_total.%s%s", here->BSIM3v32name, BSIM3v32nNames[i]);
}
break;
}
}
break;
case N_CALC:
m = here->BSIM3v32m;
switch (mode)
{ case N_DENS:
NevalSrc(&noizDens[BSIM3v32RDNOIZ],
&lnNdens[BSIM3v32RDNOIZ], ckt, THERMNOISE,
here->BSIM3v32dNodePrime, here->BSIM3v32dNode,
here->BSIM3v32drainConductance * m);
NevalSrc(&noizDens[BSIM3v32RSNOIZ],
&lnNdens[BSIM3v32RSNOIZ], ckt, THERMNOISE,
here->BSIM3v32sNodePrime, here->BSIM3v32sNode,
here->BSIM3v32sourceConductance * m);
switch( model->BSIM3v32noiMod )
{ case 1:
case 3:
NevalSrc(&noizDens[BSIM3v32IDNOIZ],
&lnNdens[BSIM3v32IDNOIZ], ckt,
THERMNOISE, here->BSIM3v32dNodePrime,
here->BSIM3v32sNodePrime,
(2.0 / 3.0 * fabs(here->BSIM3v32gm
+ here->BSIM3v32gds
+ here->BSIM3v32gmbs)) * m);
break;
case 2:
case 4:
/* Added revision dependent code */
if (model->BSIM3v32intVersion == BSIM3v32V324)
{
NevalSrc(&noizDens[BSIM3v32IDNOIZ],
&lnNdens[BSIM3v32IDNOIZ], ckt,
THERMNOISE, here->BSIM3v32dNodePrime,
here->BSIM3v32sNodePrime,
(m * here->BSIM3v32ueff
* fabs(here->BSIM3v32qinv)
/ (pParam->BSIM3v32leff * pParam->BSIM3v32leff
+ here->BSIM3v32ueff * fabs(here->BSIM3v32qinv)
* here->BSIM3v32rds))); /* bugfix */
}
else
{ /* for all versions lower then 3.2.4 */
NevalSrc(&noizDens[BSIM3v32IDNOIZ],
&lnNdens[BSIM3v32IDNOIZ], ckt,
THERMNOISE, here->BSIM3v32dNodePrime,
here->BSIM3v32sNodePrime,
(m * here->BSIM3v32ueff
* fabs(here->BSIM3v32qinv
/ (pParam->BSIM3v32leff
* pParam->BSIM3v32leff))));
}
break;
}
NevalSrc(&noizDens[BSIM3v32FLNOIZ], NULL,
ckt, N_GAIN, here->BSIM3v32dNodePrime,
here->BSIM3v32sNodePrime, (double) 0.0);
switch( model->BSIM3v32noiMod )
{ case 1:
case 4:
noizDens[BSIM3v32FLNOIZ] *= m * model->BSIM3v32kf
* exp(model->BSIM3v32af
* log(MAX(fabs(here->BSIM3v32cd),
N_MINLOG)))
/ (pow(data->freq, model->BSIM3v32ef)
* pParam->BSIM3v32leff
* pParam->BSIM3v32leff
* model->BSIM3v32cox);
break;
case 2:
case 3:
vgs = *(ckt->CKTstates[0] + here->BSIM3v32vgs);
vds = *(ckt->CKTstates[0] + here->BSIM3v32vds);
if (vds < 0.0)
{ vds = -vds;
vgs = vgs + vds;
}
/* Added revision dependent code */
if (model->BSIM3v32intVersion == BSIM3v32V324)
{
Ssi = StrongInversionNoiseEvalNew(vds, model,
here, data->freq, ckt->CKTtemp);
T10 = model->BSIM3v32oxideTrapDensityA
* 8.62e-5 * ckt->CKTtemp;
T11 = pParam->BSIM3v32weff
* pParam->BSIM3v32leff
* pow(data->freq, model->BSIM3v32ef)
* 4.0e36;
Swi = T10 / T11 * here->BSIM3v32cd
* here->BSIM3v32cd;
T1 = Swi + Ssi;
if (T1 > 0.0)
noizDens[BSIM3v32FLNOIZ] *= m * (Ssi * Swi) / T1;
else
noizDens[BSIM3v32FLNOIZ] *= 0.0;
}
else
{ /* for all versions lower then 3.2.4 */
if (vgs >= here->BSIM3v32von + 0.1)
{
Ssi = StrongInversionNoiseEvalOld(vgs, vds, model,
here, data->freq, ckt->CKTtemp);
noizDens[BSIM3v32FLNOIZ] *= m * Ssi;
}
else
{
pParam = here->pParam;
T10 = model->BSIM3v32oxideTrapDensityA
* 8.62e-5 * ckt->CKTtemp;
T11 = pParam->BSIM3v32weff
* pParam-> BSIM3v32leff
* pow (data->freq, model->BSIM3v32ef)
* 4.0e36;
Swi = T10 / T11 * here->BSIM3v32cd * here->BSIM3v32cd;
Slimit = StrongInversionNoiseEvalOld(
here->BSIM3v32von + 0.1, vds, model,
here, data->freq, ckt->CKTtemp);
T1 = Swi + Slimit;
if (T1 > 0.0)
noizDens[BSIM3v32FLNOIZ] *= m * (Slimit * Swi) / T1;
else
noizDens[BSIM3v32FLNOIZ] *= 0.0;
}
}
break;
}
lnNdens[BSIM3v32FLNOIZ] =
log(MAX(noizDens[BSIM3v32FLNOIZ], N_MINLOG));
noizDens[BSIM3v32TOTNOIZ] = noizDens[BSIM3v32RDNOIZ]
+ noizDens[BSIM3v32RSNOIZ]
+ noizDens[BSIM3v32IDNOIZ]
+ noizDens[BSIM3v32FLNOIZ];
lnNdens[BSIM3v32TOTNOIZ] =
log(MAX(noizDens[BSIM3v32TOTNOIZ], N_MINLOG));
*OnDens += noizDens[BSIM3v32TOTNOIZ];
if (data->delFreq == 0.0)
{ /* if we haven't done any previous
integration, we need to initialize our
"history" variables.
*/
for (i = 0; i < BSIM3v32NSRCS; i++)
{ here->BSIM3v32nVar[LNLSTDENS][i] =
lnNdens[i];
}
/* clear out our integration variables
if it's the first pass
*/
if (data->freq ==
job->NstartFreq)
{ for (i = 0; i < BSIM3v32NSRCS; i++)
{ here->BSIM3v32nVar[OUTNOIZ][i] = 0.0;
here->BSIM3v32nVar[INNOIZ][i] = 0.0;
}
}
}
else
{ /* data->delFreq != 0.0,
we have to integrate.
*/
for (i = 0; i < BSIM3v32NSRCS; i++)
{ if (i != BSIM3v32TOTNOIZ)
{ tempOnoise = Nintegrate(noizDens[i],
lnNdens[i],
here->BSIM3v32nVar[LNLSTDENS][i],
data);
tempInoise = Nintegrate(noizDens[i]
* data->GainSqInv, lnNdens[i]
+ data->lnGainInv,
here->BSIM3v32nVar[LNLSTDENS][i]
+ data->lnGainInv, data);
here->BSIM3v32nVar[LNLSTDENS][i] =
lnNdens[i];
data->outNoiz += tempOnoise;
data->inNoise += tempInoise;
if (job->NStpsSm != 0)
{ here->BSIM3v32nVar[OUTNOIZ][i]
+= tempOnoise;
here->BSIM3v32nVar[OUTNOIZ][BSIM3v32TOTNOIZ]
+= tempOnoise;
here->BSIM3v32nVar[INNOIZ][i]
+= tempInoise;
here->BSIM3v32nVar[INNOIZ][BSIM3v32TOTNOIZ]
+= tempInoise;
}
}
}
}
if (data->prtSummary)
{ for (i = 0; i < BSIM3v32NSRCS; i++)
{ /* print a summary report */
data->outpVector[data->outNumber++]
= noizDens[i];
}
}
break;
case INT_NOIZ:
/* already calculated, just output */
if (job->NStpsSm != 0)
{ for (i = 0; i < BSIM3v32NSRCS; i++)
{ data->outpVector[data->outNumber++]
= here->BSIM3v32nVar[OUTNOIZ][i];
data->outpVector[data->outNumber++]
= here->BSIM3v32nVar[INNOIZ][i];
}
}
break;
}
break;
case N_CLOSE:
/* do nothing, the main calling routine will close */
return (OK);
break; /* the plots */
} /* switch (operation) */
} /* for here */
} /* for model */
return(OK);
}

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/**** BSIM3v3.2.4, Released by Xuemei Xi 12/21/2001 ****/
/**********
* Copyright 2001 Regents of the University of California. All rights reserved.
* File: b3par.c of BSIM3v3.2.4
* Author: 1995 Min-Chie Jeng and Mansun Chan
* Author: 1997-1999 Weidong Liu.
* Author: 2001 Xuemei Xi
* Modified by Paolo Nenzi 2002 and Dietmar Warning 2003
**********/
#include "ngspice/ngspice.h"
#include "ngspice/ifsim.h"
#include "bsim3v32def.h"
#include "ngspice/sperror.h"
#include "ngspice/suffix.h"
#include "ngspice/fteext.h"
int
BSIM3v32SIMDparam (int param, IFvalue *value, GENinstance *inst, IFvalue *select)
{
double scale;
BSIM3v32instance *here = (BSIM3v32instance*)inst;
NG_IGNORE(select);
if (!cp_getvar("scale", CP_REAL, &scale, 0))
scale = 1;
switch (param) {
case BSIM3v32_W:
here->BSIM3v32w = value->rValue*scale;
here->BSIM3v32wGiven = TRUE;
break;
case BSIM3v32_L:
here->BSIM3v32l = value->rValue*scale;
here->BSIM3v32lGiven = TRUE;
break;
case BSIM3v32_M:
here->BSIM3v32m = value->rValue;
here->BSIM3v32mGiven = TRUE;
break;
case BSIM3v32_AS:
here->BSIM3v32sourceArea = value->rValue*scale*scale;
here->BSIM3v32sourceAreaGiven = TRUE;
break;
case BSIM3v32_AD:
here->BSIM3v32drainArea = value->rValue*scale*scale;
here->BSIM3v32drainAreaGiven = TRUE;
break;
case BSIM3v32_PS:
here->BSIM3v32sourcePerimeter = value->rValue*scale;
here->BSIM3v32sourcePerimeterGiven = TRUE;
break;
case BSIM3v32_PD:
here->BSIM3v32drainPerimeter = value->rValue*scale;
here->BSIM3v32drainPerimeterGiven = TRUE;
break;
case BSIM3v32_NRS:
here->BSIM3v32sourceSquares = value->rValue;
here->BSIM3v32sourceSquaresGiven = TRUE;
break;
case BSIM3v32_NRD:
here->BSIM3v32drainSquares = value->rValue;
here->BSIM3v32drainSquaresGiven = TRUE;
break;
case BSIM3v32_OFF:
here->BSIM3v32off = value->iValue;
break;
case BSIM3v32_IC_VBS:
here->BSIM3v32icVBS = value->rValue;
here->BSIM3v32icVBSGiven = TRUE;
break;
case BSIM3v32_IC_VDS:
here->BSIM3v32icVDS = value->rValue;
here->BSIM3v32icVDSGiven = TRUE;
break;
case BSIM3v32_IC_VGS:
here->BSIM3v32icVGS = value->rValue;
here->BSIM3v32icVGSGiven = TRUE;
break;
case BSIM3v32_NQSMOD:
here->BSIM3v32nqsMod = value->iValue;
here->BSIM3v32nqsModGiven = TRUE;
break;
case BSIM3v32_GEO:
here->BSIM3v32geo = value->iValue;
here->BSIM3v32geoGiven = TRUE;
break;
case BSIM3v32_DELVTO:
here->BSIM3v32delvto = value->rValue;
here->BSIM3v32delvtoGiven = TRUE;
break;
case BSIM3v32_MULU0:
here->BSIM3v32mulu0 = value->rValue;
here->BSIM3v32mulu0Given = TRUE;
break;
case BSIM3v32_IC:
/* FALLTHROUGH added to suppress GCC warning due to
* -Wimplicit-fallthrough flag */
switch (value->v.numValue) {
case 3:
here->BSIM3v32icVBS = *(value->v.vec.rVec+2);
here->BSIM3v32icVBSGiven = TRUE;
/* FALLTHROUGH */
case 2:
here->BSIM3v32icVGS = *(value->v.vec.rVec+1);
here->BSIM3v32icVGSGiven = TRUE;
/* FALLTHROUGH */
case 1:
here->BSIM3v32icVDS = *(value->v.vec.rVec);
here->BSIM3v32icVDSGiven = TRUE;
break;
default:
return(E_BADPARM);
}
break;
default:
return(E_BADPARM);
}
return(OK);
}

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/**** BSIM3v3.2.4, Released by Xuemei Xi 12/21/2001 ****/
/**********
* Copyright 2001 Regents of the University of California. All rights reserved.
* File: b3pzld.c of BSIM3v3.2.4
* Author: 1995 Min-Chie Jeng and Mansun Chan.
* Author: 1997-1999 Weidong Liu.
* Author: 2001 Xuemei Xi
* Modified by Paolo Nenzi 2002
**********/
#include "ngspice/ngspice.h"
#include "ngspice/cktdefs.h"
#include "ngspice/complex.h"
#include "ngspice/sperror.h"
#include "bsim3v32def.h"
#include "ngspice/suffix.h"
int
BSIM3v32SIMDpzLoad (GENmodel *inModel, CKTcircuit *ckt, SPcomplex *s)
{
BSIM3v32model *model = (BSIM3v32model*)inModel;
BSIM3v32instance *here;
double xcggb, xcgdb, xcgsb, xcgbb, xcbgb, xcbdb, xcbsb, xcbbb;
double xcdgb, xcddb, xcdsb, xcdbb, xcsgb, xcsdb, xcssb, xcsbb;
double gdpr, gspr, gds, gbd, gbs, capbd, capbs, FwdSum, RevSum, Gm, Gmbs;
double cggb, cgdb, cgsb, cbgb, cbdb, cbsb, cddb, cdgb, cdsb;
double GSoverlapCap, GDoverlapCap, GBoverlapCap;
double dxpart, sxpart, xgtg, xgtd, xgts, xgtb;
double xcqgb = 0.0, xcqdb = 0.0, xcqsb = 0.0, xcqbb = 0.0;
double gbspsp, gbbdp, gbbsp, gbspg, gbspb;
double gbspdp, gbdpdp, gbdpg, gbdpb, gbdpsp;
double ddxpart_dVd, ddxpart_dVg, ddxpart_dVb, ddxpart_dVs;
double dsxpart_dVd, dsxpart_dVg, dsxpart_dVb, dsxpart_dVs;
double T1, CoxWL, qcheq, Cdg, Cdd, Cds, Csg, Csd, Css;
double ScalingFactor = 1.0e-9;
double m;
for (; model != NULL; model = BSIM3v32nextModel(model))
{ for (here = BSIM3v32instances(model); here!= NULL;
here = BSIM3v32nextInstance(here))
{
if (here->BSIM3v32mode >= 0)
{ Gm = here->BSIM3v32gm;
Gmbs = here->BSIM3v32gmbs;
FwdSum = Gm + Gmbs;
RevSum = 0.0;
gbbdp = -here->BSIM3v32gbds;
gbbsp = here->BSIM3v32gbds + here->BSIM3v32gbgs + here->BSIM3v32gbbs;
gbdpg = here->BSIM3v32gbgs;
gbdpdp = here->BSIM3v32gbds;
gbdpb = here->BSIM3v32gbbs;
gbdpsp = -(gbdpg + gbdpdp + gbdpb);
gbspg = 0.0;
gbspdp = 0.0;
gbspb = 0.0;
gbspsp = 0.0;
if (here->BSIM3v32nqsMod == 0)
{ cggb = here->BSIM3v32cggb;
cgsb = here->BSIM3v32cgsb;
cgdb = here->BSIM3v32cgdb;
cbgb = here->BSIM3v32cbgb;
cbsb = here->BSIM3v32cbsb;
cbdb = here->BSIM3v32cbdb;
cdgb = here->BSIM3v32cdgb;
cdsb = here->BSIM3v32cdsb;
cddb = here->BSIM3v32cddb;
xgtg = xgtd = xgts = xgtb = 0.0;
sxpart = 0.6;
dxpart = 0.4;
ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
= ddxpart_dVs = 0.0;
dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
= dsxpart_dVs = 0.0;
}
else
{ cggb = cgdb = cgsb = 0.0;
cbgb = cbdb = cbsb = 0.0;
cdgb = cddb = cdsb = 0.0;
xgtg = here->BSIM3v32gtg;
xgtd = here->BSIM3v32gtd;
xgts = here->BSIM3v32gts;
xgtb = here->BSIM3v32gtb;
xcqgb = here->BSIM3v32cqgb;
xcqdb = here->BSIM3v32cqdb;
xcqsb = here->BSIM3v32cqsb;
xcqbb = here->BSIM3v32cqbb;
CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV
* here->pParam->BSIM3v32leffCV;
qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk);
if (fabs(qcheq) <= 1.0e-5 * CoxWL)
{ if (model->BSIM3v32xpart < 0.5)
{ dxpart = 0.4;
}
else if (model->BSIM3v32xpart > 0.5)
{ dxpart = 0.0;
}
else
{ dxpart = 0.5;
}
ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
= ddxpart_dVs = 0.0;
}
else
{ dxpart = here->BSIM3v32qdrn / qcheq;
Cdd = here->BSIM3v32cddb;
Csd = -(here->BSIM3v32cgdb + here->BSIM3v32cddb
+ here->BSIM3v32cbdb);
ddxpart_dVd = (Cdd - dxpart * (Cdd + Csd)) / qcheq;
Cdg = here->BSIM3v32cdgb;
Csg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb
+ here->BSIM3v32cbgb);
ddxpart_dVg = (Cdg - dxpart * (Cdg + Csg)) / qcheq;
Cds = here->BSIM3v32cdsb;
Css = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb
+ here->BSIM3v32cbsb);
ddxpart_dVs = (Cds - dxpart * (Cds + Css)) / qcheq;
ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg
+ ddxpart_dVs);
}
sxpart = 1.0 - dxpart;
dsxpart_dVd = -ddxpart_dVd;
dsxpart_dVg = -ddxpart_dVg;
dsxpart_dVs = -ddxpart_dVs;
dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs);
}
}
else
{ Gm = -here->BSIM3v32gm;
Gmbs = -here->BSIM3v32gmbs;
FwdSum = 0.0;
RevSum = -(Gm + Gmbs);
gbbsp = -here->BSIM3v32gbds;
gbbdp = here->BSIM3v32gbds + here->BSIM3v32gbgs + here->BSIM3v32gbbs;
gbdpg = 0.0;
gbdpsp = 0.0;
gbdpb = 0.0;
gbdpdp = 0.0;
gbspg = here->BSIM3v32gbgs;
gbspsp = here->BSIM3v32gbds;
gbspb = here->BSIM3v32gbbs;
gbspdp = -(gbspg + gbspsp + gbspb);
if (here->BSIM3v32nqsMod == 0)
{ cggb = here->BSIM3v32cggb;
cgsb = here->BSIM3v32cgdb;
cgdb = here->BSIM3v32cgsb;
cbgb = here->BSIM3v32cbgb;
cbsb = here->BSIM3v32cbdb;
cbdb = here->BSIM3v32cbsb;
cdgb = -(here->BSIM3v32cdgb + cggb + cbgb);
cdsb = -(here->BSIM3v32cddb + cgsb + cbsb);
cddb = -(here->BSIM3v32cdsb + cgdb + cbdb);
xgtg = xgtd = xgts = xgtb = 0.0;
sxpart = 0.4;
dxpart = 0.6;
ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
= ddxpart_dVs = 0.0;
dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
= dsxpart_dVs = 0.0;
}
else
{ cggb = cgdb = cgsb = 0.0;
cbgb = cbdb = cbsb = 0.0;
cdgb = cddb = cdsb = 0.0;
xgtg = here->BSIM3v32gtg;
xgtd = here->BSIM3v32gts;
xgts = here->BSIM3v32gtd;
xgtb = here->BSIM3v32gtb;
xcqgb = here->BSIM3v32cqgb;
xcqdb = here->BSIM3v32cqsb;
xcqsb = here->BSIM3v32cqdb;
xcqbb = here->BSIM3v32cqbb;
CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV
* here->pParam->BSIM3v32leffCV;
qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk);
if (fabs(qcheq) <= 1.0e-5 * CoxWL)
{ if (model->BSIM3v32xpart < 0.5)
{ sxpart = 0.4;
}
else if (model->BSIM3v32xpart > 0.5)
{ sxpart = 0.0;
}
else
{ sxpart = 0.5;
}
dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
= dsxpart_dVs = 0.0;
}
else
{ sxpart = here->BSIM3v32qdrn / qcheq;
Css = here->BSIM3v32cddb;
Cds = -(here->BSIM3v32cgdb + here->BSIM3v32cddb
+ here->BSIM3v32cbdb);
dsxpart_dVs = (Css - sxpart * (Css + Cds)) / qcheq;
Csg = here->BSIM3v32cdgb;
Cdg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb
+ here->BSIM3v32cbgb);
dsxpart_dVg = (Csg - sxpart * (Csg + Cdg)) / qcheq;
Csd = here->BSIM3v32cdsb;
Cdd = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb
+ here->BSIM3v32cbsb);
dsxpart_dVd = (Csd - sxpart * (Csd + Cdd)) / qcheq;
dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg
+ dsxpart_dVs);
}
dxpart = 1.0 - sxpart;
ddxpart_dVd = -dsxpart_dVd;
ddxpart_dVg = -dsxpart_dVg;
ddxpart_dVs = -dsxpart_dVs;
ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs);
}
}
T1 = *(ckt->CKTstate0 + here->BSIM3v32qdef) * here->BSIM3v32gtau;
gdpr = here->BSIM3v32drainConductance;
gspr = here->BSIM3v32sourceConductance;
gds = here->BSIM3v32gds;
gbd = here->BSIM3v32gbd;
gbs = here->BSIM3v32gbs;
capbd = here->BSIM3v32capbd;
capbs = here->BSIM3v32capbs;
GSoverlapCap = here->BSIM3v32cgso;
GDoverlapCap = here->BSIM3v32cgdo;
GBoverlapCap = here->pParam->BSIM3v32cgbo;
xcdgb = (cdgb - GDoverlapCap);
xcddb = (cddb + capbd + GDoverlapCap);
xcdsb = cdsb;
xcdbb = -(xcdgb + xcddb + xcdsb);
xcsgb = -(cggb + cbgb + cdgb + GSoverlapCap);
xcsdb = -(cgdb + cbdb + cddb);
xcssb = (capbs + GSoverlapCap - (cgsb + cbsb + cdsb));
xcsbb = -(xcsgb + xcsdb + xcssb);
xcggb = (cggb + GDoverlapCap + GSoverlapCap + GBoverlapCap);
xcgdb = (cgdb - GDoverlapCap);
xcgsb = (cgsb - GSoverlapCap);
xcgbb = -(xcggb + xcgdb + xcgsb);
xcbgb = (cbgb - GBoverlapCap);
xcbdb = (cbdb - capbd);
xcbsb = (cbsb - capbs);
xcbbb = -(xcbgb + xcbdb + xcbsb);
m = here->BSIM3v32m;
*(here->BSIM3v32GgPtr ) += m * (xcggb * s->real);
*(here->BSIM3v32GgPtr +1) += m * (xcggb * s->imag);
*(here->BSIM3v32BbPtr ) += m * (xcbbb * s->real);
*(here->BSIM3v32BbPtr +1) += m * (xcbbb * s->imag);
*(here->BSIM3v32DPdpPtr ) += m * (xcddb * s->real);
*(here->BSIM3v32DPdpPtr +1) += m * (xcddb * s->imag);
*(here->BSIM3v32SPspPtr ) += m * (xcssb * s->real);
*(here->BSIM3v32SPspPtr +1) += m * (xcssb * s->imag);
*(here->BSIM3v32GbPtr ) += m * (xcgbb * s->real);
*(here->BSIM3v32GbPtr +1) += m * (xcgbb * s->imag);
*(here->BSIM3v32GdpPtr ) += m * (xcgdb * s->real);
*(here->BSIM3v32GdpPtr +1) += m * (xcgdb * s->imag);
*(here->BSIM3v32GspPtr ) += m * (xcgsb * s->real);
*(here->BSIM3v32GspPtr +1) += m * (xcgsb * s->imag);
*(here->BSIM3v32BgPtr ) += m * (xcbgb * s->real);
*(here->BSIM3v32BgPtr +1) += m * (xcbgb * s->imag);
*(here->BSIM3v32BdpPtr ) += m * (xcbdb * s->real);
*(here->BSIM3v32BdpPtr +1) += m * (xcbdb * s->imag);
*(here->BSIM3v32BspPtr ) += m * (xcbsb * s->real);
*(here->BSIM3v32BspPtr +1) += m * (xcbsb * s->imag);
*(here->BSIM3v32DPgPtr ) += m * (xcdgb * s->real);
*(here->BSIM3v32DPgPtr +1) += m * (xcdgb * s->imag);
*(here->BSIM3v32DPbPtr ) += m * (xcdbb * s->real);
*(here->BSIM3v32DPbPtr +1) += m * (xcdbb * s->imag);
*(here->BSIM3v32DPspPtr ) += m * (xcdsb * s->real);
*(here->BSIM3v32DPspPtr +1) += m * (xcdsb * s->imag);
*(here->BSIM3v32SPgPtr ) += m * (xcsgb * s->real);
*(here->BSIM3v32SPgPtr +1) += m * (xcsgb * s->imag);
*(here->BSIM3v32SPbPtr ) += m * (xcsbb * s->real);
*(here->BSIM3v32SPbPtr +1) += m * (xcsbb * s->imag);
*(here->BSIM3v32SPdpPtr ) += m * (xcsdb * s->real);
*(here->BSIM3v32SPdpPtr +1) += m * (xcsdb * s->imag);
*(here->BSIM3v32DdPtr) += m * gdpr;
*(here->BSIM3v32DdpPtr) -= m * gdpr;
*(here->BSIM3v32DPdPtr) -= m * gdpr;
*(here->BSIM3v32SsPtr) += m * gspr;
*(here->BSIM3v32SspPtr) -= m * gspr;
*(here->BSIM3v32SPsPtr) -= m * gspr;
*(here->BSIM3v32BgPtr) -= m * here->BSIM3v32gbgs;
*(here->BSIM3v32BbPtr) += m * (gbd + gbs - here->BSIM3v32gbbs);
*(here->BSIM3v32BdpPtr) -= m * (gbd - gbbdp);
*(here->BSIM3v32BspPtr) -= m * (gbs - gbbsp);
*(here->BSIM3v32DPgPtr) += Gm + dxpart * xgtg
+ T1 * ddxpart_dVg + gbdpg;
*(here->BSIM3v32DPdpPtr) += gdpr + gds + gbd + RevSum
+ dxpart * xgtd + T1 * ddxpart_dVd + gbdpdp;
*(here->BSIM3v32DPspPtr) -= gds + FwdSum - dxpart * xgts
- T1 * ddxpart_dVs - gbdpsp;
*(here->BSIM3v32DPbPtr) -= gbd - Gmbs - dxpart * xgtb
- T1 * ddxpart_dVb - gbdpb;
*(here->BSIM3v32SPgPtr) -= Gm - sxpart * xgtg
- T1 * dsxpart_dVg - gbspg;
*(here->BSIM3v32SPspPtr) += gspr + gds + gbs + FwdSum
+ sxpart * xgts + T1 * dsxpart_dVs + gbspsp;
*(here->BSIM3v32SPbPtr) -= gbs + Gmbs - sxpart * xgtb
- T1 * dsxpart_dVb - gbspb;
*(here->BSIM3v32SPdpPtr) -= gds + RevSum - sxpart * xgtd
- T1 * dsxpart_dVd - gbspdp;
*(here->BSIM3v32GgPtr) -= xgtg;
*(here->BSIM3v32GbPtr) -= xgtb;
*(here->BSIM3v32GdpPtr) -= xgtd;
*(here->BSIM3v32GspPtr) -= xgts;
if (here->BSIM3v32nqsMod)
{ *(here->BSIM3v32QqPtr ) += m * (s->real * ScalingFactor);
*(here->BSIM3v32QqPtr +1) += m * (s->imag * ScalingFactor);
*(here->BSIM3v32QgPtr ) -= m * (xcqgb * s->real);
*(here->BSIM3v32QgPtr +1) -= m * (xcqgb * s->imag);
*(here->BSIM3v32QdpPtr ) -= m * (xcqdb * s->real);
*(here->BSIM3v32QdpPtr +1) -= m * (xcqdb * s->imag);
*(here->BSIM3v32QbPtr ) -= m * (xcqbb * s->real);
*(here->BSIM3v32QbPtr +1) -= m * (xcqbb * s->imag);
*(here->BSIM3v32QspPtr ) -= m * (xcqsb * s->real);
*(here->BSIM3v32QspPtr +1) -= m * (xcqsb * s->imag);
*(here->BSIM3v32GqPtr) -= m * (here->BSIM3v32gtau);
*(here->BSIM3v32DPqPtr) += m * (dxpart * here->BSIM3v32gtau);
*(here->BSIM3v32SPqPtr) += m * (sxpart * here->BSIM3v32gtau);
*(here->BSIM3v32QqPtr) += m * (here->BSIM3v32gtau);
*(here->BSIM3v32QgPtr) += m * xgtg;
*(here->BSIM3v32QdpPtr) += m * xgtd;
*(here->BSIM3v32QbPtr) += m * xgtb;
*(here->BSIM3v32QspPtr) += m * xgts;
}
}
}
return(OK);
}

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/**********
Copyright 2013 Dietmar Warning. All rights reserved.
Author: 2013 Dietmar Warning
**********/
#include "ngspice/ngspice.h"
#include "ngspice/cktdefs.h"
#include "bsim3v32def.h"
#include "ngspice/trandefs.h"
#include "ngspice/sperror.h"
#include "ngspice/suffix.h"
#include "ngspice/cpdefs.h"
int
BSIM3v32SIMDsoaCheck(CKTcircuit *ckt, GENmodel *inModel)
{
BSIM3v32model *model = (BSIM3v32model *) inModel;
BSIM3v32instance *here;
double vgs, vgd, vgb, vds, vbs, vbd; /* actual mos voltages */
int maxwarns;
static int warns_vgs = 0, warns_vgd = 0, warns_vgb = 0, warns_vds = 0, warns_vbs = 0, warns_vbd = 0;
if (!ckt) {
warns_vgs = 0;
warns_vgd = 0;
warns_vgb = 0;
warns_vds = 0;
warns_vbs = 0;
warns_vbd = 0;
return OK;
}
maxwarns = ckt->CKTsoaMaxWarns;
for (; model; model = BSIM3v32nextModel(model)) {
for (here = BSIM3v32instances(model); here; here = BSIM3v32nextInstance(here)) {
vgs = ckt->CKTrhsOld [here->BSIM3v32gNode] -
ckt->CKTrhsOld [here->BSIM3v32sNodePrime];
vgd = ckt->CKTrhsOld [here->BSIM3v32gNode] -
ckt->CKTrhsOld [here->BSIM3v32dNodePrime];
vgb = ckt->CKTrhsOld [here->BSIM3v32gNode] -
ckt->CKTrhsOld [here->BSIM3v32bNode];
vds = ckt->CKTrhsOld [here->BSIM3v32dNodePrime] -
ckt->CKTrhsOld [here->BSIM3v32sNodePrime];
vbs = ckt->CKTrhsOld [here->BSIM3v32bNode] -
ckt->CKTrhsOld [here->BSIM3v32sNodePrime];
vbd = ckt->CKTrhsOld [here->BSIM3v32bNode] -
ckt->CKTrhsOld [here->BSIM3v32dNodePrime];
if (!model->BSIM3v32vgsrMaxGiven) {
if (fabs(vgs) > model->BSIM3v32vgsMax)
if (warns_vgs < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vgs=%g has exceeded Vgs_max=%g\n",
vgs, model->BSIM3v32vgsMax);
warns_vgs++;
}
if (!model->BSIM3v32vgbMaxGiven) {
if (fabs(vgb) > model->BSIM3v32vgsMax)
if (warns_vgb < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vgb=%g has exceeded Vgs_max=%g\n",
vgb, model->BSIM3v32vgsMax);
warns_vgb++;
}
} else {
if (fabs(vgb) > model->BSIM3v32vgbMax)
if (warns_vgb < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vgb=%g has exceeded Vgb_max=%g\n",
vgb, model->BSIM3v32vgbMax);
warns_vgb++;
}
}
} else {
if (model->BSIM3v32type > 0) {
if (vgs > model->BSIM3v32vgsMax)
if (warns_vgs < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vgs=%g has exceeded Vgs_max=%g\n",
vgs, model->BSIM3v32vgsMax);
warns_vgs++;
}
if (-1*vgs > model->BSIM3v32vgsrMax)
if (warns_vgs < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vgs=%g has exceeded Vgsr_max=%g\n",
vgs, model->BSIM3v32vgsrMax);
warns_vgs++;
}
} else {
if (vgs > model->BSIM3v32vgsrMax)
if (warns_vgs < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vgs=%g has exceeded Vgsr_max=%g\n",
vgs, model->BSIM3v32vgsrMax);
warns_vgs++;
}
if (-1*vgs > model->BSIM3v32vgsMax)
if (warns_vgs < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vgs=%g has exceeded Vgs_max=%g\n",
vgs, model->BSIM3v32vgsMax);
warns_vgs++;
}
}
}
if (!model->BSIM3v32vgdrMaxGiven) {
if (fabs(vgd) > model->BSIM3v32vgdMax)
if (warns_vgd < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vgd=%g has exceeded Vgd_max=%g\n",
vgd, model->BSIM3v32vgdMax);
warns_vgd++;
}
} else {
if (model->BSIM3v32type > 0) {
if (vgd > model->BSIM3v32vgdMax)
if (warns_vgd < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vgd=%g has exceeded Vgd_max=%g\n",
vgd, model->BSIM3v32vgdMax);
warns_vgd++;
}
if (-1*vgd > model->BSIM3v32vgdrMax)
if (warns_vgd < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vgd=%g has exceeded Vgdr_max=%g\n",
vgd, model->BSIM3v32vgdrMax);
warns_vgd++;
}
} else {
if (vgd > model->BSIM3v32vgdrMax)
if (warns_vgd < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vgd=%g has exceeded Vgdr_max=%g\n",
vgd, model->BSIM3v32vgdrMax);
warns_vgd++;
}
if (-1*vgd > model->BSIM3v32vgdMax)
if (warns_vgd < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vgd=%g has exceeded Vgd_max=%g\n",
vgd, model->BSIM3v32vgdMax);
warns_vgd++;
}
}
}
if (fabs(vds) > model->BSIM3v32vdsMax)
if (warns_vds < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vds=%g has exceeded Vds_max=%g\n",
vds, model->BSIM3v32vdsMax);
warns_vds++;
}
if (!model->BSIM3v32vgbrMaxGiven) {
if (fabs(vgb) > model->BSIM3v32vgbMax)
if (warns_vgb < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vgb=%g has exceeded Vgb_max=%g\n",
vgb, model->BSIM3v32vgbMax);
warns_vgb++;
}
} else {
if (model->BSIM3v32type > 0) {
if (vgb > model->BSIM3v32vgbMax)
if (warns_vgb < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vgb=%g has exceeded Vgb_max=%g\n",
vgb, model->BSIM3v32vgbMax);
warns_vgb++;
}
if (-1*vgb > model->BSIM3v32vgbrMax)
if (warns_vgb < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vgb=%g has exceeded Vgbr_max=%g\n",
vgb, model->BSIM3v32vgbrMax);
warns_vgb++;
}
} else {
if (vgb > model->BSIM3v32vgbrMax)
if (warns_vgb < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vgb=%g has exceeded Vgbr_max=%g\n",
vgb, model->BSIM3v32vgbrMax);
warns_vgb++;
}
if (-1*vgb > model->BSIM3v32vgbMax)
if (warns_vgb < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vgb=%g has exceeded Vgb_max=%g\n",
vgb, model->BSIM3v32vgbMax);
warns_vgb++;
}
}
}
if (!model->BSIM3v32vbsrMaxGiven) {
if (!model->BSIM3v32vbsMaxGiven) {
if (fabs(vbs) > model->BSIM3v32vbdMax)
if (warns_vbs < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vbs=%g has exceeded Vbd_max=%g\n",
vbs, model->BSIM3v32vbdMax);
warns_vbs++;
}
} else {
if (fabs(vbs) > model->BSIM3v32vbsMax)
if (warns_vbs < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vbs=%g has exceeded Vbs_max=%g\n",
vbs, model->BSIM3v32vbsMax);
warns_vbs++;
}
}
} else {
if (!model->BSIM3v32vbsMaxGiven) {
if (model->BSIM3v32type > 0) {
if (vbs > model->BSIM3v32vbdMax)
if (warns_vbs < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vbs=%g has exceeded Vbd_max=%g\n",
vbs, model->BSIM3v32vbdMax);
warns_vbs++;
}
if (-1*vbs > model->BSIM3v32vbsrMax)
if (warns_vbs < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vbs=%g has exceeded Vbsr_max=%g\n",
vbs, model->BSIM3v32vbsrMax);
warns_vbs++;
}
} else {
if (vbs > model->BSIM3v32vbsrMax)
if (warns_vbs < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vbs=%g has exceeded Vbsr_max=%g\n",
vbs, model->BSIM3v32vbsrMax);
warns_vbs++;
}
if (-1*vbs > model->BSIM3v32vbdMax)
if (warns_vbs < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vbs=%g has exceeded Vbd_max=%g\n",
vbs, model->BSIM3v32vbdMax);
warns_vbs++;
}
}
} else {
if (model->BSIM3v32type > 0) {
if (vbs > model->BSIM3v32vbsMax)
if (warns_vbs < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vbs=%g has exceeded Vbs_max=%g\n",
vbs, model->BSIM3v32vbsMax);
warns_vbs++;
}
if (-1*vbs > model->BSIM3v32vbsrMax)
if (warns_vbs < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vbs=%g has exceeded Vbsr_max=%g\n",
vbs, model->BSIM3v32vbsrMax);
warns_vbs++;
}
} else {
if (vbs > model->BSIM3v32vbsrMax)
if (warns_vbs < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vbs=%g has exceeded Vbsr_max=%g\n",
vbs, model->BSIM3v32vbsrMax);
warns_vbs++;
}
if (-1*vbs > model->BSIM3v32vbsMax)
if (warns_vbs < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vbs=%g has exceeded Vbs_max=%g\n",
vbs, model->BSIM3v32vbsMax);
warns_vbs++;
}
}
}
}
if (!model->BSIM3v32vbdrMaxGiven) {
if (fabs(vbd) > model->BSIM3v32vbdMax)
if (warns_vbd < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vbd=%g has exceeded Vbd_max=%g\n",
vbd, model->BSIM3v32vbdMax);
warns_vbd++;
}
} else {
if (model->BSIM3v32type > 0) {
if (vbd > model->BSIM3v32vbdMax)
if (warns_vbd < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vbd=%g has exceeded Vbd_max=%g\n",
vbd, model->BSIM3v32vbdMax);
warns_vbd++;
}
if (-1*vbd > model->BSIM3v32vbdrMax)
if (warns_vbd < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vbd=%g has exceeded Vbdr_max=%g\n",
vbd, model->BSIM3v32vbdrMax);
warns_vbd++;
}
} else {
if (vbd > model->BSIM3v32vbdrMax)
if (warns_vbd < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vbd=%g has exceeded Vbdr_max=%g\n",
vbd, model->BSIM3v32vbdrMax);
warns_vbd++;
}
if (-1*vbd > model->BSIM3v32vbdMax)
if (warns_vbd < maxwarns) {
soa_printf(ckt, (GENinstance*) here,
"Vbd=%g has exceeded Vbd_max=%g\n",
vbd, model->BSIM3v32vbdMax);
warns_vbd++;
}
}
}
}
}
return OK;
}

1017
src/spicelib/devices/bsim3v32simd/b3v32temp.c Normal file
View File

File diff suppressed because it is too large Load Diff

48
src/spicelib/devices/bsim3v32simd/b3v32trunc.c Normal file
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@ -0,0 +1,48 @@
/**** BSIM3v3.2.4, Released by Xuemei Xi 12/21/2001 ****/
/**********
* Copyright 2001 Regents of the University of California. All rights reserved.
* File: b3trunc.c of BSIM3v3.2.4
* Author: 1995 Min-Chie Jeng and Mansun Chan.
* Author: 1997-1999 Weidong Liu.
* Author: 2001 Xuemei Xi
* Modified by Poalo Nenzi 2002
**********/
#include "ngspice/ngspice.h"
#include "ngspice/cktdefs.h"
#include "bsim3v32def.h"
#include "ngspice/sperror.h"
#include "ngspice/suffix.h"
int
BSIM3v32SIMDtrunc (GENmodel *inModel, CKTcircuit *ckt, double *timeStep)
{
BSIM3v32model *model = (BSIM3v32model*)inModel;
BSIM3v32instance *here;
#ifdef STEPDEBUG
double debugtemp;
#endif /* STEPDEBUG */
for (; model != NULL; model = BSIM3v32nextModel(model))
{ for (here = BSIM3v32instances(model); here != NULL;
here = BSIM3v32nextInstance(here))
{
#ifdef STEPDEBUG
debugtemp = *timeStep;
#endif /* STEPDEBUG */
CKTterr(here->BSIM3v32qb,ckt,timeStep);
CKTterr(here->BSIM3v32qg,ckt,timeStep);
CKTterr(here->BSIM3v32qd,ckt,timeStep);
#ifdef STEPDEBUG
if(debugtemp != *timeStep)
{ printf("device %s reduces step from %g to %g\n",
here->BSIM3v32name,debugtemp,*timeStep);
}
#endif /* STEPDEBUG */
}
}
return(OK);
}

1959
src/spicelib/devices/bsim3v32simd/bsim3v32def.h Normal file
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File diff suppressed because it is too large Load Diff

33
src/spicelib/devices/bsim3v32simd/bsim3v32ext.h Normal file
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@ -0,0 +1,33 @@
/**********
Copyright 1999 Regents of the University of California. All rights reserved.
Author: 1991 JianHui Huang and Min-Chie Jeng.
Modified by Yuhua Cheng to use BSIM3v3 in Spice3f5 (Jan. 1997)
Modified by Paolo Nenzi 2002
File: bsim3ext.h
**********/
extern int BSIM3v32SIMDacLoad(GENmodel *,CKTcircuit*);
extern int BSIM3v32SIMDask(CKTcircuit *,GENinstance*,int,IFvalue*,IFvalue*);
extern int BSIM3v32SIMDconvTest(GENmodel *,CKTcircuit*);
extern int BSIM3v32SIMDgetic(GENmodel*,CKTcircuit*);
extern int BSIM3v32SIMDload(GENmodel*,CKTcircuit*);
extern int BSIM3v32SIMDmAsk(CKTcircuit*,GENmodel *,int, IFvalue*);
extern int BSIM3v32SIMDmDelete(GENmodel*);
extern int BSIM3v32SIMDmParam(int,IFvalue*,GENmodel*);
extern void BSIM3v32SIMDmosCap(CKTcircuit*, double, double, double, double,
double, double, double, double, double, double, double,
double, double, double, double, double, double, double*,
double*, double*, double*, double*, double*, double*, double*,
double*, double*, double*, double*, double*, double*, double*,
double*);
extern int BSIM3v32SIMDparam(int,IFvalue*,GENinstance*,IFvalue*);
extern int BSIM3v32SIMDpzLoad(GENmodel*,CKTcircuit*,SPcomplex*);
extern int BSIM3v32SIMDsetup(SMPmatrix*,GENmodel*,CKTcircuit*,int*);
extern int BSIM3v32SIMDtemp(GENmodel*,CKTcircuit*);
extern int BSIM3v32SIMDtrunc(GENmodel*,CKTcircuit*,double*);
extern int BSIM3v32SIMDnoise(int,int,GENmodel*,CKTcircuit*,Ndata*,double*);
extern int BSIM3v32SIMDunsetup(GENmodel*,CKTcircuit*);
extern int BSIM3v32SIMDsoaCheck(CKTcircuit *, GENmodel *);
#ifdef BSIM3v32SIMD
extern int BSIM3v32SIMDloadSel(GENmodel*,CKTcircuit*);
#endif

80
src/spicelib/devices/bsim3v32simd/bsim3v32init.c Normal file
View File

@ -0,0 +1,80 @@
#include "ngspice/config.h"
#include "ngspice/devdefs.h"
#include "bsim3v32itf.h"
#include "bsim3v32ext.h"
#include "bsim3v32init.h"
SPICEdev BSIM3v32simdinfo = {
.DEVpublic = {
.name = "BSIM3v32simd",
.description = "Berkeley Short Channel IGFET Model Version-3",
.terms = &BSIM3v32nSize,
.numNames = &BSIM3v32nSize,
.termNames = BSIM3v32names,
.numInstanceParms = &BSIM3v32pTSize,
.instanceParms = BSIM3v32pTable,
.numModelParms = &BSIM3v32mPTSize,
.modelParms = BSIM3v32mPTable,
.flags = DEV_DEFAULT,
#ifdef XSPICE
.cm_func = NULL,
.num_conn = 0,
.conn = NULL,
.num_param = 0,
.param = NULL,
.num_inst_var = 0,
.inst_var = NULL,
#endif
},
.DEVparam = BSIM3v32SIMDparam,
.DEVmodParam = BSIM3v32SIMDmParam,
#ifdef BSIM3v32SIMD
.DEVload = BSIM3v32SIMDloadSel, /*F.B: point to load function wrapper */
#else
.DEVload = BSIM3v32SIMDload,
#endif
.DEVsetup = BSIM3v32SIMDsetup,
.DEVunsetup = BSIM3v32SIMDunsetup,
.DEVpzSetup = BSIM3v32SIMDsetup,
.DEVtemperature = BSIM3v32SIMDtemp,
.DEVtrunc = BSIM3v32SIMDtrunc,
.DEVfindBranch = NULL,
.DEVacLoad = BSIM3v32SIMDacLoad,
.DEVaccept = NULL,
.DEVdestroy = NULL,
.DEVmodDelete = BSIM3v32SIMDmDelete,
.DEVdelete = NULL,
.DEVsetic = BSIM3v32SIMDgetic,
.DEVask = BSIM3v32SIMDask,
.DEVmodAsk = BSIM3v32SIMDmAsk,
.DEVpzLoad = BSIM3v32SIMDpzLoad,
.DEVconvTest = BSIM3v32SIMDconvTest,
.DEVsenSetup = NULL,
.DEVsenLoad = NULL,
.DEVsenUpdate = NULL,
.DEVsenAcLoad = NULL,
.DEVsenPrint = NULL,
.DEVsenTrunc = NULL,
.DEVdisto = NULL,
.DEVnoise = BSIM3v32SIMDnoise,
.DEVsoaCheck = BSIM3v32SIMDsoaCheck,
.DEVinstSize = &BSIM3v32iSize,
.DEVmodSize = &BSIM3v32mSize,
#ifdef CIDER
.DEVdump = NULL,
.DEVacct = NULL,
#endif
};
SPICEdev *
get_bsim3v32simd_info(void)
{
return &BSIM3v32simdinfo;
}

13
src/spicelib/devices/bsim3v32simd/bsim3v32init.h Normal file
View File

@ -0,0 +1,13 @@
#ifndef _BSIM3v32INIT_H
#define _BSIM3v32INIT_H
extern IFparm BSIM3v32pTable[ ];
extern IFparm BSIM3v32mPTable[ ];
extern char *BSIM3v32names[ ];
extern int BSIM3v32pTSize;
extern int BSIM3v32mPTSize;
extern int BSIM3v32nSize;
extern int BSIM3v32iSize;
extern int BSIM3v32mSize;
#endif

13
src/spicelib/devices/bsim3v32simd/bsim3v32itf.h Normal file
View File

@ -0,0 +1,13 @@
/**********
Copyright 1999 Regents of the University of California. All rights reserved.
Author: 1991 JianHui Huang and Min-Chie Jeng.
Modified by Paolo Nenzi 2002
File: bsim3itf.h
**********/
#ifndef DEV_BSIM3v32SIMD
#define DEV_BSIM3v32SIMD
SPICEdev *get_bsim3v32simd_info(void);
#endif

6
src/spicelib/devices/dev.c
View File

@ -82,6 +82,7 @@ extern struct coreInfo_t coreInfo; /* cmexport.c */
#include "bsim3v0/bsim3v0itf.h"
#include "bsim3v1/bsim3v1itf.h"
#include "bsim3v32/bsim3v32itf.h"
#include "bsim3v32simd/bsim3v32itf.h"
#include "bsim4/bsim4itf.h"
#include "bsim4v5/bsim4v5itf.h"
#include "bsim4v6/bsim4v6itf.h"
@ -154,6 +155,7 @@ static SPICEdev *(*static_devices[])(void) = {
get_bsim3v0_info,
get_bsim3v1_info,
get_bsim3v32_info,
get_bsim3v32simd_info,
get_b4soi_info,
get_bsim4_info,
get_bsim4v5_info,
@ -295,12 +297,12 @@ SPICEdev ** devices(void)
/*not yet usable*/
#ifdef ADMS
#define DEVICES_USED {"asrc", "bjt", "vbic", "bsim1", "bsim2", "bsim3", "bsim3v32", "bsim3v2", "bsim3v1", "bsim4", "bsim4v5", "bsim4v6", "bsim4v7", \
#define DEVICES_USED {"asrc", "bjt", "vbic", "bsim1", "bsim2", "bsim3", "bsim3v32", "bsim3v32simd", "bsim3v2", "bsim3v1", "bsim4", "bsim4v5", "bsim4v6", "bsim4v7", \
"bsim4soi", "bsim3soipd", "bsim3soifd", "bsim3soidd", "hisim2", "hisimhv1", "hisimhv2", \
"cap", "cccs", "ccvs", "csw", "dio", "hfet", "hfet2", "ind", "isrc", "jfet", "ltra", "mes", "mesa" ,"mos1", "mos2", "mos3", \
"mos6", "mos9", "res", "soi3", "sw", "tra", "urc", "vccs", "vcvs", "vsrc", "hicum0", "hicum2", "bjt504t", "ekv", "psp102"}
#else
#define DEVICES_USED {"asrc", "bjt", "vbic", "bsim1", "bsim2", "bsim3", "bsim3v32", "bsim3v2", "bsim3v1", "bsim4", "bsim4v5", "bsim4v6", "bsim4v7", \
#define DEVICES_USED {"asrc", "bjt", "vbic", "bsim1", "bsim2", "bsim3", "bsim3v32", "bsim3v32simd", "bsim3v2", "bsim3v1", "bsim4", "bsim4v5", "bsim4v6", "bsim4v7", \
"bsim4soi", "bsim3soipd", "bsim3soifd", "bsim3soidd", "hisim2", "hisimhv1", "hisimhv2", \
"cap", "cccs", "ccvs", "csw", "dio", "hfet", "hfet2", "ind", "isrc", "jfet", "ltra", "mes", "mesa" ,"mos1", "mos2", "mos3", \
"mos6", "mos9", "res", "soi3", "sw", "tra", "urc", "vccs", "vcvs", "vsrc"}

1
src/spicelib/parser/inp2m.c
View File

@ -120,6 +120,7 @@ INP2M(CKTcircuit *ckt, INPtables *tab, struct card *current)
thismodel->INPmodType != INPtypelook("BSIM2") &&
thismodel->INPmodType != INPtypelook("BSIM3") &&
thismodel->INPmodType != INPtypelook("BSIM3v32") &&
thismodel->INPmodType != INPtypelook("BSIM3v32simd") &&
thismodel->INPmodType != INPtypelook("B4SOI") &&
thismodel->INPmodType != INPtypelook("B3SOIPD") &&
thismodel->INPmodType != INPtypelook("B3SOIFD") &&

14
src/spicelib/parser/inpdomod.c
View File

@ -299,6 +299,11 @@ char *INPdomodel(CKTcircuit *ckt, struct card *image, INPtables * tab)
type = INPtypelook("BSIM3v1");
}
if (prefix("3.2", ver)) { /* version string ver has to start with 3.2 */
#ifdef BSIM3v32SIMD
if((strlen(ver)>5) && (strcmp(&ver[5],"simd")==0))
type = INPtypelook("BSIM3v32simd");
else
#endif
type = INPtypelook("BSIM3v32");
}
if ( (strstr(ver, "default")) || (prefix("3.3", ver)) ) {
@ -308,6 +313,15 @@ char *INPdomodel(CKTcircuit *ckt, struct card *image, INPtables * tab)
err = tprintf("Device type BSIM3 version %s not available in this binary\n", ver);
}
break;
case 88:
err = INPfindVer(line, ver);
if (prefix("3.2", ver)) { /* version string ver has to start with 3.2 */
type = INPtypelook("BSIM3v32simd");
}
if (type < 0) {
err = tprintf("Device type BSIM3(simd) version %s not available in this binary\n", ver);
}
break;
case 9:
type = INPtypelook("Mos9");
if(type < 0) {

1
src/spicelib/parser/inpgmod.c
View File

@ -245,6 +245,7 @@ INPgetModBin(CKTcircuit *ckt, char *name, INPmodel **model, INPtables *tab, char
/* skip if not binnable */
if (modtmp->INPmodType != INPtypelook("BSIM3") &&
modtmp->INPmodType != INPtypelook("BSIM3v32") &&
modtmp->INPmodType != INPtypelook("BSIM3v32simd") &&
modtmp->INPmodType != INPtypelook("BSIM3v0") &&
modtmp->INPmodType != INPtypelook("BSIM3v1") &&
modtmp->INPmodType != INPtypelook("BSIM4") &&