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Merge branch 'pre-master' into bt_dev

This commit is contained in:
Brian Taylor 2023-01-27 06:33:24 -08:00
parent 2db2b3416f 87517b6f7a
commit 3d4b6ca23a
94 changed files with 895 additions and 2435 deletions
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0
examples/various/adder_mos.cir → examples/mos/adder_mos.cir
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0
examples/various/modelcard.nmos → examples/mos/modelcard.nmos
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0
examples/various/modelcard.pmos → examples/mos/modelcard.pmos
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2
examples/various/nmos_out_BSIM330_plainwrite.sp → examples/mos/nmos_out_BSIM330_plainwrite.sp
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@ -31,7 +31,7 @@ set nolegend
*set plainplot
plot v(+22) plainplot
set plainwrite
write test.out v(+22) vss#branch dc1.v(/22) dc1.vss#branch
*write test.out v(+22) vss#branch dc1.v(/22) dc1.vss#branch
unset nolegend
set color0=white
*unset plainplot ; required if 'set plainplot'

0
examples/various/nmos_out_BSIM330_svg.sp → examples/mos/nmos_out_BSIM330_svg.sp
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0
examples/various/nmos_pmos_BSIM330.sp → examples/mos/nmos_pmos_BSIM330.sp
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48
examples/mos/nmos_pmos_BSIM482.sp Normal file
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@ -0,0 +1,48 @@
*** Single NMOS and PMOS Transistor BSIM4 (Id-Vgs, Vbs) (Id-Vds, Vgs) (Id-Vgs, T) ***
M1 2 1 3 4 n1 W=1u L=0.35u Pd=1.5u Ps=1.5u ad=1.5p as=1.5p
vgsn 1 0 3.5
vdsn 2 0 0.1
vssn 3 0 0
vbsn 4 0 0
M2 22 11 33 44 p1 W=2.5u L=0.35u Pd=3u Ps=3u ad=2.5p as=2.5p
vgsp 11 0 -3.5
vdsp 22 0 -0.1
vssp 33 0 0
vbsp 44 0 0
* modified parameters
*.model n1 nmos level=49 version=3.3.0 tox=10n nch=1e17 nsub=5e16
*.model p1 pmos level=49 version=3.3.0 tox=10n nch=1e17 nsub=5e16
* BSIM3v3.3.0 model with internal parameters only
.model n1 nmos level=54 version=4.8.2
.model p1 pmos level=54 version=4.8.2
.control
set xgridwidth=2
set xbrushwidth=3
* NMOS
dc vgsn 0 1.5 0.05 vbsn 0 -2.5 -0.5
plot vssn#branch ylabel 'Id vs. Vgs, Vbs 0 ... -2.5'
plot abs(vssn#branch) ylog ylabel 'Id vs. Vgs, Vbs 0 ... -2.5'
dc vdsn 0 2 0.05 vgsn 0 2 0.4
plot vssn#branch ylabel 'Id vs. Vds, Vgs 0 ... 2'
dc vgsn 0 1.5 0.05 temp -40 160 40
plot vssn#branch ylabel 'Id vs. Vds, Temp. -40 ... 160'
plot abs(vssn#branch) ylog ylabel 'Id vs. Vds, Temp. -40 ... 160'
* PMOS
dc vgsp 0 -1.5 -0.05 vbsp 0 2.5 0.5
plot vssp#branch ylabel 'Id vs. Vgs, Vbs 0 ... 2.5'
plot abs(vssp#branch) ylog ylabel 'Id vs. Vgs, Vbs 0 ... 2.5'
dc vdsp 0 -2 -0.05 vgsp 0 -2 -0.4
plot vssp#branch ylabel 'Id vs. Vds, Vgs 0 ... -2'
dc vgsp 0 -1.5 -0.05 temp -40 160 40
plot vssp#branch ylabel 'Id vs. Vds, Temp. -40 ... 160'
plot abs(vssp#branch) ylog ylabel 'Id vs. Vds, Temp. -40 ... 160'
.endc
.end

51
examples/mos/nmos_pmos_drainresistor.sp Normal file
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@ -0,0 +1,51 @@
** Single NMOS and PMOS, BSIM3, (Id-Vgs) (Id-Vds) **
M1 2 1 3 4 n1 W=1u L=0.35u Pd=1.5u Ps=1.5u ad=1.5p as=1.5p
vgsn 1 0 3.5
vdsn 102 0 0.1
Rdn 102 2 1k
vssn 3 0 0
vbsn 4 0 0
M2 22 11 33 44 p1 W=2.5u L=0.35u Pd=3u Ps=3u ad=2.5p as=2.5p
vgsp 11 0 -3.5
vdsp 222 0 -0.1
Rdp 222 22 1k
vssp 33 0 0
vbsp 44 0 0
.options Temp=27.0
* BSIM3v3.3.0 model with modified default parameters 0.18µm
.model n1 nmos level=49 version=3.3.0 tox=3.5n nch=2.4e17 nsub=5e16 vth0=0.15
.model p1 pmos level=49 version=3.3.0 tox=3.5n nch=2.5e17 nsub=5e16 vth0=-0.15
*.include ./Modelcards/modelcard.nmos $ Berkeley model cards limited to L >= 0.35µm
*.include ./Modelcards/modelcard.pmos $ Berkeley model cards limited to L >= 0.35µm
* update of the default parameters required
*.model n1 NMOS level=49 version=3.3.0 $ nearly no current due to VT > 2 V ?
*.model p1 PMOS level=49 version=3.3.0
.control
* various plot font sizes
dc vgsn 0 1.5 0.05 vbsn 0 -2.5 -0.5
plot vssn#branch ylabel 'output current'
set wfont_size=16
dc vdsn 0 2 0.05 vgsn 0 2 0.4
plot vssn#branch vs v(2) ylabel 'output current'
set wfont_size=24
dc vgsp 0 -1.5 -0.05 vbsp 0 2.5 0.5
plot vssp#branch ylabel 'output current'
set wfont=Times
set wfont_size=22
dc vdsp 0 -2 -0.05 vgsp 0 -2 -0.4
plot vssp#branch vs v(22) ylabel 'output current'
.endc
.end

0
examples/various/nmos_pmos_plotting.sp → examples/mos/nmos_pmos_plotting.sp
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0
examples/various/ro-meas.cir → examples/mos/ro-meas.cir
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0
examples/various/ro_17_4.cir → examples/mos/ro_17_4.cir
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75
examples/osdi/EKV2.6/Modelcards/ekv26_0u15.par
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@ -1,75 +0,0 @@
*** SPICE Models
*** Models created by Daniel Foty.
*** (c) 2001, Gilgamesh Associates and EPFL – All rights reserved.
*** These models are provided without warranty or support.
*** These models represent a completely fictitious 0.15um process, and do
*** NOT correspond to any real silicon process. They are provided expressly for
*** use in the examples provided in this text, and should not be used for any
*** real silicon product design.
*** NMOS EKV MOSFET Model ***************************************************
*** Level=44 in WinSPICE and ELDO, Level=55 in ADM/HSPICE, Level=5 in PSPICE,
*** Level=EKV in Spectre
*** Lmin=0.15u Wmin=1.05u (If Scale=0.15u then Lmin=1 and Wmin=7)
*—————
.MODEL nmos nmos
+ LEVEL=44
*** Setup Parameters
+ UPDATE=2.6
*** Process Related Model Parameters
+ COX=9.083E-3 XJ=0.15E-6
*** Intrinsic Model Parameters
+ VTO=0.4 GAMMA=0.71 PHI=0.97 KP=453E-6
+ E0=88.0E6 UCRIT=4.0E6
+ DL=-0.05E-6 DW=-0.02E-6
+ LAMBDA = 0.30 LETA=0.28 WETA=0
+ Q0=280E-6 LK=0.5E-6
*** Substrate Current Parameters
+ IBN=1.0 IBA=200E6 IBB=350E6
*** Intrinsic Model Temperature Parameters
+ TNOM=27.0 TCV=1.5E-3 BEX=-1.5 UCEX=1.7 IBBT=0
*** 1/f Noise Model Parameters
+ KF=1E-27 AF=1
*** Series Resistance and Area Calculation Parameters
+ HDIF=0.24e-6 ACM=3 RSH=5.0 RS=1250.526
+ RD=1250.526 LDIF=0.07e-6
*** Junction Current Parameters
+ JS=1.0E-6 JSW=5.0E-11 XTI=0 N=1.5
*** Junction Capacitances Parameters
+ CJ=1.0E-3 CJSW=2.0E-10 CJGATE=5.0E-10
+ MJ=0.5 MJSW=0.3 PB=0.9 PBSW=0.9 FC=0.5
*** Gate Overlap Capacitances
+ CGSO=3.0E-10 CGDO=3.0E-10 CGBO=3.0E-11
*** PMOS EKV MOSFET Model ***************************************************
*** Level=44 in WinSPICE and ELDO, Level=55 in ADM/HSPICE, Level=5 in PSPICE,
*** Level=EKV in Spectre
*** Lmin=0.15u Wmin=1.05u (If Scale=0.15u then Lmin=1 and Wmin=7)
*—————
.MODEL pmos pmos
+ LEVEL = 44
*** Setup Parameters
+ UPDATE = 2.6
*** Process Related Model Parameters
+ COX=9.083E-3 XJ=0.15E-6
*** Intrinsic Model Parameters
+ VTO=-0.4 GAMMA=0.69 PHI=0.87 KP=92.15E-6
+ E0=51.0E6 UCRIT=18.0E6
+ DL=-0.05E-6 DW=-0.03E-6
+ LAMBDA=1.1 LETA=0.45 WETA=0
+ Q0=200E-6 LK=0.6E-6
*** Substrate Current Parameters
+ IBN=1.0 IBA=0.0 IBB=300E6
*** Intrinsic Model Temperature Parameters
+ TNOM=25.0 TCV=-1.4E-3 BEX=-1.4 UCEX=2.0 IBBT=0.0
*** 1/f Noise Model Parameters
+ KF=1.0E-28 AF=1
*** Series Resistance and Area Calculation Parameters
+ HDIF=0.24E-6 ACM=3 RSH=5.0 RS=3145.263
+ RD=3145.263 LDIF=0.07e-6
*** Junction Current Parameters
+ JS=1.0E-7 JSW=5.0E-12 XTI=0 N=1.8
*** Junction Capacitances Parameters
+ CJ=1.3E-3 CJSW=2.5E-10 CJGATE=5.5E-10
+ MJ=0.5 MJSW=0.35 PB=0.9 PBSW=0.9 FC=0.5
*** Gate Overlap Capacitances
+ CGSO=3.2E-10 CGDO=3.2E-10 CGBO=3.0E-11

157
examples/osdi/EKV2.6/Modelcards/ekv26_0u5.par
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@ -1,157 +0,0 @@
**********************************************************************
* EKV v2.6 parameters for 0.5um CMOS C. EPFL-LEG, 1999
* ----------------------------------
*
* ELDO (LEVEL = 44) / PSPICE (LEVEL = 5) example parameter set
* for the EKV v2.6 model is provided for NMOS and PMOS.
*
*
* IMPORTANT NOTES:
* ----------------
*
* Parameters do not correspond to a particular technology but
* have reasonable values for standard 0.5um CMOS.
* Not intended for use in real design.
*
* Includes all intrinsic model parameters. An example set for
* extrinsic model parameters is provided.
*
* Geometry range: W >= 0.8um, L >= 0.5um
* Voltage range: |Vgb| < 3.3V, |Vdb| < 3.3V, |Vsb| < 2V
*
* For use with either simulator, comment/uncomment respective lines.
* Use of extrinsic model parameters and models (series resistance,
* junction currents/capacitances) is in general simulator-dependent.
*
**********************************************************************
* EKV v2.6 NMOS
*---------------
.MODEL NCH EKV_VA
*+ LEVEL = 44
*** Setup Parameters
*+ UPDATE = 2.6
*+ XQC = 0.4
+ TYPE = 1
*** Process Related Model Parameters
+ COX = 3.45E-3
+ XJ = 0.15E-6
*** Intrinsic Model Parameters
+ VTO = 0.6
+ GAMMA = 0.71
+ PHI = 0.97
+ KP = 150E-6
+ E0 = 88.0E6
+ UCRIT = 4.5E6
+ DL = -0.05E-6
+ DW = -0.02E-6
+ LAMBDA = 0.23
+ LETA = 0.28
+ WETA = 0.05
+ Q0 = 280E-6
+ LK = 0.5E-6
*** Substrate Current Parameters
+ IBN = 1.0
+ IBA = 200E6
+ IBB = 350E6
*** Intrinsic Model Temperature Parameters
+ TNOM = 25.0
+ TCV = 1.5E-3
+ BEX = -1.5
+ UCEX = 1.7
+ IBBT = 0.0
*** 1/f Noise Model Parameters
+ KF = 1E-27
+ AF = 1
*** Short-Distance Matching Statistical Parameters (for MC simulation only)
*+ AVTO = 0 DEV = 10.0E-3 ; ELDO v4.6
*+ AGAMMA = 0 DEV = 10.0E-3 ; ELDO v4.6
*+ AKP = 0 DEV = 25.0E-3 ; ELDO v4.6
*** Series Resistance and Area Calulation Parameters
*+ RLEV = 3
+ HDIF = 0.9E-6
+ RSH = 510
*** Junction Current Parameters
*+ ALEV = 3
+ JS = 8.0E-6
+ JSW = 1.5E-10
+ XTI = 0
+ N = 1.5
*** Junction Capacitances Parameters
+ CJ = 8.0E-4
+ CJSW = 3.0E-10
+ MJ = 0.5
+ MJSW = 0.3
+ PB = 0.9
+ PBSW = 0.5
+ FC = 0.5
*** Gate Overlap Capacitances
+ CGSO = 1.5E-10
+ CGDO = 1.5E-10
+ CGBO = 4.0E-10
* EKV v2.6 PMOS
*---------------
.MODEL PCH EKV_VA
*+ LEVEL = 44
*** Setup Parameters
*+ UPDATE = 2.6
*+ XQC = 0.4
+ TYPE = -1
*** Process Related Model Parameters
+ COX = 3.45E-3
+ XJ = 0.15E-6
*** Intrinsic Model Parameters
+ VTO = -0.55
+ GAMMA = 0.69
+ PHI = 0.87
+ KP = 35.0E-6
+ E0 = 51.0E6
+ UCRIT = 18.0E6
+ DL = -0.05E-6
+ DW = -0.03E-6
+ LAMBDA = 1.1
+ LETA = 0.45
+ WETA = 0.0
+ Q0 = 200E-6
+ LK = 0.6E-6
*** Substrate Current Parameters
+ IBN = 1.0
+ IBA = 10E6
+ IBB = 300E6
*** Intrinsic Model Temperature Parameters
+ TNOM = 25.0
+ TCV = -1.4E-3
+ BEX = -1.4
+ UCEX = 2.0
+ IBBT = 0.0
*** 1/f Noise Model Parameters
+ KF = 1.0E-28
+ AF = 1
*** Short-Distance Matching Statistical Parameters (for MC simulation only)
*+ AVTO = 0 DEV = 10.0E-3 ; ELDO v4.6
*+ AGAMMA = 0 DEV = 10.0E-3 ; ELDO v4.6
*+ AKP = 0 DEV = 25.0E-3 ; ELDO v4.6
*** Series Resistance and Area Calulation Parameters
*+ RLEV = 3
+ HDIF = 0.9E-6
+ RSH = 990
*** Junction Current Parameters
*+ ALEV = 3
+ JS = 4.0E-5
+ JSW = 7.0E-10
+ XTI = 0
+ N = 1.8
*** Junction Capacitances Parameters
+ CJ = 8.0E-4
+ CJSW = 4.0E-10
+ MJ = 0.5
+ MJSW = 0.35
+ PB = 0.9
+ PBSW = 0.8
+ FC = 0.5
*** Gate Overlap Capacitances
+ CGSO = 1.5E-10
+ CGDO = 1.5E-10
+ CGBO = 4.0E-10

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examples/osdi/EKV2.6/ekv26_inverter.sp
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@ -1,41 +0,0 @@
* EKV 2.6
* simple inverter
.param Vcc = 1.8
* model definitions:
*.model .MODEL PCH EKV_VA type=-1
*.model .MODEL NCH EKV_VA type=1
.include Modelcards/ekv26_0u5.par
* the voltage sources:
Vdd vdd gnd DC 'Vcc'
V1 in gnd pulse(0 'Vcc' 0p 200p 100p 1n 2n)
Vmeas vss 0 0
Xnot1 in vdd vss out not1
*Rout out 0 1k
.subckt not1 a vdd vss z
Np1 z a vdd vdd pch W=2u L=0.5u as=0.26235p ad=0.26235p ps=2.51u pd=2.51u
Nn1 z a vss vss nch W=1u L=0.5u as=0.131175p ad=0.131175p ps=1.52u pd=1.52u
c3 a vss 0.384f
c2 z vss 0.576f
.ends
* simulation command:
.tran 10ps 10ns
.dc V1 0 'vcc' 'vcc/100'
.control
pre_osdi osdi_libs/ekv26_mod.osdi
run
*set nolegend
set xbrushwidth=3
plot in out
plot dc1.out
plot dc1.i(Vmeas)
rusage
.endc
.end

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examples/osdi/EKV2.6/ekv26_mod.va
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@ -1,922 +0,0 @@
/*
EKV MOS model version 2.6 rev.15 with documentation at: http://ekv.epfl.ch
Matthias Bucher, Christophe Lallement, Christian Enz, Fabien Theodoloz, Francois Krummenacher
Electronics Laboratories, Swiss Federal Institute of Technology Lausanne, Switzerland
This Verilog-A was developed by Wladek Grabinski with modifications
by Tiburon Design Automation (www.tiburon-da.com).
This software has been provided pursuant to a License Agreement containing restrictions on its use.
It may not be copied or distributed in any form or medium, disclosed to third parties,
reverse engineered or used in any manner not provided for in said License Agreement
except with the prior written authorization.
Licensed under the Educational Community License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at http://opensource.org/licenses/ECL-2.0
Unless required by applicable law or agreed to in writing, software distributed under
the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
either express or implied. See the License for the specific language governing permissions
and limitations under the License.
$RCSfile: ekv.va,v $ $Revision: 1.9 $ $Date: 2003/12/17 01:20:10 $
$RCSfile: ekv.va,v $ $Revision: 2.6.15 $ $Date: 2020/05/29 11:50:10 $
*/
/*
`include "disciplines.vams"
`include "constants.vams"
`include "compact.vams"
*/
// Macros for the model/instance parameters
//
// MPRxx model parameter real
// MPIxx model parameter integer
// IPRxx instance parameter real
// IPIxx instance parameter integer
// ||
// cc closed lower bound, closed upper bound
// oo open lower bound, open upper bound
// co closed lower bound, open upper bound
// oc open lower bound, closed upper bound
// cz closed lower bound=0, open upper bound=inf
// oz open lower bound=0, open upper bound=inf
// nb no bounds
// ex no bounds with exclude
// sw switch(integer only, values 0=false and 1=true)
// ty switch(integer only, values -1=p-type and +1=n-type)
//
// IPM instance parameter mFactor(multiplicity, implicit for LRM 2.2)
// OPP operating point parameter, includes units and description for printing
`define OPP(nam,uni,des) (* units=uni, desc=des *) real nam;
`define OPM(nam,uni,des) (* units=uni, desc=des, multiplicity="multiply" *) real nam;
`define OPD(nam,uni,des) (* units=uni, desc=des, multiplicity="divide" *) real nam;
`define MPRnb(nam,def,uni, des) (* units=uni, desc=des *) parameter real nam=def;
`define MPRex(nam,def,uni,exc, des) (* units=uni, desc=des *) parameter real nam=def exclude exc;
`define MPRcc(nam,def,uni,lwr,upr,des) (* units=uni, desc=des *) parameter real nam=def from[lwr:upr];
`define MPRoo(nam,def,uni,lwr,upr,des) (* units=uni, desc=des *) parameter real nam=def from(lwr:upr);
`define MPRco(nam,def,uni,lwr,upr,des) (* units=uni, desc=des *) parameter real nam=def from[lwr:upr);
`define MPRoc(nam,def,uni,lwr,upr,des) (* units=uni, desc=des *) parameter real nam=def from(lwr:upr];
`define MPRcz(nam,def,uni, des) (* units=uni, desc=des *) parameter real nam=def from[ 0:inf);
`define MPRoz(nam,def,uni, des) (* units=uni, desc=des *) parameter real nam=def from( 0:inf);
`define MPInb(nam,def,uni, des) (* units=uni, desc=des *) parameter integer nam=def;
`define MPIex(nam,def,uni,exc, des) (* units=uni, desc=des *) parameter integer nam=def exclude exc;
`define MPIcc(nam,def,uni,lwr,upr,des) (* units=uni, desc=des *) parameter integer nam=def from[lwr:upr];
`define MPIoo(nam,def,uni,lwr,upr,des) (* units=uni, desc=des *) parameter integer nam=def from(lwr:upr);
`define MPIco(nam,def,uni,lwr,upr,des) (* units=uni, desc=des *) parameter integer nam=def from[lwr:upr);
`define MPIoc(nam,def,uni,lwr,upr,des) (* units=uni, desc=des *) parameter integer nam=def from(lwr:upr];
`define MPIcz(nam,def,uni, des) (* units=uni, desc=des *) parameter integer nam=def from[ 0:inf);
`define MPIoz(nam,def,uni, des) (* units=uni, desc=des *) parameter integer nam=def from( 0:inf);
`define MPIsw(nam,def,uni, des) (* units=uni, desc=des *) parameter integer nam=def from[ 0: 1];
`define MPIty(nam,def,uni, des) (* units=uni, desc=des *) parameter integer nam=def from[ -1: 1] exclude 0;
`define IPRnb(nam,def,uni, des) (* units=uni, type = "instance", desc=des *) parameter real nam=def;
`define IPRex(nam,def,uni,exc, des) (* units=uni, type = "instance", desc=des *) parameter real nam=def exclude exc;
`define IPRcc(nam,def,uni,lwr,upr,des) (* units=uni, type = "instance", desc=des *) parameter real nam=def from[lwr:upr];
`define IPRoo(nam,def,uni,lwr,upr,des) (* units=uni, type = "instance", desc=des *) parameter real nam=def from(lwr:upr);
`define IPRco(nam,def,uni,lwr,upr,des) (* units=uni, type = "instance", desc=des *) parameter real nam=def from[lwr:upr);
`define IPRoc(nam,def,uni,lwr,upr,des) (* units=uni, type = "instance", desc=des *) parameter real nam=def from(lwr:upr];
`define IPRcz(nam,def,uni, des) (* units=uni, type = "instance", desc=des *) parameter real nam=def from[ 0:inf);
`define IPRoz(nam,def,uni, des) (* units=uni, type = "instance", desc=des *) parameter real nam=def from( 0:inf);
`define IPInb(nam,def,uni, des) (* units=uni, type = "instance", desc=des *) parameter integer nam=def;
`define IPIex(nam,def,uni,exc, des) (* units=uni, type = "instance", desc=des *) parameter integer nam=def exclude exc;
`define IPIcc(nam,def,uni,lwr,upr,des) (* units=uni, type = "instance", desc=des *) parameter integer nam=def from[lwr:upr];
`define IPIoo(nam,def,uni,lwr,upr,des) (* units=uni, type = "instance", desc=des *) parameter integer nam=def from(lwr:upr);
`define IPIco(nam,def,uni,lwr,upr,des) (* units=uni, type = "instance", desc=des *) parameter integer nam=def from[lwr:upr);
`define IPIoc(nam,def,uni,lwr,upr,des) (* units=uni, type = "instance", desc=des *) parameter integer nam=def from(lwr:upr];
`define IPIcz(nam,def,uni, des) (* units=uni, type = "instance", desc=des *) parameter integer nam=def from[ 0:inf);
`define IPIoz(nam,def,uni, des) (* units=uni, type = "instance", desc=des *) parameter integer nam=def from( 0:inf);
`define BPRco(nam, def, uni, lwr, upr, des) (* units = uni, type = "instance", desc = des *) parameter real nam = def from[lwr : upr);
`define BPRoz(nam, def, uni, des) (* units = uni, type = "instance", desc = des *) parameter real nam = def from(0.0 : inf);
`define BPRcz(nam, def, uni, des) (* units = uni, type = "instance", desc = des *) parameter real nam = def from[0.0 : inf);
`define BPIcc(nam, def, uni, lwr, upr, des) (* units = uni, type = "instance", desc = des *) parameter integer nam = def from[lwr : upr];
`define BPInb(nam,def,uni, des) (* units=uni, type = "instance", desc=des *) parameter integer nam=def;
`define BPRnb(nam,def,uni, des) (* units=uni, type = "instance", desc=des *) parameter real nam=def;
// includes: in case we do not want to include any other file [AB:040902]
// we can just add the following section in this file
// AB: i hope this may help our code to be easily transported
//----------------------------------------
// from disciplines.h we need:
// Electrical
// Current in amperes
nature Current
units = "A";
access = I;
idt_nature = Charge;
`ifdef CURRENT_ABSTOL
abstol = `CURRENT_ABSTOL;
`else
abstol = 1e-12;
`endif
endnature
// Charge in coulombs
nature Charge
units = "coul";
access = Q;
ddt_nature = Current;
`ifdef CHARGE_ABSTOL
abstol = `CHARGE_ABSTOL;
`else
abstol = 1e-14;
`endif
endnature
// Potential in volts
nature Voltage
units = "V";
access = V;
idt_nature = Flux;
`ifdef VOLTAGE_ABSTOL
abstol = `VOLTAGE_ABSTOL;
`else
abstol = 1e-6;
`endif
endnature
// Flux in Webers
nature Flux
units = "Wb";
access = Phi;
ddt_nature = Voltage;
`ifdef FLUX_ABSTOL
abstol = `FLUX_ABSTOL;
`else
abstol = 1e-9;
`endif
endnature
// Conservative discipline
discipline electrical
potential Voltage;
flow Current;
enddiscipline
// Signal flow disciplines
discipline voltage
potential Voltage;
enddiscipline
discipline current
potential Current;
enddiscipline
//from constants.h we need
`define C_EPSSIL 1.03594314e-10
`define C_EPSOX 34.5e-12
`define C_QE 1.602e-19
`define C_K 1.3807e-23
`define P_K 1.3806226e-23
`define P_EPS0 8.85418792394420013968e-12
`define P_CELSIUS0 273.15
`define POS_MIN 1.0E-6
`define SQRT2 1.4142135623730950488016887242097
`define ONE3RD 0.33333333333333333333333333333333
`define ONESQRT2 0.70710678118654752440084436210485
//if any other constant is needed it may be copied from the constants.h and be put above.
//------------------------------------------ end of includes
`define FWD 1
`define REV -1
// AB 040902
`define NOT_GIVEN -1.0e21
`define DEFAULT_TNOM 25
module ekv_va(d,g,s,b);
// %%DEVICE_CLASS=MOS(NMOS:TYPE=1,PMOS:TYPE=-1)%%
// Node definitions
inout d,g,s,b; // external nodes
electrical d,g,s,b; // external nodes
// Branch definitions
branch (d,s) ds;
branch (d,b) db;
branch (s,b) sb;
branch (g,b) gb;
// * Local variables
real tmp1, tmp2, tmp3; // temporary variables
real VGprime, GAMMAprime;// short and narrow channel effect
real VP, VPprime; // pinch-off voltage
real if_, ir, irprime; // normalized currents
real VDSS, VDSSprime;// saturation voltage
real deltaL, Leq; // channel length reduction
real beta; // transconductance factor
real n; // slope factor
real Ispec; // specific current
real Vt; // k*T/q
real gm, gms, gmbs, gds;
real isub, Isub;
real inv_Vt, Vt_01, Vt_2, Vt_4, Vt_Vt, Vt_Vt_2, Vt_Vt_16;
real eps_COX, eps_COX_W, eps_COX_L;
real Lc, Lc_LAMBDA, IBN_2, T0, T1, eta_qi;
real inv_UCRIT, Lc_UCRIT, Lc_IBB, IBA_IBB;
integer Mode;
real WETA_W, LETA_L;
real E0_Q_1, AWL;
real T, KP_Weff;
real Eg, refEg, deltaT, ratioT, Tnom;
real VTO_T, VTO_S, KP_T, UCRIT_T, IBB_T, PHI_T, GAMMA_S;
real sqrt_Lprime_Lmin;
real GAMMAstar, sqrt_GAMMAstar;
real big_sqrt_VP;
real big_sqrt_VP0, VP0;
real PHI_VD, PHI_VS;
real sqrt_PHI;
real sqrt_PHI_VP, sqrt_PHI_VD, sqrt_PHI_VS;
real sqrt_PHI_VD_Vt, sqrt_PHI_VS_Vt;
real Vds, deltaV_2, Vip;
real VDSS_sqrt, sqrt_VDSS_deltaV, sqrt_Vds_VDSS_deltaV;
real VDSSprime_sqrt, sqrt_VDSSprime_deltaV, sqrt_Vds_VDSSprime_deltaV;
real if_ir;
real sqrt_if, sqrt_ir, sqrt_irprime;
real dif_dv, dir_dv, dirprime_dv;
// Charge related variables
real sif, sir, sif2, sir2, sif3, sir3;
real sif_sir_2;
real qi, qb;
real QD, QS, QI, QB, QG;
real VP_PHI_eps, sqrt_PHI_VP_2, WLCox;
real n_Vt_COX, n_1, n_1_n;
// Variables used for derivatives computation
real dVP_dVD, dVP_dVG, dVP_dVS;
real dif_dVD, dif_dVS, dif_dVG;
real dir_dVD, dir_dVS, dir_dVG;
real dVDSS_dVD, dVDSS_dVG, dVDSS_dVS;
real ddeltaV_dVD, ddeltaV_dVG, ddeltaV_dVS;
real dVip_dVD, dVip_dVG, dVip_dVS;
real dVDSSprime_dVD, dVDSSprime_dVG, dVDSSprime_dVS;
real dirprime_dVD, dirprime_dVG, dirprime_dVS;
real dLeq_dVD, dLeq_dVG, dLeq_dVS;
real dbeta_dVD, dbeta_dVG, dbeta_dVS;
real VGstar, sqrt_VGstar;
real VG, VD, VS;
real Von, Vdsat, Id, Ibd;
real Gn;
real GAMMA_sqrt_PHI, Lmin, Lprime, T0_GAMMA_1, THETA_VP_1, Vc;
real Vdsprime, Vt_Vc, dGAMMAprime_dVD, dGAMMAprime_dVG, dGAMMAprime_dVS;
real dVPprime_dVD, dVPprime_dVG, dVPprime_dVS, ddeltaL_dVD, ddeltaL_dVG;
real ddeltaL_dVS, dn_dVD, dn_dVG, dn_dVS;
real log_Vc_Vt, sqrt_PHI_VP0, sqrt_VP_Vt;
real Lc_IBB_Vib, Vib, dIsub_factor, exp_ib;
real inv_Vib, sqrt_PHI_VP2_2;
real V0, deltaVFB, vL;
real dQI_dVD, dQI_dVS, dQI_dVG;
real dQB_dVD, dQB_dVS, dQB_dVG;
real Leff, Weff;
real RSeff, RDeff;
real yk, z0, zk;
real EPSOX, epssil;
real ddt_QD, ddt_QS;
//DIODES realted variables [AB: 040902]
real as_i, ad_i, ps_i, pd_i, v_di_b, v_si_b;
real temp_arg, tmp0;
real js_t, jsw_t, jswg_t;
real pb_t, pbsw_t, pbswg_t;
real cj_t, cjsw_t, cjswg_t;
real njts_t, njtssw_t, njtsswg_t;
real is_d, arg_d, is_s, arg_s;
real f_breakdown_d, f_breakdown_s, idb_tun, isb_tun;
real csb_d, cssw_d, csswg_d;
real csb_s, cssw_s, csswg_s;
real qjd, qjs;
// parameter definitions
parameter integer TYPE = 1 from [-1:1] exclude 0; // NMOS=1, PMOS=-1
parameter integer Noise = 1 from [0:1]; // Set to zero to prevent noise calculation
parameter real Trise = 0.0 from [-inf:inf]; // Difference sim. temp and device temp [C deg]
// parameter real Temp = -`NOT_GIVEN from [`P_CELSIUS0:inf]; // Device temp [C]
//AB: the parameter name Temp is not working for no obvious reason; changed to TEMP
parameter real TEMP = -`NOT_GIVEN from [`P_CELSIUS0:inf]; // Device temp [C]
parameter real TNOM = -`NOT_GIVEN; // Temperature [C]
// Instance parameters
// - intrinsic model
`IPRoz( L ,1.0e-5 ,"m" ,"Length" )
`IPRoz( W ,1.0e-5 ,"m" ,"Total width including fingers" )
`IPIco( M ,1 ,"" ,1 ,inf ,"Parallel multiplier" )
`IPIco( NS ,1 ,"" ,1 ,inf ,"Series multiplier" )
`BPRnb( DTEMP ,0.0 ,"K" ,"Offset of device temperature" )
// - external parasitics
`IPRcz( AS ,0.0 ,"m^2" ,"Source-to-substrate junction area" )
`IPRcz( AD ,0.0 ,"m^2" ,"Drain-to-substrate junction area" )
`IPRcz( PS ,0.0 ,"m" ,"Source-to-substrate junction perimeter" )
`IPRcz( PD ,0.0 ,"m" ,"Drain-to-substrate junction perimeter" )
`IPRcz( NRS ,1.0 ,"" ,"Number of squares in source" )
`IPRcz( NRD ,1.0 ,"" ,"Number of squares in drain" )
// *** Process related parameters
parameter real COX = 2.0E-3 from [0.0:inf]; // Gate oxide capacitance per unit area [F]
parameter real XJ = 300E-9 from [0.0:inf]; // Junction depth [m]
//*** Threshold voltage/substrate effect parameters (long-channel)
parameter real VTO = 0.5 from [-inf:inf]; // Long-channel threshold voltage [V]
parameter real TCV = 1.0e-3; // Threshold voltage temperature coefficient [V/K]
parameter real GAMMA = 0.7 from [0.0:inf]; // Body effect parameter
parameter real PHI = 0.5 from [0.2:inf]; // Bulk Fermi potential [V]
//*** Mobility parameters (long-channel) ***
parameter real KP = 150E-6 from [0.0:inf]; // Transconductance parameter [A/V/V]
parameter real BEX = -1.5; // Mobility temperature exponent
parameter real THETA = 0.0 from [0.0:inf]; // Mobility reduction coefficient [1/V]
parameter real E0 = 1.0E8; // Mobility reduction coefficient [V/m]
//*** Velocity sat./channel length mod. parameters (short-channel)
parameter real UCRIT = 2.0E6 from [0.0:inf]; // Longitudinal critical field [V/m]
parameter real UCEX = 0.8; // Longitudinal critical field temperature exponent
parameter real LAMBDA = 0.8 from [0.0:inf]; // Depletion length coefficient (channel length modulation)
//*** Process related parameters
parameter real DL = -0.01E-6; // Channel width correction [m]
parameter real DW = -0.01E-6; // Channel length correction [m]
//*** Threshold voltage/substrate effect parameter (narrow-channel)
parameter real WETA = 0.2 from [0.0:inf]; // Narrow-channel effect coefficient
//*** Threshold voltage/substrate effect parameters (short-channel)
parameter real LETA = 0.3 from [0.0:inf]; // Short-channel effect coefficient
parameter real Q0 = 230E-6 from [0.0:inf]; // Reverse short channel effect peak charge density
parameter real LK = 0.4E-6 from [0.0:inf]; // Reverse short channel effect characteristic length [m]
//*** Substrate current parameters
parameter real IBA = 5.0E8 from [0.0:inf]; // First impact ionization coefficient [1/m]
parameter real IBB = 4.0E8 from [0.0:inf]; // Second impact ionization coefficient [V/m]
parameter real IBBT = 9.0e-4; // Temperature coefficient for IBB [1/K]
parameter real IBN = 1.0 from [0.0:inf]; // Saturation voltage factor for impact ionization
//*** Series resistance parameters
parameter real RSH = 0.0 from [0.0:inf]; // Sheet resistance [Ohms]
parameter real HDIF = 0.5E-6 from [0.0:inf]; // Sheet resistance multipler
//*** for MC analysis fk 25/05/97
parameter real AVTO = 1E-6 from [0.0:inf]; // Area related threshold voltage mismatch parameter [Vm]
parameter real AKP = 1E-6 from [0.0:inf]; // Area related gain mismatch parameter [m]
parameter real AGAMMA = 1E-6 from [0.0:inf]; // Area related body effect mismatch parameter [sqr(V) m]
parameter real AF = 1.0 from (0:inf); // Flicker noise exponent
parameter real KF = 0.0 from [0:inf); // Flicker noise coefficient
//*** JUNCTION DRAIN-BULK AND SOURCE-BULK AREA, CURRENT, CAPACITANCE [AB:040902]
parameter real xd_n = 1.0 from [0.0:inf);
parameter real xd_js = 1.0E-09 from [0.0:inf);
parameter real xd_jsw = 1.0E-12 from [0.0:inf);
parameter real xd_jswg = 1.0E-12 from [0.0:inf);
parameter real xd_mj = 0.900 from [0.0:1.0];
parameter real xd_mjsw = 0.700 from [0.0:1.0];
parameter real xd_mjswg = 0.700 from [0.0:1.0];
parameter real xd_pb = 0.800 from (0.0:inf);
parameter real xd_pbsw = 0.600 from (0.0:inf);
parameter real xd_pbswg = 0.600 from (0.0:inf);
parameter real xd_cj = 1.0E-09 from [0.0:inf);
parameter real xd_cjsw = 1.0E-12 from [0.0:inf);
parameter real xd_cjswg = 1.0E-12 from [0.0:inf);
parameter real xd_gmin = 0.0 from [0.0:inf);
parameter real xd_xjbv = 0.0 from [0.0:inf);
parameter real xd_bv = 10.0 from [0.0:inf);
parameter real xd_njts = 1.0 from [0.0:inf);
parameter real xd_njtssw = 1.0 from [0.0:inf);
parameter real xd_njtsswg = 1.0 from [0.0:inf);
parameter real xd_vts = 0.0 from [0.0:inf);
parameter real xd_vtssw = 0.0 from [0.0:inf);
parameter real xd_vtsswg = 0.0 from [0.0:inf);
parameter real tp_xti = 3.0 from (-inf:inf);
parameter real tp_cj = 0.0 from (-inf:inf);
parameter real tp_cjsw = 0.0 from (-inf:inf);
parameter real tp_cjswg = 0.0 from (-inf:inf);
parameter real tp_pb = 0.0 from (-inf:inf);
parameter real tp_pbsw = 0.0 from (-inf:inf);
parameter real tp_pbswg = 0.0 from (-inf:inf);
parameter real tp_njts = 0.0 from [0.0:inf);
parameter real tp_njtssw = 0.0 from [0.0:inf);
parameter real tp_njtsswg = 0.0 from [0.0:inf);
analog begin
// Set constant
EPSOX = 3.9 * `P_EPS0;
epssil = 11.7 * `P_EPS0;
Ibd = 0.0;
// The following are necessary to prevent memory states being reserved:
THETA_VP_1 = 0.0;
VPprime = 0.0;
sqrt_VP_Vt = 0.0;
// Geometry, voltage and temperature independent model variables
eps_COX = epssil/COX;
Lc = sqrt(eps_COX*XJ);
Lc_LAMBDA = Lc * LAMBDA;
eps_COX_W = 3.0 * eps_COX * WETA;
eps_COX_L = eps_COX * LETA;
IBN_2 = IBN + IBN;
T0 = COX / (epssil*E0);
V0 = (Q0+Q0) / COX;
eta_qi = TYPE > 0 ? 0.5 : 0.3333333333333;
/* Model working variables, geometry and voltage independent,
* which need to be updated after temperature change
* EKV model internal variables depending on temperature.
*/
/* If Temp is explicitly specified, use that value
otherwise use Tckt+Trise */
if (TEMP == -`NOT_GIVEN) //AB: 040902 Temp -> TEMP
T = $temperature + Trise;
else
T = TEMP + `P_CELSIUS0; //AB: 040902 Temp -> TEMP
if (TNOM == -`NOT_GIVEN)
Tnom = `DEFAULT_TNOM + `P_CELSIUS0;
else
Tnom = TNOM + `P_CELSIUS0;
Vt = $vt(T);
Vt_01 = 0.1 * Vt;
inv_Vt = 1.0 / Vt;
Vt_2 = Vt + Vt;
Vt_4 = Vt_2 + Vt_2;
Vt_Vt = Vt * Vt;
Vt_Vt_2 = Vt_Vt + Vt_Vt;
Vt_Vt_16 = 16.0 * Vt_Vt;
Eg = 1.16 - 7.02e-4 * T * T / (T + 1108.0);
refEg = 1.16 - (7.02e-4*Tnom*Tnom) / (Tnom + 1108.0);
deltaT = T - Tnom;
ratioT = T / Tnom;
VTO_T = VTO - TCV * deltaT;
KP_T = KP * pow(ratioT, BEX);
UCRIT_T = UCRIT * pow(ratioT, UCEX);
IBB_T = IBB * (1.0 + IBBT * deltaT);
PHI_T = PHI * ratioT - 3.0 * Vt * ln(ratioT) - refEg * ratioT + Eg;
// !! mb 99/07/30 prevents PHI from becoming smaller than 0.2
tmp1 = 0.2;
tmp2 = PHI_T - tmp1;
PHI_T = 0.5*(tmp2 + sqrt(tmp2*tmp2 + Vt*Vt)) + tmp1;
sqrt_PHI = sqrt(PHI_T);
inv_UCRIT = 1.0/UCRIT_T;
Lc_UCRIT = Lc * UCRIT_T;
Lc_IBB = Lc * IBB_T;
IBA_IBB = IBA / IBB_T;
/* VTO, KP and GAMMA with variation for MC analysis if required.
* The default value for model parameters AVTO, AKP and AGAMMA
* is set to 1e-6 to allow meaningful sensitivity analysis. Only
* the deviation from this value has to be taken into account
*/
// wg: for userc.c and verilog implementations
Leff = L + DL;
// wg: for userc.c and verilog implementations
Weff = W + DW;
Vc = UCRIT_T*Leff; // NOTE: use L if necessary
log_Vc_Vt = Vt*(ln(0.5*Vc*inv_Vt)-0.6); // mb 98/02/05 (r1)
// de-normalization
AWL = 1.0/sqrt(Weff*Leff);
if (TYPE > 0)
VTO_S = ((AVTO != 1e-6) ? AWL*(AVTO - 1e-6) + VTO_T : VTO_T);
else
VTO_S = ((AVTO != 1e-6) ? AWL*(1e-6 - AVTO) - VTO_T: -VTO_T);
KP_Weff = Weff * ((AKP != 1e-6) ? KP_T*(1 + (AKP - 1e-6)*AWL) : KP_T);
GAMMA_S = ((AGAMMA !=1e-6) ? GAMMA + (AGAMMA - 1e-6)*AWL : GAMMA);
GAMMA_sqrt_PHI = GAMMA_S*sqrt_PHI;
/* ************************************
* STATIC MODEL EQUATIONS
* *************************************/
// VGprime:
if (V0 == 0.0)
deltaVFB = 0.0;
// else begin : VGprime //AB: 040902 VGPrime is also a variable and
else begin : VGprime_block //AB: 040902 VGPrime -> VGprime_block
real sqv;
// mb 99/03/26 corrected for multiple device number
vL = 0.28 * (Leff/(LK*NS) - 0.1);
sqv = 1.0 / (1.0 + 0.5*(vL + sqrt(vL*vL + 1.936e-3)));
deltaVFB = V0 * sqv * sqv;
end
VG = TYPE * V(g,b); // wg 22/04/08 corrected for device TYPE
VS = TYPE * V(s,b);
VD = TYPE * V(d,b);
if (VD - VS < 0) begin
Mode = `REV;
T1 = VS;
VS = VD;
VD = T1;
end
else
Mode = `FWD;
// VGB = VGS - VBS;
// VBD = VBS - VDS;
VGstar = VG - VTO_S - deltaVFB + PHI_T + GAMMA_sqrt_PHI;
sqrt_VGstar = sqrt(VGstar*VGstar + 2.0*Vt_Vt_16);
VGprime = 0.5*(VGstar + sqrt_VGstar);
// Pinch-off voltage VP, limited to VP >= -PHI
PHI_VS = PHI_T+VS;
sqrt_PHI_VS_Vt = sqrt(PHI_VS*PHI_VS+Vt_Vt_16);
sqrt_PHI_VS = sqrt(0.5*(PHI_VS+sqrt_PHI_VS_Vt));
PHI_VD = PHI_T+VD;
sqrt_PHI_VD_Vt = sqrt(PHI_VD*PHI_VD+Vt_Vt_16);
sqrt_PHI_VD = sqrt(0.5*(PHI_VD+sqrt_PHI_VD_Vt));
WETA_W = eps_COX_W * M / Weff;
LETA_L = eps_COX_L * NS / Leff;
// mb: symmetric version of GAMMAprime necessary with charges model
big_sqrt_VP0 = sqrt(VGprime + 0.25*GAMMA_S*GAMMA_S);
VP0 = VGprime - PHI_T - GAMMA_S*(big_sqrt_VP0 - 0.5*GAMMA_S);
sqrt_PHI_VP0 = sqrt(VP0+PHI_T+Vt_01);
GAMMAstar = GAMMA_S - LETA_L * (sqrt_PHI_VS+sqrt_PHI_VD) +
WETA_W * sqrt_PHI_VP0;
// keep GAMMAprime from becoming negative
sqrt_GAMMAstar = sqrt(GAMMAstar*GAMMAstar+Vt_01);
GAMMAprime = 0.5*(GAMMAstar+sqrt_GAMMAstar);
big_sqrt_VP = sqrt(VGprime+0.25*GAMMAprime*GAMMAprime);
VP = VGprime-PHI_T-GAMMAprime*(big_sqrt_VP-0.5*GAMMAprime);
// Forward normalized current:
tmp1 = (VP - VS) * inv_Vt;
if (tmp1 > -0.35) begin
z0 = 2.0/(1.3 + tmp1 - ln(tmp1 + 1.6));
zk = (2.0 + z0)/(1.0 + tmp1 + ln(z0));
yk = (1.0 + tmp1 + ln(zk))/(2.0 + zk);
end else begin
if (tmp1 > -15.0) begin
z0 = 1.55 + exp(-tmp1);
zk = (2.0 + z0)/(1.0 + tmp1 + ln(z0));
yk = (1.0 + tmp1 + ln(zk))/(2.0 + zk);
end else begin
if (tmp1 > -23.0) begin
yk = 1.0/(2.0 + exp(-tmp1));
end else begin
yk = exp(tmp1) + 1E-64;
end
end
end
if_ = yk*(1.0 + yk);
sqrt_if = sqrt(if_);
dif_dv = yk;
// Saturation voltage:
Vt_Vc = Vt / Vc;
VDSS_sqrt = sqrt(0.25+sqrt_if*Vt_Vc);
VDSS = Vc*(VDSS_sqrt-0.5);
Vds = 0.5*(VD-VS);
deltaV_2 = Vt_Vt_16*(LAMBDA*(sqrt_if-
VDSS*inv_Vt)+15.625e-3);
sqrt_VDSS_deltaV = sqrt(VDSS*VDSS+deltaV_2);
sqrt_Vds_VDSS_deltaV = sqrt((Vds-VDSS)*(Vds-VDSS)+deltaV_2);
Vip = sqrt_VDSS_deltaV-sqrt_Vds_VDSS_deltaV;
VDSSprime_sqrt = sqrt(0.25+(sqrt_if-0.75*ln(if_))*Vt_Vc);
VDSSprime = Vc*(VDSSprime_sqrt-0.5)+log_Vc_Vt;
// Reverse normalized current:
Vdsprime = Vds-VDSSprime; // mb 97/07/18 introduced Vdsprime
sqrt_VDSSprime_deltaV = sqrt(VDSSprime*VDSSprime+deltaV_2);
sqrt_Vds_VDSSprime_deltaV = sqrt(Vdsprime*Vdsprime+deltaV_2);
tmp1 = (VP-Vds-VS-sqrt_VDSSprime_deltaV+
sqrt_Vds_VDSSprime_deltaV)*inv_Vt;
// include -> Charge F(x) interpolate function
if (tmp1 > -0.35) begin
z0 = 2.0/(1.3 + tmp1 - ln(tmp1 + 1.6));
zk = (2.0 + z0)/(1.0 + tmp1 + ln(z0));
yk = (1.0 + tmp1 + ln(zk))/(2.0 + zk);
end else begin
if (tmp1 > -15.0) begin
z0 = 1.55 + exp(-tmp1);
zk = (2.0 + z0)/(1.0 + tmp1 + ln(z0));
yk = (1.0 + tmp1 + ln(zk))/(2.0 + zk);
end else begin
if (tmp1 > -23.0) begin
yk = 1.0/(2.0 + exp(-tmp1));
end else begin
yk = exp(tmp1) + 1E-64;
end
end
end
irprime = yk*(1.0 + yk);
sqrt_irprime = sqrt(irprime);
dirprime_dv = yk;
/* Channel length modulation & mobility reduction due
* to longitudinal field */
deltaL = Lc_LAMBDA*ln(1.0+(Vds-Vip)/Lc_UCRIT);
Lprime = Leff-deltaL+(Vds+Vip)*inv_UCRIT;
Lmin = 0.1*Leff;
sqrt_Lprime_Lmin = sqrt(Lprime*Lprime+Lmin*Lmin);
Leq = 0.5*(Lprime+sqrt_Lprime_Lmin);
// Transconductance factor:
// Mobility reduction due to vertical field
// Reverse normalized current:
// ratioV_ir
tmp1 = (VP - VD) * inv_Vt;
if (tmp1 > -0.35) begin
z0 = 2.0/(1.3 + tmp1 - ln(tmp1 + 1.6));
zk = (2.0 + z0)/(1.0 + tmp1 + ln(z0));
yk = (1.0 + tmp1 + ln(zk))/(2.0 + zk);
end else begin
if (tmp1 > -15.0) begin
z0 = 1.55 + exp(-tmp1);
zk = (2.0 + z0)/(1.0 + tmp1 + ln(z0));
yk = (1.0 + tmp1 + ln(zk))/(2.0 + zk);
end else begin
if (tmp1 > -23.0) begin
yk = 1.0/(2.0 + exp(-tmp1));
end else begin
yk = exp(tmp1) + 1E-64;
end
end
end
ir = yk*(1.0 + yk);
sqrt_ir = sqrt(ir);
dir_dv = yk;
sif2 = 0.25+if_;
sir2 = 0.25+ir;
sif = sqrt(sif2);
sir = sqrt(sir2);
sif_sir_2 = (sif+sir)*(sif+sir);
VP_PHI_eps = VP+PHI_T+1.0e-6;
sqrt_PHI_VP_2 = 2.0*sqrt(VP_PHI_eps);
n_1 = GAMMA_S/sqrt_PHI_VP_2;
n_1_n = GAMMA_S/(sqrt_PHI_VP_2 + GAMMA_S);
// Normalized inversion charge (qi=QI/WLCox)
qi = -(1.0+n_1)*Vt*((0.66666666+0.66666666)*
(sir2+sir*sif+sif2)/(sif+sir) - 1.0);
// Normalized depletion charge (qb=QB/WLCox), for depletion to inversion
qb = -0.5*GAMMA_S*sqrt_PHI_VP_2 - n_1_n*qi;
if (E0 == 0.0) begin
/* NOTE: this version of the simple mobility model from prior
* versions of the EKV model is reinstated.
* In case E0 is *not* specified, this
* simple mobility model is used according to THETA, if specified.
* VPprime:
* mb eliminated discontinuity of derivative of 1+THETA*VP
*/
sqrt_VP_Vt = sqrt(VP*VP + Vt_Vt_2);
VPprime = 0.5 * (VP + sqrt_VP_Vt);
THETA_VP_1 = 1.0+THETA*VPprime;
beta = KP_Weff / (Leq * THETA_VP_1); // mb 97/07/18
end
else begin
/* new model for mobility reduction, linked to the charges model
* mb 98/10/11 (r10) introduced fabs(Eeff) (jpm)
* E0_Q_1 = 1.0 + T0 * abs(qb+eta_qi*qi);
*/
if ((qb + eta_qi*qi) > 0.0)
E0_Q_1 = 1.0 + T0*(qb + eta_qi*qi);
else
E0_Q_1 = 1.0 - T0*(qb + eta_qi*qi);
T0_GAMMA_1 = 1.0 + T0*GAMMA_sqrt_PHI;
beta = KP_Weff * T0_GAMMA_1 / (Leq * E0_Q_1);
end
/* Slope factor: mb introduced new formula to avoid divergence
* of n for VP->-PHI */
sqrt_PHI_VP = sqrt(PHI_T+VP+Vt_4); // mb 95/12/19 introduced Vt_4
n = 1.0 + GAMMA_S/(2.0*sqrt_PHI_VP);
// Drain current:
if_ir = if_-irprime;
Ispec = Vt_Vt_2 * n * beta;
Id = Ispec * if_ir;
/* Return threshold voltage
* Von = Vth(Vs) = Vto + Gamma*(sqrt(Phi + Vsb)-sqrt(Phi)) */
Von = VTO_S + GAMMAprime*(sqrt_PHI_VS - sqrt_PHI);
// Return saturation voltage (estimate)
Vdsat = Vt * (2.0*sqrt_if + 4.0);
// Return equivalent conductance for thermal noise calculation
Gn = beta * abs(qi);
/* Pinch-off voltage derivatives:
* mb 97/09/14 symmetric version of GAMMAprime necessary with
* charges model
* mb 99/05/10 (r12) New VGprime formulation (REVISION III) allows
* VP derivatives to be expressed with a single equation
*/
tmp1 = GAMMAprime / (sqrt_GAMMAstar+sqrt_GAMMAstar);
tmp2 = VGprime/sqrt_VGstar; // dVGprime_dVG
dGAMMAprime_dVD = -LETA_L * tmp1 * sqrt_PHI_VD / sqrt_PHI_VD_Vt;
dGAMMAprime_dVS = -LETA_L * tmp1 * sqrt_PHI_VS / sqrt_PHI_VS_Vt;
dGAMMAprime_dVG = WETA_W * tmp1 * (big_sqrt_VP0-0.5*GAMMA_S) /
(big_sqrt_VP0*sqrt_PHI_VP0) * tmp2;
tmp3 = (VP+PHI_T) / big_sqrt_VP;
dVP_dVD = -tmp3 * dGAMMAprime_dVD;
dVP_dVS = -tmp3 * dGAMMAprime_dVS;
dVP_dVG = -tmp3 * dGAMMAprime_dVG + (1.0 -
GAMMAprime/(big_sqrt_VP+big_sqrt_VP)) * tmp2;
// Forward normalized current derivatives:
tmp1 = dif_dv * inv_Vt; // mb 95/08/28, 97/04/21
dif_dVD = tmp1 * dVP_dVD;
dif_dVS = tmp1 * (dVP_dVS-1.0);
dif_dVG = tmp1 * dVP_dVG;
// Saturation voltage derivatives:
tmp1 = Vt / (4.0*VDSS_sqrt*sqrt_if);
dVDSS_dVD = tmp1 * dif_dVD;
dVDSS_dVS = tmp1 * dif_dVS;
dVDSS_dVG = tmp1 * dif_dVG;
// deltaV derivatives:
tmp1 = (Vt_4+Vt_4) * LAMBDA;
tmp2 = Vt / (sqrt_if+sqrt_if);
ddeltaV_dVD = tmp1 * (dif_dVD*tmp2 - dVDSS_dVD);
ddeltaV_dVS = tmp1 * (dif_dVS*tmp2 - dVDSS_dVS);
ddeltaV_dVG = tmp1 * (dif_dVG*tmp2 - dVDSS_dVG);
// Vip derivatives:
tmp1 = 1.0 / sqrt_VDSS_deltaV;
tmp2 = 1.0 / sqrt_Vds_VDSS_deltaV;
tmp3 = Vds-VDSS;
dVip_dVD = (VDSS*dVDSS_dVD + ddeltaV_dVD) * tmp1 -
(tmp3 * (0.5-dVDSS_dVD) + ddeltaV_dVD) * tmp2;
dVip_dVS = (VDSS*dVDSS_dVS + ddeltaV_dVS) * tmp1 -
(tmp3 * (-0.5-dVDSS_dVS) + ddeltaV_dVS) * tmp2;
dVip_dVG = (VDSS*dVDSS_dVG + ddeltaV_dVG) * tmp1 -
(tmp3 * -dVDSS_dVG + ddeltaV_dVG) * tmp2;
// VDSSprime derivatives:
tmp1 = Vt * (sqrt_if-1.5)/(4.0*VDSSprime_sqrt*if_);
dVDSSprime_dVD = tmp1 * dif_dVD;
dVDSSprime_dVS = tmp1 * dif_dVS;
dVDSSprime_dVG = tmp1 * dif_dVG;
// Reverse normalized current derivatives:
tmp1 = dirprime_dv * inv_Vt; // mb 95/08/28, 97/04/21
tmp2 = 1.0 / sqrt_VDSSprime_deltaV; // mb 97/04/21
tmp3 = 1.0 / sqrt_Vds_VDSSprime_deltaV;
dirprime_dVD = tmp1 * (dVP_dVD-0.5 -
(VDSSprime*dVDSSprime_dVD+ddeltaV_dVD) * tmp2 +
(Vdsprime*(0.5-dVDSSprime_dVD)+ddeltaV_dVD) * tmp3);
dirprime_dVS = tmp1 * (dVP_dVS-0.5 -
(VDSSprime*dVDSSprime_dVS+ddeltaV_dVS) * tmp2 +
(Vdsprime*(-0.5-dVDSSprime_dVS)+ddeltaV_dVS) * tmp3);
dirprime_dVG = tmp1*(dVP_dVG -
(VDSSprime*dVDSSprime_dVG+ddeltaV_dVG) * tmp2 +
(Vdsprime*(-dVDSSprime_dVG)+ddeltaV_dVG) * tmp3);
// Channel length modulation & mobility reduction derivatives:
// deltaL derivatives:
tmp1 = Lc_LAMBDA / (Lc_UCRIT+Vds-Vip);
ddeltaL_dVD = tmp1 * (0.5-dVip_dVD);
ddeltaL_dVS = tmp1 * (-0.5-dVip_dVS);
ddeltaL_dVG = -tmp1 * dVip_dVG;
// Leq derivatives:
tmp1 = 1.0 / sqrt_Lprime_Lmin; // in fact dLeq_dVX/Leq
dLeq_dVD = tmp1 * (-ddeltaL_dVD + (0.5+dVip_dVD)*inv_UCRIT);
dLeq_dVS = tmp1 * (-ddeltaL_dVS + (-0.5+dVip_dVS)*inv_UCRIT);
dLeq_dVG = tmp1 * (-ddeltaL_dVG + dVip_dVG*inv_UCRIT);
// Transconductance factor derivatives:
tmp1 = dir_dv*inv_Vt;
dir_dVD = tmp1 * (dVP_dVD-1.0);
dir_dVS = tmp1 * dVP_dVS;
dir_dVG = tmp1 * dVP_dVG;
tmp1 = -(1.0+n_1)*Vt*0.66666666/sif_sir_2;
tmp2 = tmp1*(sif+2.0*sir);
tmp3 = tmp1*(sir+2.0*sif);
tmp1 = -n_1*qi/((2.0+n_1+n_1)*VP_PHI_eps);
dQI_dVD = tmp1 * dVP_dVD + tmp2 * dif_dVD + tmp3 * dir_dVD;
dQI_dVS = tmp1 * dVP_dVS + tmp2 * dif_dVS + tmp3 * dir_dVS;
dQI_dVG = tmp1 * dVP_dVG + tmp2 * dif_dVG + tmp3 * dir_dVG;
tmp1 = (1.0+n_1)-qi/(2.0*(1.0+n_1)*VP_PHI_eps);
dQB_dVD = -n_1_n * (tmp1 * dVP_dVD + dQI_dVD);
dQB_dVS = -n_1_n * (tmp1 * dVP_dVS + dQI_dVS);
dQB_dVG = -n_1_n * (tmp1 * dVP_dVG + dQI_dVG);
if (E0 == 0.0) begin
tmp1 = THETA * VPprime / (THETA_VP_1 * sqrt_VP_Vt);
// VPprime derivatives:
dVPprime_dVD = tmp1 * dVP_dVD;
dVPprime_dVS = tmp1 * dVP_dVS;
dVPprime_dVG = tmp1 * dVP_dVG;
dbeta_dVD = -dLeq_dVD - dVPprime_dVD; // in fact dbeta_dVX / beta
dbeta_dVS = -dLeq_dVS - dVPprime_dVS;
dbeta_dVG = -dLeq_dVG - dVPprime_dVG;
end
else begin
tmp1 = T0 / E0_Q_1;
dbeta_dVD = -dLeq_dVD + tmp1 * (dQB_dVD+eta_qi*dQI_dVD);
dbeta_dVS = -dLeq_dVS + tmp1 * (dQB_dVS+eta_qi*dQI_dVS);
dbeta_dVG = -dLeq_dVG + tmp1 * (dQB_dVG+eta_qi*dQI_dVG);
end
// Slope factor derivatives:
tmp1 = -GAMMA_S/(4.0*n*sqrt_PHI_VP*(PHI_T+VP+Vt_4));// mb 95/12/19
dn_dVD = tmp1 * dVP_dVD;
dn_dVS = tmp1 * dVP_dVS;
dn_dVG = tmp1 * dVP_dVG;
// Transconductances:
gds = Ispec*((dn_dVD + dbeta_dVD)*if_ir + dif_dVD - dirprime_dVD);
gms = -Ispec*((dn_dVS + dbeta_dVS)*if_ir + dif_dVS - dirprime_dVS);
gm = Ispec*((dn_dVG + dbeta_dVG)*if_ir + dif_dVG - dirprime_dVG);
gmbs = gms - gm - gds;
// S/D resistance corrections including W and DW
RSeff = (RSH*HDIF)/(Weff-DW);
RDeff = (RSH*HDIF)/(Weff-DW);
tmp1 = 1.0/(1.0 + gms*RSeff + gds*RDeff);
Id = Id*tmp1;
/****** Impact ionization current ******
* mb 95/12/19 introduced impact ionization
* This current component is flowing from the intrinsic drain terminal
* to the bulk (for NMOS) in parallel with the junction current.
* The simulator should also take into account the corresponding
* conductances.
*/
// Substrate current:
Vib = VD-VS-IBN_2*VDSS;
if ((Vib > 0.0) && (IBA_IBB > 0.0)) begin
inv_Vib = 1.0/Vib;
Lc_IBB_Vib = -Lc_IBB*inv_Vib;
if (Lc_IBB_Vib < -35.0) // math precision check
Lc_IBB_Vib = -35.0;
exp_ib = exp(Lc_IBB_Vib);
isub = IBA_IBB*Vib*exp_ib;
Isub = isub*Id;
dIsub_factor = Isub*inv_Vib*(1.0-Lc_IBB_Vib);
end
else begin
Lc_IBB_Vib = 0.0;
Isub = 0.0;
end
// END: substrate current computation
Ibd = Ibd - Isub;
// --- Charge calculations ---
WLCox = Weff * Leff * COX;
sif3 = sif*sif2;
sir3 = sir*sir2;
tmp1 = sqrt(PHI_T + 0.5 * VP);
sqrt_PHI_VP2_2 = tmp1+tmp1;
n_Vt_COX = (1.0 + GAMMAprime/sqrt_PHI_VP2_2) * Vt*WLCox;
QD = -n_Vt_COX*(0.266666666*(3.0*sir3+6.0*sir2*sif+4.0*
sir*sif2+2.0*sif3)/sif_sir_2 - 0.5);
QS = -n_Vt_COX*(0.266666666*(3.0*sif3+6.0*sif2*sir+4.0*
sif*sir2+2.0*sir3)/sif_sir_2 - 0.5);
QI = QS + QD;
QB = WLCox * (-0.5*GAMMAprime*sqrt_PHI_VP_2 + VGprime - VGstar) -
QI*GAMMAprime/(GAMMAprime+sqrt_PHI_VP2_2);
QG = -QI -QB;
I(ds) <+ TYPE * Mode * Id; // wg 22/04/08 corrected for device TYPE
ddt_QD = ddt(QD);
ddt_QS = ddt(QS);
if (Mode == `FWD) begin
I(db) <+ TYPE * ddt_QD; // wg 22/04/08 corrected for device TYPE
I(sb) <+ TYPE * ddt_QS;
I(db) <+ TYPE * Isub;
end
else begin
I(sb) <+ TYPE * ddt_QD; // wg 22/04/08 corrected for device TYPE
I(db) <+ TYPE * ddt_QS;
I(sb) <+ TYPE * Isub;
end
I(gb) <+ TYPE * ddt(QG); // wg 22/04/08 corrected for device TYPE
// if (Noise) begin : Noise //AB: 040902 Noise is also a variable and
if (Noise) begin : Noise_block //AB: 040902 Noise -> Noise_block
real S_flicker, S_thermal;
S_thermal = 4 * `P_K * T * Gn;
S_flicker = KF * gm * gm / (Weff * NS * Leff * COX);
I(ds) <+ white_noise(S_thermal, "thermal") +
flicker_noise(S_flicker, AF, "flicker");
end
///////////////////////////////////
//EXTRINSIC PART: JUNCTION DIODES//
///////////////////////////////////
//diode area and perimeter computation
if ((AS == 0.0) && (HDIF>0.0)) as_i = 2.0*HDIF*Weff;
else as_i = AS;
if ((PS == 0.0) && (HDIF>0.0)) ps_i = 4.0*HDIF+1.0*Weff;
else ps_i = PS;
if ((AD == 0.0) && (HDIF>0.0)) ad_i = 2.0*HDIF*Weff;
else ad_i = AD;
if ((PD == 0.0) && (HDIF>0.0)) pd_i = 4.0*HDIF+1.0*Weff;
else pd_i = PD;
//temperature update for diodes
temp_arg = exp((refEg/$vt(Tnom) - Eg/Vt + tp_xti*ln(ratioT))/xd_n);
js_t = xd_js*temp_arg;
jsw_t = xd_jsw*temp_arg;
jswg_t = xd_jswg*temp_arg;
pb_t = xd_pb - tp_pb*deltaT;
pbsw_t = xd_pbsw - tp_pbsw*deltaT;
pbswg_t = xd_pbswg - tp_pbswg*deltaT;
cj_t = xd_cj*(1.0+tp_cj*deltaT);
cjsw_t = xd_cjsw*(1.0+tp_cjsw*deltaT);
cjswg_t = xd_cjswg*(1.0+tp_cjswg*deltaT);
njts_t = xd_njts*(1.0+(ratioT-1.0)*tp_njts);
njtssw_t = xd_njtssw*(1.0+(ratioT-1.0)*tp_njtssw);
njtsswg_t = xd_njtsswg*(1.0+(ratioT-1.0)*tp_njtsswg);
//DC
v_di_b = TYPE*V(d,b);
v_si_b = TYPE*V(s,b);
//DRAIN - BULK
is_d = js_t*ad_i+jsw_t*pd_i+jswg_t*Weff;
arg_d = -v_di_b*ratioT/(Vt*xd_n);
if (arg_d < -40.0) arg_d = -40.0;
tmp0 = (-v_di_b+xd_bv)*ratioT/(Vt*xd_n);
if (tmp0>70) f_breakdown_d = 1.0;
else f_breakdown_d = 1.0 + xd_xjbv*exp(-tmp0);
// TRAP-ASSISTED TUNNELING CURRENT
idb_tun = -Weff*jswg_t*(exp(v_di_b*ratioT/(Vt*njtsswg_t) * xd_vtsswg/max(xd_vtsswg+v_di_b,1.0e-3))-1.0);
idb_tun = idb_tun - pd_i*jsw_t*(exp(v_di_b*ratioT/(Vt*njtssw_t) * xd_vtssw/max(xd_vtssw+v_di_b,1.0e-3))-1.0);
idb_tun = idb_tun - ad_i*js_t*(exp(v_di_b*ratioT/(Vt*njts_t) * xd_vts/max(xd_vts+v_di_b,1.0e-3))-1.0);
I(d,b) <+ (is_d * (1.0 - exp(arg_d))*f_breakdown_d+v_di_b*xd_gmin + idb_tun)*TYPE*M;
//SOURCE - BULK
is_s = js_t*as_i+jsw_t*ps_i+jswg_t*Weff;
arg_s = -v_si_b*ratioT/(Vt*xd_n);
if (arg_s < -40.0) arg_s = -40.0;
tmp0 = (-v_si_b+xd_bv)*ratioT/(Vt*xd_n);
if (tmp0>70) f_breakdown_s = 1.0;
else f_breakdown_s = 1.0 + xd_xjbv*exp(-tmp0);
// TRAP-ASSISTED TUNNELING CURRENT
isb_tun = -Weff*jswg_t*(exp(v_si_b*ratioT/(Vt*njtsswg_t) * xd_vtsswg/max(xd_vtsswg+v_si_b,1.0e-3))-1.0);
isb_tun = isb_tun - ps_i*jsw_t*(exp(v_si_b*ratioT/(Vt*njtssw_t) * xd_vtssw/max(xd_vtssw+v_si_b,1.0e-3))-1.0);
isb_tun = isb_tun - as_i*js_t*(exp(v_si_b*ratioT/(Vt*njts_t) * xd_vts/max(xd_vts+v_si_b,1.0e-3))-1.0);
I(s,b) <+ (is_s * (1.0 - exp(arg_s))*f_breakdown_s+v_si_b*xd_gmin + isb_tun)*TYPE*M;
//AC
//DRAIN - BULK
if (v_di_b>0.0)
begin
csb_d = cj_t * ad_i * exp(-xd_mj*ln(1.0+v_di_b/pb_t));
cssw_d = cjsw_t * pd_i * exp(-xd_mjsw*ln(1.0+v_di_b/pbsw_t));
csswg_d = cjswg_t * Weff * exp(-xd_mjswg*ln(1.0+v_di_b/pbswg_t));
end
else
begin
csb_d = cj_t * ad_i * (1.0 - xd_mj*v_di_b/pb_t);
cssw_d = cjsw_t * pd_i * (1.0 - xd_mjsw*v_di_b/pbsw_t);
csswg_d = cjswg_t * Weff * (1.0 - xd_mjswg*v_di_b/pbswg_t);
end
qjd = (csb_d+cssw_d+csswg_d) * v_di_b;
I(d,b) <+ ddt(qjd)*TYPE*M;
//SOURCE - BULK
if (v_si_b>0.0)
begin
csb_s = cj_t * as_i * exp(-xd_mj*ln(1.0+v_si_b/pb_t));
cssw_s = cjsw_t * ps_i * exp(-xd_mjsw*ln(1.0+v_si_b/pbsw_t));
csswg_s = cjswg_t * Weff * exp(-xd_mjswg*ln(1.0+v_si_b/pbswg_t));
end
else
begin
csb_s = cj_t * as_i * (1.0 - xd_mj*v_si_b/pb_t);
cssw_s = cjsw_t * ps_i * (1.0 - xd_mjsw*v_si_b/pbsw_t);
csswg_s = cjswg_t * Weff * (1.0 - xd_mjswg*v_si_b/pbswg_t);
end
qjs = (csb_s+cssw_s+csswg_s) * v_si_b;
I(s,b) <+ ddt(qjs)*TYPE*M;
//END OF DIODES
end
endmodule

27
examples/osdi/EKV2.6/netlist_mod_nmos.sp
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@ -1,27 +0,0 @@
OSDI EKV 2.6 NMOS Test
*.options abstol=1e-15
* one voltage source per MOS terminal:
VD dd 0 1
VG gg 0 1
VS ss 0 0
VB bb 0 0
* model definitions:
*.model .MODEL NCH EKV_VA type=1
.include Modelcards/ekv26_0u5.par
*OSDI EKV:
N1 dd gg ss bb nch W=5e-6 L=0.5e-6
.control
pre_osdi osdi_libs/ekv26_mod.osdi
set xbrushwidth=3
* a DC sweep: drain, gate
dc Vd 0 1.6 0.01 VG 0 1.6 0.2
* plot source current
plot i(VS)
.endc
.end

28
examples/osdi/EKV2.6/netlist_mod_pmos.sp
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@ -1,28 +0,0 @@
OSDI EKV 2.6 PMOS Test
*.options abstol=1e-15
* one voltage source per MOS terminal:
VD dd 0 -1
VG gg 0 -1
VS ss 0 0
VB bb 0 0
* model definitions:
*.model .MODEL PCH EKV_VA type=-1
.include Modelcards/ekv26_0u5.par
*OSDI EKV:
N1 dd gg ss bb pch W=5e-6 L=5e-7
.control
pre_osdi osdi_libs/ekv26_mod.osdi
set xbrushwidth=3
* a DC sweep: drain, gate
*op
dc Vd 0 -1.8 -0.01 VG 0 -1.8 -0.2
* plot source current
plot i(VS)
.endc
.end

1
examples/osdi/EKV2.6/osdi_libs/README
View File

@ -1 +0,0 @@
Place ekv26_mod.osdi here.

2
examples/osdi/bsimbulk/bsimbulk_inverter.sp
View File

@ -27,7 +27,7 @@ c2 z vss 0.576f
.dc V1 0 'vcc' 'vcc/100'
.control
pre_osdi osdi_libs/bsimbulk107.osdi
* pre_osdi ../osdi_libs/bsimbulk107.osdi ; ./../lib/ngspice/bsimbulk107.osdi
run
*set nolegend
set xbrushwidth=3

2
examples/osdi/bsimbulk/bsimbulk_ro.sp
View File

@ -31,7 +31,7 @@ c2 z vss 0.576f
.tran 10p 10n uic
.control
pre_osdi osdi_libs/bsimbulk107.osdi
* pre_osdi ../osdi_libs/bsimbulk107.osdi
run
set xbrushwidth=3
plot in

2
examples/osdi/bsimbulk/c7552_ann_bsimbulk.net
View File

@ -89225,7 +89225,7 @@ c2 z vss 0.834f
*.print tran V(g7529_1) V(g7509_0) V(g7484_1) V(g7477_1) V(g7460_0) V(g7503_1) V(g7522_0) V(g7485_1) V(g7453_0) V(g7474_0) V(g7500_0) V(g7514_0) V(g7546_1) V(g7549_0) V(g7467_0) V(g7491_0) V(g7456_0) V(g7495_1) V(g7545_0) V(g7473_0) V(g7541_0) V(g7448_1) V(g7525_1) V(g7550_1) V(g165_1) V(g7510_1) V(g7535_1) V(g7534_1) V(g7469_1) V(g7476_0) V(g7517_1) V(g7537_0) V(g7489_1) V(g7521_1) V(g7486_0) V(g7533_1) V(g7449_0) V(g7447_0) V(g7528_0) V(g7513_1) V(g7548_0) V(g7544_1) V(g7552_0) V(g7540_1) V(g7507_0) V(g7481_0) V(g7455_0) V(g7502_1) V(g7446_1) V(g7478_1) V(g7470_0) V(g7526_0) V(g7494_1) V(g7452_1) V(g7463_0) V(g7532_1) V(g7512_0) V(g7527_0) V(g7451_0) V(g7472_0) V(g7498_1) V(g7475_0) V(g7536_0) V(g7488_1) V(g7493_1) V(g7551_1) V(g7482_0) V(g7487_1) V(g7501_1) V(g7520_1) V(g7516_1) V(g7450_1) V(g7508_0) V(g7458_1) V(g7479_1) V(g7506_1) V(g7499_0) V(g7471_0) V(g7465_1) V(g7464_1) V(g7543_1) V(g7524_0) V(g7539_1) V(g7468_1) V(g7459_0) V(g7504_1) V(g7515_1) V(g7492_1) V(g7511_0) V(g7462_1) V(g7530_0) V(g7497_1) V(g7454_1) V(g7519_1) V(g7531_0) V(g7547_0) V(g7483_1) V(g7466_1) V(g7480_1) V(g7523_1) V(g7496_0) V(g7538_0) V(g7490_1) V(g7518_1) V(g7461_0) V(g7542_0) V(g7457_0) V(g7505_1)
.control
pre_osdi osdi_libs/bsimbulk107.osdi
* pre_osdi ../osdi_libs/bsimbulk107.osdi
unset ngdebug
save V(g7529_1) V(g7509_0) V(g7484_1) V(g7477_1) V(g7460_0) V(g7503_1) V(g7522_0) V(g7485_1) V(g7453_0) V(g7474_0) V(g7500_0) V(g7514_0) V(g7546_1) V(g7549_0) V(g7467_0) V(g7491_0) V(g7456_0) V(g7495_1) V(g7545_0) V(g7473_0) V(g7541_0) V(g7448_1) V(g7525_1) V(g7550_1) V(g165_1) V(g7510_1) V(g7535_1) V(g7534_1) V(g7469_1) V(g7476_0) V(g7517_1) V(g7537_0) V(g7489_1) V(g7521_1) V(g7486_0) V(g7533_1) V(g7449_0) V(g7447_0) V(g7528_0) V(g7513_1) V(g7548_0) V(g7544_1) V(g7552_0) V(g7540_1) V(g7507_0) V(g7481_0) V(g7455_0) V(g7502_1) V(g7446_1) V(g7478_1) V(g7470_0) V(g7526_0) V(g7494_1) V(g7452_1) V(g7463_0) V(g7532_1) V(g7512_0) V(g7527_0) V(g7451_0) V(g7472_0) V(g7498_1) V(g7475_0) V(g7536_0) V(g7488_1) V(g7493_1) V(g7551_1) V(g7482_0) V(g7487_1) V(g7501_1) V(g7520_1) V(g7516_1) V(g7450_1) V(g7508_0) V(g7458_1) V(g7479_1) V(g7506_1) V(g7499_0) V(g7471_0) V(g7465_1) V(g7464_1) V(g7543_1) V(g7524_0) V(g7539_1) V(g7468_1) V(g7459_0) V(g7504_1) V(g7515_1) V(g7492_1) V(g7511_0) V(g7462_1) V(g7530_0) V(g7497_1) V(g7454_1) V(g7519_1) V(g7531_0) V(g7547_0) V(g7483_1) V(g7466_1) V(g7480_1) V(g7523_1) V(g7496_0) V(g7538_0) V(g7490_1) V(g7518_1) V(g7461_0) V(g7542_0) V(g7457_0) V(g7505_1)

2
examples/osdi/bsimbulk/netlist_mod_nmos.sp
View File

@ -15,7 +15,7 @@ VB bb 0 0
N1 dd gg ss bb BSIMBULK_osdi_N W=500n L=90n
.control
pre_osdi osdi_libs/bsimbulk107.osdi
* pre_osdi ../osdi_libs/bsimbulk107.osdi
set xbrushwidth=3
* a DC sweep: drain, gate
dc Vd 0 1.6 0.01 VG 0 1.6 0.2

2
examples/osdi/bsimbulk/netlist_mod_pmos.sp
View File

@ -16,7 +16,7 @@ VB bb 0 0
N1 dd gg ss bb BSIMBULK_osdi_P W=500n L=90n
.control
pre_osdi osdi_libs/bsimbulk107.osdi
* pre_osdi ../osdi_libs/bsimbulk107.osdi
set xbrushwidth=3
* a DC sweep: drain, gate
*op

2
examples/osdi/bsimbulk/nmos_pmos_BSIMBULK.sp
View File

@ -17,7 +17,7 @@ vbsp 44 0 0
.control
* Load the models dynamically
pre_osdi osdi_libs/bsimbulk107.osdi
* pre_osdi ../osdi_libs/bsimbulk107.osdi
set xgridwidth=2
set xbrushwidth=3

1
examples/osdi/bsimbulk/osdi_libs/README
View File

@ -1 +0,0 @@
Place bsimbulk107.osdi here.

2
examples/osdi/bsimcmg/inverter_ro.sp
View File

@ -28,7 +28,7 @@ Xinv6 vi vo supply 0 mg_inv
.tran 0.1p 1n
.control
pre_osdi osdi_libs/bsimcmg.osdi
* pre_osdi ../osdi_libs/bsimcmg.osdi
set xbrushwidth=3
run
plot i(vss)

2
examples/osdi/bsimcmg/inverter_transient.sp
View File

@ -27,7 +27,7 @@ Xinv5 4 vo supply 0 mg_inv
.print tran v(vi) v(vo)
.control
pre_osdi osdi_libs/bsimcmg.osdi
* pre_osdi ../osdi_libs/bsimcmg.osdi
set xbrushwidth=3
run
plot v(vi) v(vo)

2
examples/osdi/bsimcmg/netlist_nmos.sp
View File

@ -16,7 +16,7 @@ VB bb 0 0
N1 dd gg ss bb BSIMCMG_osdi_N ; W=5u L=0.2u
.control
pre_osdi osdi_libs/bsimcmg.osdi
* pre_osdi ../osdi_libs/bsimcmg.osdi
set xbrushwidth=3
* a DC sweep: drain, gate
dc Vd 0 2.5 0.01 VG 0 2.5 0.5

2
examples/osdi/bsimcmg/netlist_pmos.sp
View File

@ -16,7 +16,7 @@ VB bb 0 0
N1 dd gg ss bb BSIMCMG_osdi_P
.control
pre_osdi osdi_libs/bsimcmg.osdi
* pre_osdi ../osdi_libs/bsimcmg.osdi
set xbrushwidth=3
* a DC sweep: drain, gate
dc Vd 0 -1.8 -0.01 VG 0 -1.8 -0.3

1
examples/osdi/bsimcmg/osdi_libs/README
View File

@ -1 +0,0 @@
Place bsimcmg.osdi here.

18
examples/osdi/bsimcmg/ringosc_17stg.sp
View File

@ -1,6 +1,5 @@
*Sample netlist for BSIM-MG
* (exec-spice "ngspice %s" t)
*17-stage ring oscillator
* Sample netlist for BSIM-CMG
* 17-stage ring oscillator
.include Modelcards/modelcard.nmos
.include Modelcards/modelcard.pmos
@ -36,8 +35,9 @@ Xinv17 17 1 supply 0 mg_inv
* --- Initial Condition ---
.ic v(1)=1
.tran 1p 1n
.tran 1p 10n
* measure oscillator frequency by period delta t
.measure tran t1 when v(1)=0.5 cross=1
.measure tran t2 when v(1)=0.5 cross=7
.measure tran period param='(t2-t1)/3'
@ -45,10 +45,16 @@ Xinv17 17 1 supply 0 mg_inv
.measure tran delay_per_stage param='period/34'
.control
pre_osdi osdi_libs/bsimcmg.osdi
* pre_osdi ../osdi_libs/bsimcmg.osdi
set xbrushwidth=3
run
plot v(1)
rusage time
plot v(1) xlimit 1n 2n
* measure oscillator frequency with fft
fft V(1)
let magv1 = mag(v(1))
plot magv1 xlimit 0 16G
meas sp fmax max magv1 from=10G to=20G
.endc
.end

2
examples/osdi/bsimcmg/simple_inverter_dc.sp
View File

@ -18,7 +18,7 @@ NN1 vout vin 0 0 BSIMCMG_osdi_N
.tran 10n 2u
.control
pre_osdi osdi_libs/bsimcmg.osdi
* pre_osdi ../osdi_libs/bsimcmg.osdi
set xbrushwidth=3
run
plot v(vout) v(vin)

2
examples/osdi/hicuml0/DFF_Y_ECL_HICUM.sp
View File

@ -32,7 +32,7 @@ Rdt dt 0 1G
.include Modelcards/model-card-hicumL0V1p11_mod.lib
.SAVE V(D) V(CLK) V(Q)
.control
pre_osdi osdi_libs/HICUML0-2.osdi
* pre_osdi ../osdi_libs/HICUML0-2.osdi
TRAN 0.25p 5n
rusage
set color0=white

2
examples/osdi/hicuml0/ECL-OR.cir
View File

@ -18,7 +18,7 @@ V3 In2 GND dc -1.75 pulse(-1.75 -0.9 0 1n 1n 2.5u 5u)
Rt1 DT GND 1G
.tran 0.3n 100u
.control
pre_osdi osdi_libs/HICUML0-2.osdi
* pre_osdi ../osdi_libs/HICUML0-2.osdi
run
rusage
set xbrushwidth=2

2
examples/osdi/hicuml0/ECL-RO-5.cir
View File

@ -35,7 +35,7 @@ V1 VEE GND -5.2
.tran 0.02n 200n
.control
pre_osdi osdi_libs/HICUML0-2.osdi
* pre_osdi ../osdi_libs/HICUML0-2.osdi
run
rusage
plot out9 xlimit 100n 110n

2
examples/osdi/hicuml0/hic0_gum.sp
View File

@ -8,7 +8,7 @@ XQ1 C B 0 S DT hicumL0V1p1_c_sbt
Rdt dt 0 1G
.control
pre_osdi osdi_libs/HICUML0-2.osdi
* pre_osdi ../osdi_libs/HICUML0-2.osdi
dc vb 0.2 1.4 0.01
set xbrushwidth=2
plot abs(i(vc)) abs(i(vb)) abs(i(vs)) ylimit 0.1p 100m ylog

2
examples/osdi/hicuml0/hic0_out.sp
View File

@ -8,7 +8,7 @@ X1 C B 0 S DT hicumL0V1p1_c_sbt
Rdt dt 0 1G
.control
pre_osdi osdi_libs/HICUML0-2.osdi
* pre_osdi ../osdi_libs/HICUML0-2.osdi
dc vc 0.0 3.0 0.05 ib 10u 100u 10u
set xbrushwidth=2
plot abs(i(vc))

1
examples/osdi/hicuml0/osdi_libs/README
View File

@ -1 +0,0 @@
Place HICUML0-2.osdi here.

2
examples/osdi/mextram/mex_gum.sp
View File

@ -8,7 +8,7 @@ VS S 0 0.0
NQ1 C B 0 S dt BJTRF1
.control
pre_osdi osdi_libs/bjt504t.osdi
* pre_osdi ../osdi_libs/bjt504t.osdi
dc vb 0.2 1.4 0.01
set xbrushwidth=2
plot abs(i(vc)) abs(i(vb)) abs(i(vs)) ylog xlimit 0.3 1.4 ylimit 1e-12 100e-3

2
examples/osdi/mextram/mex_out.sp
View File

@ -8,7 +8,7 @@ VS S 0 0.0
NQ1 C B 0 S T BJTRF1
.control
pre_osdi osdi_libs/bjt504t.osdi
* pre_osdi ../osdi_libs/bjt504t.osdi
dc vc 0 6.0 0.05 ib 0 8u 1u
set xbrushwidth=2
plot abs(i(vc)) xlabel Vce title Output-Characteristic

1
examples/osdi/mextram/osdi_libs/README
View File

@ -1 +0,0 @@
Place bjt505.osdi here.

2
examples/osdi/mixed-models/bb-psp_ro.sp
View File

@ -67,7 +67,7 @@ c2 z vss 0.576f
.control
* Load the models dynamically
pre_osdi osdi_libs/bsimbulk107.osdi osdi_libs/psp103.osdi
* pre_osdi ../osdi_libs/bsimbulk107.osdi osdi_libs/psp103.osdi
* Run the simulation
run
* Plotting

2
examples/osdi/mixed-models/bsimbulk_inverter.sp
View File

@ -27,7 +27,7 @@ c2 z vss 0.576f
.dc V1 0 'vcc' 'vcc/100'
.control
pre_osdi osdi_libs/bsimbulk107.osdi
* pre_osdi ../osdi_libs/bsimbulk107.osdi
run
*set nolegend
set xbrushwidth=3

1
examples/osdi/mixed-models/osdi_libs/README
View File

@ -1 +0,0 @@
Place bsimbulk107.osdi and psp103.osdi here.

2
examples/osdi/mixed-models/psp_inverter.sp
View File

@ -53,7 +53,7 @@ c2 z vss 0.576f
.dc V1 0 'vcc' 'vcc/100'
.control
pre_osdi osdi_libs/psp103.osdi
* pre_osdi ../osdi_libs/psp103.osdi
run
*set nolegend
set xbrushwidth=2

1
examples/osdi/osdi_libs/readme Normal file
View File

@ -0,0 +1 @@
Put your compiled models *.osdi here, if used locally.

2
examples/osdi/psp103/c7552_ann_psp.net
View File

@ -89225,7 +89225,7 @@ c2 z vss 0.834f
*.print tran V(g7529_1) V(g7509_0) V(g7484_1) V(g7477_1) V(g7460_0) V(g7503_1) V(g7522_0) V(g7485_1) V(g7453_0) V(g7474_0) V(g7500_0) V(g7514_0) V(g7546_1) V(g7549_0) V(g7467_0) V(g7491_0) V(g7456_0) V(g7495_1) V(g7545_0) V(g7473_0) V(g7541_0) V(g7448_1) V(g7525_1) V(g7550_1) V(g165_1) V(g7510_1) V(g7535_1) V(g7534_1) V(g7469_1) V(g7476_0) V(g7517_1) V(g7537_0) V(g7489_1) V(g7521_1) V(g7486_0) V(g7533_1) V(g7449_0) V(g7447_0) V(g7528_0) V(g7513_1) V(g7548_0) V(g7544_1) V(g7552_0) V(g7540_1) V(g7507_0) V(g7481_0) V(g7455_0) V(g7502_1) V(g7446_1) V(g7478_1) V(g7470_0) V(g7526_0) V(g7494_1) V(g7452_1) V(g7463_0) V(g7532_1) V(g7512_0) V(g7527_0) V(g7451_0) V(g7472_0) V(g7498_1) V(g7475_0) V(g7536_0) V(g7488_1) V(g7493_1) V(g7551_1) V(g7482_0) V(g7487_1) V(g7501_1) V(g7520_1) V(g7516_1) V(g7450_1) V(g7508_0) V(g7458_1) V(g7479_1) V(g7506_1) V(g7499_0) V(g7471_0) V(g7465_1) V(g7464_1) V(g7543_1) V(g7524_0) V(g7539_1) V(g7468_1) V(g7459_0) V(g7504_1) V(g7515_1) V(g7492_1) V(g7511_0) V(g7462_1) V(g7530_0) V(g7497_1) V(g7454_1) V(g7519_1) V(g7531_0) V(g7547_0) V(g7483_1) V(g7466_1) V(g7480_1) V(g7523_1) V(g7496_0) V(g7538_0) V(g7490_1) V(g7518_1) V(g7461_0) V(g7542_0) V(g7457_0) V(g7505_1)
.control
pre_osdi osdi_libs/psp103.osdi
* pre_osdi ../osdi_libs/psp103.osdi
unset ngdebug
save V(g7529_1) V(g7509_0) V(g7484_1) V(g7477_1) V(g7460_0) V(g7503_1) V(g7522_0) V(g7485_1) V(g7453_0) V(g7474_0) V(g7500_0) V(g7514_0) V(g7546_1) V(g7549_0) V(g7467_0) V(g7491_0) V(g7456_0) V(g7495_1) V(g7545_0) V(g7473_0) V(g7541_0) V(g7448_1) V(g7525_1) V(g7550_1) V(g165_1) V(g7510_1) V(g7535_1) V(g7534_1) V(g7469_1) V(g7476_0) V(g7517_1) V(g7537_0) V(g7489_1) V(g7521_1) V(g7486_0) V(g7533_1) V(g7449_0) V(g7447_0) V(g7528_0) V(g7513_1) V(g7548_0) V(g7544_1) V(g7552_0) V(g7540_1) V(g7507_0) V(g7481_0) V(g7455_0) V(g7502_1) V(g7446_1) V(g7478_1) V(g7470_0) V(g7526_0) V(g7494_1) V(g7452_1) V(g7463_0) V(g7532_1) V(g7512_0) V(g7527_0) V(g7451_0) V(g7472_0) V(g7498_1) V(g7475_0) V(g7536_0) V(g7488_1) V(g7493_1) V(g7551_1) V(g7482_0) V(g7487_1) V(g7501_1) V(g7520_1) V(g7516_1) V(g7450_1) V(g7508_0) V(g7458_1) V(g7479_1) V(g7506_1) V(g7499_0) V(g7471_0) V(g7465_1) V(g7464_1) V(g7543_1) V(g7524_0) V(g7539_1) V(g7468_1) V(g7459_0) V(g7504_1) V(g7515_1) V(g7492_1) V(g7511_0) V(g7462_1) V(g7530_0) V(g7497_1) V(g7454_1) V(g7519_1) V(g7531_0) V(g7547_0) V(g7483_1) V(g7466_1) V(g7480_1) V(g7523_1) V(g7496_0) V(g7538_0) V(g7490_1) V(g7518_1) V(g7461_0) V(g7542_0) V(g7457_0) V(g7505_1)

22
examples/osdi/psp103/nmos_pmos_PSP.sp
View File

@ -42,29 +42,29 @@ vbsp 44 0 0
.control
* Load the models dynamically
pre_osdi osdi_libs/psp103.osdi
* pre_osdi ../osdi_libs/psp103.osdi
set xgridwidth=2
set xbrushwidth=3
* NMOS
dc vgsn 0 1.5 0.05 vbsn 0 -1.5 -0.3
plot vssn#branch ylabel 'Id vs. Vgs, Vbs 0 ... -1.5'
plot abs(vssn#branch) ylog ylabel 'Id vs. Vgs, Vbs 0 ... -1.5'
plot vssn#branch ylabel 'Id over Vgs, Vbs 0 ... -1.5'
plot abs(vssn#branch) ylog ylabel 'Id over Vgs, Vbs 0 ... -1.5'
dc vdsn 0 1.6 0.01 vgsn 0 1.6 0.2
plot vssn#branch ylabel 'Id vs. Vds, Vgs 0 ... 1.6'
plot vssn#branch ylabel 'Id over Vds, Vgs 0 ... 1.6'
dc vgsn 0 1.5 0.05 temp -40 160 40
plot vssn#branch ylabel 'Id vs. Vds, Temp. -40 ... 160'
plot abs(vssn#branch) ylog ylabel 'Id vs. Vds, Temp. -40 ... 160'
plot vssn#branch ylabel 'Id over Vds, Temp. -40 ... 160'
plot abs(vssn#branch) ylog ylabel 'Id over Vds, Temp. -40 ... 160'
* PMOS
dc vgsp 0 -1.5 -0.05 vbsp 0 1.5 0.3
plot vssp#branch ylabel 'Id vs. Vgs, Vbs 0 ... 1.5'
plot abs(vssp#branch) ylog ylabel 'Id vs. Vgs, Vbs 0 ... 1.5'
plot vssp#branch ylabel 'Id over Vgs, Vbs 0 ... 1.5'
plot abs(vssp#branch) ylog ylabel 'Id over Vgs, Vbs 0 ... 1.5'
dc vdsp 0 -1.6 -0.01 vgsp 0 -1.6 -0.2
plot vssp#branch ylabel 'Id vs. Vds, Vgs 0 ... -1.6'
plot vssp#branch ylabel 'Id over Vds, Vgs 0 ... -1.6'
dc vgsp 0 -1.5 -0.05 temp -40 160 40
plot vssp#branch ylabel 'Id vs. Vds, Temp. -40 ... 160'
plot abs(vssp#branch) ylog ylabel 'Id vs. Vds, Temp. -40 ... 160'
plot vssp#branch ylabel 'Id over Vds, Temp. -40 ... 160'
plot abs(vssp#branch) ylog ylabel 'Id over Vds, Temp. -40 ... 160'
.endc
.end

1
examples/osdi/psp103/osdi_libs/README
View File

@ -1 +0,0 @@
Place psp103.osdi and juncap200.osdi here.

2
examples/osdi/psp103/psp_inverter.sp
View File

@ -53,7 +53,7 @@ c2 z vss 0.576f
.dc V1 0 'vcc' 'vcc/100'
.control
pre_osdi osdi_libs/psp103.osdi
* pre_osdi ../osdi_libs/psp103.osdi
run
*set nolegend
set xbrushwidth=2

2
examples/osdi/psp103/psp_out_nmos_nm.sp
View File

@ -23,7 +23,7 @@ nm1 d g s b nch
*.include Modelcards/psp103_nmos.mod
.control
pre_osdi osdi_libs/psp103.osdi
* pre_osdi ../osdi_libs/psp103.osdi
dc vd 0 2.0 0.05 vg 0 1.5 0.25
plot i(vs)
dc vg 0 1.5 0.05 vb 0 -3.0 -1

2
examples/osdi/psp103/psp_out_pmos_nm.sp
View File

@ -19,7 +19,7 @@ nm1 d g s b pch
*
.option temp=21
.control
pre_osdi osdi_libs/psp103.osdi
* pre_osdi ../osdi_libs/psp103.osdi
dc vd 0 -2.0 -0.05 vg 0 -1.5 -0.25 ; saturation
plot i(vs)
dc vg 0 -1.5 -0.05 vb 0 3.0 1

2
examples/osdi/psp103/psp_ro.sp
View File

@ -56,7 +56,7 @@ c2 z vss 0.576f
.tran 10p 10n uic
.control
pre_osdi osdi_libs/psp103.osdi
* pre_osdi ../osdi_libs/psp103.osdi
run
set xbrushwidth=3
plot in

2
examples/osdi/psp103/psp_transfer.sp
View File

@ -19,7 +19,7 @@ nm1 d g s b nch
*
.option temp=21
.control
pre_osdi osdi_libs/psp103.osdi
* pre_osdi ../osdi_libs/psp103.osdi
set xbrushwidth=2
dc vg 0 1.5 0.02 vb -3 0 0.5
plot abs(i(vd))

1
examples/osdi/r2_cmc/osdi_libs/README
View File

@ -1 +0,0 @@
Place r2_cmc.osdi here.

2
examples/osdi/r2_cmc/res_r2_cmc.cir
View File

@ -7,7 +7,7 @@ NRr2_cmc 1 0 rmodel w=1u l=20u isnoisy=1
.model rmodel r2_cmc(level=2 rsh=200 xl=0.2u xw=-0.05u p3=0.12 q3=1.6 p2=0.015 q2=3.8 tc1=1.5e-4 tc2=7e-7)
.control
pre_osdi osdi_libs/r2_cmc.osdi
* pre_osdi ../osdi_libs/r2_cmc.osdi
op
let res = v(1) / -v1#branch
print res

37
examples/various/nmos_out_BSIM330.sp
View File

@ -1,37 +0,0 @@
***** NMOS Transistor BSIM3 (Id-Vds) with Rd ***
M1 2 1 3 4 n1 W=1u L=0.35u Pd=1.5u Ps=1.5u ad=1.5p as=1.5p
vgs 1 0 3.5
vds 2 0 0.1
vss 3 0 0
vbs 4 0 0
* drain series resistor
R2 2 22 1k
M2 22 1 32 4 n1 W=1u L=0.35u Pd=1.5u Ps=1.5u ad=1.5p as=1.5p
vss2 32 0 0
.options Temp=27.0
* BSIM3v3.3.0 model with modified default parameters 0.18µm
.model n1 nmos level=49 version=3.3.0 tox=3.5n nch=2.4e17 nsub=5e16 vth0=0.15
.model p1 pmos level=49 version=3.3.0 tox=3.5n nch=2.5e17 nsub=5e16 vth0=-0.15
.control
set xgridwidth=2
set xbrushwidth=3
dc vds 0 2 0.05 vgs 0 2 0.4
set nolegend
plot vss#branch title 'Drain current versus drain voltage' xlabel 'Drain voltage' ylabel 'Drain current'
unset nolegend
set color0=white
plot vss2#branch vs v(22) title 'Series resistor: Drain current versus drain voltage' xlabel 'Drain voltage' ylabel 'Drain current'
.endc
.end

21
examples/various/roessler-attractor.cir Normal file
View File

@ -0,0 +1,21 @@
Model the rossler attractor
*https://www.glensstuff.com/rosslerattractor/rossler.htm
.param a=0.2 b=0.2 c=5.7
B1 x 0 i=v(y) + v(z)
C1 x 0 1 ic=1
B2 y 0 i=-(V(x) + a * v(y))
C2 y 0 1
B3 z 0 i = -(b + v(z) * (v(x) - c))
C3 z 0 1
.control
tran 1m 300 uic
set nounits
set nolegend
plot x vs y retraceplot ylabel x
.endc
.end

56
examples/xspice/various/x_fer.cir Normal file
View File

@ -0,0 +1,56 @@
* Chebyshev low-pass filter
* code model s_xfer
* according to ngspice manual chapter 12.2.18
* and LCR versus Laplace comparison
a12 node1 node2 cheby1
.model cheby1 s_xfer(num_coeff=[1] den_coeff=[1 1.09773 1.10251]
+ int_ic=[0 0] denormalized_freq=1500)
a14 node1 node3 cheby_LP_3kHz
.model cheby_LP_3kHz s_xfer(in_offset=0.0 gain=1.0 int_ic=[0 0]
+ num_coeff=[1.0]
+ den_coeff=[1.0 1.42562 1.51620]
+ denormalized_freq=18850) ; for f = 3 kHz
* LCR bandpass filter
L1 node1 nint1 10m
C1 nint1 node4 10u
R1 node4 0 10
* equivalent filter by Laplace expression
a16 node1 node5 fil1
.model fil1 s_xfer gain=1000 int_ic=[0 0]
+ num_coeff=[1.0 0]
+ den_coeff=[1.0 1e3 1e7]
+ )
* input ac or pulse
Vin node1 0 dc 0 ac 1 pulse 0 5 0 1u 1u 3m 6m
.control
set xbrushwidth=2
ac dec 50 0.01 100k
let dbnode2=db(v(node2))
let dbnode3=db(v(node3))
let dbnode4=db(v(node4))
let dbnode5=db(v(node5))
plot dbnode2 dbnode3
plot dbnode4 dbnode5+1 ; +1 just to see both overlapping graphs
plot cph(node2) cph(node3)
let a12_0db = dbnode2[1]
let a14_0db = dbnode3[1]
* 1500/2/PI = 239 Hz
meas ac fa12_0db when dbnode2=a12_0db fall=last
* 18850/2/PI = 3 kHz
meas ac fa14_0db when dbnode3=a14_0db fall=last
* LCR bandpass 500 Hz BW=159 Hz
meas ac fil1max max dbnode4
meas ac fil1max max dbnode5
* -3dB bandwidth
let fil1max3db = fil1max - 3
meas ac bwfil1 TRIG dbnode5 VAL=fil1max3db RISE=1 TARG dbnode5 VAL=fil1max3db FALL=1
tran 1u 15m
plot node1 node2 node3 node5
.endc
.end

6
src/frontend/inpc_probe.c
View File

@ -315,7 +315,11 @@ void inp_probe(struct card* deck)
nodename = get_terminal_name(instname, nodebuf, instances);
char* vline = tprintf("vcurr_%s:%s:%s_%s %s %s 0", instname, nodename, thisnode, nodebuf, thisnode, newnode);
card = insert_new_line(card, vline, 0, 0);
/* special for KiCad: add shunt resistor if thisnode contains 'unconnected' */
if (*instname == 'x' && strstr(thisnode, "unconnected")) {
char *rline = tprintf("R%s %s 0 1e15", thisnode, thisnode);
card = insert_new_line(card, rline, 0, 0);
}
char* nodesaves = tprintf("%s:%s#branch", instname, nodename);
allsaves = wl_cons(nodesaves, allsaves);

9
src/frontend/inpcom.c
View File

@ -6015,11 +6015,14 @@ static void inp_compat(struct card *card)
/* evaluate m */
char* mstr = eval_m(cut_line, card->line);
/* white noise model by x2line, x3line, x4line
if instance parameter noisy=1 (or noise=1) is set */
bool rnoise = FALSE;
/* white noise model by x2line, x3line, x4line */
/* if variable enable_noisy_r is set */
bool rnoise = cp_getvar("enable_noisy_r", CP_BOOL, NULL, 0);
/* if instance parameter noisy=1 (or noise=1) is set */
if (strstr(cut_line, "noisy=1") || strstr(cut_line, "noise=1"))
rnoise = TRUE;
else if (strstr(cut_line, "noisy=0") || strstr(cut_line, "noise=0"))
rnoise = FALSE;
/* tc1, tc2, and m are enabled */
xline = tprintf("b%s %s %s i = v(%s, %s)/(%s) %s %s reciproctc=1 reciprocm=0",

1
src/include/ngspice/ngspice.h
View File

@ -279,6 +279,7 @@ extern char *Help_Path;
extern char *Lib_Path;
extern char *Inp_Path;
extern char *Infile_Path;
extern char *Spice_Exec_Path;
#ifdef TCL_MODULE

12
src/main.c
View File

@ -824,6 +824,8 @@ int main(int argc, char **argv)
bool iflag = FALSE; /* flag for interactive mode */
bool qflag = FALSE; /* flag for command completion */
bool t = TRUE;
FILE * volatile circuit_file;
bool volatile oflag = FALSE;
bool srflag = FALSE;
@ -866,6 +868,7 @@ int main(int argc, char **argv)
}
#endif
ivars(argv[0]); /* Create internal variables */
/* Set default data sources */
@ -895,6 +898,15 @@ int main(int argc, char **argv)
cp_vset("rndseed", CP_NUM, &ii);
com_sseed(NULL);
/* set a boolean variable when XSPICE and/or OSDI is enabled,
to be used in spinit etc. */
#if defined(SIMULATOR) && defined(XSPICE)
cp_vset("xspice_enabled", CP_BOOL, &t);
#endif
#if defined(SIMULATOR) && defined(OSDI)
cp_vset("osdi_enabled", CP_BOOL, &t);
#endif
/* --- Process command line options --- */
for (;;) {
enum { soa_log = 1001, };

6
src/maths/cmaths/cmath2.c
View File

@ -676,7 +676,7 @@ void *cx_mod(void *data1, void *data2, short int datatype1, short int datatype2,
int i;
for (i = 0; i < length; i++) {
const int r1 = (int) floor(fabs(dd1[i]));
rcheck(r1 > 0, "mod");
rcheck(r1 >= 0, "mod");
const int r2 = (int)floor(fabs(dd2[i]));
rcheck(r2 > 0, "mod");
const int r3 = r1 % r2;
@ -705,11 +705,11 @@ void *cx_mod(void *data1, void *data2, short int datatype1, short int datatype2,
c2 = cc2[i];
}
const int r1 = (int) floor(fabs(realpart(c1)));
rcheck(r1 > 0, "mod");
rcheck(r1 >= 0, "mod");
const int r2 = (int) floor(fabs(realpart(c2)));
rcheck(r2 > 0, "mod");
const int i1 = (int) floor(fabs(imagpart(c1)));
rcheck(i1 > 0, "mod");
rcheck(i1 >= 0, "mod");
const int i2 = (int) floor(fabs(imagpart(c2)));
rcheck(i2 > 0, "mod");
const int r3 = r1 % r2;

19
src/misc/ivars.c
View File

@ -11,6 +11,7 @@ char *News_File;
char *Help_Path;
char *Lib_Path;
char *Inp_Path;
char *Spice_Exec_Path;
static void
@ -102,7 +103,22 @@ ivars(char *argv0)
env_overr(&temp, "SPICE_ASCIIRAWFILE");
if(temp)
AsciiRawFile = atoi(temp);
/* path of the ngspice executable */
Spice_Exec_Path = copy(argv0);
/* find the last occurence of "ngspice" in Spice_Exec_Path */
char* path_end = strstr(Spice_Exec_Path, "ngspice");
if (path_end) {
char* exec_only = strstr(path_end + 7, "ngspice");
while (exec_only) {
path_end = strstr(Spice_Exec_Path, "ngspice");
if (path_end)
exec_only = strstr(path_end + 7, "ngspice");
}
if (path_end)
*path_end = '\0';
fprintf(stdout, "ngspice path %s\n", Spice_Exec_Path);
}
}
void
@ -113,4 +129,5 @@ destroy_ivars(void)
tfree(Lib_Path);
tfree(Spice_Path);
tfree(Inp_Path);
tfree(Spice_Exec_Path);
}

96
src/osdi/osdiregistry.c
View File

@ -121,47 +121,79 @@ static char *resolve_input_path(const char *name) {
/*
* If called from a script inputdir != NULL so try relativ to that dir
* Otherwise try relativ to the current workdir
* Otherwise try relativ to the current workdir and relativ to the
* executables path
*/
if (inputdir) {
DS_CREATE(ds, 100);
int rc_ds = 0;
rc_ds |= ds_cat_str(&ds, inputdir); /* copy the dir name */
const size_t n = ds_get_length(&ds); /* end of copied dir name */
DS_CREATE(ds, 100);
int rc_ds = 0;
rc_ds |= ds_cat_str(&ds, inputdir); /* copy the dir name */
const size_t n = ds_get_length(&ds); /* end of copied dir name */
/* Append a directory separator if not present already */
const char ch_last = n > 0 ? inputdir[n - 1] : '\0';
if (ch_last != DIR_TERM
/* Append a directory separator if not present already */
const char ch_last = n > 0 ? inputdir[n - 1] : '\0';
if (ch_last != DIR_TERM
#ifdef _WIN32
&& ch_last != DIR_TERM_LINUX
&& ch_last != DIR_TERM_LINUX
#endif
) {
rc_ds |= ds_cat_char(&ds, DIR_TERM);
}
rc_ds |= ds_cat_str(&ds, name); /* append the file name */
) {
rc_ds |= ds_cat_char(&ds, DIR_TERM);
}
rc_ds |= ds_cat_str(&ds, name); /* append the file name */
if (rc_ds != 0) {
(void)fprintf(cp_err, "Unable to build \"dir\" path name "
"in inp_pathresolve_at");
controlled_exit(EXIT_FAILURE);
}
if (rc_ds != 0) {
(void)fprintf(cp_err, "Unable to build \"dir\" path name "
"in inp_pathresolve_at");
controlled_exit(EXIT_FAILURE);
}
char *const r = resolve_path(ds_get_buf(&ds));
ds_free(&ds);
return r;
} else {
DS_CREATE(ds, 100);
if (ds_cat_printf(&ds, ".%c%s", DIR_TERM, name) != 0) {
char* const r = resolve_path(ds_get_buf(&ds));
ds_free(&ds);
if (r)
return r;
}
if (Spice_Exec_Path && *Spice_Exec_Path) {
DS_CREATE(ds, 100);
int rc_ds = 0;
rc_ds |= ds_cat_str(&ds, Spice_Exec_Path); /* copy the dir name */
const size_t n = ds_get_length(&ds); /* end of copied dir name */
/* Append a directory separator if not present already */
const char ch_last = n > 0 ? Spice_Exec_Path[n - 1] : '\0';
if (ch_last != DIR_TERM
#ifdef _WIN32
&& ch_last != DIR_TERM_LINUX
#endif
) {
rc_ds |= ds_cat_char(&ds, DIR_TERM);
}
rc_ds |= ds_cat_str(&ds, name); /* append the file name */
if (rc_ds != 0) {
(void)fprintf(cp_err, "Unable to build \"dir\" path name "
"in inp_pathresolve_at");
controlled_exit(EXIT_FAILURE);
}
char* const r = resolve_path(ds_get_buf(&ds));
ds_free(&ds);
if (r)
return r;
}
/* no inputdir, or not found relative to inputdir:
search relative to current working directory */
DS_CREATE(ds, 100);
if (ds_cat_printf(&ds, ".%c%s", DIR_TERM, name) != 0) {
(void)fprintf(cp_err,
"Unable to build \".\" path name in inp_pathresolve_at");
"Unable to build \".\" path name in inp_pathresolve_at");
controlled_exit(EXIT_FAILURE);
}
char *const r = resolve_path(ds_get_buf(&ds));
ds_free(&ds);
if (r != (char *)NULL) {
}
char* const r = resolve_path(ds_get_buf(&ds));
ds_free(&ds);
if (r != (char*)NULL) {
return r;
}
}
return NULL;
@ -192,7 +224,7 @@ static size_t calc_osdi_instance_data_off(const OsdiDescriptor *descr) {
#define ERR_AND_RET \
error = dlerror(); \
printf("Error opening osdi lib \"%s\": %s\n", path, error); \
fprintf(stderr, "Error opening osdi lib \"%s\": %s\n", path, error); \
FREE_DLERR_MSG(error); \
return INVALID_OBJECT;
@ -254,7 +286,7 @@ extern OsdiObjectFile load_object_file(const char *input) {
}
const char *path = resolve_input_path(input);
if (!path) {
printf("Error opening osdi lib \"%s\": No such file or directory!\n",
fprintf(stderr, "Error opening osdi lib \"%s\": No such file or directory!\n",
input);
return INVALID_OBJECT;
}

4
src/osdi/osdisetup.c
View File

@ -293,7 +293,7 @@ int OSDIsetup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt,
free(node_ids);
return (OK);
return res;
}
/* OSDI does not differentiate between setup and temperature update so we just
@ -363,7 +363,7 @@ extern int OSDItemp(GENmodel *inModel, CKTcircuit *ckt) {
// TODO check that there are no changes in node collapse?
}
}
return (OK);
return res;
}
/* delete internal nodes

9
src/sharedspice.c
View File

@ -899,6 +899,15 @@ ngSpice_Init(SendChar* printfcn, SendStat* statusfcn, ControlledExit* ngspiceexi
bool sm = TRUE;
cp_vset("sharedmode", CP_BOOL, &sm);
/* set a boolean variable when XSPICE and/or OSDI is enabled,
to be used in spinit etc. */
#if defined(XSPICE)
cp_vset("xspice_enabled", CP_BOOL, &sm);
#endif
#if defined(OSDI)
cp_vset("osdi_enabled", CP_BOOL, &sm);
#endif
/*parameter fetcher, used in show, alter, altermod */
if_getparam = spif_getparam_special;

70
src/spicelib/devices/bsim4/b4.c
View File

@ -1,62 +1,30 @@
/* ******************************************************************************
* BSIM4 4.8.1 released by Chetan Kumar Dabhi 2/15/2017 *
* BSIM4 4.8.2 released by Chetan Kumar Dabhi 01/01/2020 *
* BSIM4 Model Equations *
******************************************************************************
******************************************************************************
* Copyright 2017 Regents of the University of California. *
* All rights reserved. *
* Copyright (c) 2020 University of California *
* *
* Project Director: Prof. Chenming Hu. *
* Current developers: Chetan Kumar Dabhi (Ph.D. student, IIT Kanpur) *
* Prof. Yogesh Chauhan (IIT Kanpur) *
* Dr. Pragya Kushwaha (Postdoc, UC Berkeley) *
* Dr. Avirup Dasgupta (Postdoc, UC Berkeley) *
* Ming-Yen Kao (Ph.D. student, UC Berkeley) *
* Authors: Gary W. Ng, Weidong Liu, Xuemei Xi, Mohan Dunga, Wenwei Yang *
* Ali Niknejad, Shivendra Singh Parihar, Chetan Kumar Dabhi *
* Yogesh Singh Chauhan, Sayeef Salahuddin, Chenming Hu *
******************************************************************************
* Ali Niknejad, Chetan Kumar Dabhi, Yogesh Singh Chauhan, *
* Sayeef Salahuddin, Chenming Hu *
******************************************************************************/
******************************************************************************
* CMC In-Code Statement *
* *
* The Developer agrees that the following statement will appear in the *
* model code that has been adopted as a CMC Standard. *
* *
* Software is distributed as is, completely without warranty or service *
* support. The University of California and its employees are not liable *
* for the condition or performance of the software. *
* *
* The University of California owns the copyright and grants users a *
* perpetual, irrevocable, worldwide, non-exclusive, royalty-free license *
* with respect to the software as set forth below. *
* *
* The University of California hereby disclaims all implied warranties. *
* *
* The University of California grants the users the right to modify, *
* copy, and redistribute the software and documentation, both within *
* the user's organization and externally, subject to the following *
* restrictions: *
* *
* 1. The users agree not to charge for the University of California code *
* itself but may charge for additions, extensions, or support. *
* *
* 2. In any product based on the software, the users agree to *
* acknowledge the University of California that developed the *
* software. This acknowledgment shall appear in the product *
* documentation. *
* *
* 3. Redistributions to others of source code and documentation must *
* retain the copyright notice, disclaimer, and list of conditions. *
* *
* 4. Redistributions to others in binary form must reproduce the *
* copyright notice, disclaimer, and list of conditions in the *
* documentation and/or other materials provided with the *
* distribution. *
* *
* Agreed to on ______Feb. 15, 2017______________ *
* *
* By: ____University of California, Berkeley___ *
* ____Chenming Hu__________________________ *
* ____Professor in Graduate School ________ *
* *
****************************************************************************** */
/*
Licensed under Educational Community License, Version 2.0 (the "License"); you may
not use this file except in compliance with the License. You may obtain a copy of the license at
http://opensource.org/licenses/ECL-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations
under the License.
*/
#include "ngspice/ngspice.h"
#include "ngspice/devdefs.h"
@ -1064,6 +1032,8 @@ IOP( "tnoic", BSIM4_MOD_TNOIC, IF_REAL, "Thermal noise parameter"),
IOP( "rnoia", BSIM4_MOD_RNOIA, IF_REAL, "Thermal noise coefficient"),
IOP( "rnoib", BSIM4_MOD_RNOIB, IF_REAL, "Thermal noise coefficient"),
IOP( "rnoic", BSIM4_MOD_RNOIC, IF_REAL, "Thermal noise coefficient"),
IOP( "gidlclamp", BSIM4_MOD_GIDLCLAMP, IF_REAL, "gidl clamp value"),
IOP( "idovvds", BSIM4_MOD_IDOVVDSC, IF_REAL, "noise clamping limit parameter"),
IOP( "ntnoi", BSIM4_MOD_NTNOI, IF_REAL, "Thermal noise parameter"),
IOP( "em", BSIM4_MOD_EM, IF_REAL, "Flicker noise parameter"),
IOP( "ef", BSIM4_MOD_EF, IF_REAL, "Flicker noise frequency exponent"),

68
src/spicelib/devices/bsim4/b4acld.c
View File

@ -1,62 +1,30 @@
/* ******************************************************************************
* BSIM4 4.8.1 released by Chetan Kumar Dabhi 2/15/2017 *
* BSIM4 4.8.2 released by Chetan Kumar Dabhi 01/01/2020 *
* BSIM4 Model Equations *
******************************************************************************
******************************************************************************
* Copyright 2017 Regents of the University of California. *
* All rights reserved. *
* Copyright (c) 2020 University of California *
* *
* Project Director: Prof. Chenming Hu. *
* Current developers: Chetan Kumar Dabhi (Ph.D. student, IIT Kanpur) *
* Prof. Yogesh Chauhan (IIT Kanpur) *
* Dr. Pragya Kushwaha (Postdoc, UC Berkeley) *
* Dr. Avirup Dasgupta (Postdoc, UC Berkeley) *
* Ming-Yen Kao (Ph.D. student, UC Berkeley) *
* Authors: Gary W. Ng, Weidong Liu, Xuemei Xi, Mohan Dunga, Wenwei Yang *
* Ali Niknejad, Shivendra Singh Parihar, Chetan Kumar Dabhi *
* Yogesh Singh Chauhan, Sayeef Salahuddin, Chenming Hu *
******************************************************************************
* Ali Niknejad, Chetan Kumar Dabhi, Yogesh Singh Chauhan, *
* Sayeef Salahuddin, Chenming Hu *
******************************************************************************/
******************************************************************************
* CMC In-Code Statement *
* *
* The Developer agrees that the following statement will appear in the *
* model code that has been adopted as a CMC Standard. *
* *
* Software is distributed as is, completely without warranty or service *
* support. The University of California and its employees are not liable *
* for the condition or performance of the software. *
* *
* The University of California owns the copyright and grants users a *
* perpetual, irrevocable, worldwide, non-exclusive, royalty-free license *
* with respect to the software as set forth below. *
* *
* The University of California hereby disclaims all implied warranties. *
* *
* The University of California grants the users the right to modify, *
* copy, and redistribute the software and documentation, both within *
* the user's organization and externally, subject to the following *
* restrictions: *
* *
* 1. The users agree not to charge for the University of California code *
* itself but may charge for additions, extensions, or support. *
* *
* 2. In any product based on the software, the users agree to *
* acknowledge the University of California that developed the *
* software. This acknowledgment shall appear in the product *
* documentation. *
* *
* 3. Redistributions to others of source code and documentation must *
* retain the copyright notice, disclaimer, and list of conditions. *
* *
* 4. Redistributions to others in binary form must reproduce the *
* copyright notice, disclaimer, and list of conditions in the *
* documentation and/or other materials provided with the *
* distribution. *
* *
* Agreed to on ______Feb. 15, 2017______________ *
* *
* By: ____University of California, Berkeley___ *
* ____Chenming Hu__________________________ *
* ____Professor in Graduate School ________ *
* *
****************************************************************************** */
/*
Licensed under Educational Community License, Version 2.0 (the "License"); you may
not use this file except in compliance with the License. You may obtain a copy of the license at
http://opensource.org/licenses/ECL-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations
under the License.
*/
#include "ngspice/ngspice.h"
#include "ngspice/cktdefs.h"

68
src/spicelib/devices/bsim4/b4ask.c
View File

@ -1,62 +1,30 @@
/* ******************************************************************************
* BSIM4 4.8.1 released by Chetan Kumar Dabhi 2/15/2017 *
* BSIM4 4.8.2 released by Chetan Kumar Dabhi 01/01/2020 *
* BSIM4 Model Equations *
******************************************************************************
******************************************************************************
* Copyright 2017 Regents of the University of California. *
* All rights reserved. *
* Copyright (c) 2020 University of California *
* *
* Project Director: Prof. Chenming Hu. *
* Current developers: Chetan Kumar Dabhi (Ph.D. student, IIT Kanpur) *
* Prof. Yogesh Chauhan (IIT Kanpur) *
* Dr. Pragya Kushwaha (Postdoc, UC Berkeley) *
* Dr. Avirup Dasgupta (Postdoc, UC Berkeley) *
* Ming-Yen Kao (Ph.D. student, UC Berkeley) *
* Authors: Gary W. Ng, Weidong Liu, Xuemei Xi, Mohan Dunga, Wenwei Yang *
* Ali Niknejad, Shivendra Singh Parihar, Chetan Kumar Dabhi *
* Yogesh Singh Chauhan, Sayeef Salahuddin, Chenming Hu *
******************************************************************************
* Ali Niknejad, Chetan Kumar Dabhi, Yogesh Singh Chauhan, *
* Sayeef Salahuddin, Chenming Hu *
******************************************************************************/
******************************************************************************
* CMC In-Code Statement *
* *
* The Developer agrees that the following statement will appear in the *
* model code that has been adopted as a CMC Standard. *
* *
* Software is distributed as is, completely without warranty or service *
* support. The University of California and its employees are not liable *
* for the condition or performance of the software. *
* *
* The University of California owns the copyright and grants users a *
* perpetual, irrevocable, worldwide, non-exclusive, royalty-free license *
* with respect to the software as set forth below. *
* *
* The University of California hereby disclaims all implied warranties. *
* *
* The University of California grants the users the right to modify, *
* copy, and redistribute the software and documentation, both within *
* the user's organization and externally, subject to the following *
* restrictions: *
* *
* 1. The users agree not to charge for the University of California code *
* itself but may charge for additions, extensions, or support. *
* *
* 2. In any product based on the software, the users agree to *
* acknowledge the University of California that developed the *
* software. This acknowledgment shall appear in the product *
* documentation. *
* *
* 3. Redistributions to others of source code and documentation must *
* retain the copyright notice, disclaimer, and list of conditions. *
* *
* 4. Redistributions to others in binary form must reproduce the *
* copyright notice, disclaimer, and list of conditions in the *
* documentation and/or other materials provided with the *
* distribution. *
* *
* Agreed to on ______Feb. 15, 2017______________ *
* *
* By: ____University of California, Berkeley___ *
* ____Chenming Hu__________________________ *
* ____Professor in Graduate School ________ *
* *
****************************************************************************** */
/*
Licensed under Educational Community License, Version 2.0 (the "License"); you may
not use this file except in compliance with the License. You may obtain a copy of the license at
http://opensource.org/licenses/ECL-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations
under the License.
*/
#include "ngspice/ngspice.h"
#include "ngspice/ifsim.h"

91
src/spicelib/devices/bsim4/b4check.c
View File

@ -1,65 +1,31 @@
/* ******************************************************************************
* BSIM4 4.8.1 released by Chetan Kumar Dabhi 2/15/2017 *
* BSIM4 4.8.2 released by Chetan Kumar Dabhi 01/01/2020 *
* BSIM4 Model Equations *
******************************************************************************
******************************************************************************
* Copyright 2017 Regents of the University of California. *
* All rights reserved. *
* Copyright (c) 2020 University of California *
* *
* Project Director: Prof. Chenming Hu. *
* Current developers: Chetan Kumar Dabhi (Ph.D. student, IIT Kanpur) *
* Prof. Yogesh Chauhan (IIT Kanpur) *
* Dr. Pragya Kushwaha (Postdoc, UC Berkeley) *
* Dr. Avirup Dasgupta (Postdoc, UC Berkeley) *
* Ming-Yen Kao (Ph.D. student, UC Berkeley) *
* Authors: Gary W. Ng, Weidong Liu, Xuemei Xi, Mohan Dunga, Wenwei Yang *
* Ali Niknejad, Shivendra Singh Parihar, Chetan Kumar Dabhi *
* Yogesh Singh Chauhan, Sayeef Salahuddin, Chenming Hu *
******************************************************************************
******************************************************************************
* CMC In-Code Statement *
* *
* The Developer agrees that the following statement will appear in the *
* model code that has been adopted as a CMC Standard. *
* *
* Software is distributed as is, completely without warranty or service *
* support. The University of California and its employees are not liable *
* for the condition or performance of the software. *
* *
* The University of California owns the copyright and grants users a *
* perpetual, irrevocable, worldwide, non-exclusive, royalty-free license *
* with respect to the software as set forth below. *
* *
* The University of California hereby disclaims all implied warranties. *
* *
* The University of California grants the users the right to modify, *
* copy, and redistribute the software and documentation, both within *
* the user's organization and externally, subject to the following *
* restrictions: *
* *
* 1. The users agree not to charge for the University of California code *
* itself but may charge for additions, extensions, or support. *
* *
* 2. In any product based on the software, the users agree to *
* acknowledge the University of California that developed the *
* software. This acknowledgment shall appear in the product *
* documentation. *
* *
* 3. Redistributions to others of source code and documentation must *
* retain the copyright notice, disclaimer, and list of conditions. *
* *
* 4. Redistributions to others in binary form must reproduce the *
* copyright notice, disclaimer, and list of conditions in the *
* documentation and/or other materials provided with the *
* distribution. *
* *
* Agreed to on ______Feb. 15, 2017______________ *
* *
* By: ____University of California, Berkeley___ *
* ____Chenming Hu__________________________ *
* ____Professor in Graduate School ________ *
* *
******************************************************************************
* Modified by Holger Vogt, 12/27/2020
* Ali Niknejad, Chetan Kumar Dabhi, Yogesh Singh Chauhan, *
* Sayeef Salahuddin, Chenming Hu *
******************************************************************************/
/*
Licensed under Educational Community License, Version 2.0 (the "License"); you may
not use this file except in compliance with the License. You may obtain a copy of the license at
http://opensource.org/licenses/ECL-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations
under the License.
*/
#include "ngspice/ngspice.h"
#include "ngspice/cktdefs.h"
#include "bsim4def.h"
@ -108,12 +74,13 @@ CKTcircuit *ckt)
wl->wl_next = NULL;
wl->wl_word = tprintf("\nChecking parameters for BSIM 4.8 model %s\n", model->BSIM4modName);
if ((strcmp(model->BSIM4version, "4.8.1")) && (strncmp(model->BSIM4version, "4.81", 4)) && (strncmp(model->BSIM4version, "4.8", 3)))
if ((strcmp(model->BSIM4version, "4.8.0")) && (strncmp(model->BSIM4version, "4.80", 4)) && (strncmp(model->BSIM4version, "4.8", 3)) &&
(strcmp(model->BSIM4version, "4.8.1")) && (strncmp(model->BSIM4version, "4.81", 4)))
{
printf("Warning: This model supports BSIM4 version 4.8\n");
printf("You specified a wrong version number. Working now with BSIM4.8.1\n");
printf("You specified a wrong version number. Working now with BSIM4.8.2\n");
wl_append_word(&wl, &wl, tprintf("Warning: This model supports BSIM4 version 4.8\n"));
wl_append_word(&wl, &wl, tprintf("You specified a wrong version number. Working now with BSIM4.8.1.\n"));
wl_append_word(&wl, &wl, tprintf("You specified a wrong version number. Working now with BSIM4.8.2.\n"));
}
if ((here->BSIM4rgateMod == 2) || (here->BSIM4rgateMod == 3))
@ -538,7 +505,11 @@ CKTcircuit *ckt)
{
wl_append_word(&wl, &wl, tprintf("Warning: Eta0 = %g is negative.\n", here->BSIM4eta0));
}
/* Check GIDL parameters */
if (model->BSIM4gidlclamp >= 0.0)
{
wl_append_word(&wl, &wl, tprintf("Warning: gidlclamp = %g is zero or positive.\n", model->BSIM4gidlclamp));
}
/* Check Abulk parameters */
if (fabs(1.0e-8 / (pParam->BSIM4b1 + pParam->BSIM4weff)) > 10.0)
{
@ -754,8 +725,14 @@ CKTcircuit *ckt)
if (model->BSIM4tnoiMod == 1){
wl_append_word(&wl, &wl, tprintf("Warning: TNOIMOD=1 is not supported and may be removed from future version.\n"));
}
if (model->BSIM4idovvdsc <= 0.0)
{
wl_append_word(&wl, &wl, tprintf("Warning: idovvdsc = %g is zero or negative.\n", model->BSIM4idovvdsc));
}
if ((strcmp(model->BSIM4version, "4.8.1")) && (strncmp(model->BSIM4version, "4.81", 4))) {
if ((strcmp(model->BSIM4version, "4.8.1")) && (strncmp(model->BSIM4version, "4.81", 4)) &&
(strcmp(model->BSIM4version, "4.8.2")) && (strncmp(model->BSIM4version, "4.82", 4)))
{ /* checking for version <= 4.8 */
/* v4.7 */
if (model->BSIM4tnoiMod == 1 || model->BSIM4tnoiMod == 2) {
if (model->BSIM4tnoia < 0.0)

68
src/spicelib/devices/bsim4/b4cvtest.c
View File

@ -1,62 +1,30 @@
/* ******************************************************************************
* BSIM4 4.8.1 released by Chetan Kumar Dabhi 2/15/2017 *
* BSIM4 4.8.2 released by Chetan Kumar Dabhi 01/01/2020 *
* BSIM4 Model Equations *
******************************************************************************
******************************************************************************
* Copyright 2017 Regents of the University of California. *
* All rights reserved. *
* Copyright (c) 2020 University of California *
* *
* Project Director: Prof. Chenming Hu. *
* Current developers: Chetan Kumar Dabhi (Ph.D. student, IIT Kanpur) *
* Prof. Yogesh Chauhan (IIT Kanpur) *
* Dr. Pragya Kushwaha (Postdoc, UC Berkeley) *
* Dr. Avirup Dasgupta (Postdoc, UC Berkeley) *
* Ming-Yen Kao (Ph.D. student, UC Berkeley) *
* Authors: Gary W. Ng, Weidong Liu, Xuemei Xi, Mohan Dunga, Wenwei Yang *
* Ali Niknejad, Shivendra Singh Parihar, Chetan Kumar Dabhi *
* Yogesh Singh Chauhan, Sayeef Salahuddin, Chenming Hu *
******************************************************************************
* Ali Niknejad, Chetan Kumar Dabhi, Yogesh Singh Chauhan, *
* Sayeef Salahuddin, Chenming Hu *
******************************************************************************/
******************************************************************************
* CMC In-Code Statement *
* *
* The Developer agrees that the following statement will appear in the *
* model code that has been adopted as a CMC Standard. *
* *
* Software is distributed as is, completely without warranty or service *
* support. The University of California and its employees are not liable *
* for the condition or performance of the software. *
* *
* The University of California owns the copyright and grants users a *
* perpetual, irrevocable, worldwide, non-exclusive, royalty-free license *
* with respect to the software as set forth below. *
* *
* The University of California hereby disclaims all implied warranties. *
* *
* The University of California grants the users the right to modify, *
* copy, and redistribute the software and documentation, both within *
* the user's organization and externally, subject to the following *
* restrictions: *
* *
* 1. The users agree not to charge for the University of California code *
* itself but may charge for additions, extensions, or support. *
* *
* 2. In any product based on the software, the users agree to *
* acknowledge the University of California that developed the *
* software. This acknowledgment shall appear in the product *
* documentation. *
* *
* 3. Redistributions to others of source code and documentation must *
* retain the copyright notice, disclaimer, and list of conditions. *
* *
* 4. Redistributions to others in binary form must reproduce the *
* copyright notice, disclaimer, and list of conditions in the *
* documentation and/or other materials provided with the *
* distribution. *
* *
* Agreed to on ______Feb. 15, 2017______________ *
* *
* By: ____University of California, Berkeley___ *
* ____Chenming Hu__________________________ *
* ____Professor in Graduate School ________ *
* *
****************************************************************************** */
/*
Licensed under Educational Community License, Version 2.0 (the "License"); you may
not use this file except in compliance with the License. You may obtain a copy of the license at
http://opensource.org/licenses/ECL-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations
under the License.
*/
#include "ngspice/ngspice.h"
#include "ngspice/cktdefs.h"

75
src/spicelib/devices/bsim4/b4geo.c
View File

@ -1,74 +1,35 @@
/* ******************************************************************************
* BSIM4 4.8.1 released by Chetan Kumar Dabhi 2/15/2017 *
* BSIM4 4.8.2 released by Chetan Kumar Dabhi 01/01/2020 *
* BSIM4 Model Equations *
******************************************************************************
******************************************************************************
* Copyright 2017 Regents of the University of California. *
* All rights reserved. *
* Copyright (c) 2020 University of California *
* *
* Project Director: Prof. Chenming Hu. *
* Current developers: Chetan Kumar Dabhi (Ph.D. student, IIT Kanpur) *
* Prof. Yogesh Chauhan (IIT Kanpur) *
* Dr. Pragya Kushwaha (Postdoc, UC Berkeley) *
* Dr. Avirup Dasgupta (Postdoc, UC Berkeley) *
* Ming-Yen Kao (Ph.D. student, UC Berkeley) *
* Authors: Gary W. Ng, Weidong Liu, Xuemei Xi, Mohan Dunga, Wenwei Yang *
* Ali Niknejad, Shivendra Singh Parihar, Chetan Kumar Dabhi *
* Yogesh Singh Chauhan, Sayeef Salahuddin, Chenming Hu *
******************************************************************************
* Ali Niknejad, Chetan Kumar Dabhi, Yogesh Singh Chauhan, *
* Sayeef Salahuddin, Chenming Hu *
******************************************************************************/
******************************************************************************
* CMC In-Code Statement *
* *
* The Developer agrees that the following statement will appear in the *
* model code that has been adopted as a CMC Standard. *
* *
* Software is distributed as is, completely without warranty or service *
* support. The University of California and its employees are not liable *
* for the condition or performance of the software. *
* *
* The University of California owns the copyright and grants users a *
* perpetual, irrevocable, worldwide, non-exclusive, royalty-free license *
* with respect to the software as set forth below. *
* *
* The University of California hereby disclaims all implied warranties. *
* *
* The University of California grants the users the right to modify, *
* copy, and redistribute the software and documentation, both within *
* the user's organization and externally, subject to the following *
* restrictions: *
* *
* 1. The users agree not to charge for the University of California code *
* itself but may charge for additions, extensions, or support. *
* *
* 2. In any product based on the software, the users agree to *
* acknowledge the University of California that developed the *
* software. This acknowledgment shall appear in the product *
* documentation. *
* *
* 3. Redistributions to others of source code and documentation must *
* retain the copyright notice, disclaimer, and list of conditions. *
* *
* 4. Redistributions to others in binary form must reproduce the *
* copyright notice, disclaimer, and list of conditions in the *
* documentation and/or other materials provided with the *
* distribution. *
* *
* Agreed to on ______Feb. 15, 2017______________ *
* *
* By: ____University of California, Berkeley___ *
* ____Chenming Hu__________________________ *
* ____Professor in Graduate School ________ *
* *
****************************************************************************** */
/*
Licensed under Educational Community License, Version 2.0 (the "License"); you may
not use this file except in compliance with the License. You may obtain a copy of the license at
http://opensource.org/licenses/ECL-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations
under the License.
*/
#include "ngspice/ngspice.h"
#include "bsim4def.h"
/*
* WDLiu:
* This subrutine is a special module to process the geometry dependent
* parasitics for BSIM4, which calculates Ps, Pd, As, Ad, and Rs and Rd
* for multi-fingers and varous GEO and RGEO options.
*/
static int
BSIM4NumFingerDiff(
double nf,

68
src/spicelib/devices/bsim4/b4getic.c
View File

@ -1,62 +1,30 @@
/* ******************************************************************************
* BSIM4 4.8.1 released by Chetan Kumar Dabhi 2/15/2017 *
* BSIM4 4.8.2 released by Chetan Kumar Dabhi 01/01/2020 *
* BSIM4 Model Equations *
******************************************************************************
******************************************************************************
* Copyright 2017 Regents of the University of California. *
* All rights reserved. *
* Copyright (c) 2020 University of California *
* *
* Project Director: Prof. Chenming Hu. *
* Current developers: Chetan Kumar Dabhi (Ph.D. student, IIT Kanpur) *
* Prof. Yogesh Chauhan (IIT Kanpur) *
* Dr. Pragya Kushwaha (Postdoc, UC Berkeley) *
* Dr. Avirup Dasgupta (Postdoc, UC Berkeley) *
* Ming-Yen Kao (Ph.D. student, UC Berkeley) *
* Authors: Gary W. Ng, Weidong Liu, Xuemei Xi, Mohan Dunga, Wenwei Yang *
* Ali Niknejad, Shivendra Singh Parihar, Chetan Kumar Dabhi *
* Yogesh Singh Chauhan, Sayeef Salahuddin, Chenming Hu *
******************************************************************************
* Ali Niknejad, Chetan Kumar Dabhi, Yogesh Singh Chauhan, *
* Sayeef Salahuddin, Chenming Hu *
******************************************************************************/
******************************************************************************
* CMC In-Code Statement *
* *
* The Developer agrees that the following statement will appear in the *
* model code that has been adopted as a CMC Standard. *
* *
* Software is distributed as is, completely without warranty or service *
* support. The University of California and its employees are not liable *
* for the condition or performance of the software. *
* *
* The University of California owns the copyright and grants users a *
* perpetual, irrevocable, worldwide, non-exclusive, royalty-free license *
* with respect to the software as set forth below. *
* *
* The University of California hereby disclaims all implied warranties. *
* *
* The University of California grants the users the right to modify, *
* copy, and redistribute the software and documentation, both within *
* the user's organization and externally, subject to the following *
* restrictions: *
* *
* 1. The users agree not to charge for the University of California code *
* itself but may charge for additions, extensions, or support. *
* *
* 2. In any product based on the software, the users agree to *
* acknowledge the University of California that developed the *
* software. This acknowledgment shall appear in the product *
* documentation. *
* *
* 3. Redistributions to others of source code and documentation must *
* retain the copyright notice, disclaimer, and list of conditions. *
* *
* 4. Redistributions to others in binary form must reproduce the *
* copyright notice, disclaimer, and list of conditions in the *
* documentation and/or other materials provided with the *
* distribution. *
* *
* Agreed to on ______Feb. 15, 2017______________ *
* *
* By: ____University of California, Berkeley___ *
* ____Chenming Hu__________________________ *
* ____Professor in Graduate School ________ *
* *
****************************************************************************** */
/*
Licensed under Educational Community License, Version 2.0 (the "License"); you may
not use this file except in compliance with the License. You may obtain a copy of the license at
http://opensource.org/licenses/ECL-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations
under the License.
*/
#include "ngspice/ngspice.h"
#include "ngspice/cktdefs.h"

76
src/spicelib/devices/bsim4/b4ld.c
View File

@ -1,62 +1,30 @@
/* ******************************************************************************
* BSIM4 4.8.1 released by Chetan Kumar Dabhi 2/15/2017 *
* BSIM4 4.8.2 released by Chetan Kumar Dabhi 01/01/2020 *
* BSIM4 Model Equations *
******************************************************************************
******************************************************************************
* Copyright 2017 Regents of the University of California. *
* All rights reserved. *
* Copyright (c) 2020 University of California *
* *
* Project Director: Prof. Chenming Hu. *
* Current developers: Chetan Kumar Dabhi (Ph.D. student, IIT Kanpur) *
* Prof. Yogesh Chauhan (IIT Kanpur) *
* Dr. Pragya Kushwaha (Postdoc, UC Berkeley) *
* Dr. Avirup Dasgupta (Postdoc, UC Berkeley) *
* Ming-Yen Kao (Ph.D. student, UC Berkeley) *
* Authors: Gary W. Ng, Weidong Liu, Xuemei Xi, Mohan Dunga, Wenwei Yang *
* Ali Niknejad, Shivendra Singh Parihar, Chetan Kumar Dabhi *
* Yogesh Singh Chauhan, Sayeef Salahuddin, Chenming Hu *
******************************************************************************
* Ali Niknejad, Chetan Kumar Dabhi, Yogesh Singh Chauhan, *
* Sayeef Salahuddin, Chenming Hu *
******************************************************************************/
******************************************************************************
* CMC In-Code Statement *
* *
* The Developer agrees that the following statement will appear in the *
* model code that has been adopted as a CMC Standard. *
* *
* Software is distributed as is, completely without warranty or service *
* support. The University of California and its employees are not liable *
* for the condition or performance of the software. *
* *
* The University of California owns the copyright and grants users a *
* perpetual, irrevocable, worldwide, non-exclusive, royalty-free license *
* with respect to the software as set forth below. *
* *
* The University of California hereby disclaims all implied warranties. *
* *
* The University of California grants the users the right to modify, *
* copy, and redistribute the software and documentation, both within *
* the user's organization and externally, subject to the following *
* restrictions: *
* *
* 1. The users agree not to charge for the University of California code *
* itself but may charge for additions, extensions, or support. *
* *
* 2. In any product based on the software, the users agree to *
* acknowledge the University of California that developed the *
* software. This acknowledgment shall appear in the product *
* documentation. *
* *
* 3. Redistributions to others of source code and documentation must *
* retain the copyright notice, disclaimer, and list of conditions. *
* *
* 4. Redistributions to others in binary form must reproduce the *
* copyright notice, disclaimer, and list of conditions in the *
* documentation and/or other materials provided with the *
* distribution. *
* *
* Agreed to on ______Feb. 15, 2017______________ *
* *
* By: ____University of California, Berkeley___ *
* ____Chenming Hu__________________________ *
* ____Professor in Graduate School ________ *
* *
****************************************************************************** */
/*
Licensed under Educational Community License, Version 2.0 (the "License"); you may
not use this file except in compliance with the License. You may obtain a copy of the license at
http://opensource.org/licenses/ECL-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations
under the License.
*/
/**** OpenMP support ngspice 06/28/2010 ****/
@ -2202,7 +2170,7 @@ for (; model != NULL; model = BSIM4nextModel(model))
here->BSIM4gm = Gm;
here->BSIM4gmbs = Gmb;
here->BSIM4IdovVds = Ids;
if( here->BSIM4IdovVds <= 1.0e-9) here->BSIM4IdovVds = 1.0e-9;
if( here->BSIM4IdovVds <= model->BSIM4idovvdsc) here->BSIM4IdovVds = model->BSIM4idovvdsc;
/* Calculate Rg */
if ((here->BSIM4rgateMod > 1) ||
@ -2452,6 +2420,9 @@ for (; model != NULL; model = BSIM4nextModel(model))
}
T4 = vbs - pParam->BSIM4fgisl;
/*--chetan dabhi solution for clamping T4-*/
if(T4 > model->BSIM4gidlclamp)
T4=model->BSIM4gidlclamp;
if (T4==0)
T5 = EXPL_THRESHOLD;
@ -2508,6 +2479,9 @@ for (; model != NULL; model = BSIM4nextModel(model))
Ggidlg = T3 * dT1_dVg;
}
T4 = vbd - pParam->BSIM4fgidl;
/*--chetan dabhi solution for clamping T4-*/
if(T4 > model->BSIM4gidlclamp)
T4=model->BSIM4gidlclamp;
if (T4==0)
T5 = EXPL_THRESHOLD;
else

74
src/spicelib/devices/bsim4/b4mask.c
View File

@ -1,62 +1,30 @@
/* ******************************************************************************
* BSIM4 4.8.1 released by Chetan Kumar Dabhi 2/15/2017 *
* BSIM4 4.8.2 released by Chetan Kumar Dabhi 01/01/2020 *
* BSIM4 Model Equations *
******************************************************************************
******************************************************************************
* Copyright 2017 Regents of the University of California. *
* All rights reserved. *
* Copyright (c) 2020 University of California *
* *
* Project Director: Prof. Chenming Hu. *
* Current developers: Chetan Kumar Dabhi (Ph.D. student, IIT Kanpur) *
* Prof. Yogesh Chauhan (IIT Kanpur) *
* Dr. Pragya Kushwaha (Postdoc, UC Berkeley) *
* Dr. Avirup Dasgupta (Postdoc, UC Berkeley) *
* Ming-Yen Kao (Ph.D. student, UC Berkeley) *
* Authors: Gary W. Ng, Weidong Liu, Xuemei Xi, Mohan Dunga, Wenwei Yang *
* Ali Niknejad, Shivendra Singh Parihar, Chetan Kumar Dabhi *
* Yogesh Singh Chauhan, Sayeef Salahuddin, Chenming Hu *
******************************************************************************
* Ali Niknejad, Chetan Kumar Dabhi, Yogesh Singh Chauhan, *
* Sayeef Salahuddin, Chenming Hu *
******************************************************************************/
******************************************************************************
* CMC In-Code Statement *
* *
* The Developer agrees that the following statement will appear in the *
* model code that has been adopted as a CMC Standard. *
* *
* Software is distributed as is, completely without warranty or service *
* support. The University of California and its employees are not liable *
* for the condition or performance of the software. *
* *
* The University of California owns the copyright and grants users a *
* perpetual, irrevocable, worldwide, non-exclusive, royalty-free license *
* with respect to the software as set forth below. *
* *
* The University of California hereby disclaims all implied warranties. *
* *
* The University of California grants the users the right to modify, *
* copy, and redistribute the software and documentation, both within *
* the user's organization and externally, subject to the following *
* restrictions: *
* *
* 1. The users agree not to charge for the University of California code *
* itself but may charge for additions, extensions, or support. *
* *
* 2. In any product based on the software, the users agree to *
* acknowledge the University of California that developed the *
* software. This acknowledgment shall appear in the product *
* documentation. *
* *
* 3. Redistributions to others of source code and documentation must *
* retain the copyright notice, disclaimer, and list of conditions. *
* *
* 4. Redistributions to others in binary form must reproduce the *
* copyright notice, disclaimer, and list of conditions in the *
* documentation and/or other materials provided with the *
* distribution. *
* *
* Agreed to on ______Feb. 15, 2017______________ *
* *
* By: ____University of California, Berkeley___ *
* ____Chenming Hu__________________________ *
* ____Professor in Graduate School ________ *
* *
****************************************************************************** */
/*
Licensed under Educational Community License, Version 2.0 (the "License"); you may
not use this file except in compliance with the License. You may obtain a copy of the license at
http://opensource.org/licenses/ECL-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations
under the License.
*/
#include "ngspice/ngspice.h"
#include "ngspice/ifsim.h"
@ -683,6 +651,12 @@ IFvalue *value)
case BSIM4_MOD_RNOIC:
value->rValue = model->BSIM4rnoic;
return(OK);
case BSIM4_MOD_GIDLCLAMP:
value->rValue = model->BSIM4gidlclamp;
return(OK);
case BSIM4_MOD_IDOVVDSC:
value->rValue = model->BSIM4idovvdsc;
return(OK);
case BSIM4_MOD_NTNOI:
value->rValue = model->BSIM4ntnoi;
return(OK);

68
src/spicelib/devices/bsim4/b4mdel.c
View File

@ -1,62 +1,30 @@
/* ******************************************************************************
* BSIM4 4.8.1 released by Chetan Kumar Dabhi 2/15/2017 *
* BSIM4 4.8.2 released by Chetan Kumar Dabhi 01/01/2020 *
* BSIM4 Model Equations *
******************************************************************************
******************************************************************************
* Copyright 2017 Regents of the University of California. *
* All rights reserved. *
* Copyright (c) 2020 University of California *
* *
* Project Director: Prof. Chenming Hu. *
* Current developers: Chetan Kumar Dabhi (Ph.D. student, IIT Kanpur) *
* Prof. Yogesh Chauhan (IIT Kanpur) *
* Dr. Pragya Kushwaha (Postdoc, UC Berkeley) *
* Dr. Avirup Dasgupta (Postdoc, UC Berkeley) *
* Ming-Yen Kao (Ph.D. student, UC Berkeley) *
* Authors: Gary W. Ng, Weidong Liu, Xuemei Xi, Mohan Dunga, Wenwei Yang *
* Ali Niknejad, Shivendra Singh Parihar, Chetan Kumar Dabhi *
* Yogesh Singh Chauhan, Sayeef Salahuddin, Chenming Hu *
******************************************************************************
* Ali Niknejad, Chetan Kumar Dabhi, Yogesh Singh Chauhan, *
* Sayeef Salahuddin, Chenming Hu *
******************************************************************************/
******************************************************************************
* CMC In-Code Statement *
* *
* The Developer agrees that the following statement will appear in the *
* model code that has been adopted as a CMC Standard. *
* *
* Software is distributed as is, completely without warranty or service *
* support. The University of California and its employees are not liable *
* for the condition or performance of the software. *
* *
* The University of California owns the copyright and grants users a *
* perpetual, irrevocable, worldwide, non-exclusive, royalty-free license *
* with respect to the software as set forth below. *
* *
* The University of California hereby disclaims all implied warranties. *
* *
* The University of California grants the users the right to modify, *
* copy, and redistribute the software and documentation, both within *
* the user's organization and externally, subject to the following *
* restrictions: *
* *
* 1. The users agree not to charge for the University of California code *
* itself but may charge for additions, extensions, or support. *
* *
* 2. In any product based on the software, the users agree to *
* acknowledge the University of California that developed the *
* software. This acknowledgment shall appear in the product *
* documentation. *
* *
* 3. Redistributions to others of source code and documentation must *
* retain the copyright notice, disclaimer, and list of conditions. *
* *
* 4. Redistributions to others in binary form must reproduce the *
* copyright notice, disclaimer, and list of conditions in the *
* documentation and/or other materials provided with the *
* distribution. *
* *
* Agreed to on ______Feb. 15, 2017______________ *
* *
* By: ____University of California, Berkeley___ *
* ____Chenming Hu__________________________ *
* ____Professor in Graduate School ________ *
* *
****************************************************************************** */
/*
Licensed under Educational Community License, Version 2.0 (the "License"); you may
not use this file except in compliance with the License. You may obtain a copy of the license at
http://opensource.org/licenses/ECL-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations
under the License.
*/
#include "ngspice/ngspice.h"
#include "bsim4def.h"

77
src/spicelib/devices/bsim4/b4mpar.c
View File

@ -1,62 +1,30 @@
/* ******************************************************************************
* BSIM4 4.8.1 released by Chetan Kumar Dabhi 2/15/2017 *
* BSIM4 4.8.2 released by Chetan Kumar Dabhi 01/01/2020 *
* BSIM4 Model Equations *
******************************************************************************
******************************************************************************
* Copyright 2017 Regents of the University of California. *
* All rights reserved. *
* Copyright (c) 2020 University of California *
* *
* Project Director: Prof. Chenming Hu. *
* Current developers: Chetan Kumar Dabhi (Ph.D. student, IIT Kanpur) *
* Prof. Yogesh Chauhan (IIT Kanpur) *
* Dr. Pragya Kushwaha (Postdoc, UC Berkeley) *
* Dr. Avirup Dasgupta (Postdoc, UC Berkeley) *
* Ming-Yen Kao (Ph.D. student, UC Berkeley) *
* Authors: Gary W. Ng, Weidong Liu, Xuemei Xi, Mohan Dunga, Wenwei Yang *
* Ali Niknejad, Shivendra Singh Parihar, Chetan Kumar Dabhi *
* Yogesh Singh Chauhan, Sayeef Salahuddin, Chenming Hu *
******************************************************************************
* Ali Niknejad, Chetan Kumar Dabhi, Yogesh Singh Chauhan, *
* Sayeef Salahuddin, Chenming Hu *
******************************************************************************/
******************************************************************************
* CMC In-Code Statement *
* *
* The Developer agrees that the following statement will appear in the *
* model code that has been adopted as a CMC Standard. *
* *
* Software is distributed as is, completely without warranty or service *
* support. The University of California and its employees are not liable *
* for the condition or performance of the software. *
* *
* The University of California owns the copyright and grants users a *
* perpetual, irrevocable, worldwide, non-exclusive, royalty-free license *
* with respect to the software as set forth below. *
* *
* The University of California hereby disclaims all implied warranties. *
* *
* The University of California grants the users the right to modify, *
* copy, and redistribute the software and documentation, both within *
* the user's organization and externally, subject to the following *
* restrictions: *
* *
* 1. The users agree not to charge for the University of California code *
* itself but may charge for additions, extensions, or support. *
* *
* 2. In any product based on the software, the users agree to *
* acknowledge the University of California that developed the *
* software. This acknowledgment shall appear in the product *
* documentation. *
* *
* 3. Redistributions to others of source code and documentation must *
* retain the copyright notice, disclaimer, and list of conditions. *
* *
* 4. Redistributions to others in binary form must reproduce the *
* copyright notice, disclaimer, and list of conditions in the *
* documentation and/or other materials provided with the *
* distribution. *
* *
* Agreed to on ______Feb. 15, 2017______________ *
* *
* By: ____University of California, Berkeley___ *
* ____Chenming Hu__________________________ *
* ____Professor in Graduate School ________ *
* *
****************************************************************************** */
/*
Licensed under Educational Community License, Version 2.0 (the "License"); you may
not use this file except in compliance with the License. You may obtain a copy of the license at
http://opensource.org/licenses/ECL-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations
under the License.
*/
#include "ngspice/ngspice.h"
#include "bsim4def.h"
@ -3640,6 +3608,15 @@ GENmodel *inMod)
mod->BSIM4kfGiven = TRUE;
break;
case BSIM4_MOD_GIDLCLAMP:
mod->BSIM4gidlclamp = value->rValue;
mod->BSIM4gidlclampGiven = TRUE;
break;
case BSIM4_MOD_IDOVVDSC:
mod->BSIM4idovvdsc = value->rValue;
mod->BSIM4idovvdscGiven = TRUE;
break;
case BSIM4_MOD_VGS_MAX:
mod->BSIM4vgsMax = value->rValue;
mod->BSIM4vgsMaxGiven = TRUE;

68
src/spicelib/devices/bsim4/b4noi.c
View File

@ -1,62 +1,30 @@
/* ******************************************************************************
* BSIM4 4.8.1 released by Chetan Kumar Dabhi 2/15/2017 *
* BSIM4 4.8.2 released by Chetan Kumar Dabhi 01/01/2020 *
* BSIM4 Model Equations *
******************************************************************************
******************************************************************************
* Copyright 2017 Regents of the University of California. *
* All rights reserved. *
* Copyright (c) 2020 University of California *
* *
* Project Director: Prof. Chenming Hu. *
* Current developers: Chetan Kumar Dabhi (Ph.D. student, IIT Kanpur) *
* Prof. Yogesh Chauhan (IIT Kanpur) *
* Dr. Pragya Kushwaha (Postdoc, UC Berkeley) *
* Dr. Avirup Dasgupta (Postdoc, UC Berkeley) *
* Ming-Yen Kao (Ph.D. student, UC Berkeley) *
* Authors: Gary W. Ng, Weidong Liu, Xuemei Xi, Mohan Dunga, Wenwei Yang *
* Ali Niknejad, Shivendra Singh Parihar, Chetan Kumar Dabhi *
* Yogesh Singh Chauhan, Sayeef Salahuddin, Chenming Hu *
******************************************************************************
* Ali Niknejad, Chetan Kumar Dabhi, Yogesh Singh Chauhan, *
* Sayeef Salahuddin, Chenming Hu *
******************************************************************************/
******************************************************************************
* CMC In-Code Statement *
* *
* The Developer agrees that the following statement will appear in the *
* model code that has been adopted as a CMC Standard. *
* *
* Software is distributed as is, completely without warranty or service *
* support. The University of California and its employees are not liable *
* for the condition or performance of the software. *
* *
* The University of California owns the copyright and grants users a *
* perpetual, irrevocable, worldwide, non-exclusive, royalty-free license *
* with respect to the software as set forth below. *
* *
* The University of California hereby disclaims all implied warranties. *
* *
* The University of California grants the users the right to modify, *
* copy, and redistribute the software and documentation, both within *
* the user's organization and externally, subject to the following *
* restrictions: *
* *
* 1. The users agree not to charge for the University of California code *
* itself but may charge for additions, extensions, or support. *
* *
* 2. In any product based on the software, the users agree to *
* acknowledge the University of California that developed the *
* software. This acknowledgment shall appear in the product *
* documentation. *
* *
* 3. Redistributions to others of source code and documentation must *
* retain the copyright notice, disclaimer, and list of conditions. *
* *
* 4. Redistributions to others in binary form must reproduce the *
* copyright notice, disclaimer, and list of conditions in the *
* documentation and/or other materials provided with the *
* distribution. *
* *
* Agreed to on ______Feb. 15, 2017______________ *
* *
* By: ____University of California, Berkeley___ *
* ____Chenming Hu__________________________ *
* ____Professor in Graduate School ________ *
* *
****************************************************************************** */
/*
Licensed under Educational Community License, Version 2.0 (the "License"); you may
not use this file except in compliance with the License. You may obtain a copy of the license at
http://opensource.org/licenses/ECL-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations
under the License.
*/
#include "ngspice/ngspice.h"
#include "bsim4def.h"

68
src/spicelib/devices/bsim4/b4par.c
View File

@ -1,62 +1,30 @@
/* ******************************************************************************
* BSIM4 4.8.1 released by Chetan Kumar Dabhi 2/15/2017 *
* BSIM4 4.8.2 released by Chetan Kumar Dabhi 01/01/2020 *
* BSIM4 Model Equations *
******************************************************************************
******************************************************************************
* Copyright 2017 Regents of the University of California. *
* All rights reserved. *
* Copyright (c) 2020 University of California *
* *
* Project Director: Prof. Chenming Hu. *
* Current developers: Chetan Kumar Dabhi (Ph.D. student, IIT Kanpur) *
* Prof. Yogesh Chauhan (IIT Kanpur) *
* Dr. Pragya Kushwaha (Postdoc, UC Berkeley) *
* Dr. Avirup Dasgupta (Postdoc, UC Berkeley) *
* Ming-Yen Kao (Ph.D. student, UC Berkeley) *
* Authors: Gary W. Ng, Weidong Liu, Xuemei Xi, Mohan Dunga, Wenwei Yang *
* Ali Niknejad, Shivendra Singh Parihar, Chetan Kumar Dabhi *
* Yogesh Singh Chauhan, Sayeef Salahuddin, Chenming Hu *
******************************************************************************
* Ali Niknejad, Chetan Kumar Dabhi, Yogesh Singh Chauhan, *
* Sayeef Salahuddin, Chenming Hu *
******************************************************************************/
******************************************************************************
* CMC In-Code Statement *
* *
* The Developer agrees that the following statement will appear in the *
* model code that has been adopted as a CMC Standard. *
* *
* Software is distributed as is, completely without warranty or service *
* support. The University of California and its employees are not liable *
* for the condition or performance of the software. *
* *
* The University of California owns the copyright and grants users a *
* perpetual, irrevocable, worldwide, non-exclusive, royalty-free license *
* with respect to the software as set forth below. *
* *
* The University of California hereby disclaims all implied warranties. *
* *
* The University of California grants the users the right to modify, *
* copy, and redistribute the software and documentation, both within *
* the user's organization and externally, subject to the following *
* restrictions: *
* *
* 1. The users agree not to charge for the University of California code *
* itself but may charge for additions, extensions, or support. *
* *
* 2. In any product based on the software, the users agree to *
* acknowledge the University of California that developed the *
* software. This acknowledgment shall appear in the product *
* documentation. *
* *
* 3. Redistributions to others of source code and documentation must *
* retain the copyright notice, disclaimer, and list of conditions. *
* *
* 4. Redistributions to others in binary form must reproduce the *
* copyright notice, disclaimer, and list of conditions in the *
* documentation and/or other materials provided with the *
* distribution. *
* *
* Agreed to on ______Feb. 15, 2017______________ *
* *
* By: ____University of California, Berkeley___ *
* ____Chenming Hu__________________________ *
* ____Professor in Graduate School ________ *
* *
****************************************************************************** */
/*
Licensed under Educational Community License, Version 2.0 (the "License"); you may
not use this file except in compliance with the License. You may obtain a copy of the license at
http://opensource.org/licenses/ECL-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations
under the License.
*/
#include "ngspice/ngspice.h"
#include "ngspice/ifsim.h"

68
src/spicelib/devices/bsim4/b4pzld.c
View File

@ -1,62 +1,30 @@
/* ******************************************************************************
* BSIM4 4.8.1 released by Chetan Kumar Dabhi 2/15/2017 *
* BSIM4 4.8.2 released by Chetan Kumar Dabhi 01/01/2020 *
* BSIM4 Model Equations *
******************************************************************************
******************************************************************************
* Copyright 2017 Regents of the University of California. *
* All rights reserved. *
* Copyright (c) 2020 University of California *
* *
* Project Director: Prof. Chenming Hu. *
* Current developers: Chetan Kumar Dabhi (Ph.D. student, IIT Kanpur) *
* Prof. Yogesh Chauhan (IIT Kanpur) *
* Dr. Pragya Kushwaha (Postdoc, UC Berkeley) *
* Dr. Avirup Dasgupta (Postdoc, UC Berkeley) *
* Ming-Yen Kao (Ph.D. student, UC Berkeley) *
* Authors: Gary W. Ng, Weidong Liu, Xuemei Xi, Mohan Dunga, Wenwei Yang *
* Ali Niknejad, Shivendra Singh Parihar, Chetan Kumar Dabhi *
* Yogesh Singh Chauhan, Sayeef Salahuddin, Chenming Hu *
******************************************************************************
* Ali Niknejad, Chetan Kumar Dabhi, Yogesh Singh Chauhan, *
* Sayeef Salahuddin, Chenming Hu *
******************************************************************************/
******************************************************************************
* CMC In-Code Statement *
* *
* The Developer agrees that the following statement will appear in the *
* model code that has been adopted as a CMC Standard. *
* *
* Software is distributed as is, completely without warranty or service *
* support. The University of California and its employees are not liable *
* for the condition or performance of the software. *
* *
* The University of California owns the copyright and grants users a *
* perpetual, irrevocable, worldwide, non-exclusive, royalty-free license *
* with respect to the software as set forth below. *
* *
* The University of California hereby disclaims all implied warranties. *
* *
* The University of California grants the users the right to modify, *
* copy, and redistribute the software and documentation, both within *
* the user's organization and externally, subject to the following *
* restrictions: *
* *
* 1. The users agree not to charge for the University of California code *
* itself but may charge for additions, extensions, or support. *
* *
* 2. In any product based on the software, the users agree to *
* acknowledge the University of California that developed the *
* software. This acknowledgment shall appear in the product *
* documentation. *
* *
* 3. Redistributions to others of source code and documentation must *
* retain the copyright notice, disclaimer, and list of conditions. *
* *
* 4. Redistributions to others in binary form must reproduce the *
* copyright notice, disclaimer, and list of conditions in the *
* documentation and/or other materials provided with the *
* distribution. *
* *
* Agreed to on ______Feb. 15, 2017______________ *
* *
* By: ____University of California, Berkeley___ *
* ____Chenming Hu__________________________ *
* ____Professor in Graduate School ________ *
* *
****************************************************************************** */
/*
Licensed under Educational Community License, Version 2.0 (the "License"); you may
not use this file except in compliance with the License. You may obtain a copy of the license at
http://opensource.org/licenses/ECL-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations
under the License.
*/
#include "ngspice/ngspice.h"
#include "ngspice/cktdefs.h"

84
src/spicelib/devices/bsim4/b4set.c
View File

@ -1,62 +1,30 @@
/* ******************************************************************************
* BSIM4 4.8.1 released by Chetan Kumar Dabhi 2/15/2017 *
* BSIM4 4.8.2 released by Chetan Kumar Dabhi 01/01/2020 *
* BSIM4 Model Equations *
******************************************************************************
******************************************************************************
* Copyright 2017 Regents of the University of California. *
* All rights reserved. *
* Copyright (c) 2020 University of California *
* *
* Project Director: Prof. Chenming Hu. *
* Current developers: Chetan Kumar Dabhi (Ph.D. student, IIT Kanpur) *
* Prof. Yogesh Chauhan (IIT Kanpur) *
* Dr. Pragya Kushwaha (Postdoc, UC Berkeley) *
* Dr. Avirup Dasgupta (Postdoc, UC Berkeley) *
* Ming-Yen Kao (Ph.D. student, UC Berkeley) *
* Authors: Gary W. Ng, Weidong Liu, Xuemei Xi, Mohan Dunga, Wenwei Yang *
* Ali Niknejad, Shivendra Singh Parihar, Chetan Kumar Dabhi *
* Yogesh Singh Chauhan, Sayeef Salahuddin, Chenming Hu *
******************************************************************************
* Ali Niknejad, Chetan Kumar Dabhi, Yogesh Singh Chauhan, *
* Sayeef Salahuddin, Chenming Hu *
******************************************************************************/
******************************************************************************
* CMC In-Code Statement *
* *
* The Developer agrees that the following statement will appear in the *
* model code that has been adopted as a CMC Standard. *
* *
* Software is distributed as is, completely without warranty or service *
* support. The University of California and its employees are not liable *
* for the condition or performance of the software. *
* *
* The University of California owns the copyright and grants users a *
* perpetual, irrevocable, worldwide, non-exclusive, royalty-free license *
* with respect to the software as set forth below. *
* *
* The University of California hereby disclaims all implied warranties. *
* *
* The University of California grants the users the right to modify, *
* copy, and redistribute the software and documentation, both within *
* the user's organization and externally, subject to the following *
* restrictions: *
* *
* 1. The users agree not to charge for the University of California code *
* itself but may charge for additions, extensions, or support. *
* *
* 2. In any product based on the software, the users agree to *
* acknowledge the University of California that developed the *
* software. This acknowledgment shall appear in the product *
* documentation. *
* *
* 3. Redistributions to others of source code and documentation must *
* retain the copyright notice, disclaimer, and list of conditions. *
* *
* 4. Redistributions to others in binary form must reproduce the *
* copyright notice, disclaimer, and list of conditions in the *
* documentation and/or other materials provided with the *
* distribution. *
* *
* Agreed to on ______Feb. 15, 2017______________ *
* *
* By: ____University of California, Berkeley___ *
* ____Chenming Hu__________________________ *
* ____Professor in Graduate School ________ *
* *
****************************************************************************** */
/*
Licensed under Educational Community License, Version 2.0 (the "License"); you may
not use this file except in compliance with the License. You may obtain a copy of the license at
http://opensource.org/licenses/ECL-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations
under the License.
*/
#include "ngspice/ngspice.h"
#include "ngspice/jobdefs.h"
@ -245,7 +213,7 @@ BSIM4instance **InstArray;
}
if (!model->BSIM4versionGiven)
model->BSIM4version = copy("4.8.1");
model->BSIM4version = copy("4.8.2");
if (!model->BSIM4toxrefGiven)
model->BSIM4toxref = 30.0e-10;
if (!model->BSIM4eotGiven)
@ -383,8 +351,9 @@ BSIM4instance **InstArray;
model->BSIM4eu = (model->BSIM4type == NMOS) ? 1.67 : 1.0;
if (!model->BSIM4ucsGiven)
model->BSIM4ucs = (model->BSIM4type == NMOS) ? 1.67 : 1.0;
if ((strcmp(model->BSIM4version, "4.8.1")) && (strncmp(model->BSIM4version, "4.81", 4)))
{
if ((strcmp(model->BSIM4version, "4.8.1")) && (strncmp(model->BSIM4version, "4.81", 4)) &&
(strcmp(model->BSIM4version, "4.8.2")) && (strncmp(model->BSIM4version, "4.82", 4)))
{ /* check only for version <= 4.80 */
if (!model->BSIM4uaGiven)
model->BSIM4ua = ((model->BSIM4mobMod == 2)) ? 1.0e-15 : 1.0e-9; /* unit m/V */
if (!model->BSIM4ucGiven)
@ -656,6 +625,10 @@ BSIM4instance **InstArray;
model->BSIM4rnoia = 0.577;
if (!model->BSIM4rnoibGiven)
model->BSIM4rnoib = 0.5164;
if (!model->BSIM4gidlclampGiven)
model->BSIM4gidlclamp = -1e-5;
if (!model->BSIM4idovvdscGiven)
model->BSIM4idovvdsc = 1e-9;
if (!model->BSIM4rnoicGiven)
model->BSIM4rnoic = 0.395;
if (!model->BSIM4ntnoiGiven)
@ -2039,15 +2012,10 @@ BSIM4instance **InstArray;
}
if (!model->BSIM4dwjGiven)
model->BSIM4dwj = model->BSIM4dwc;
if (!model->BSIM4cfGiven)
model->BSIM4cf = 2.0 * model->BSIM4epsrox * EPS0 / PI
* log(1.0 + 0.4e-6 / model->BSIM4toxe);
if (!model->BSIM4xpartGiven)
model->BSIM4xpart = 0.0;
if (!model->BSIM4sheetResistanceGiven)
model->BSIM4sheetResistance = 0.0;
if (!model->BSIM4SunitAreaJctCapGiven)
model->BSIM4SunitAreaJctCap = 5.0E-4;
if (!model->BSIM4DunitAreaJctCapGiven)

91
src/spicelib/devices/bsim4/b4temp.c
View File

@ -1,62 +1,30 @@
/* ******************************************************************************
* BSIM4 4.8.1 released by Chetan Kumar Dabhi 2/15/2017 *
* BSIM4 4.8.2 released by Chetan Kumar Dabhi 01/01/2020 *
* BSIM4 Model Equations *
******************************************************************************
******************************************************************************
* Copyright 2017 Regents of the University of California. *
* All rights reserved. *
* Copyright (c) 2020 University of California *
* *
* Project Director: Prof. Chenming Hu. *
* Current developers: Chetan Kumar Dabhi (Ph.D. student, IIT Kanpur) *
* Prof. Yogesh Chauhan (IIT Kanpur) *
* Dr. Pragya Kushwaha (Postdoc, UC Berkeley) *
* Dr. Avirup Dasgupta (Postdoc, UC Berkeley) *
* Ming-Yen Kao (Ph.D. student, UC Berkeley) *
* Authors: Gary W. Ng, Weidong Liu, Xuemei Xi, Mohan Dunga, Wenwei Yang *
* Ali Niknejad, Shivendra Singh Parihar, Chetan Kumar Dabhi *
* Yogesh Singh Chauhan, Sayeef Salahuddin, Chenming Hu *
******************************************************************************
* Ali Niknejad, Chetan Kumar Dabhi, Yogesh Singh Chauhan, *
* Sayeef Salahuddin, Chenming Hu *
******************************************************************************/
******************************************************************************
* CMC In-Code Statement *
* *
* The Developer agrees that the following statement will appear in the *
* model code that has been adopted as a CMC Standard. *
* *
* Software is distributed as is, completely without warranty or service *
* support. The University of California and its employees are not liable *
* for the condition or performance of the software. *
* *
* The University of California owns the copyright and grants users a *
* perpetual, irrevocable, worldwide, non-exclusive, royalty-free license *
* with respect to the software as set forth below. *
* *
* The University of California hereby disclaims all implied warranties. *
* *
* The University of California grants the users the right to modify, *
* copy, and redistribute the software and documentation, both within *
* the user's organization and externally, subject to the following *
* restrictions: *
* *
* 1. The users agree not to charge for the University of California code *
* itself but may charge for additions, extensions, or support. *
* *
* 2. In any product based on the software, the users agree to *
* acknowledge the University of California that developed the *
* software. This acknowledgment shall appear in the product *
* documentation. *
* *
* 3. Redistributions to others of source code and documentation must *
* retain the copyright notice, disclaimer, and list of conditions. *
* *
* 4. Redistributions to others in binary form must reproduce the *
* copyright notice, disclaimer, and list of conditions in the *
* documentation and/or other materials provided with the *
* distribution. *
* *
* Agreed to on ______Feb. 15, 2017______________ *
* *
* By: ____University of California, Berkeley___ *
* ____Chenming Hu__________________________ *
* ____Professor in Graduate School ________ *
* *
****************************************************************************** */
/*
Licensed under Educational Community License, Version 2.0 (the "License"); you may
not use this file except in compliance with the License. You may obtain a copy of the license at
http://opensource.org/licenses/ECL-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations
under the License.
*/
#include "ngspice/ngspice.h"
#include "ngspice/smpdefs.h"
@ -159,15 +127,21 @@ int Size_Not_Found, i;
if(model->BSIM4mtrlMod == 0)
{
if ((model->BSIM4toxeGiven) && (model->BSIM4toxpGiven) && (model->BSIM4dtoxGiven)
&& (model->BSIM4toxe != (model->BSIM4toxp + model->BSIM4dtox)))
printf("Warning: toxe, toxp and dtox all given and toxe != toxp + dtox; dtox ignored.\n");
&& (model->BSIM4toxe != (model->BSIM4toxp + model->BSIM4dtox)))
{ printf("Warning: toxe, toxp and dtox all given and toxe != toxp + dtox; dtox ignored.\n");
}
else if ((model->BSIM4toxeGiven) && (!model->BSIM4toxpGiven))
model->BSIM4toxp = model->BSIM4toxe - model->BSIM4dtox;
else if ((!model->BSIM4toxeGiven) && (model->BSIM4toxpGiven)){
model->BSIM4toxe = model->BSIM4toxp + model->BSIM4dtox;
if (!model->BSIM4toxmGiven) /* v4.7 */
{ model->BSIM4toxp = model->BSIM4toxe - model->BSIM4dtox;
}
else if ((!model->BSIM4toxeGiven) && (model->BSIM4toxpGiven))
{
model->BSIM4toxe = model->BSIM4toxp + model->BSIM4dtox;
if (!model->BSIM4toxmGiven) /* v4.7 */
model->BSIM4toxm = model->BSIM4toxe;
}
if (!model->BSIM4cfGiven) /* v4.8.2 */
model->BSIM4cf = 2.0 * model->BSIM4epsrox * EPS0 / PI
* log(1.0 + 0.4e-6 / model->BSIM4toxe);
}
else if(model->BSIM4mtrlCompatMod != 0) /* v4.7 */
{
@ -1392,7 +1366,8 @@ int Size_Not_Found, i;
pParam->BSIM4Aechvb = (model->BSIM4type == NMOS) ? 4.97232e-7 : 3.42537e-7;
pParam->BSIM4Bechvb = (model->BSIM4type == NMOS) ? 7.45669e11 : 1.16645e12;
if ((strcmp(model->BSIM4version, "4.8.1")) && (strncmp(model->BSIM4version, "4.81", 4)))
if ((strcmp(model->BSIM4version, "4.8.1")) && (strncmp(model->BSIM4version, "4.81", 4)) &&
(strcmp(model->BSIM4version, "4.8.2")) && (strncmp(model->BSIM4version, "4.82", 4)))
{
pParam->BSIM4AechvbEdgeS = pParam->BSIM4Aechvb * pParam->BSIM4weff
* model->BSIM4dlcig * pParam->BSIM4ToxRatioEdge;
@ -2408,7 +2383,7 @@ int Size_Not_Found, i;
if (BSIM4checkModel(model, here, ckt))
{
SPfrontEnd->IFerrorf(ERR_FATAL,
"detected during BSIM4.8.1 parameter checking for \n model %s of device instance %s\n", model->BSIM4modName, here->BSIM4name);
"detected during BSIM4.8.2 parameter checking for \n model %s of device instance %s\n", model->BSIM4modName, here->BSIM4name);
return(E_BADPARM);
}
} /* End instance */

68
src/spicelib/devices/bsim4/b4trunc.c
View File

@ -1,62 +1,30 @@
/* ******************************************************************************
* BSIM4 4.8.1 released by Chetan Kumar Dabhi 2/15/2017 *
* BSIM4 4.8.2 released by Chetan Kumar Dabhi 01/01/2020 *
* BSIM4 Model Equations *
******************************************************************************
******************************************************************************
* Copyright 2017 Regents of the University of California. *
* All rights reserved. *
* Copyright (c) 2020 University of California *
* *
* Project Director: Prof. Chenming Hu. *
* Current developers: Chetan Kumar Dabhi (Ph.D. student, IIT Kanpur) *
* Prof. Yogesh Chauhan (IIT Kanpur) *
* Dr. Pragya Kushwaha (Postdoc, UC Berkeley) *
* Dr. Avirup Dasgupta (Postdoc, UC Berkeley) *
* Ming-Yen Kao (Ph.D. student, UC Berkeley) *
* Authors: Gary W. Ng, Weidong Liu, Xuemei Xi, Mohan Dunga, Wenwei Yang *
* Ali Niknejad, Shivendra Singh Parihar, Chetan Kumar Dabhi *
* Yogesh Singh Chauhan, Sayeef Salahuddin, Chenming Hu *
******************************************************************************
* Ali Niknejad, Chetan Kumar Dabhi, Yogesh Singh Chauhan, *
* Sayeef Salahuddin, Chenming Hu *
******************************************************************************/
******************************************************************************
* CMC In-Code Statement *
* *
* The Developer agrees that the following statement will appear in the *
* model code that has been adopted as a CMC Standard. *
* *
* Software is distributed as is, completely without warranty or service *
* support. The University of California and its employees are not liable *
* for the condition or performance of the software. *
* *
* The University of California owns the copyright and grants users a *
* perpetual, irrevocable, worldwide, non-exclusive, royalty-free license *
* with respect to the software as set forth below. *
* *
* The University of California hereby disclaims all implied warranties. *
* *
* The University of California grants the users the right to modify, *
* copy, and redistribute the software and documentation, both within *
* the user's organization and externally, subject to the following *
* restrictions: *
* *
* 1. The users agree not to charge for the University of California code *
* itself but may charge for additions, extensions, or support. *
* *
* 2. In any product based on the software, the users agree to *
* acknowledge the University of California that developed the *
* software. This acknowledgment shall appear in the product *
* documentation. *
* *
* 3. Redistributions to others of source code and documentation must *
* retain the copyright notice, disclaimer, and list of conditions. *
* *
* 4. Redistributions to others in binary form must reproduce the *
* copyright notice, disclaimer, and list of conditions in the *
* documentation and/or other materials provided with the *
* distribution. *
* *
* Agreed to on ______Feb. 15, 2017______________ *
* *
* By: ____University of California, Berkeley___ *
* ____Chenming Hu__________________________ *
* ____Professor in Graduate School ________ *
* *
****************************************************************************** */
/*
Licensed under Educational Community License, Version 2.0 (the "License"); you may
not use this file except in compliance with the License. You may obtain a copy of the license at
http://opensource.org/licenses/ECL-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations
under the License.
*/
#include "ngspice/ngspice.h"
#include "ngspice/cktdefs.h"

78
src/spicelib/devices/bsim4/bsim4def.h
View File

@ -1,62 +1,30 @@
/* ******************************************************************************
* BSIM4 4.8.1 released by Chetan Kumar Dabhi 2/15/2017 *
* BSIM4 4.8.2 released by Chetan Kumar Dabhi 01/01/2020 *
* BSIM4 Model Equations *
******************************************************************************
******************************************************************************
* Copyright 2017 Regents of the University of California. *
* All rights reserved. *
* Copyright (c) 2020 University of California *
* *
* Project Director: Prof. Chenming Hu. *
* Current developers: Chetan Kumar Dabhi (Ph.D. student, IIT Kanpur) *
* Prof. Yogesh Chauhan (IIT Kanpur) *
* Dr. Pragya Kushwaha (Postdoc, UC Berkeley) *
* Dr. Avirup Dasgupta (Postdoc, UC Berkeley) *
* Ming-Yen Kao (Ph.D. student, UC Berkeley) *
* Authors: Gary W. Ng, Weidong Liu, Xuemei Xi, Mohan Dunga, Wenwei Yang *
* Ali Niknejad, Shivendra Singh Parihar, Chetan Kumar Dabhi *
* Yogesh Singh Chauhan, Sayeef Salahuddin, Chenming Hu *
******************************************************************************
* Ali Niknejad, Chetan Kumar Dabhi, Yogesh Singh Chauhan, *
* Sayeef Salahuddin, Chenming Hu *
******************************************************************************/
******************************************************************************
* CMC In-Code Statement *
* *
* The Developer agrees that the following statement will appear in the *
* model code that has been adopted as a CMC Standard. *
* *
* Software is distributed as is, completely without warranty or service *
* support. The University of California and its employees are not liable *
* for the condition or performance of the software. *
* *
* The University of California owns the copyright and grants users a *
* perpetual, irrevocable, worldwide, non-exclusive, royalty-free license *
* with respect to the software as set forth below. *
* *
* The University of California hereby disclaims all implied warranties. *
* *
* The University of California grants the users the right to modify, *
* copy, and redistribute the software and documentation, both within *
* the user's organization and externally, subject to the following *
* restrictions: *
* *
* 1. The users agree not to charge for the University of California code *
* itself but may charge for additions, extensions, or support. *
* *
* 2. In any product based on the software, the users agree to *
* acknowledge the University of California that developed the *
* software. This acknowledgment shall appear in the product *
* documentation. *
* *
* 3. Redistributions to others of source code and documentation must *
* retain the copyright notice, disclaimer, and list of conditions. *
* *
* 4. Redistributions to others in binary form must reproduce the *
* copyright notice, disclaimer, and list of conditions in the *
* documentation and/or other materials provided with the *
* distribution. *
* *
* Agreed to on ______Feb. 15, 2017______________ *
* *
* By: ____University of California, Berkeley___ *
* ____Chenming Hu__________________________ *
* ____Professor in Graduate School ________ *
* *
****************************************************************************** */
/*
Licensed under Educational Community License, Version 2.0 (the "License"); you may
not use this file except in compliance with the License. You may obtain a copy of the license at
http://opensource.org/licenses/ECL-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations
under the License.
*/
#ifndef BSIM4
#define BSIM4
@ -1831,7 +1799,8 @@ typedef struct sBSIM4model
double BSIM4vgbrMax;
double BSIM4vbsrMax;
double BSIM4vbdrMax;
double BSIM4gidlclamp;
double BSIM4idovvdsc;
struct bsim4SizeDependParam *pSizeDependParamKnot;
#ifdef USE_OMP
@ -2763,7 +2732,8 @@ typedef struct sBSIM4model
unsigned BSIM4pkvth0weGiven :1;
unsigned BSIM4pk2weGiven :1;
unsigned BSIM4pku0weGiven :1;
unsigned BSIM4gidlclampGiven :1;
unsigned BSIM4idovvdscGiven :1;
} BSIM4model;
@ -3816,6 +3786,10 @@ typedef struct sBSIM4model
/* tnoiMod=2 (v4.7) */
#define BSIM4_MOD_TNOIC 1272
#define BSIM4_MOD_RNOIC 1273
/* smoothing for gidl clamp (C.K.Dabhi) */
#define BSIM4_MOD_GIDLCLAMP 1274
/* Tuning for noise parameter BSIM4IdovVds (C.K.Dabhi) - request cadence */
#define BSIM4_MOD_IDOVVDSC 1275
#define BSIM4_MOD_VGS_MAX 1301
#define BSIM4_MOD_VGD_MAX 1302

68
src/spicelib/devices/bsim4/bsim4ext.h
View File

@ -1,62 +1,30 @@
/* ******************************************************************************
* BSIM4 4.8.1 released by Chetan Kumar Dabhi 2/15/2017 *
* BSIM4 4.8.2 released by Chetan Kumar Dabhi 01/01/2020 *
* BSIM4 Model Equations *
******************************************************************************
******************************************************************************
* Copyright 2017 Regents of the University of California. *
* All rights reserved. *
* Copyright (c) 2020 University of California *
* *
* Project Director: Prof. Chenming Hu. *
* Current developers: Chetan Kumar Dabhi (Ph.D. student, IIT Kanpur) *
* Prof. Yogesh Chauhan (IIT Kanpur) *
* Dr. Pragya Kushwaha (Postdoc, UC Berkeley) *
* Dr. Avirup Dasgupta (Postdoc, UC Berkeley) *
* Ming-Yen Kao (Ph.D. student, UC Berkeley) *
* Authors: Gary W. Ng, Weidong Liu, Xuemei Xi, Mohan Dunga, Wenwei Yang *
* Ali Niknejad, Shivendra Singh Parihar, Chetan Kumar Dabhi *
* Yogesh Singh Chauhan, Sayeef Salahuddin, Chenming Hu *
******************************************************************************
* Ali Niknejad, Chetan Kumar Dabhi, Yogesh Singh Chauhan, *
* Sayeef Salahuddin, Chenming Hu *
******************************************************************************/
******************************************************************************
* CMC In-Code Statement *
* *
* The Developer agrees that the following statement will appear in the *
* model code that has been adopted as a CMC Standard. *
* *
* Software is distributed as is, completely without warranty or service *
* support. The University of California and its employees are not liable *
* for the condition or performance of the software. *
* *
* The University of California owns the copyright and grants users a *
* perpetual, irrevocable, worldwide, non-exclusive, royalty-free license *
* with respect to the software as set forth below. *
* *
* The University of California hereby disclaims all implied warranties. *
* *
* The University of California grants the users the right to modify, *
* copy, and redistribute the software and documentation, both within *
* the user's organization and externally, subject to the following *
* restrictions: *
* *
* 1. The users agree not to charge for the University of California code *
* itself but may charge for additions, extensions, or support. *
* *
* 2. In any product based on the software, the users agree to *
* acknowledge the University of California that developed the *
* software. This acknowledgment shall appear in the product *
* documentation. *
* *
* 3. Redistributions to others of source code and documentation must *
* retain the copyright notice, disclaimer, and list of conditions. *
* *
* 4. Redistributions to others in binary form must reproduce the *
* copyright notice, disclaimer, and list of conditions in the *
* documentation and/or other materials provided with the *
* distribution. *
* *
* Agreed to on ______Feb. 15, 2017______________ *
* *
* By: ____University of California, Berkeley___ *
* ____Chenming Hu__________________________ *
* ____Professor in Graduate School ________ *
* *
****************************************************************************** */
/*
Licensed under Educational Community License, Version 2.0 (the "License"); you may
not use this file except in compliance with the License. You may obtain a copy of the license at
http://opensource.org/licenses/ECL-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations
under the License.
*/
extern int BSIM4acLoad(GENmodel *,CKTcircuit*);
extern int BSIM4ask(CKTcircuit *,GENinstance*,int,IFvalue*,IFvalue*);

68
src/spicelib/devices/bsim4/bsim4itf.h
View File

@ -1,62 +1,30 @@
/* ******************************************************************************
* BSIM4 4.8.1 released by Chetan Kumar Dabhi 2/15/2017 *
* BSIM4 4.8.2 released by Chetan Kumar Dabhi 01/01/2020 *
* BSIM4 Model Equations *
******************************************************************************
******************************************************************************
* Copyright 2017 Regents of the University of California. *
* All rights reserved. *
* Copyright (c) 2020 University of California *
* *
* Project Director: Prof. Chenming Hu. *
* Current developers: Chetan Kumar Dabhi (Ph.D. student, IIT Kanpur) *
* Prof. Yogesh Chauhan (IIT Kanpur) *
* Dr. Pragya Kushwaha (Postdoc, UC Berkeley) *
* Dr. Avirup Dasgupta (Postdoc, UC Berkeley) *
* Ming-Yen Kao (Ph.D. student, UC Berkeley) *
* Authors: Gary W. Ng, Weidong Liu, Xuemei Xi, Mohan Dunga, Wenwei Yang *
* Ali Niknejad, Shivendra Singh Parihar, Chetan Kumar Dabhi *
* Yogesh Singh Chauhan, Sayeef Salahuddin, Chenming Hu *
******************************************************************************
* Ali Niknejad, Chetan Kumar Dabhi, Yogesh Singh Chauhan, *
* Sayeef Salahuddin, Chenming Hu *
******************************************************************************/
******************************************************************************
* CMC In-Code Statement *
* *
* The Developer agrees that the following statement will appear in the *
* model code that has been adopted as a CMC Standard. *
* *
* Software is distributed as is, completely without warranty or service *
* support. The University of California and its employees are not liable *
* for the condition or performance of the software. *
* *
* The University of California owns the copyright and grants users a *
* perpetual, irrevocable, worldwide, non-exclusive, royalty-free license *
* with respect to the software as set forth below. *
* *
* The University of California hereby disclaims all implied warranties. *
* *
* The University of California grants the users the right to modify, *
* copy, and redistribute the software and documentation, both within *
* the user's organization and externally, subject to the following *
* restrictions: *
* *
* 1. The users agree not to charge for the University of California code *
* itself but may charge for additions, extensions, or support. *
* *
* 2. In any product based on the software, the users agree to *
* acknowledge the University of California that developed the *
* software. This acknowledgment shall appear in the product *
* documentation. *
* *
* 3. Redistributions to others of source code and documentation must *
* retain the copyright notice, disclaimer, and list of conditions. *
* *
* 4. Redistributions to others in binary form must reproduce the *
* copyright notice, disclaimer, and list of conditions in the *
* documentation and/or other materials provided with the *
* distribution. *
* *
* Agreed to on ______Feb. 15, 2017______________ *
* *
* By: ____University of California, Berkeley___ *
* ____Chenming Hu__________________________ *
* ____Professor in Graduate School ________ *
* *
****************************************************************************** */
/*
Licensed under Educational Community License, Version 2.0 (the "License"); you may
not use this file except in compliance with the License. You may obtain a copy of the license at
http://opensource.org/licenses/ECL-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations
under the License.
*/
#ifndef DEV_BSIM4
#define DEV_BSIM4

23
src/spinit.in
View File

@ -13,8 +13,11 @@ set x11lineararcs
** default (if compiled with --enable-openmp) is: 2
*set num_threads=4
strcmp __flag $program "ngspice"
if $__flag = 0
* comment out if central osdi management is set up
unset osdi_enabled
* Load the codemodels
if $?xspice_enabled
@XSPICEINIT@ codemodel @pkglibdir@/spice2poly.cm
@XSPICEINIT@ codemodel @pkglibdir@/analog.cm
@ -24,4 +27,18 @@ if $__flag = 0
@XSPICEINIT@ codemodel @pkglibdir@/table.cm
end
unset __flag
* Load the OpenVAF/OSDI models
if $?osdi_enabled
osdi @pkglibdir@/asmhemt.osdi
osdi @pkglibdir@/bjt504t.osdi
osdi @pkglibdir@/BSIMBULK107.osdi
osdi @pkglibdir@/BSIMCMG.osdi
osdi @pkglibdir@/HICUMl0-2.0.osdi
osdi @pkglibdir@/psp103.osdi
osdi @pkglibdir@/r2_cmc.osdi
osdi @pkglibdir@/vbic_4T_et_cf.osdi
end

22
visualc/spinit_all
View File

@ -14,8 +14,11 @@ set filetype=ascii
set num_threads=4
set interactive
strcmp __flag $program "ngspice"
if $__flag = 0
* comment out if central osdi management is set up
unset osdi_enabled
* Load the codemodels
if $?xspice_enabled
* Load the codemodels
codemodel ../lib/ngspice/spice2poly.cm
@ -26,4 +29,17 @@ if $__flag = 0
codemodel ../lib/ngspice/table.cm
end
unset __flag
* Load the OpenVAF/OSDI models
if $?osdi_enabled
osdi ../lib/ngspice/asmhemt.osdi
osdi ../lib/ngspice/bjt504t.osdi
osdi ../lib/ngspice/BSIMBULK107.osdi
osdi ../lib/ngspice/BSIMCMG.osdi
osdi ../lib/ngspice/HICUMl0-2.0.osdi
osdi ../lib/ngspice/psp103.osdi
osdi ../lib/ngspice/r2_cmc.osdi
osdi ../lib/ngspice/vbic_4T_et_cf.osdi
end

22
visualc/spinitd
View File

@ -14,8 +14,11 @@ set filetype=ascii
set num_threads=8
*set interactive
strcmp __flag $program "ngspice"
if $__flag = 0
* comment out if central osdi management is set up
unset osdi_enabled
* Load the codemodels
if $?xspice_enabled
* Load the codemodels
codemodel C:/Spiced/lib/ngspice/spice2poly.cm
@ -27,4 +30,17 @@ if $__flag = 0
end
unset __flag
* Load the OpenVAF/OSDI models
if $?osdi_enabled
osdi C:/Spiced/lib/ngspice/asmhemt.osdi
osdi C:/Spiced/lib/ngspice/bjt504t.osdi
osdi C:/Spiced/lib/ngspice/BSIMBULK107.osdi
osdi C:/Spiced/lib/ngspice/BSIMCMG.osdi
osdi C:/Spiced/lib/ngspice/HICUMl0-2.0.osdi
osdi C:/Spiced/lib/ngspice/psp103.osdi
osdi C:/Spiced/lib/ngspice/r2_cmc.osdi
osdi C:/Spiced/lib/ngspice/vbic_4T_et_cf.osdi
end

22
visualc/spinitd64
View File

@ -14,8 +14,11 @@ set filetype=ascii
set num_threads=4
set interactive
strcmp __flag $program "ngspice"
if $__flag = 0
* comment out if central osdi management is set up
unset osdi_enabled
* Load the codemodels
if $?xspice_enabled
* Load the codemodels
codemodel C:/Spice64d/lib/ngspice/spice2poly.cm
@ -27,4 +30,17 @@ if $__flag = 0
end
unset __flag
* Load the OpenVAF/OSDI models
if $?osdi_enabled
osdi C:/Spice64d/lib/ngspice/asmhemt.osdi
osdi C:/Spice64d/lib/ngspice/bjt504t.osdi
osdi C:/Spice64d/lib/ngspice/BSIMBULK107.osdi
osdi C:/Spice64d/lib/ngspice/BSIMCMG.osdi
osdi C:/Spice64d/lib/ngspice/HICUMl0-2.0.osdi
osdi C:/Spice64d/lib/ngspice/psp103.osdi
osdi C:/Spice64d/lib/ngspice/r2_cmc.osdi
osdi C:/Spice64d/lib/ngspice/vbic_4T_et_cf.osdi
end

23
visualc/spinitr
View File

@ -14,8 +14,11 @@ set filetype=ascii
set num_threads=8
*set interactive
strcmp __flag $program "ngspice"
if $__flag = 0
* comment out if central osdi management is set up
unset osdi_enabled
* Load the codemodels
if $?xspice_enabled
* Load the codemodels
codemodel C:/Spice/lib/ngspice/spice2poly.cm
@ -25,6 +28,18 @@ if $__flag = 0
codemodel C:/Spice/lib/ngspice/xtraevt.cm
codemodel C:/Spice/lib/ngspice/table.cm
end
unset __flag
* Load the OpenVAF/OSDI models
if $?osdi_enabled
osdi C:/Spice/lib/ngspice/asmhemt.osdi
osdi C:/Spice/lib/ngspice/bjt504t.osdi
osdi C:/Spice/lib/ngspice/BSIMBULK107.osdi
osdi C:/Spice/lib/ngspice/BSIMCMG.osdi
osdi C:/Spice/lib/ngspice/HICUMl0-2.0.osdi
osdi C:/Spice/lib/ngspice/psp103.osdi
osdi C:/Spice/lib/ngspice/r2_cmc.osdi
osdi C:/Spice/lib/ngspice/vbic_4T_et_cf.osdi
end

22
visualc/spinitr64
View File

@ -14,8 +14,11 @@ set filetype=ascii
set num_threads=8
*set interactive
strcmp __flag $program "ngspice"
if $__flag = 0
* comment out if central osdi management is set up
unset osdi_enabled
* Load the codemodels
if $?xspice_enabled
* Load the codemodels
codemodel C:/Spice64/lib/ngspice/spice2poly.cm
@ -27,4 +30,17 @@ if $__flag = 0
end
unset __flag
* Load the OpenVAF/OSDI models
if $?osdi_enabled
osdi C:/Spice64/lib/ngspice/asmhemt.osdi
osdi C:/Spice64/lib/ngspice/bjt504t.osdi
osdi C:/Spice64/lib/ngspice/BSIMBULK107.osdi
osdi C:/Spice64/lib/ngspice/BSIMCMG.osdi
osdi C:/Spice64/lib/ngspice/HICUMl0-2.0.osdi
osdi C:/Spice64/lib/ngspice/psp103.osdi
osdi C:/Spice64/lib/ngspice/r2_cmc.osdi
osdi C:/Spice64/lib/ngspice/vbic_4T_et_cf.osdi
end