Fix the source/drain typo for overlap cap's
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@ -195,7 +195,7 @@ MOS1ask(CKTcircuit *ckt, GENinstance *inst, int which, IFvalue *value,
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case MOS1_CAPGD:
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value->rValue = 2* *(ckt->CKTstate0 + here->MOS1capgd);
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/* add overlap capacitance */
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value->rValue += (here->sMOS1modPtr->MOS1gateSourceOverlapCapFactor)
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value->rValue += (here->sMOS1modPtr->MOS1gateDrainOverlapCapFactor)
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* here->MOS1m
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* (here->MOS1w);
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return(OK);
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