Fix the source/drain typo for overlap cap's

This commit is contained in:
dwarning 2011-10-30 21:03:38 +00:00
parent bcfbad5659
commit 304417112b
1 changed files with 1 additions and 1 deletions

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@ -195,7 +195,7 @@ MOS1ask(CKTcircuit *ckt, GENinstance *inst, int which, IFvalue *value,
case MOS1_CAPGD:
value->rValue = 2* *(ckt->CKTstate0 + here->MOS1capgd);
/* add overlap capacitance */
value->rValue += (here->sMOS1modPtr->MOS1gateSourceOverlapCapFactor)
value->rValue += (here->sMOS1modPtr->MOS1gateDrainOverlapCapFactor)
* here->MOS1m
* (here->MOS1w);
return(OK);