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Prototype of LnNL check per instance, so that VSRC can be Static or Dynamic depending on which model is used (part 1)

This commit is contained in:
Francesco Lannutti 2020-06-22 01:37:09 +02:00
parent 048c337d85
commit 2af49ca9f0
15 changed files with 246 additions and 46 deletions
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2
src/include/ngspice/cktdefs.h
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@ -308,6 +308,8 @@ struct CKTcircuit {
#ifdef KLU
unsigned int CKTkluMODE:1;
unsigned int CKTlinearModelsRequested : 1 ;
unsigned int CKTlinearStaticModelsRequested : 1 ;
#endif
};

25
src/spicelib/analysis/cktload.c
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@ -40,11 +40,11 @@ CKTloadLinearStatic (CKTcircuit *ckt)
for (i = 0 ; i <= ckt->CKTmatrix->CKTkluN ; i++)
ckt->CKTrhs_LinearStatic [i] = 0 ;
ckt->CKTlinearModelsRequested = 1 ;
ckt->CKTlinearStaticModelsRequested = 1 ;
for (i = 0; i < DEVmaxnum; i++)
{
if (DEVices[i] && DEVices[i]->DEVload && ckt->CKThead [i] &&
DEVices[i]->DEVisLinear && (*DEVices[i]->DEVisLinear) &&
DEVices[i]->DEVisLinearStatic && (*DEVices[i]->DEVisLinearStatic))
if (DEVices[i] && DEVices[i]->DEVload && ckt->CKThead [i])
{
error = DEVices[i]->DEVload (ckt->CKThead [i], ckt) ;
@ -67,11 +67,11 @@ CKTloadLinearDynamic (CKTcircuit *ckt)
for (i = 0 ; i <= ckt->CKTmatrix->CKTkluN ; i++)
ckt->CKTrhs_LinearDynamic [i] = 0 ;
ckt->CKTlinearModelsRequested = 1 ;
ckt->CKTlinearStaticModelsRequested = 0 ;
for (i = 0; i < DEVmaxnum; i++)
{
if (DEVices[i] && DEVices[i]->DEVload && ckt->CKThead [i] &&
DEVices[i]->DEVisLinear && (*DEVices[i]->DEVisLinear) &&
DEVices[i]->DEVisLinearStatic && !(*DEVices[i]->DEVisLinearStatic))
if (DEVices[i] && DEVices[i]->DEVload && ckt->CKThead [i])
{
error = DEVices[i]->DEVload (ckt->CKThead [i], ckt) ;
@ -130,16 +130,15 @@ CKTload(CKTcircuit *ckt)
noncon = ckt->CKTnoncon;
#endif /* STEPDEBUG */
for (i = 0; i < DEVmaxnum; i++) {
/* Francesco Lannutti */
#ifdef KLU
if (DEVices[i] && DEVices[i]->DEVload && ckt->CKThead[i] &&
((DEVices[i]->DEVisLinear && !(*DEVices[i]->DEVisLinear)) || !(DEVices[i]->DEVisLinear))) {
#else
if (DEVices[i] && DEVices[i]->DEVload && ckt->CKThead[i]) {
/* Francesco Lannutti */
ckt->CKTlinearModelsRequested = 0 ;
ckt->CKTlinearStaticModelsRequested = 0 ;
#endif
for (i = 0; i < DEVmaxnum; i++) {
if (DEVices[i] && DEVices[i]->DEVload && ckt->CKThead[i]) {
error = DEVices[i]->DEVload (ckt->CKThead[i], ckt);
if (ckt->CKTnoncon)
ckt->CKTtroubleNode = 0;

13
src/spicelib/devices/bsim4v7/b4v7ld.c
View File

@ -249,7 +249,13 @@ ChargeComputationNeeded =
#ifndef USE_OMP
for (; model != NULL; model = BSIM4v7nextModel(model))
{ for (here = BSIM4v7instances(model); here != NULL;
{
#ifdef KLU
if ((model->BSIM4v7isLinear == ckt->CKTlinearModelsRequested) && (model->BSIM4v7isLinearStatic == ckt->CKTlinearStaticModelsRequested)) {
#endif
for (here = BSIM4v7instances(model); here != NULL;
here = BSIM4v7nextInstance(here))
{
#endif
@ -5312,6 +5318,11 @@ line1000: ;
#ifndef USE_OMP
} /* End of MOSFET Instance */
#ifdef KLU
}
#endif
} /* End of Model Instance */
#endif

9
src/spicelib/devices/bsim4v7/b4v7set.c
View File

@ -73,7 +73,14 @@ BSIM4v7instance **InstArray;
/* loop through all the BSIM4v7 device models */
for( ; model != NULL; model = BSIM4v7nextModel(model))
{ /* process defaults of model parameters */
{
#ifdef KLU
model->BSIM4v7isLinear = 0 ;
model->BSIM4v7isLinearStatic = 0 ;
#endif
/* process defaults of model parameters */
if (!model->BSIM4v7typeGiven)
model->BSIM4v7type = NMOS;

4
src/spicelib/devices/bsim4v7/bsim4v7def.h
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@ -2791,6 +2791,10 @@ typedef struct sBSIM4v7model
unsigned BSIM4v7pk2weGiven :1;
unsigned BSIM4v7pku0weGiven :1;
#ifdef KLU
unsigned int BSIM4v7isLinear : 1 ;
unsigned int BSIM4v7isLinearStatic : 1 ;
#endif
} BSIM4v7model;

5
src/spicelib/devices/cap/capdefs.h
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@ -120,6 +120,11 @@ typedef struct sCAPmodel { /* model structure for a capacitor */
unsigned CAPthickGiven : 1; /* flags indicates insulator thickness given */
unsigned CAPbv_maxGiven : 1; /* flags indicates maximum voltage is given */
#ifdef KLU
unsigned int CAPisLinear : 1 ;
unsigned int CAPisLinearStatic : 1 ;
#endif
} CAPmodel;
/* device parameters */

9
src/spicelib/devices/cap/capload.c
View File

@ -37,6 +37,10 @@ CAPload(GENmodel *inModel, CKTcircuit *ckt)
/* loop through all the capacitor models */
for( ; model != NULL; model = CAPnextModel(model)) {
#ifdef KLU
if ((model->CAPisLinear == ckt->CKTlinearModelsRequested) && (model->CAPisLinearStatic == ckt->CKTlinearStaticModelsRequested)) {
#endif
/* loop through all the instances of the model */
for (here = CAPinstances(model); here != NULL ;
here=CAPnextInstance(here)) {
@ -80,6 +84,11 @@ CAPload(GENmodel *inModel, CKTcircuit *ckt)
} else
*(ckt->CKTstate0+here->CAPqcap) = here->CAPcapac * vcap;
}
#ifdef KLU
}
#endif
}
}
return(OK);

5
src/spicelib/devices/cap/capsetup.c
View File

@ -27,6 +27,11 @@ CAPsetup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *states)
/* loop through all the capacitor models */
for( ; model != NULL; model = CAPnextModel(model)) {
#ifdef KLU
model->CAPisLinear = 1 ;
model->CAPisLinearStatic = 0 ;
#endif
/*Default Value Processing for Model Parameters */
if (!model->CAPmCapGiven) {
model->CAPmCap = 0.0;

6
src/spicelib/devices/res/resdefs.h
View File

@ -141,6 +141,12 @@ typedef struct sRESmodel { /* model structure for a resistor */
unsigned RESlfGiven :1; /* flags indicates lf is given */
unsigned RESwfGiven :1; /* flags indicates wf is given */
unsigned RESefGiven :1; /* flags indicates ef is given */
#ifdef KLU
unsigned int RESisLinear : 1 ;
unsigned int RESisLinearStatic : 1 ;
#endif
} RESmodel;
/* device parameters */

10
src/spicelib/devices/res/resload.c
View File

@ -19,6 +19,11 @@ RESload(GENmodel *inModel, CKTcircuit *ckt)
/* loop through all the resistor models */
for( ; model != NULL; model = RESnextModel(model)) {
#ifdef KLU
if ((model->RESisLinear == ckt->CKTlinearModelsRequested) && (model->RESisLinearStatic == ckt->CKTlinearStaticModelsRequested)) {
#endif
RESinstance *here;
/* loop through all the instances of the model */
@ -33,6 +38,11 @@ RESload(GENmodel *inModel, CKTcircuit *ckt)
*(here->RESposNegPtr) -= here->RESconduct;
*(here->RESnegPosPtr) -= here->RESconduct;
}
#ifdef KLU
}
#endif
}
return(OK);
}

5
src/spicelib/devices/res/ressetup.c
View File

@ -25,6 +25,11 @@ RESsetup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit*ckt, int *state)
/* loop through all the resistor models */
for( ; model != NULL; model = RESnextModel(model)) {
#ifdef KLU
model->RESisLinear = 1 ;
model->RESisLinearStatic = 1 ;
#endif
/* Default Value Processing for Resistor Models */
if(!model->REStnomGiven) model->REStnom = ckt->CKTnomTemp;
if(!model->RESsheetResGiven) model->RESsheetRes = 0.0;

109
src/spicelib/devices/vsrc/vsrcbindCSC.c
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@ -39,20 +39,39 @@ VSRCbindCSC (GENmodel *inModel, CKTcircuit *ckt)
/* loop through all the instances of the model */
for (here = VSRCinstances(model); here != NULL ; here = VSRCnextInstance(here))
{
CREATE_KLU_BINDING_TABLE_DYNAMIC(VSRCposIbrPtr, VSRCposIbrBinding, VSRCposNode, VSRCbranch);
CREATE_KLU_BINDING_TABLE_DYNAMIC(VSRCnegIbrPtr, VSRCnegIbrBinding, VSRCnegNode, VSRCbranch);
CREATE_KLU_BINDING_TABLE_DYNAMIC(VSRCibrNegPtr, VSRCibrNegBinding, VSRCbranch, VSRCnegNode);
CREATE_KLU_BINDING_TABLE_DYNAMIC(VSRCibrPosPtr, VSRCibrPosBinding, VSRCbranch, VSRCposNode);
if ((here->VSRCisLinear == 1) && (here->VSRCisLinearStatic == 1)) {
CREATE_KLU_BINDING_TABLE_STATIC(VSRCposIbrPtr, VSRCposIbrBinding, VSRCposNode, VSRCbranch);
CREATE_KLU_BINDING_TABLE_STATIC(VSRCnegIbrPtr, VSRCnegIbrBinding, VSRCnegNode, VSRCbranch);
CREATE_KLU_BINDING_TABLE_STATIC(VSRCibrNegPtr, VSRCibrNegBinding, VSRCbranch, VSRCnegNode);
CREATE_KLU_BINDING_TABLE_STATIC(VSRCibrPosPtr, VSRCibrPosBinding, VSRCbranch, VSRCposNode);
/* Pole-Zero Analysis */
if (here->VSRCibrIbrPtr)
{
i = here->VSRCibrIbrPtr ;
matched = (BindElement *) bsearch (&i, BindStruct, nz, sizeof(BindElement), BindCompare) ;
here->VSRCibrIbrBinding = matched ;
if (matched != NULL)
/* Pole-Zero Analysis */
if (here->VSRCibrIbrPtr)
{
here->VSRCibrIbrPtr = matched->CSC_LinearDynamic ;
i = here->VSRCibrIbrPtr ;
matched = (BindElement *) bsearch (&i, BindStruct, nz, sizeof(BindElement), BindCompare) ;
here->VSRCibrIbrBinding = matched ;
if (matched != NULL)
{
here->VSRCibrIbrPtr = matched->CSC_LinearStatic ;
}
}
} else if ((here->VSRCisLinear == 1) && (here->VSRCisLinearStatic == 0)) {
CREATE_KLU_BINDING_TABLE_DYNAMIC(VSRCposIbrPtr, VSRCposIbrBinding, VSRCposNode, VSRCbranch);
CREATE_KLU_BINDING_TABLE_DYNAMIC(VSRCnegIbrPtr, VSRCnegIbrBinding, VSRCnegNode, VSRCbranch);
CREATE_KLU_BINDING_TABLE_DYNAMIC(VSRCibrNegPtr, VSRCibrNegBinding, VSRCbranch, VSRCnegNode);
CREATE_KLU_BINDING_TABLE_DYNAMIC(VSRCibrPosPtr, VSRCibrPosBinding, VSRCbranch, VSRCposNode);
/* Pole-Zero Analysis */
if (here->VSRCibrIbrPtr)
{
i = here->VSRCibrIbrPtr ;
matched = (BindElement *) bsearch (&i, BindStruct, nz, sizeof(BindElement), BindCompare) ;
here->VSRCibrIbrBinding = matched ;
if (matched != NULL)
{
here->VSRCibrIbrPtr = matched->CSC_LinearDynamic ;
}
}
}
}
@ -75,16 +94,31 @@ VSRCbindCSCComplex (GENmodel *inModel, CKTcircuit *ckt)
/* loop through all the instances of the model */
for (here = VSRCinstances(model); here != NULL ; here = VSRCnextInstance(here))
{
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX_DYNAMIC(VSRCposIbrPtr, VSRCposIbrBinding, VSRCposNode, VSRCbranch);
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX_DYNAMIC(VSRCnegIbrPtr, VSRCnegIbrBinding, VSRCnegNode, VSRCbranch);
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX_DYNAMIC(VSRCibrNegPtr, VSRCibrNegBinding, VSRCbranch, VSRCnegNode);
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX_DYNAMIC(VSRCibrPosPtr, VSRCibrPosBinding, VSRCbranch, VSRCposNode);
/* Pole-Zero Analysis */
if ((here-> VSRCbranch != 0) && (here-> VSRCbranch != 0))
{
if (here->VSRCibrIbrBinding)
if ((here->VSRCisLinear == 1) && (here->VSRCisLinearStatic == 1)) {
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX_STATIC(VSRCposIbrPtr, VSRCposIbrBinding, VSRCposNode, VSRCbranch);
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX_STATIC(VSRCnegIbrPtr, VSRCnegIbrBinding, VSRCnegNode, VSRCbranch);
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX_STATIC(VSRCibrNegPtr, VSRCibrNegBinding, VSRCbranch, VSRCnegNode);
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX_STATIC(VSRCibrPosPtr, VSRCibrPosBinding, VSRCbranch, VSRCposNode);
/* Pole-Zero Analysis */
if ((here-> VSRCbranch != 0) && (here-> VSRCbranch != 0))
{
here->VSRCibrIbrPtr = here->VSRCibrIbrBinding->CSC_Complex_LinearDynamic ;
if (here->VSRCibrIbrBinding)
{
here->VSRCibrIbrPtr = here->VSRCibrIbrBinding->CSC_Complex_LinearStatic ;
}
}
} else if ((here->VSRCisLinear == 1) && (here->VSRCisLinearStatic == 0)) {
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX_DYNAMIC(VSRCposIbrPtr, VSRCposIbrBinding, VSRCposNode, VSRCbranch);
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX_DYNAMIC(VSRCnegIbrPtr, VSRCnegIbrBinding, VSRCnegNode, VSRCbranch);
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX_DYNAMIC(VSRCibrNegPtr, VSRCibrNegBinding, VSRCbranch, VSRCnegNode);
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX_DYNAMIC(VSRCibrPosPtr, VSRCibrPosBinding, VSRCbranch, VSRCposNode);
/* Pole-Zero Analysis */
if ((here-> VSRCbranch != 0) && (here-> VSRCbranch != 0))
{
if (here->VSRCibrIbrBinding)
{
here->VSRCibrIbrPtr = here->VSRCibrIbrBinding->CSC_Complex_LinearDynamic ;
}
}
}
}
@ -107,16 +141,31 @@ VSRCbindCSCComplexToReal (GENmodel *inModel, CKTcircuit *ckt)
/* loop through all the instances of the model */
for (here = VSRCinstances(model); here != NULL ; here = VSRCnextInstance(here))
{
CONVERT_KLU_BINDING_TABLE_TO_REAL_DYNAMIC(VSRCposIbrPtr, VSRCposIbrBinding, VSRCposNode, VSRCbranch);
CONVERT_KLU_BINDING_TABLE_TO_REAL_DYNAMIC(VSRCnegIbrPtr, VSRCnegIbrBinding, VSRCnegNode, VSRCbranch);
CONVERT_KLU_BINDING_TABLE_TO_REAL_DYNAMIC(VSRCibrNegPtr, VSRCibrNegBinding, VSRCbranch, VSRCnegNode);
CONVERT_KLU_BINDING_TABLE_TO_REAL_DYNAMIC(VSRCibrPosPtr, VSRCibrPosBinding, VSRCbranch, VSRCposNode);
/* Pole-Zero Analysis */
if ((here-> VSRCbranch != 0) && (here-> VSRCbranch != 0))
{
if (here->VSRCibrIbrBinding)
if ((here->VSRCisLinear == 1) && (here->VSRCisLinearStatic == 1)) {
CONVERT_KLU_BINDING_TABLE_TO_REAL_STATIC(VSRCposIbrPtr, VSRCposIbrBinding, VSRCposNode, VSRCbranch);
CONVERT_KLU_BINDING_TABLE_TO_REAL_STATIC(VSRCnegIbrPtr, VSRCnegIbrBinding, VSRCnegNode, VSRCbranch);
CONVERT_KLU_BINDING_TABLE_TO_REAL_STATIC(VSRCibrNegPtr, VSRCibrNegBinding, VSRCbranch, VSRCnegNode);
CONVERT_KLU_BINDING_TABLE_TO_REAL_STATIC(VSRCibrPosPtr, VSRCibrPosBinding, VSRCbranch, VSRCposNode);
/* Pole-Zero Analysis */
if ((here-> VSRCbranch != 0) && (here-> VSRCbranch != 0))
{
here->VSRCibrIbrPtr = here->VSRCibrIbrBinding->CSC_LinearDynamic ;
if (here->VSRCibrIbrBinding)
{
here->VSRCibrIbrPtr = here->VSRCibrIbrBinding->CSC_LinearStatic ;
}
}
} else if ((here->VSRCisLinear == 1) && (here->VSRCisLinearStatic == 0)) {
CONVERT_KLU_BINDING_TABLE_TO_REAL_DYNAMIC(VSRCposIbrPtr, VSRCposIbrBinding, VSRCposNode, VSRCbranch);
CONVERT_KLU_BINDING_TABLE_TO_REAL_DYNAMIC(VSRCnegIbrPtr, VSRCnegIbrBinding, VSRCnegNode, VSRCbranch);
CONVERT_KLU_BINDING_TABLE_TO_REAL_DYNAMIC(VSRCibrNegPtr, VSRCibrNegBinding, VSRCbranch, VSRCnegNode);
CONVERT_KLU_BINDING_TABLE_TO_REAL_DYNAMIC(VSRCibrPosPtr, VSRCibrPosBinding, VSRCbranch, VSRCposNode);
/* Pole-Zero Analysis */
if ((here-> VSRCbranch != 0) && (here-> VSRCbranch != 0))
{
if (here->VSRCibrIbrBinding)
{
here->VSRCibrIbrPtr = here->VSRCibrIbrBinding->CSC_LinearDynamic ;
}
}
}
}

2
src/spicelib/devices/vsrc/vsrcdefs.h
View File

@ -84,6 +84,8 @@ typedef struct sVSRCinstance {
BindElement *VSRCibrNegBinding ;
BindElement *VSRCibrPosBinding ;
BindElement *VSRCibrIbrBinding ;
unsigned int VSRCisLinear : 1 ;
unsigned int VSRCisLinearStatic : 1 ;
#endif
} VSRCinstance ;

11
src/spicelib/devices/vsrc/vsrcload.c
View File

@ -40,6 +40,10 @@ VSRCload(GENmodel *inModel, CKTcircuit *ckt)
for (here = VSRCinstances(model); here != NULL ;
here=VSRCnextInstance(here)) {
#ifdef KLU
if ((here->VSRCisLinear == ckt->CKTlinearModelsRequested) && (here->VSRCisLinearStatic == ckt->CKTlinearStaticModelsRequested)) {
#endif
*(here->VSRCposIbrPtr) += 1.0 ;
*(here->VSRCnegIbrPtr) -= 1.0 ;
*(here->VSRCibrPosPtr) += 1.0 ;
@ -414,7 +418,12 @@ loadDone:
/* load the new voltage value into the matrix */
#ifdef KLU
*(ckt->CKTrhs_LinearDynamic + (here->VSRCbranch)) += value;
if ((here->VSRCisLinear == 1) && (here->VSRCisLinearStatic == 1)) {
*(ckt->CKTrhs_LinearStatic + (here->VSRCbranch)) += value;
} else if ((here->VSRCisLinear == 1) && (here->VSRCisLinearStatic == 0)) {
*(ckt->CKTrhs_LinearDynamic + (here->VSRCbranch)) += value;
}
}
#else
*(ckt->CKTrhs + (here->VSRCbranch)) += value;
#endif

77
src/spicelib/devices/vsrc/vsrcpar.c
View File

@ -43,18 +43,36 @@ VSRCparam(int param, IFvalue *value, GENinstance *inst, IFvalue *select)
case VSRC_DC:
here->VSRCdcValue = value->rValue;
here->VSRCdcGiven = TRUE;
#ifdef KLU
here->VSRCisLinear = 1 ;
here->VSRCisLinearStatic = 1 ;
#endif
break;
case VSRC_AC_MAG:
here->VSRCacMag = value->rValue;
here->VSRCacMGiven = TRUE;
here->VSRCacGiven = TRUE;
#ifdef KLU
here->VSRCisLinear = 1 ;
here->VSRCisLinearStatic = 1 ;
#endif
break;
case VSRC_AC_PHASE:
here->VSRCacPhase = value->rValue;
here->VSRCacPGiven = TRUE;
here->VSRCacGiven = TRUE;
#ifdef KLU
here->VSRCisLinear = 1 ;
here->VSRCisLinearStatic = 1 ;
#endif
break;
case VSRC_AC:
@ -71,6 +89,12 @@ VSRCparam(int param, IFvalue *value, GENinstance *inst, IFvalue *select)
default:
return(E_BADPARM);
}
#ifdef KLU
here->VSRCisLinear = 1 ;
here->VSRCisLinearStatic = 1 ;
#endif
break;
case VSRC_PULSE:
@ -79,6 +103,12 @@ VSRCparam(int param, IFvalue *value, GENinstance *inst, IFvalue *select)
here->VSRCfunctionType = PULSE;
here->VSRCfuncTGiven = TRUE;
copy_coeffs(here, value);
#ifdef KLU
here->VSRCisLinear = 1 ;
here->VSRCisLinearStatic = 0 ;
#endif
break;
case VSRC_SINE:
@ -87,6 +117,12 @@ VSRCparam(int param, IFvalue *value, GENinstance *inst, IFvalue *select)
here->VSRCfunctionType = SINE;
here->VSRCfuncTGiven = TRUE;
copy_coeffs(here, value);
#ifdef KLU
here->VSRCisLinear = 1 ;
here->VSRCisLinearStatic = 0 ;
#endif
break;
case VSRC_EXP:
@ -95,6 +131,12 @@ VSRCparam(int param, IFvalue *value, GENinstance *inst, IFvalue *select)
here->VSRCfunctionType = EXP;
here->VSRCfuncTGiven = TRUE;
copy_coeffs(here, value);
#ifdef KLU
here->VSRCisLinear = 1 ;
here->VSRCisLinearStatic = 0 ;
#endif
break;
case VSRC_PWL:
@ -112,6 +154,11 @@ VSRCparam(int param, IFvalue *value, GENinstance *inst, IFvalue *select)
}
}
#ifdef KLU
here->VSRCisLinear = 1 ;
here->VSRCisLinearStatic = 0 ;
#endif
break;
case VSRC_TD:
@ -148,6 +195,12 @@ VSRCparam(int param, IFvalue *value, GENinstance *inst, IFvalue *select)
here->VSRCfunctionType = SFFM;
here->VSRCfuncTGiven = TRUE;
copy_coeffs(here, value);
#ifdef KLU
here->VSRCisLinear = 1 ;
here->VSRCisLinearStatic = 0 ;
#endif
break;
case VSRC_AM:
@ -156,6 +209,12 @@ VSRCparam(int param, IFvalue *value, GENinstance *inst, IFvalue *select)
here->VSRCfunctionType = AM;
here->VSRCfuncTGiven = TRUE;
copy_coeffs(here, value);
#ifdef KLU
here->VSRCisLinear = 1 ;
here->VSRCisLinearStatic = 0 ;
#endif
break;
case VSRC_D_F1:
@ -233,6 +292,12 @@ VSRCparam(int param, IFvalue *value, GENinstance *inst, IFvalue *select)
here->VSRCtrnoise_state =
trnoise_state_init(NA, TS, NALPHA, NAMP, RTSAM, RTSCAPT, RTSEMT);
}
#ifdef KLU
here->VSRCisLinear = 1 ;
here->VSRCisLinearStatic = 0 ;
#endif
break;
case VSRC_TRRANDOM: {
@ -259,6 +324,12 @@ VSRCparam(int param, IFvalue *value, GENinstance *inst, IFvalue *select)
here->VSRCtrrandom_state =
trrandom_state_init(rndtype, TS, TD, PARAM1, PARAM2);
}
#ifdef KLU
here->VSRCisLinear = 1 ;
here->VSRCisLinearStatic = 0 ;
#endif
break;
#ifdef SHARED_MODULE
@ -269,6 +340,12 @@ VSRCparam(int param, IFvalue *value, GENinstance *inst, IFvalue *select)
copy_coeffs(here, value);
*/
}
#ifdef KLU
here->VSRCisLinear = 1 ;
here->VSRCisLinearStatic = 0 ;
#endif
break;
#endif