CUSPICE Integration from scratch
This commit is contained in:
parent
1c91bf289a
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59
configure.ac
59
configure.ac
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@ -202,7 +202,64 @@ if test "x$enable_klu" = xyes; then
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AC_DEFINE(KLU, [], [Define if we want KLU linear systems solver])
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AC_MSG_WARN([KLU solver enabled])
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fi
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AM_CONDITIONAL([KLU_WANTED], [test "x$enable_klu" = xyes])
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AM_CONDITIONAL([KLU_WANTED], [test "x$enable_klu" = xyes || test "x$enable_cuspice" = xyes])
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# --enable-cuspice: Use CUSPICE (NGSPICE on CUDA Platforms)
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AC_ARG_ENABLE([cuspice],
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[AS_HELP_STRING([--enable-cuspice], [Use CUSPICE (NGSPICE on CUDA Platforms)])])
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# Add CUSPICE (NGSPICE on CUDA Platforms) to NGSPICE
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if test "x$enable_cuspice" = xyes; then
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AC_DEFINE(USE_CUSPICE, [], [Define if we want CUSPICE (NGSPICE on CUDA Platforms) enabled])
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AC_MSG_WARN(CUSPICE (NGSPICE on CUDA Platforms) enabled)
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AC_ARG_WITH([cuda],
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[AS_HELP_STRING([--with-cuda=PATH], [Define the prefix where cuda is installed (default=/usr/local/cuda)])])
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ARCH=`uname -m`
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if test -n "$with_cuda"
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then
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CUDA_CPPFLAGS="-I$with_cuda/include"
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if [[ $ARCH == "x86_64" ]]
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then
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CUDA_LIBS="-L$with_cuda/lib64 -lcuda -lcudart"
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else
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CUDA_LIBS="-L$with_cuda/lib -lcuda -lcudart"
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fi
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NVCC="$with_cuda/bin/nvcc"
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else
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CUDA_CPPFLAGS="-I/usr/local/cuda/include"
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if [[ $ARCH == "x86_64" ]]
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then
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CUDA_LIBS="-L/usr/local/cuda/lib64 -lcuda -lcudart"
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else
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CUDA_LIBS="-L/usr/local/cuda/lib -lcuda -lcudart"
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fi
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AC_PATH_PROG(NVCC, nvcc, "no")
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AS_IF([test "x$NVCC" = xno],
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[AC_MSG_ERROR([NVCC compiler not found!])])
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NVCC="nvcc"
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fi
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AC_SUBST(CUDA_CPPFLAGS)
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AC_SUBST(CUDA_LIBS)
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AC_SUBST(NVCC)
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# NVCC Compilation Flags
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CUDA_CFLAGS="-gencode arch=compute_20,\"code=sm_20\""
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CUDA_CFLAGS+=" -gencode arch=compute_30,\"code=sm_30\""
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CUDA_CFLAGS+=" -gencode arch=compute_32,\"code=sm_32\""
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CUDA_CFLAGS+=" -gencode arch=compute_35,\"code=sm_35\""
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CUDA_CFLAGS+=" -gencode arch=compute_50,\"code=sm_50\""
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CUDA_CFLAGS+=" -DCOMPILED_BY_NVCC"
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if test "x$enable_debug" = xno; then
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CUDA_CFLAGS+=" -O2"
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else
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CUDA_CFLAGS+=" -g -O1 -G"
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fi
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AC_SUBST(CUDA_CFLAGS)
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AC_DEFINE(KLU, [], [Define if we want KLU linear systems solver])
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AC_MSG_WARN([KLU solver enabled, because CUSPICE needs it])
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fi
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AM_CONDITIONAL([USE_CUSPICE_WANTED], [test "x$enable_cuspice" = xyes])
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# Enable maintainer commands only if requested
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@ -0,0 +1 @@
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../klu/Circuits
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@ -0,0 +1,10 @@
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* Test Current Source Model
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I1 0 1 pulse(0 1 0p 200p 200p 1n 2n)
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R1 0 1 1k
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R2 1 2 0.5k
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R3 2 0 0.2k
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.tran 1ps 1ns
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.print tran all
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.end
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@ -0,0 +1,9 @@
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* Test Inductor Model
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V1 0 1 pulse(0 1 0p 200p 200p 1n 2n)
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R1 1 2 10
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L1 2 0 10
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.tran 1ps 1ns
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.print tran all
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.end
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@ -0,0 +1,11 @@
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* Test Mutual Inductor Model
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V1 0 1 pulse(0 1 0p 200p 200p 1n 2n)
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R1 1 2 10
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L1 2 0 10
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L2 3 0 10
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K1 L1 L2 0.5
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.tran 1ps 1ns
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.print tran all
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.end
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@ -184,6 +184,10 @@ com_version(wordlist *wl)
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"** Compiled with Sparse Direct Linear Solver\n"
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#endif
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#ifdef USE_CUSPICE
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"** Compiled with CUSPICE (NGSPICE on CUDA Platforms)\n"
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#endif
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"** The U. C. Berkeley CAD Group\n"
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"** Copyright 1985-1994, Regents of the University of California.\n"
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"** %s\n",
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@ -224,6 +228,10 @@ com_version(wordlist *wl)
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"** Compiled with Sparse Direct Linear Solver\n"
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#endif
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#ifdef USE_CUSPICE
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"** Compiled with CUSPICE (NGSPICE on CUDA Platforms)\n"
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#endif
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"** The U. C. Berkeley CAD Group\n"
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"** Copyright 1985-1994, Regents of the University of California.\n"
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"** %s\n",
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@ -0,0 +1,78 @@
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/*
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* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its contributors may be used to
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* endorse or promote products derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
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* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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int cuCKTcsrmv (CKTcircuit *) ;
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int cuCKTflush (CKTcircuit *) ;
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int cuCKTnonconUpdateHtoD (CKTcircuit *) ;
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int cuCKTnonconUpdateDtoH (CKTcircuit *) ;
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int cuCKTrhsOldFlush (CKTcircuit *) ;
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int cuCKTrhsOldUpdateHtoD (CKTcircuit *) ;
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int cuCKTrhsOldUpdateDtoH (CKTcircuit *) ;
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int cuCKTsetup (CKTcircuit *) ;
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int cuCKTsystemDtoH (CKTcircuit *) ;
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int cuCKTstatesFlush (CKTcircuit *) ;
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int cuCKTstatesUpdateDtoH (CKTcircuit *) ;
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int cuCKTstate0UpdateHtoD (CKTcircuit *) ;
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int cuCKTstate0UpdateDtoH (CKTcircuit *) ;
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int cuCKTstate01copy (CKTcircuit *) ;
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int cuCKTstatesCircularBuffer (CKTcircuit *) ;
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int cuCKTstate123copy (CKTcircuit *) ;
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int cuBSIM4destroy (GENmodel *) ;
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int cuBSIM4getic (GENmodel *) ;
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int cuBSIM4load (GENmodel *, CKTcircuit *) ;
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int cuBSIM4setup (GENmodel *) ;
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int cuBSIM4temp (GENmodel *) ;
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int cuCAPdestroy (GENmodel *) ;
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int cuCAPgetic (GENmodel *) ;
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int cuCAPload (GENmodel *, CKTcircuit *) ;
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int cuCAPsetup (GENmodel *) ;
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int cuCAPtemp (GENmodel *) ;
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int cuINDdestroy (GENmodel *) ;
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int cuINDload (GENmodel *, CKTcircuit *) ;
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int cuINDsetup (GENmodel *) ;
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int cuINDtemp (GENmodel *) ;
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int cuISRCdestroy (GENmodel *) ;
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int cuISRCload (GENmodel *, CKTcircuit *) ;
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int cuISRCsetup (GENmodel *) ;
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int cuISRCtemp (GENmodel *) ;
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int cuMUTdestroy (GENmodel *) ;
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int cuMUTload (GENmodel *, CKTcircuit *) ;
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int cuMUTsetup (GENmodel *) ;
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int cuMUTtemp (GENmodel *) ;
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int cuRESdestroy (GENmodel *) ;
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int cuRESload (GENmodel *, CKTcircuit *) ;
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int cuRESsetup (GENmodel *) ;
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int cuREStemp (GENmodel *) ;
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int cuVSRCdestroy (GENmodel *) ;
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int cuVSRCload (GENmodel *, CKTcircuit *) ;
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int cuVSRCsetup (GENmodel *) ;
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int cuVSRCtemp (GENmodel *) ;
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@ -0,0 +1,36 @@
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#include <stdio.h>
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#include "ngspice/sperror.h"
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extern "C"
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__device__
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static
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int
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cuNIintegrate_device_kernel
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(
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double *CKTstate_0, double *CKTstate_1, double *geq, double *ceq,
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double value, int charge, double CKTag_0, double CKTag_1, int CKTorder
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)
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{
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#define current charge+1
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switch (CKTorder)
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{
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case 1:
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CKTstate_0 [current] = CKTag_0 * (CKTstate_0 [charge]) + CKTag_1 * (CKTstate_1 [charge]) ;
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break ;
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case 2:
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CKTstate_0 [current] = -CKTstate_1 [current] * CKTag_1 + CKTag_0 * (CKTstate_0 [charge] - CKTstate_1 [charge]) ;
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break ;
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default:
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printf ("Error inside the integration formula\n") ;
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return (E_ORDER) ;
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}
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*ceq = CKTstate_0 [current] - CKTag_0 * CKTstate_0 [charge] ;
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*geq = CKTag_0 * value ;
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return (OK) ;
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}
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@ -2,7 +2,9 @@
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#define ngspice_BOOL_H
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//typedef unsigned char bool;
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#ifndef COMPILED_BY_NVCC
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typedef int bool;
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#endif
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typedef int BOOL ;
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@ -293,6 +293,45 @@ struct CKTcircuit {
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unsigned int CKTkluMODE:1 ;
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#endif
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#ifdef USE_CUSPICE
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double *(d_CKTstates[8]) ;
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#define d_CKTstate0 d_CKTstates[0]
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#define d_CKTstate1 d_CKTstates[1]
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#define d_CKTstate2 d_CKTstates[2]
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#define d_CKTstate3 d_CKTstates[3]
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#define d_CKTstate4 d_CKTstates[4]
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#define d_CKTstate5 d_CKTstates[5]
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#define d_CKTstate6 d_CKTstates[6]
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#define d_CKTstate7 d_CKTstates[7]
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double *d_CKTrhsOld ;
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int *d_CKTnoncon ;
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int d_MatrixSize ;
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int CKTdiagElements ;
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int total_n_values ;
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int total_n_Ptr ;
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double *d_CKTloadOutput ;
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int *CKTtopologyMatrixCOOi ;
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int *CKTtopologyMatrixCOOj ;
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double *CKTtopologyMatrixCOOx ;
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int *CKTtopologyMatrixCSRp ;
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int *d_CKTtopologyMatrixCSRp ;
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int *d_CKTtopologyMatrixCSRj ;
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double *d_CKTtopologyMatrixCSRx ;
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int total_n_valuesRHS ;
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int total_n_PtrRHS ;
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double *d_CKTloadOutputRHS ;
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int *CKTtopologyMatrixCOOiRHS ;
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int *CKTtopologyMatrixCOOjRHS ;
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double *CKTtopologyMatrixCOOxRHS ;
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int *CKTtopologyMatrixCSRpRHS ;
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int *d_CKTtopologyMatrixCSRpRHS ;
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int *d_CKTtopologyMatrixCSRjRHS ;
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double *d_CKTtopologyMatrixCSRxRHS ;
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#endif
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};
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@ -123,6 +123,13 @@ typedef struct SPICEdev {
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/* routine to convert Complex CSC array to Real CSC array */
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#endif
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#ifdef USE_CUSPICE
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int (*cuDEVdestroy)(GENmodel *) ;
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/* routine to Destroy the CUSPICE allocations */
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int (*DEVtopology)(GENmodel *, CKTcircuit *, int *, int *) ;
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/* routine to create the Topology Matrix */
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#endif
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} SPICEdev; /* instance of structure for each possible type of device */
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@ -49,6 +49,14 @@ typedef struct sSMPmatrix {
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#define CKTkluOFF 0 /* KLU MODE OFF definition */
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#endif
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#ifdef USE_CUSPICE
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double *d_CKTkluAx ;
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double *d_CKTrhs ;
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void *CKTcsrmvHandle ;
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void *CKTcsrmvDescr ;
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#endif
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} SMPmatrix ;
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@ -0,0 +1,58 @@
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#!/usr/bin/tclsh
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if {$argc == 0} {
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puts "Usage: 'libtool_wrapper_for_cuda.tcl' 'filename' 'compilation line'"
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exit 1
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}
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# Rename object file .lo in .o
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set filename_lo [lindex $argv 0]
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set filename_o [file rootname $filename_lo].o
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# Determine where the object file has to be created and the NVCC compilation command
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if {[lindex $argv 1] == "-static"} {
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set filename $filename_o
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set command [lrange $argv 2 end]
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append command " -o $filename"
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} else {
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file mkdir .libs
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set filename ".libs/${filename_o}"
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set command [lrange $argv 2 end]
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append command " -Xcompiler -fPIC"
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append command " -o $filename"
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}
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# Compile
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exec /bin/sh -c $command
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# Determine the libtool version (including compiler version)
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catch {exec libtool --help} output
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set output [split $output "\n"]
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foreach elem $output {
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if {[regexp -- {libtool:\t(.+)$} $elem -> version]} {
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break
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}
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}
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# Generate the .lo libtool object file
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set fid [open $filename_lo w]
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puts $fid "# $filename_lo - a libtool object file"
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puts $fid "# Generated by libtool $version"
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puts $fid "#"
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puts $fid "# Please DO NOT delete this file!"
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puts $fid "# It is necessary for linking the library."
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puts $fid ""
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if {[lindex $argv 1] == "-static"} {
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puts $fid "# Name of the PIC object."
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puts $fid "pic_object=none"
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puts $fid ""
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puts $fid "# Name of the non-PIC object"
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puts $fid "non_pic_object='[file tail $filename]'"
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} else {
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puts $fid "# Name of the PIC object."
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puts $fid "pic_object='[file tail $filename]'"
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puts $fid ""
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puts $fid "# Name of the non-PIC object"
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puts $fid "non_pic_object=none"
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}
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close $fid
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@ -50,6 +50,13 @@ NIinit(CKTcircuit *ckt)
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klu_defaults (ckt->CKTmatrix->CKTkluCommon) ;
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#endif
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#ifdef USE_CUSPICE
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ckt->CKTmatrix->d_CKTkluAx = NULL ;
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ckt->CKTmatrix->d_CKTrhs = NULL ;
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ckt->CKTmatrix->CKTcsrmvHandle = NULL ;
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ckt->CKTmatrix->CKTcsrmvDescr = NULL ;
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#endif
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ckt->CKTniState = NIUNINITIALIZED;
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return (SMPnewMatrix (ckt->CKTmatrix));
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}
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@ -0,0 +1,50 @@
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/*
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* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to
|
||||
* endorse or promote products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "ngspice/config.h"
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#include "ngspice/cktdefs.h"
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#include "ngspice/sperror.h"
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#include "cuda_runtime_api.h"
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#include "ngspice/CUSPICE/CUSPICE.h"
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int
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cuCKTflush
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(
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CKTcircuit *ckt
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)
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{
|
||||
long unsigned int m, mRHS ;
|
||||
|
||||
m = (long unsigned int)(ckt->total_n_values + 1) ; // + 1 because of CKTdiagGmin
|
||||
mRHS = (long unsigned int)ckt->total_n_valuesRHS ;
|
||||
|
||||
/* Clean-up the CKTloadOutput */
|
||||
cudaMemset (ckt->d_CKTloadOutput, 0, m * sizeof(double)) ;
|
||||
|
||||
/* Clean-up the CKTloadOutputRHS */
|
||||
cudaMemset (ckt->d_CKTloadOutputRHS, 0, mRHS * sizeof(double)) ;
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
|
@ -0,0 +1,68 @@
|
|||
/*
|
||||
* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to
|
||||
* endorse or promote products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "ngspice/config.h"
|
||||
#include "ngspice/cktdefs.h"
|
||||
#include "ngspice/sperror.h"
|
||||
#include "cuda_runtime_api.h"
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
|
||||
/* cudaMemcpy MACRO to check it for errors --> CUDAMEMCPYCHECK(name of pointer, dimension, type, status) */
|
||||
#define CUDAMEMCPYCHECK(a, b, c, d) \
|
||||
if (d != cudaSuccess) \
|
||||
{ \
|
||||
fprintf (stderr, "cuCKTnonconUpdate routine...\n") ; \
|
||||
fprintf (stderr, "Error: cudaMemcpy failed on %s size of %d bytes\n", #a, (int)(b * sizeof(c))) ; \
|
||||
fprintf (stderr, "Error: %s = %d, %s\n", #d, d, cudaGetErrorString (d)) ; \
|
||||
return (E_NOMEM) ; \
|
||||
}
|
||||
|
||||
int
|
||||
cuCKTnonconUpdateHtoD
|
||||
(
|
||||
CKTcircuit *ckt
|
||||
)
|
||||
{
|
||||
cudaError_t status ;
|
||||
|
||||
status = cudaMemcpy (ckt->d_CKTnoncon, &(ckt->CKTnoncon), sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (ckt->d_CKTnoncon, 1, int, status)
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
||||
int
|
||||
cuCKTnonconUpdateDtoH
|
||||
(
|
||||
CKTcircuit *ckt
|
||||
)
|
||||
{
|
||||
cudaError_t status ;
|
||||
|
||||
status = cudaMemcpy (&(ckt->CKTnoncon), ckt->d_CKTnoncon, sizeof(int), cudaMemcpyDeviceToHost) ;
|
||||
CUDAMEMCPYCHECK (&(ckt->CKTnoncon), 1, int, status)
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
|
@ -0,0 +1,86 @@
|
|||
/*
|
||||
* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to
|
||||
* endorse or promote products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "ngspice/config.h"
|
||||
#include "ngspice/cktdefs.h"
|
||||
#include "ngspice/sperror.h"
|
||||
#include "cuda_runtime_api.h"
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
|
||||
/* cudaMemcpy MACRO to check it for errors --> CUDAMEMCPYCHECK(name of pointer, dimension, type, status) */
|
||||
#define CUDAMEMCPYCHECK(a, b, c, d) \
|
||||
if (d != cudaSuccess) \
|
||||
{ \
|
||||
fprintf (stderr, "cuCKTrhsOldUpdate routine...\n") ; \
|
||||
fprintf (stderr, "Error: cudaMemcpy failed on %s size of %d bytes\n", #a, (int)(b * sizeof(c))) ; \
|
||||
fprintf (stderr, "Error: %s = %d, %s\n", #d, d, cudaGetErrorString (d)) ; \
|
||||
return (E_NOMEM) ; \
|
||||
}
|
||||
|
||||
int
|
||||
cuCKTrhsOldFlush
|
||||
(
|
||||
CKTcircuit *ckt
|
||||
)
|
||||
{
|
||||
long unsigned int size ;
|
||||
|
||||
size = (long unsigned int)(ckt->d_MatrixSize + 1) ;
|
||||
cudaMemset (ckt->d_CKTrhsOld, 0, size * sizeof(double)) ;
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
||||
int
|
||||
cuCKTrhsOldUpdateHtoD
|
||||
(
|
||||
CKTcircuit *ckt
|
||||
)
|
||||
{
|
||||
long unsigned int size ;
|
||||
cudaError_t status ;
|
||||
|
||||
size = (long unsigned int)(ckt->d_MatrixSize + 1) ;
|
||||
status = cudaMemcpy (ckt->d_CKTrhsOld, ckt->CKTrhsOld, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (ckt->d_CKTrhsOld, size, double, status)
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
||||
int
|
||||
cuCKTrhsOldUpdateDtoH
|
||||
(
|
||||
CKTcircuit *ckt
|
||||
)
|
||||
{
|
||||
long unsigned int size ;
|
||||
cudaError_t status ;
|
||||
|
||||
size = (long unsigned int)(ckt->d_MatrixSize + 1) ;
|
||||
status = cudaMemcpy (ckt->CKTrhsOld, ckt->d_CKTrhsOld, size * sizeof(double), cudaMemcpyDeviceToHost) ;
|
||||
CUDAMEMCPYCHECK (ckt->CKTrhsOld, size, double, status)
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
|
@ -0,0 +1,145 @@
|
|||
/*
|
||||
* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to
|
||||
* endorse or promote products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "ngspice/config.h"
|
||||
#include "ngspice/cktdefs.h"
|
||||
#include "ngspice/sperror.h"
|
||||
#include "cuda_runtime_api.h"
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
|
||||
#define MAX(a,b) ((a) > (b) ? (a) : (b))
|
||||
|
||||
/* cudaMalloc MACRO to check it for errors --> CUDAMALLOCCHECK(name of pointer, dimension, type, status) */
|
||||
#define CUDAMALLOCCHECK(a, b, c, d) \
|
||||
if (d != cudaSuccess) \
|
||||
{ \
|
||||
fprintf (stderr, "cuCKTsetup routine...\n") ; \
|
||||
fprintf (stderr, "Error: cudaMalloc failed on %s size of %d bytes\n", #a, (int)(b * sizeof(c))) ; \
|
||||
fprintf (stderr, "Error: %s = %d, %s\n", #d, d, cudaGetErrorString (d)) ; \
|
||||
return (E_NOMEM) ; \
|
||||
}
|
||||
|
||||
/* cudaMemcpy MACRO to check it for errors --> CUDAMEMCPYCHECK(name of pointer, dimension, type, status) */
|
||||
#define CUDAMEMCPYCHECK(a, b, c, d) \
|
||||
if (d != cudaSuccess) \
|
||||
{ \
|
||||
fprintf (stderr, "cuCKTsetup routine...\n") ; \
|
||||
fprintf (stderr, "Error: cudaMemcpy failed on %s size of %d bytes\n", #a, (int)(b * sizeof(c))) ; \
|
||||
fprintf (stderr, "Error: %s = %d, %s\n", #d, d, cudaGetErrorString (d)) ; \
|
||||
return (E_NOMEM) ; \
|
||||
}
|
||||
|
||||
int
|
||||
cuCKTsetup
|
||||
(
|
||||
CKTcircuit *ckt
|
||||
)
|
||||
{
|
||||
int i ;
|
||||
long unsigned int m, mRHS, n, nz, TopologyNNZ, TopologyNNZRHS, size1, size2 ;
|
||||
cudaError_t status ;
|
||||
|
||||
n = (long unsigned int)ckt->CKTmatrix->CKTkluN ;
|
||||
nz = (long unsigned int)ckt->CKTmatrix->CKTklunz ;
|
||||
|
||||
m = (long unsigned int)(ckt->total_n_values + 1) ; // + 1 because of CKTdiagGmin
|
||||
|
||||
TopologyNNZ = (long unsigned int)(ckt->total_n_Ptr + ckt->CKTdiagElements) ; // + n because of CKTdiagGmin
|
||||
// without the zeroes along the diagonal
|
||||
|
||||
mRHS = (long unsigned int)ckt->total_n_valuesRHS ;
|
||||
TopologyNNZRHS = (long unsigned int)ckt->total_n_PtrRHS ;
|
||||
|
||||
size1 = (long unsigned int)(ckt->d_MatrixSize + 1) ;
|
||||
size2 = (long unsigned int)ckt->CKTnumStates ;
|
||||
|
||||
/* Topology Matrix Handling */
|
||||
status = cudaMalloc ((void **)&(ckt->CKTmatrix->d_CKTrhs), (n + 1) * sizeof(double)) ;
|
||||
CUDAMALLOCCHECK (ckt->CKTmatrix->d_CKTrhs, (n + 1), double, status)
|
||||
|
||||
status = cudaMalloc ((void **)&(ckt->CKTmatrix->d_CKTkluAx), nz * sizeof(double)) ;
|
||||
CUDAMALLOCCHECK (ckt->CKTmatrix->d_CKTkluAx, nz, double, status)
|
||||
|
||||
status = cudaMalloc ((void **)&(ckt->d_CKTloadOutput), m * sizeof(double)) ;
|
||||
CUDAMALLOCCHECK (ckt->d_CKTloadOutput, m, double, status)
|
||||
|
||||
status = cudaMalloc ((void **)&(ckt->d_CKTloadOutputRHS), mRHS * sizeof(double)) ;
|
||||
CUDAMALLOCCHECK (ckt->d_CKTloadOutputRHS, mRHS, double, status)
|
||||
|
||||
status = cudaMalloc ((void **)&(ckt->d_CKTtopologyMatrixCSRp), (nz + 1) * sizeof(int)) ;
|
||||
CUDAMALLOCCHECK (ckt->d_CKTtopologyMatrixCSRp, (nz + 1), int, status)
|
||||
|
||||
status = cudaMalloc ((void **)&(ckt->d_CKTtopologyMatrixCSRj), TopologyNNZ * sizeof(int)) ;
|
||||
CUDAMALLOCCHECK (ckt->d_CKTtopologyMatrixCSRj, TopologyNNZ, int, status)
|
||||
|
||||
status = cudaMalloc ((void **)&(ckt->d_CKTtopologyMatrixCSRx), TopologyNNZ * sizeof(double)) ;
|
||||
CUDAMALLOCCHECK (ckt->d_CKTtopologyMatrixCSRx, TopologyNNZ, double, status)
|
||||
|
||||
status = cudaMalloc ((void **)&(ckt->d_CKTtopologyMatrixCSRpRHS), ((n + 1) + 1) * sizeof(int)) ;
|
||||
CUDAMALLOCCHECK (ckt->d_CKTtopologyMatrixCSRpRHS, ((n + 1) + 1), int, status)
|
||||
|
||||
status = cudaMalloc ((void **)&(ckt->d_CKTtopologyMatrixCSRjRHS), TopologyNNZRHS * sizeof(int)) ;
|
||||
CUDAMALLOCCHECK (ckt->d_CKTtopologyMatrixCSRjRHS, TopologyNNZRHS, int, status)
|
||||
|
||||
status = cudaMalloc ((void **)&(ckt->d_CKTtopologyMatrixCSRxRHS), TopologyNNZRHS * sizeof(double)) ;
|
||||
CUDAMALLOCCHECK (ckt->d_CKTtopologyMatrixCSRxRHS, TopologyNNZRHS, double, status)
|
||||
|
||||
|
||||
cudaMemset (ckt->d_CKTloadOutput + ckt->total_n_values, 0, sizeof(double)) ; //DiagGmin is 0 at the beginning
|
||||
|
||||
|
||||
status = cudaMemcpy (ckt->d_CKTtopologyMatrixCSRp, ckt->CKTtopologyMatrixCSRp, (nz + 1) * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (ckt->d_CKTtopologyMatrixCSRp, (nz + 1), int, status)
|
||||
|
||||
status = cudaMemcpy (ckt->d_CKTtopologyMatrixCSRj, ckt->CKTtopologyMatrixCOOj, TopologyNNZ * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (ckt->d_CKTtopologyMatrixCSRj, TopologyNNZ, int, status)
|
||||
|
||||
status = cudaMemcpy (ckt->d_CKTtopologyMatrixCSRx, ckt->CKTtopologyMatrixCOOx, TopologyNNZ * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (ckt->d_CKTtopologyMatrixCSRx, TopologyNNZ, double, status)
|
||||
|
||||
status = cudaMemcpy (ckt->d_CKTtopologyMatrixCSRpRHS, ckt->CKTtopologyMatrixCSRpRHS, ((n + 1) + 1) * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (ckt->d_CKTtopologyMatrixCSRpRHS, ((n + 1) + 1), int, status)
|
||||
|
||||
status = cudaMemcpy (ckt->d_CKTtopologyMatrixCSRjRHS, ckt->CKTtopologyMatrixCOOjRHS, TopologyNNZRHS * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (ckt->d_CKTtopologyMatrixCSRjRHS, TopologyNNZRHS, int, status)
|
||||
|
||||
status = cudaMemcpy (ckt->d_CKTtopologyMatrixCSRxRHS, ckt->CKTtopologyMatrixCOOxRHS, TopologyNNZRHS * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (ckt->d_CKTtopologyMatrixCSRxRHS, TopologyNNZRHS, double, status)
|
||||
/* ------------------------ */
|
||||
|
||||
status = cudaMalloc ((void **)&(ckt->d_CKTnoncon), sizeof(int)) ;
|
||||
CUDAMALLOCCHECK (ckt->d_CKTnoncon, 1, int, status)
|
||||
|
||||
status = cudaMalloc ((void **)&(ckt->d_CKTrhsOld), size1 * sizeof(double)) ;
|
||||
CUDAMALLOCCHECK (ckt->d_CKTrhsOld, size1, double, status)
|
||||
|
||||
for (i = 0 ; i <= MAX (2, ckt->CKTmaxOrder) + 1 ; i++) /* dctran needs 3 states at least */
|
||||
{
|
||||
status = cudaMalloc ((void **)&(ckt->d_CKTstates[i]), size2 * sizeof(double)) ;
|
||||
CUDAMALLOCCHECK (ckt->d_CKTstates[i], size2, double, status)
|
||||
}
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
|
@ -0,0 +1,164 @@
|
|||
/*
|
||||
* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to
|
||||
* endorse or promote products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "ngspice/config.h"
|
||||
#include "ngspice/cktdefs.h"
|
||||
#include "ngspice/sperror.h"
|
||||
#include "cuda_runtime_api.h"
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
|
||||
/* cudaMemcpy MACRO to check it for errors --> CUDAMEMCPYCHECK(name of pointer, dimension, type, status) */
|
||||
#define CUDAMEMCPYCHECK(a, b, c, d) \
|
||||
if (d != cudaSuccess) \
|
||||
{ \
|
||||
fprintf (stderr, "cuCKTstatesUpdate routine...\n") ; \
|
||||
fprintf (stderr, "Error: cudaMemcpy failed on %s size of %d bytes\n", #a, (int)(b * sizeof(c))) ; \
|
||||
fprintf (stderr, "Error: %s = %d, %s\n", #d, d, cudaGetErrorString (d)) ; \
|
||||
return (E_NOMEM) ; \
|
||||
}
|
||||
|
||||
int
|
||||
cuCKTstatesUpdateDtoH
|
||||
(
|
||||
CKTcircuit *ckt
|
||||
)
|
||||
{
|
||||
int i ;
|
||||
long unsigned int size ;
|
||||
cudaError_t status ;
|
||||
|
||||
size = (long unsigned int)ckt->CKTnumStates ;
|
||||
|
||||
for (i = 0 ; i < 8 ; i++)
|
||||
{
|
||||
if (ckt->CKTstates[i] != NULL)
|
||||
{
|
||||
status = cudaMemcpy (ckt->CKTstates[i], ckt->d_CKTstates[i], size * sizeof(double), cudaMemcpyDeviceToHost) ;
|
||||
CUDAMEMCPYCHECK (ckt->CKTstates[i], size, double, status)
|
||||
}
|
||||
}
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
||||
int
|
||||
cuCKTstatesFlush
|
||||
(
|
||||
CKTcircuit *ckt
|
||||
)
|
||||
{
|
||||
long unsigned int size ;
|
||||
|
||||
size = (long unsigned int)ckt->CKTnumStates ;
|
||||
cudaMemset (ckt->d_CKTstate0, 0, size * sizeof(double)) ;
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
||||
int
|
||||
cuCKTstate0UpdateHtoD
|
||||
(
|
||||
CKTcircuit *ckt
|
||||
)
|
||||
{
|
||||
long unsigned int size ;
|
||||
cudaError_t status ;
|
||||
|
||||
size = (long unsigned int)ckt->CKTnumStates ;
|
||||
status = cudaMemcpy (ckt->d_CKTstate0, ckt->CKTstate0, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (ckt->d_CKTstate0, size, double, status)
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
||||
int
|
||||
cuCKTstate0UpdateDtoH
|
||||
(
|
||||
CKTcircuit *ckt
|
||||
)
|
||||
{
|
||||
long unsigned int size ;
|
||||
cudaError_t status ;
|
||||
|
||||
size = (long unsigned int)ckt->CKTnumStates ;
|
||||
status = cudaMemcpy (ckt->CKTstate0, ckt->d_CKTstate0, size * sizeof(double), cudaMemcpyDeviceToHost) ;
|
||||
CUDAMEMCPYCHECK (ckt->CKTstate0, size, double, status)
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
||||
int
|
||||
cuCKTstate01copy
|
||||
(
|
||||
CKTcircuit *ckt
|
||||
)
|
||||
{
|
||||
long unsigned int size ;
|
||||
cudaError_t status ;
|
||||
|
||||
size = (long unsigned int)ckt->CKTnumStates ;
|
||||
status = cudaMemcpy (ckt->d_CKTstate1, ckt->d_CKTstate0, size * sizeof(double), cudaMemcpyDeviceToDevice) ;
|
||||
CUDAMEMCPYCHECK (ckt->d_CKTstate1, size, double, status)
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
||||
int
|
||||
cuCKTstatesCircularBuffer
|
||||
(
|
||||
CKTcircuit *ckt
|
||||
)
|
||||
{
|
||||
int i ;
|
||||
double *temp ;
|
||||
|
||||
temp = ckt->d_CKTstates [ckt->CKTmaxOrder + 1] ;
|
||||
for (i = ckt->CKTmaxOrder ; i >= 0 ; i--)
|
||||
ckt->d_CKTstates [i + 1] = ckt->d_CKTstates [i] ;
|
||||
|
||||
ckt->d_CKTstates [0] = temp ;
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
||||
int
|
||||
cuCKTstate123copy
|
||||
(
|
||||
CKTcircuit *ckt
|
||||
)
|
||||
{
|
||||
long unsigned int size ;
|
||||
cudaError_t status ;
|
||||
|
||||
size = (long unsigned int)ckt->CKTnumStates ;
|
||||
|
||||
status = cudaMemcpy (ckt->d_CKTstate2, ckt->d_CKTstate1, size * sizeof(double), cudaMemcpyDeviceToDevice) ;
|
||||
CUDAMEMCPYCHECK (ckt->d_CKTstate2, size, double, status)
|
||||
|
||||
status = cudaMemcpy (ckt->d_CKTstate3, ckt->d_CKTstate1, size * sizeof(double), cudaMemcpyDeviceToDevice) ;
|
||||
CUDAMEMCPYCHECK (ckt->d_CKTstate3, size, double, status)
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
|
@ -0,0 +1,63 @@
|
|||
/*
|
||||
* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to
|
||||
* endorse or promote products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "ngspice/config.h"
|
||||
#include "ngspice/cktdefs.h"
|
||||
#include "ngspice/sperror.h"
|
||||
#include "cuda_runtime_api.h"
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
|
||||
/* cudaMemcpy MACRO to check it for errors --> CUDAMEMCPYCHECK(name of pointer, dimension, type, status) */
|
||||
#define CUDAMEMCPYCHECK(a, b, c, d) \
|
||||
if (d != cudaSuccess) \
|
||||
{ \
|
||||
fprintf (stderr, "cuCKTsystem routine...\n") ; \
|
||||
fprintf (stderr, "Error: cudaMemcpy failed on %s size of %d bytes\n", #a, (int)(b * sizeof(c))) ; \
|
||||
fprintf (stderr, "Error: %s = %d, %s\n", #d, d, cudaGetErrorString (d)) ; \
|
||||
return (E_NOMEM) ; \
|
||||
}
|
||||
|
||||
int
|
||||
cuCKTsystemDtoH
|
||||
(
|
||||
CKTcircuit *ckt
|
||||
)
|
||||
{
|
||||
long unsigned int nz, n ;
|
||||
cudaError_t status ;
|
||||
|
||||
nz = (long unsigned int)ckt->CKTmatrix->CKTklunz ;
|
||||
n = (long unsigned int)ckt->CKTmatrix->CKTkluN ;
|
||||
|
||||
/* Copy back the Matrix */
|
||||
status = cudaMemcpy (ckt->CKTmatrix->CKTkluAx, ckt->CKTmatrix->d_CKTkluAx, nz * sizeof(double), cudaMemcpyDeviceToHost) ;
|
||||
CUDAMEMCPYCHECK (ckt->CKTmatrix->CKTkluAx, nz, double, status)
|
||||
|
||||
/* Copy back the RHS */
|
||||
status = cudaMemcpy (ckt->CKTrhs, ckt->CKTmatrix->d_CKTrhs, (n + 1) * sizeof(double), cudaMemcpyDeviceToHost) ;
|
||||
CUDAMEMCPYCHECK (ckt->CKTrhs, (n + 1), double, status)
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
|
@ -109,4 +109,19 @@ endif
|
|||
|
||||
AM_CPPFLAGS = @AM_CPPFLAGS@ -I$(top_srcdir)/src/include -I$(top_srcdir)/src/spicelib/devices
|
||||
AM_CFLAGS = $(STATIC)
|
||||
|
||||
if USE_CUSPICE_WANTED
|
||||
|
||||
libckt_la_SOURCES += \
|
||||
CUSPICE/cucktflush.c \
|
||||
CUSPICE/cucktnonconupdate.c \
|
||||
CUSPICE/cucktrhsoldupdate.c \
|
||||
CUSPICE/cucktsetup.c \
|
||||
CUSPICE/cucktstatesupdate.c \
|
||||
CUSPICE/cucktsystem.c
|
||||
|
||||
AM_CPPFLAGS += $(CUDA_CPPFLAGS)
|
||||
AM_LDFLAGS = $(CUDA_LIBS) -lcusparse
|
||||
endif
|
||||
|
||||
MAINTAINERCLEANFILES = Makefile.in
|
||||
|
|
|
|||
|
|
@ -40,6 +40,12 @@ CKTdestroy(CKTcircuit *ckt)
|
|||
if ( DEVices[i] && DEVices[i]->DEVdestroy && ckt->CKThead[i] ) {
|
||||
DEVices[i]->DEVdestroy (&(ckt->CKThead[i]));
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
if (DEVices [i] && DEVices [i]->cuDEVdestroy && ckt->CKThead [i])
|
||||
DEVices [i]->cuDEVdestroy (ckt->CKThead [i]) ;
|
||||
#endif
|
||||
|
||||
}
|
||||
for(i=0;i<=ckt->CKTmaxOrder+1;i++){
|
||||
FREE(ckt->CKTstates[i]);
|
||||
|
|
|
|||
|
|
@ -18,6 +18,23 @@ Modified: 2000 AlansFixes
|
|||
#include "ngspice/devdefs.h"
|
||||
#include "ngspice/sperror.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#include "cuda_runtime.h"
|
||||
#include "cusparse_v2.h"
|
||||
|
||||
/* cudaMemcpy MACRO to check it for errors --> CUDAMEMCPYCHECK(name of pointer, dimension, type, status) */
|
||||
#define CUDAMEMCPYCHECK(a, b, c, d) \
|
||||
if (d != cudaSuccess) \
|
||||
{ \
|
||||
fprintf (stderr, "cuCKTload routine...\n") ; \
|
||||
fprintf (stderr, "Error: cudaMemcpy failed on %s size of %d bytes\n", #a, (int)(b * sizeof(c))) ; \
|
||||
fprintf (stderr, "Error: %s = %d, %s\n", #d, d, cudaGetErrorString (d)) ; \
|
||||
return (E_NOMEM) ; \
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef XSPICE
|
||||
/* gtri - add - wbk - 11/26/90 - add include for MIF global data */
|
||||
#include "ngspice/mif.h"
|
||||
|
|
@ -29,8 +46,17 @@ static int ZeroNoncurRow(SMPmatrix *matrix, CKTnode *nodes, int rownum);
|
|||
int
|
||||
CKTload(CKTcircuit *ckt)
|
||||
{
|
||||
#ifdef USE_CUSPICE
|
||||
cusparseStatus_t cusparseStatus ;
|
||||
double alpha, beta ;
|
||||
int status ;
|
||||
alpha = 1.0 ;
|
||||
beta = 0.0 ;
|
||||
#else
|
||||
int size ;
|
||||
#endif
|
||||
|
||||
int i;
|
||||
int size;
|
||||
double startTime;
|
||||
CKTnode *node;
|
||||
int error;
|
||||
|
|
@ -49,18 +75,43 @@ CKTload(CKTcircuit *ckt)
|
|||
#endif
|
||||
|
||||
startTime = SPfrontEnd->IFseconds();
|
||||
size = SMPmatSize(ckt->CKTmatrix);
|
||||
for (i = 0; i <= size; i++) {
|
||||
ckt->CKTrhs[i] = 0;
|
||||
}
|
||||
SMPclear(ckt->CKTmatrix);
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuCKTflush (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#else
|
||||
size = SMPmatSize (ckt->CKTmatrix) ;
|
||||
for (i = 0 ; i <= size ; i++)
|
||||
*(ckt->CKTrhs + i) = 0 ;
|
||||
|
||||
SMPclear (ckt->CKTmatrix) ;
|
||||
#endif
|
||||
|
||||
#ifdef STEPDEBUG
|
||||
noncon = ckt->CKTnoncon;
|
||||
#endif /* STEPDEBUG */
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuCKTnonconUpdateHtoD (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
|
||||
status = cuCKTrhsOldUpdateHtoD (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
for (i = 0; i < DEVmaxnum; i++) {
|
||||
if (DEVices[i] && DEVices[i]->DEVload && ckt->CKThead[i]) {
|
||||
error = DEVices[i]->DEVload (ckt->CKThead[i], ckt);
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuCKTnonconUpdateDtoH (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
if (ckt->CKTnoncon)
|
||||
ckt->CKTtroubleNode = 0;
|
||||
#ifdef STEPDEBUG
|
||||
|
|
@ -74,6 +125,48 @@ CKTload(CKTcircuit *ckt)
|
|||
}
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* Copy the CKTdiagGmin value to the GPU */
|
||||
status = cudaMemcpy (ckt->d_CKTloadOutput + ckt->total_n_values, &(ckt->CKTdiagGmin), sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (ckt->d_CKTloadOutput + ckt->total_n_values, 1, double, status)
|
||||
|
||||
/* Performing CSRMV for the Sparse Matrix using CUSPARSE */
|
||||
cusparseStatus = cusparseDcsrmv ((cusparseHandle_t)(ckt->CKTmatrix->CKTcsrmvHandle),
|
||||
CUSPARSE_OPERATION_NON_TRANSPOSE,
|
||||
ckt->CKTmatrix->CKTklunz, ckt->total_n_values + 1,
|
||||
ckt->total_n_Ptr + ckt->CKTdiagElements,
|
||||
&alpha, (cusparseMatDescr_t)(ckt->CKTmatrix->CKTcsrmvDescr),
|
||||
ckt->d_CKTtopologyMatrixCSRx, ckt->d_CKTtopologyMatrixCSRp,
|
||||
ckt->d_CKTtopologyMatrixCSRj, ckt->d_CKTloadOutput, &beta,
|
||||
ckt->CKTmatrix->d_CKTkluAx) ;
|
||||
|
||||
if (cusparseStatus != CUSPARSE_STATUS_SUCCESS)
|
||||
{
|
||||
fprintf (stderr, "CUSPARSE MATRIX Call Error\n") ;
|
||||
return (E_NOMEM) ;
|
||||
}
|
||||
|
||||
/* Performing CSRMV for the RHS using CUSPARSE */
|
||||
cusparseStatus = cusparseDcsrmv ((cusparseHandle_t)(ckt->CKTmatrix->CKTcsrmvHandle),
|
||||
CUSPARSE_OPERATION_NON_TRANSPOSE,
|
||||
ckt->CKTmatrix->CKTkluN + 1, ckt->total_n_valuesRHS, ckt->total_n_PtrRHS,
|
||||
&alpha, (cusparseMatDescr_t)(ckt->CKTmatrix->CKTcsrmvDescr),
|
||||
ckt->d_CKTtopologyMatrixCSRxRHS, ckt->d_CKTtopologyMatrixCSRpRHS,
|
||||
ckt->d_CKTtopologyMatrixCSRjRHS, ckt->d_CKTloadOutputRHS, &beta,
|
||||
ckt->CKTmatrix->d_CKTrhs) ;
|
||||
|
||||
if (cusparseStatus != CUSPARSE_STATUS_SUCCESS)
|
||||
{
|
||||
fprintf (stderr, "CUSPARSE RHS Call Error\n") ;
|
||||
return (E_NOMEM) ;
|
||||
}
|
||||
|
||||
cudaDeviceSynchronize () ;
|
||||
|
||||
status = cuCKTsystemDtoH (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
#ifdef XSPICE
|
||||
/* gtri - add - wbk - 11/26/90 - reset the MIF init flags */
|
||||
|
|
|
|||
|
|
@ -16,6 +16,9 @@ static int spice3_gmin (CKTcircuit *, long int, long int, int);
|
|||
static int gillespie_src (CKTcircuit *, long int, long int, int);
|
||||
static int spice3_src (CKTcircuit *, long int, long int, int);
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
int
|
||||
CKTop (CKTcircuit * ckt, long int firstmode, long int continuemode,
|
||||
|
|
@ -127,6 +130,10 @@ static int
|
|||
dynamic_gmin (CKTcircuit * ckt, long int firstmode,
|
||||
long int continuemode, int iterlim)
|
||||
{
|
||||
#ifdef USE_CUSPICE
|
||||
int status ;
|
||||
#endif
|
||||
|
||||
double OldGmin, gtarget, factor;
|
||||
int success, failed, converged;
|
||||
|
||||
|
|
@ -152,6 +159,12 @@ dynamic_gmin (CKTcircuit * ckt, long int firstmode,
|
|||
for (i = 0; i < ckt->CKTnumStates; i++)
|
||||
ckt->CKTstate0 [i] = 0;
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuCKTstatesFlush (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
factor = ckt->CKTgminFactor;
|
||||
OldGmin = 1e-2;
|
||||
ckt->CKTdiagGmin = OldGmin / factor;
|
||||
|
|
@ -180,6 +193,12 @@ dynamic_gmin (CKTcircuit * ckt, long int firstmode,
|
|||
i++;
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuCKTstate0UpdateDtoH (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
for (i = 0; i < ckt->CKTnumStates; i++) {
|
||||
OldCKTstate0[i] = ckt->CKTstate0[i];
|
||||
}
|
||||
|
|
@ -222,6 +241,13 @@ dynamic_gmin (CKTcircuit * ckt, long int firstmode,
|
|||
for (i = 0; i < ckt->CKTnumStates; i++) {
|
||||
ckt->CKTstate0[i] = OldCKTstate0[i];
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuCKTstate0UpdateHtoD (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -355,6 +381,9 @@ static int
|
|||
gillespie_src (CKTcircuit * ckt, long int firstmode,
|
||||
long int continuemode, int iterlim)
|
||||
{
|
||||
#ifdef USE_CUSPICE
|
||||
int status ;
|
||||
#endif
|
||||
|
||||
int converged, NumNodes, i, iters;
|
||||
double raise, ConvFact;
|
||||
|
|
@ -386,6 +415,12 @@ gillespie_src (CKTcircuit * ckt, long int firstmode,
|
|||
for (i = 0; i < ckt->CKTnumStates; i++)
|
||||
ckt->CKTstate0[i] = 0;
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuCKTstatesFlush (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
/* First, try a straight solution with all sources at zero */
|
||||
|
||||
fprintf (stderr, "Supplies reduced to %8.4f%% ", ckt->CKTsrcFact * 100);
|
||||
|
|
@ -445,6 +480,12 @@ gillespie_src (CKTcircuit * ckt, long int firstmode,
|
|||
i++;
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuCKTstate0UpdateDtoH (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
for (i = 0; i < ckt->CKTnumStates; i++)
|
||||
OldCKTstate0[i] = ckt->CKTstate0[i];
|
||||
|
||||
|
|
@ -482,6 +523,12 @@ gillespie_src (CKTcircuit * ckt, long int firstmode,
|
|||
i++;
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuCKTstate0UpdateDtoH (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
for (i = 0; i < ckt->CKTnumStates; i++)
|
||||
OldCKTstate0[i] = ckt->CKTstate0[i];
|
||||
|
||||
|
|
@ -521,6 +568,12 @@ gillespie_src (CKTcircuit * ckt, long int firstmode,
|
|||
for (i = 0; i < ckt->CKTnumStates; i++)
|
||||
ckt->CKTstate0[i] = OldCKTstate0[i];
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuCKTstate0UpdateHtoD (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
if ((ckt->CKTsrcFact) > 1)
|
||||
|
|
|
|||
|
|
@ -15,6 +15,11 @@ Author: 1985 Thomas L. Quarles
|
|||
#include "ngspice/devdefs.h"
|
||||
#include "ngspice/sperror.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#include "cusparse_v2.h"
|
||||
#endif
|
||||
|
||||
#ifdef USE_OMP
|
||||
#include <omp.h>
|
||||
#include "ngspice/cpextern.h"
|
||||
|
|
@ -41,9 +46,62 @@ BindCompare (const void *a, const void *b)
|
|||
}
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
typedef struct sElement {
|
||||
int row ;
|
||||
int col ;
|
||||
double val ;
|
||||
} Element ;
|
||||
|
||||
static
|
||||
int
|
||||
Compare (const void *a, const void *b)
|
||||
{
|
||||
Element *A, *B ;
|
||||
A = (Element *)a ;
|
||||
B = (Element *)b ;
|
||||
return (A->row - B->row) ;
|
||||
}
|
||||
|
||||
static
|
||||
int
|
||||
Compress (int *Ai, int *Bp, int num_rows, int n_COO)
|
||||
{
|
||||
int i, j ;
|
||||
|
||||
for (i = 0 ; i <= Ai [0] ; i++)
|
||||
Bp [i] = 0 ;
|
||||
|
||||
j = Ai [0] + 1 ;
|
||||
for (i = 1 ; i < n_COO ; i++)
|
||||
{
|
||||
if (Ai [i] == Ai [i - 1] + 1)
|
||||
{
|
||||
Bp [j] = i ;
|
||||
j++ ;
|
||||
}
|
||||
else if (Ai [i] > Ai [i - 1] + 1)
|
||||
{
|
||||
for ( ; j <= Ai [i] ; j++)
|
||||
Bp [j] = i ;
|
||||
}
|
||||
}
|
||||
|
||||
for ( ; j <= num_rows ; j++)
|
||||
Bp [j] = i ;
|
||||
|
||||
return 0 ;
|
||||
}
|
||||
#endif
|
||||
|
||||
int
|
||||
CKTsetup(CKTcircuit *ckt)
|
||||
{
|
||||
#ifdef USE_CUSPICE
|
||||
int status ;
|
||||
cusparseStatus_t cusparseStatus ;
|
||||
#endif
|
||||
|
||||
int i;
|
||||
int error;
|
||||
#ifdef XSPICE
|
||||
|
|
@ -135,6 +193,124 @@ CKTsetup(CKTcircuit *ckt)
|
|||
DEVices [i]->DEVbindCSC (ckt->CKThead [i], ckt) ;
|
||||
|
||||
ckt->CKTmatrix->CKTkluMatrixIsComplex = CKTkluMatrixReal ;
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
fprintf (stderr, "Using CUSPICE (NGSPICE on CUDA Platforms)\n") ;
|
||||
|
||||
/* In the DEVsetup the Position Vectors must be assigned and copied to the GPU */
|
||||
int j, k, u, TopologyNNZ ;
|
||||
int uRHS, TopologyNNZRHS ;
|
||||
int ret ;
|
||||
|
||||
|
||||
/* CKTloadOutput Vector allocation - DIRECTLY in the GPU memory */
|
||||
|
||||
/* CKTloadOutput for the RHS Vector allocation - DIRECTLY in the GPU memory */
|
||||
|
||||
|
||||
/* Diagonal Elements Counting */
|
||||
j = 0 ;
|
||||
for (i = 0 ; i < n ; i++)
|
||||
if (ckt->CKTmatrix->CKTdiag_CSC [i] != NULL)
|
||||
j++ ;
|
||||
|
||||
ckt->CKTdiagElements = j ;
|
||||
|
||||
/* Topology Matrix Pre-Allocation in COO format */
|
||||
TopologyNNZ = ckt->total_n_Ptr + ckt->CKTdiagElements ; // + ckt->CKTdiagElements because of CKTdiagGmin
|
||||
// without the zeroes along the diagonal
|
||||
ckt->CKTtopologyMatrixCOOi = TMALLOC (int, TopologyNNZ) ;
|
||||
ckt->CKTtopologyMatrixCOOj = TMALLOC (int, TopologyNNZ) ;
|
||||
ckt->CKTtopologyMatrixCOOx = TMALLOC (double, TopologyNNZ) ;
|
||||
|
||||
/* Topology Matrix for the RHS Pre-Allocation in COO format */
|
||||
TopologyNNZRHS = ckt->total_n_PtrRHS ;
|
||||
ckt->CKTtopologyMatrixCOOiRHS = TMALLOC (int, TopologyNNZRHS) ;
|
||||
ckt->CKTtopologyMatrixCOOjRHS = TMALLOC (int, TopologyNNZRHS) ;
|
||||
ckt->CKTtopologyMatrixCOOxRHS = TMALLOC (double, TopologyNNZRHS) ;
|
||||
|
||||
|
||||
/* Topology Matrix Pre-Allocation in CSR format */
|
||||
ckt->CKTtopologyMatrixCSRp = TMALLOC (int, nz + 1) ;
|
||||
|
||||
/* Topology Matrix for the RHS Pre-Allocation in CSR format */
|
||||
ckt->CKTtopologyMatrixCSRpRHS = TMALLOC (int, (n + 1) + 1) ;
|
||||
|
||||
|
||||
/* Topology Matrix Construction & Topology Matrix for the RHS Construction */
|
||||
|
||||
u = 0 ;
|
||||
uRHS = 0 ;
|
||||
for (i = 0 ; i < DEVmaxnum ; i++)
|
||||
if (DEVices [i] && DEVices [i]->DEVtopology && ckt->CKThead [i])
|
||||
DEVices [i]->DEVtopology (ckt->CKThead [i], ckt, &u, &uRHS) ;
|
||||
|
||||
|
||||
/* CKTdiagGmin Contribute Addition to the Topology Matrix */
|
||||
k = u ;
|
||||
for (j = 0 ; j < n ; j++)
|
||||
{
|
||||
if (ckt->CKTmatrix->CKTdiag_CSC [j] >= ckt->CKTmatrix->CKTkluAx)
|
||||
{
|
||||
ckt->CKTtopologyMatrixCOOi [k] = (int)(ckt->CKTmatrix->CKTdiag_CSC [j] - ckt->CKTmatrix->CKTkluAx) ;
|
||||
ckt->CKTtopologyMatrixCOOj [k] = ckt->total_n_values ;
|
||||
ckt->CKTtopologyMatrixCOOx [k] = 1 ;
|
||||
k++ ;
|
||||
}
|
||||
}
|
||||
|
||||
/* Copy the Topology Matrix to the GPU in COO format */
|
||||
|
||||
|
||||
/* COO format to CSR format Conversion using Quick Sort */
|
||||
|
||||
Element *TopologyStruct ;
|
||||
TopologyStruct = TMALLOC (Element, TopologyNNZ) ;
|
||||
|
||||
for (i = 0 ; i < TopologyNNZ ; i++)
|
||||
{
|
||||
TopologyStruct [i].row = ckt->CKTtopologyMatrixCOOi [i] ;
|
||||
TopologyStruct [i].col = ckt->CKTtopologyMatrixCOOj [i] ;
|
||||
TopologyStruct [i].val = ckt->CKTtopologyMatrixCOOx [i] ;
|
||||
}
|
||||
|
||||
qsort (TopologyStruct, (size_t)TopologyNNZ, sizeof(Element), Compare) ;
|
||||
|
||||
for (i = 0 ; i < TopologyNNZ ; i++)
|
||||
{
|
||||
ckt->CKTtopologyMatrixCOOi [i] = TopologyStruct [i].row ;
|
||||
ckt->CKTtopologyMatrixCOOj [i] = TopologyStruct [i].col ;
|
||||
ckt->CKTtopologyMatrixCOOx [i] = TopologyStruct [i].val ;
|
||||
}
|
||||
|
||||
ret = Compress (ckt->CKTtopologyMatrixCOOi, ckt->CKTtopologyMatrixCSRp, nz, TopologyNNZ) ;
|
||||
|
||||
/* COO format to CSR format Conversion for the RHS using Quick Sort */
|
||||
|
||||
Element *TopologyStructRHS ;
|
||||
TopologyStructRHS = TMALLOC (Element, TopologyNNZRHS) ;
|
||||
|
||||
for (i = 0 ; i < TopologyNNZRHS ; i++)
|
||||
{
|
||||
TopologyStructRHS [i].row = ckt->CKTtopologyMatrixCOOiRHS [i] ;
|
||||
TopologyStructRHS [i].col = ckt->CKTtopologyMatrixCOOjRHS [i] ;
|
||||
TopologyStructRHS [i].val = ckt->CKTtopologyMatrixCOOxRHS [i] ;
|
||||
}
|
||||
|
||||
qsort (TopologyStructRHS, (size_t)TopologyNNZRHS, sizeof(Element), Compare) ;
|
||||
|
||||
for (i = 0 ; i < TopologyNNZRHS ; i++)
|
||||
{
|
||||
ckt->CKTtopologyMatrixCOOiRHS [i] = TopologyStructRHS [i].row ;
|
||||
ckt->CKTtopologyMatrixCOOjRHS [i] = TopologyStructRHS [i].col ;
|
||||
ckt->CKTtopologyMatrixCOOxRHS [i] = TopologyStructRHS [i].val ;
|
||||
}
|
||||
|
||||
ret = Compress (ckt->CKTtopologyMatrixCOOiRHS, ckt->CKTtopologyMatrixCSRpRHS, n + 1, TopologyNNZRHS) ;
|
||||
|
||||
/* Multiply the Topology Matrix by the M Vector to build the Final CSC Matrix - after the CKTload Call */
|
||||
#endif
|
||||
|
||||
} else {
|
||||
fprintf (stderr, "Using SPARSE 1.3 as Direct Linear Solver\n") ;
|
||||
}
|
||||
|
|
@ -143,6 +319,34 @@ CKTsetup(CKTcircuit *ckt)
|
|||
for(i=0;i<=MAX(2,ckt->CKTmaxOrder)+1;i++) { /* dctran needs 3 states as minimum */
|
||||
CKALLOC(ckt->CKTstates[i],ckt->CKTnumStates,double);
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
ckt->d_MatrixSize = SMPmatSize (ckt->CKTmatrix) ;
|
||||
status = cuCKTsetup (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
|
||||
/* CUSPARSE Handle Creation */
|
||||
cusparseStatus = cusparseCreate ((cusparseHandle_t *)(&(ckt->CKTmatrix->CKTcsrmvHandle))) ;
|
||||
if (cusparseStatus != CUSPARSE_STATUS_SUCCESS)
|
||||
{
|
||||
fprintf (stderr, "CUSPARSE Handle Setup Error\n") ;
|
||||
return (E_NOMEM) ;
|
||||
}
|
||||
|
||||
/* CUSPARSE Matrix Descriptor Creation */
|
||||
cusparseStatus = cusparseCreateMatDescr ((cusparseMatDescr_t *)(&(ckt->CKTmatrix->CKTcsrmvDescr))) ;
|
||||
if (cusparseStatus != CUSPARSE_STATUS_SUCCESS)
|
||||
{
|
||||
fprintf (stderr, "CUSPARSE Matrix Descriptor Setup Error\n") ;
|
||||
return (E_NOMEM) ;
|
||||
}
|
||||
|
||||
/* CUSPARSE Matrix Properties Definition */
|
||||
cusparseSetMatType ((cusparseMatDescr_t)(ckt->CKTmatrix->CKTcsrmvDescr), CUSPARSE_MATRIX_TYPE_GENERAL) ;
|
||||
cusparseSetMatIndexBase ((cusparseMatDescr_t)(ckt->CKTmatrix->CKTcsrmvDescr), CUSPARSE_INDEX_BASE_ZERO) ;
|
||||
#endif
|
||||
|
||||
#ifdef WANT_SENSE2
|
||||
if(ckt->CKTsenInfo){
|
||||
/* to allocate memory to sensitivity structures if
|
||||
|
|
|
|||
|
|
@ -62,18 +62,26 @@ do { \
|
|||
ckt->CKTstat->STATtranSyncTime += ckt->CKTstat->STATsyncTime - startkTime; \
|
||||
} while(0)
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
int
|
||||
DCtran(CKTcircuit *ckt,
|
||||
int restart) /* forced restart flag */
|
||||
{
|
||||
#ifdef USE_CUSPICE
|
||||
int status ;
|
||||
#else
|
||||
double *temp ;
|
||||
#endif
|
||||
|
||||
TRANan *job = (TRANan *) ckt->CKTcurJob;
|
||||
|
||||
int i;
|
||||
double olddelta;
|
||||
double delta;
|
||||
double newdelta;
|
||||
double *temp;
|
||||
double startdTime;
|
||||
double startsTime;
|
||||
double startlTime;
|
||||
|
|
@ -340,8 +348,14 @@ DCtran(CKTcircuit *ckt,
|
|||
ckt->CKTmode = (ckt->CKTmode&MODEUIC) | MODETRAN | MODEINITTRAN;
|
||||
/* modeinittran set here */
|
||||
ckt->CKTag[0]=ckt->CKTag[1]=0;
|
||||
bcopy(ckt->CKTstate0, ckt->CKTstate1,
|
||||
(size_t) ckt->CKTnumStates * sizeof(double));
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuCKTstate01copy (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#else
|
||||
bcopy (ckt->CKTstate0, ckt->CKTstate1, (size_t) ckt->CKTnumStates * sizeof(double)) ;
|
||||
#endif
|
||||
|
||||
#ifdef WANT_SENSE2
|
||||
if(ckt->CKTsenInfo && (ckt->CKTsenInfo->SENmode & TRANSEN)){
|
||||
|
|
@ -705,11 +719,17 @@ resume:
|
|||
ckt->CKTdeltaOld[i+1] = ckt->CKTdeltaOld[i];
|
||||
ckt->CKTdeltaOld[0] = ckt->CKTdelta;
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuCKTstatesCircularBuffer (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#else
|
||||
temp = ckt->CKTstates[ckt->CKTmaxOrder+1];
|
||||
for(i=ckt->CKTmaxOrder;i>=0;i--) {
|
||||
ckt->CKTstates[i+1] = ckt->CKTstates[i];
|
||||
}
|
||||
ckt->CKTstates[0] = temp;
|
||||
#endif
|
||||
|
||||
/* 600 */
|
||||
for (;;) {
|
||||
|
|
@ -780,10 +800,19 @@ resume:
|
|||
ckt->CKTstat->STATtimePts ++;
|
||||
ckt->CKTmode = (ckt->CKTmode&MODEUIC)|MODETRAN | MODEINITPRED;
|
||||
if(firsttime) {
|
||||
for(i=0;i<ckt->CKTnumStates;i++) {
|
||||
ckt->CKTstate2[i] = ckt->CKTstate1[i];
|
||||
ckt->CKTstate3[i] = ckt->CKTstate1[i];
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuCKTstate123copy (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#else
|
||||
for (i = 0 ; i < ckt->CKTnumStates ; i++)
|
||||
{
|
||||
ckt->CKTstate2 [i] = ckt->CKTstate1 [i] ;
|
||||
ckt->CKTstate3 [i] = ckt->CKTstate1 [i] ;
|
||||
}
|
||||
#endif
|
||||
|
||||
}
|
||||
/* txl, cpl addition */
|
||||
if (converged == 1111) {
|
||||
|
|
@ -853,6 +882,13 @@ resume:
|
|||
goto chkStep;
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuCKTstatesUpdateDtoH (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
newdelta = ckt->CKTdelta;
|
||||
error = CKTtrunc(ckt,&newdelta);
|
||||
if(error) {
|
||||
|
|
|
|||
|
|
@ -82,6 +82,11 @@ SPICEdev ASRCinfo = {
|
|||
/* DEVbindCSCComplexToReal */ NULL,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -81,6 +81,11 @@ SPICEdev BJTinfo = { /* description from struct IFdevice */
|
|||
/* DEVbindCSCComplexToReal */ BJTbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -81,6 +81,11 @@ SPICEdev B1info = {
|
|||
/* DEVbindCSCComplexToReal */ B1bindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -81,6 +81,11 @@ SPICEdev B2info = {
|
|||
/* DEVbindCSCComplexToReal */ B2bindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -80,6 +80,11 @@ SPICEdev BSIM3info = {
|
|||
/* DEVbindCSCComplexToReal */ BSIM3bindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -78,6 +78,11 @@ SPICEdev B3SOIDDinfo = {
|
|||
/* DEVbindCSCComplexToReal */ B3SOIDDbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
SPICEdev *
|
||||
|
|
@ -85,5 +90,3 @@ get_b3soidd_info (void)
|
|||
{
|
||||
return &B3SOIDDinfo;
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -79,13 +79,13 @@ SPICEdev B3SOIFDinfo = {
|
|||
/* DEVbindCSCComplexToReal */ B3SOIFDbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
SPICEdev *
|
||||
get_b3soifd_info (void)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -80,6 +80,11 @@ SPICEdev B3SOIPDinfo = {
|
|||
/* DEVbindCSCComplexToReal */ B3SOIPDbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
SPICEdev *
|
||||
|
|
|
|||
|
|
@ -79,6 +79,11 @@ SPICEdev B3v0info = {
|
|||
/* DEVbindCSCComplexToReal */ BSIM3v0bindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -79,6 +79,11 @@ SPICEdev BSIM3v1info = {
|
|||
/* DEVbindCSCComplexToReal */ BSIM3v1bindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -80,6 +80,11 @@ SPICEdev BSIM3v32info = {
|
|||
/* DEVbindCSCComplexToReal */ BSIM3v32bindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,844 @@
|
|||
/*
|
||||
* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to
|
||||
* endorse or promote products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "ngspice/ngspice.h"
|
||||
#include "ngspice/cktdefs.h"
|
||||
#include "bsim4def.h"
|
||||
#include "ngspice/sperror.h"
|
||||
|
||||
#define TopologyMatrixInsert(Ptr, instance_ID, offset, Value, global_ID) \
|
||||
ckt->CKTtopologyMatrixCOOi [global_ID] = (int)(here->Ptr - basePtr) ; \
|
||||
ckt->CKTtopologyMatrixCOOj [global_ID] = model->PositionVector [instance_ID] + offset ; \
|
||||
ckt->CKTtopologyMatrixCOOx [global_ID] = Value ;
|
||||
|
||||
#define TopologyMatrixInsertRHS(offset, instance_ID, offsetRHS, Value, global_ID) \
|
||||
ckt->CKTtopologyMatrixCOOiRHS [global_ID] = here->offset ; \
|
||||
ckt->CKTtopologyMatrixCOOjRHS [global_ID] = model->PositionVectorRHS [instance_ID] + offsetRHS ; \
|
||||
ckt->CKTtopologyMatrixCOOxRHS [global_ID] = Value ;
|
||||
|
||||
int
|
||||
BSIM4topology (GENmodel *inModel, CKTcircuit *ckt, int *i, int *j)
|
||||
{
|
||||
BSIM4model *model = (BSIM4model *)inModel ;
|
||||
BSIM4instance *here ;
|
||||
int k, total_offset, total_offsetRHS ;
|
||||
double *basePtr ;
|
||||
basePtr = ckt->CKTmatrix->CKTkluAx ;
|
||||
|
||||
/* loop through all the capacitor models */
|
||||
for ( ; model != NULL ; model = model->BSIM4nextModel)
|
||||
{
|
||||
k = 0 ;
|
||||
|
||||
/* loop through all the instances of the model */
|
||||
for (here = model->BSIM4instances ; here != NULL ; here = here->BSIM4nextInstance)
|
||||
{
|
||||
total_offset = 0 ;
|
||||
total_offsetRHS = 0 ;
|
||||
|
||||
/* For the Matrix */
|
||||
if (here->BSIM4rgateMod == 1)
|
||||
{
|
||||
/* m * geltd */
|
||||
if ((here->BSIM4gNodeExt != 0) && (here->BSIM4gNodeExt != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GEgePtr, k, 0, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * geltd */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4gNodeExt != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GPgePtr, k, 0, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * geltd */
|
||||
if ((here->BSIM4gNodeExt != 0) && (here->BSIM4gNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GEgpPtr, k, 0, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gcggb + geltd - ggtg + gIgtotg) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4gNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GPgpPtr, k, 1, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gcgdb - ggtd + gIgtotd) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4dNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GPdpPtr, k, 2, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gcgsb - ggts + gIgtots) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4sNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GPspPtr, k, 3, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gcgbb - ggtb + gIgtotb) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4bNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GPbpPtr, k, 4, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
total_offset += 5 ;
|
||||
}
|
||||
else if (here->BSIM4rgateMod == 2)
|
||||
{
|
||||
/* m * gcrg */
|
||||
if ((here->BSIM4gNodeExt != 0) && (here->BSIM4gNodeExt != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GEgePtr, k, 0, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * gcrgg */
|
||||
if ((here->BSIM4gNodeExt != 0) && (here->BSIM4gNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GEgpPtr, k, 1, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * gcrgd */
|
||||
if ((here->BSIM4gNodeExt != 0) && (here->BSIM4dNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GEdpPtr, k, 2, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * gcrgs */
|
||||
if ((here->BSIM4gNodeExt != 0) && (here->BSIM4sNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GEspPtr, k, 3, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * gcrgb */
|
||||
if ((here->BSIM4gNodeExt != 0) && (here->BSIM4bNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GEbpPtr, k, 4, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * gcrg */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4gNodeExt != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GPgePtr, k, 0, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gcggb - gcrgg - ggtg + gIgtotg) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4gNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GPgpPtr, k, 5, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gcgdb - gcrgd - ggtd + gIgtotd) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4dNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GPdpPtr, k, 6, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gcgsb - gcrgs - ggts + gIgtots) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4sNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GPspPtr, k, 7, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gcgbb - gcrgb - ggtb + gIgtotb) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4bNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GPbpPtr, k, 8, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
total_offset += 9 ;
|
||||
}
|
||||
else if (here->BSIM4rgateMod == 3)
|
||||
{
|
||||
/* m * geltd */
|
||||
if ((here->BSIM4gNodeExt != 0) && (here->BSIM4gNodeExt != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GEgePtr, k, 0, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * geltd */
|
||||
if ((here->BSIM4gNodeExt != 0) && (here->BSIM4gNodeMid != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GEgmPtr, k, 0, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * geltd */
|
||||
if ((here->BSIM4gNodeMid != 0) && (here->BSIM4gNodeExt != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GMgePtr, k, 0, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (geltd + gcrg + gcgmgmb) */
|
||||
if ((here->BSIM4gNodeMid != 0) && (here->BSIM4gNodeMid != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GMgmPtr, k, 1, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gcrgd + gcgmdb) */
|
||||
if ((here->BSIM4gNodeMid != 0) && (here->BSIM4dNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GMdpPtr, k, 2, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * gcrgg */
|
||||
if ((here->BSIM4gNodeMid != 0) && (here->BSIM4gNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GMgpPtr, k, 3, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gcrgs + gcgmsb) */
|
||||
if ((here->BSIM4gNodeMid != 0) && (here->BSIM4sNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GMspPtr, k, 4, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gcrgb + gcgmbb) */
|
||||
if ((here->BSIM4gNodeMid != 0) && (here->BSIM4bNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GMbpPtr, k, 5, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * gcdgmb */
|
||||
if ((here->BSIM4dNodePrime != 0) && (here->BSIM4gNodeMid != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4DPgmPtr, k, 6, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * gcrg */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4gNodeMid != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GPgmPtr, k, 7, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * gcsgmb */
|
||||
if ((here->BSIM4sNodePrime != 0) && (here->BSIM4gNodeMid != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4SPgmPtr, k, 8, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * gcbgmb */
|
||||
if ((here->BSIM4bNodePrime != 0) && (here->BSIM4gNodeMid != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4BPgmPtr, k, 9, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gcggb - gcrgg - ggtg + gIgtotg) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4gNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GPgpPtr, k, 10, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gcgdb - gcrgd - ggtd + gIgtotd) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4dNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GPdpPtr, k, 11, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gcgsb - gcrgs - ggts + gIgtots) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4sNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GPspPtr, k, 12, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gcgbb - gcrgb - ggtb + gIgtotb) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4bNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GPbpPtr, k, 13, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
total_offset += 14 ;
|
||||
} else {
|
||||
/* m * (gcggb - ggtg + gIgtotg) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4gNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GPgpPtr, k, 0, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gcgdb - ggtd + gIgtotd) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4dNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GPdpPtr, k, 1, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gcgsb - ggts + gIgtots) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4sNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GPspPtr, k, 2, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gcgbb - ggtb + gIgtotb) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4bNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GPbpPtr, k, 3, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
total_offset += 4 ;
|
||||
}
|
||||
|
||||
|
||||
if (model->BSIM4rdsMod)
|
||||
{
|
||||
/* m * gdtotg */
|
||||
if ((here->BSIM4dNode != 0) && (here->BSIM4gNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4DgpPtr, k, total_offset + 0, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * gdtots */
|
||||
if ((here->BSIM4dNode != 0) && (here->BSIM4sNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4DspPtr, k, total_offset + 1, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * gdtotb */
|
||||
if ((here->BSIM4dNode != 0) && (here->BSIM4bNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4DbpPtr, k, total_offset + 2, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * gstotd */
|
||||
if ((here->BSIM4sNode != 0) && (here->BSIM4dNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4SdpPtr, k, total_offset + 3, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * gstotg */
|
||||
if ((here->BSIM4sNode != 0) && (here->BSIM4gNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4SgpPtr, k, total_offset + 0, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * gstotb */
|
||||
if ((here->BSIM4sNode != 0) && (here->BSIM4bNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4SbpPtr, k, total_offset + 2, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
total_offset += 4 ;
|
||||
}
|
||||
|
||||
|
||||
/* m * (gdpr + here->BSIM4gds + here->BSIM4gbd + T1 * ddxpart_dVd -
|
||||
gdtotd + RevSum + gcddb + gbdpdp + dxpart * ggtd - gIdtotd) + m * ggidld */
|
||||
if ((here->BSIM4dNodePrime != 0) && (here->BSIM4dNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4DPdpPtr, k, total_offset + 0, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gdpr + gdtot) */
|
||||
if ((here->BSIM4dNodePrime != 0) && (here->BSIM4dNode != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4DPdPtr, k, total_offset + 1, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (Gm + gcdgb - gdtotg + gbdpg - gIdtotg + dxpart * ggtg + T1 * ddxpart_dVg) + m * ggidlg */
|
||||
if ((here->BSIM4dNodePrime != 0) && (here->BSIM4gNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4DPgpPtr, k, total_offset + 2, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (here->BSIM4gds + gdtots - dxpart * ggts + gIdtots -
|
||||
T1 * ddxpart_dVs + FwdSum - gcdsb - gbdpsp) + m * (ggidlg + ggidld + ggidlb) */
|
||||
if ((here->BSIM4dNodePrime != 0) && (here->BSIM4sNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4DPspPtr, k, total_offset + 3, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gjbd + gdtotb - Gmbs - gcdbb - gbdpb + gIdtotb - T1 * ddxpart_dVb - dxpart * ggtb) - m * ggidlb */
|
||||
if ((here->BSIM4dNodePrime != 0) && (here->BSIM4bNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4DPbpPtr, k, total_offset + 4, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gdpr - gdtotd) */
|
||||
if ((here->BSIM4dNode != 0) && (here->BSIM4dNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4DdpPtr, k, total_offset + 5, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gdpr + gdtot) */
|
||||
if ((here->BSIM4dNode != 0) && (here->BSIM4dNode != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4DdPtr, k, total_offset + 1, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (here->BSIM4gds + gstotd + RevSum - gcsdb - gbspdp -
|
||||
T1 * dsxpart_dVd - sxpart * ggtd + gIstotd) + m * (ggisls + ggislg + ggislb) */
|
||||
if ((here->BSIM4sNodePrime != 0) && (here->BSIM4dNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4SPdpPtr, k, total_offset + 6, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gcsgb - Gm - gstotg + gbspg + sxpart * ggtg + T1 * dsxpart_dVg - gIstotg) + m * ggislg */
|
||||
if ((here->BSIM4sNodePrime != 0) && (here->BSIM4gNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4SPgpPtr, k, total_offset + 7, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gspr + here->BSIM4gds + here->BSIM4gbs + T1 * dsxpart_dVs -
|
||||
gstots + FwdSum + gcssb + gbspsp + sxpart * ggts - gIstots) + m * ggisls */
|
||||
if ((here->BSIM4sNodePrime != 0) && (here->BSIM4sNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4SPspPtr, k, total_offset + 8, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gspr + gstot) */
|
||||
if ((here->BSIM4sNodePrime != 0) && (here->BSIM4sNode != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4SPsPtr, k, total_offset + 9, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gjbs + gstotb + Gmbs - gcsbb - gbspb - sxpart * ggtb - T1 * dsxpart_dVb + gIstotb) - m * ggislb */
|
||||
if ((here->BSIM4sNodePrime != 0) && (here->BSIM4bNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4SPbpPtr, k, total_offset + 10, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gspr - gstots) */
|
||||
if ((here->BSIM4sNode != 0) && (here->BSIM4sNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4SspPtr, k, total_offset + 11, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gspr + gstot) */
|
||||
if ((here->BSIM4sNode != 0) && (here->BSIM4sNode != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4SsPtr, k, total_offset + 9, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gcbdb - gjbd + gbbdp - gIbtotd) - m * ggidld + m * (ggislg + ggisls + ggislb) */
|
||||
if ((here->BSIM4bNodePrime != 0) && (here->BSIM4dNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4BPdpPtr, k, total_offset + 12, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gcbgb - here->BSIM4gbgs - gIbtotg) - m * ggidlg - m * ggislg */
|
||||
if ((here->BSIM4bNodePrime != 0) && (here->BSIM4gNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4BPgpPtr, k, total_offset + 13, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gcbsb - gjbs + gbbsp - gIbtots) + m * (ggidlg + ggidld + ggidlb) - m * ggisls */
|
||||
if ((here->BSIM4bNodePrime != 0) && (here->BSIM4sNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4BPspPtr, k, total_offset + 14, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gjbd + gjbs + gcbbb - here->BSIM4gbbs - gIbtotb) - m * ggidlb - m * ggislb */
|
||||
if ((here->BSIM4bNodePrime != 0) && (here->BSIM4bNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4BPbpPtr, k, total_offset + 15, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
total_offset += 16 ;
|
||||
|
||||
/* stamp gidl included above */
|
||||
/* stamp gisl included above */
|
||||
|
||||
|
||||
if (here->BSIM4rbodyMod)
|
||||
{
|
||||
/* m * (gcdbdb - here->BSIM4gbd) */
|
||||
if ((here->BSIM4dNodePrime != 0) && (here->BSIM4dbNode != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4DPdbPtr, k, total_offset + 0, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (here->BSIM4gbs - gcsbsb) */
|
||||
if ((here->BSIM4sNodePrime != 0) && (here->BSIM4sbNode != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4SPsbPtr, k, total_offset + 1, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gcdbdb - here->BSIM4gbd) */
|
||||
if ((here->BSIM4dbNode != 0) && (here->BSIM4dNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4DBdpPtr, k, total_offset + 0, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (here->BSIM4gbd - gcdbdb + here->BSIM4grbpd + here->BSIM4grbdb) */
|
||||
if ((here->BSIM4dbNode != 0) && (here->BSIM4dbNode != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4DBdbPtr, k, total_offset + 2, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * here->BSIM4grbpd */
|
||||
if ((here->BSIM4dbNode != 0) && (here->BSIM4bNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4DBbpPtr, k, total_offset + 3, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * here->BSIM4grbdb */
|
||||
if ((here->BSIM4dbNode != 0) && (here->BSIM4bNode != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4DBbPtr, k, total_offset + 4, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * here->BSIM4grbpd */
|
||||
if ((here->BSIM4bNodePrime != 0) && (here->BSIM4dbNode != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4BPdbPtr, k, total_offset + 3, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * here->BSIM4grbpb */
|
||||
if ((here->BSIM4bNodePrime != 0) && (here->BSIM4bNode != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4BPbPtr, k, total_offset + 5, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * here->BSIM4grbps */
|
||||
if ((here->BSIM4bNodePrime != 0) && (here->BSIM4sbNode != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4BPsbPtr, k, total_offset + 6, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (here->BSIM4grbpd + here->BSIM4grbps + here->BSIM4grbpb) */
|
||||
if ((here->BSIM4bNodePrime != 0) && (here->BSIM4bNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4BPbpPtr, k, total_offset + 7, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (gcsbsb - here->BSIM4gbs) */
|
||||
if ((here->BSIM4sbNode != 0) && (here->BSIM4sNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4SBspPtr, k, total_offset + 8, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * here->BSIM4grbps */
|
||||
if ((here->BSIM4sbNode != 0) && (here->BSIM4bNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4SBbpPtr, k, total_offset + 6, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * here->BSIM4grbsb */
|
||||
if ((here->BSIM4sbNode != 0) && (here->BSIM4bNode != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4SBbPtr, k, total_offset + 9, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (here->BSIM4gbs - gcsbsb + here->BSIM4grbps + here->BSIM4grbsb) */
|
||||
if ((here->BSIM4sbNode != 0) && (here->BSIM4sbNode != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4SBsbPtr, k, total_offset + 10, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * here->BSIM4grbdb */
|
||||
if ((here->BSIM4bNode != 0) && (here->BSIM4dbNode != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4BdbPtr, k, total_offset + 4, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * here->BSIM4grbpb */
|
||||
if ((here->BSIM4bNode != 0) && (here->BSIM4bNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4BbpPtr, k, total_offset + 5, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * here->BSIM4grbsb */
|
||||
if ((here->BSIM4bNode != 0) && (here->BSIM4sbNode != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4BsbPtr, k, total_offset + 9, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (here->BSIM4grbsb + here->BSIM4grbdb + here->BSIM4grbpb) */
|
||||
if ((here->BSIM4bNode != 0) && (here->BSIM4bNode != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4BbPtr, k, total_offset + 11, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
total_offset += 12 ;
|
||||
}
|
||||
|
||||
|
||||
if (here->BSIM4trnqsMod)
|
||||
{
|
||||
/* m * (gqdef + here->BSIM4gtau) */
|
||||
if ((here->BSIM4qNode != 0) && (here->BSIM4qNode != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4QqPtr, k, total_offset + 0, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (ggtg - gcqgb) */
|
||||
if ((here->BSIM4qNode != 0) && (here->BSIM4gNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4QgpPtr, k, total_offset + 1, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (ggtd - gcqdb) */
|
||||
if ((here->BSIM4qNode != 0) && (here->BSIM4dNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4QdpPtr, k, total_offset + 2, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (ggts - gcqsb) */
|
||||
if ((here->BSIM4qNode != 0) && (here->BSIM4sNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4QspPtr, k, total_offset + 3, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * (ggtb - gcqbb) */
|
||||
if ((here->BSIM4qNode != 0) && (here->BSIM4bNodePrime != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4QbpPtr, k, total_offset + 4, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * dxpart * here->BSIM4gtau */
|
||||
if ((here->BSIM4dNodePrime != 0) && (here->BSIM4qNode != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4DPqPtr, k, total_offset + 5, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * sxpart * here->BSIM4gtau */
|
||||
if ((here->BSIM4sNodePrime != 0) && (here->BSIM4qNode != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4SPqPtr, k, total_offset + 6, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
/* m * here->BSIM4gtau */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4qNode != 0))
|
||||
{
|
||||
TopologyMatrixInsert (BSIM4GPqPtr, k, total_offset + 7, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* For the RHS */
|
||||
/* m * (ceqjd - ceqbd + ceqgdtot - ceqdrn - ceqqd + Idtoteq) */
|
||||
if (here->BSIM4dNodePrime != 0)
|
||||
{
|
||||
TopologyMatrixInsertRHS (BSIM4dNodePrime, k, total_offsetRHS + 0, 1, *j) ;
|
||||
(*j)++ ;
|
||||
}
|
||||
|
||||
/* m * (ceqqg - ceqgcrg + Igtoteq) */
|
||||
if (here->BSIM4gNodePrime != 0)
|
||||
{
|
||||
TopologyMatrixInsertRHS (BSIM4gNodePrime, k, total_offsetRHS + 1, -1, *j) ;
|
||||
(*j)++ ;
|
||||
}
|
||||
|
||||
total_offsetRHS += 2 ;
|
||||
|
||||
|
||||
if (here->BSIM4rgateMod == 2)
|
||||
{
|
||||
/* m * ceqgcrg */
|
||||
if (here->BSIM4gNodeExt != 0)
|
||||
{
|
||||
TopologyMatrixInsertRHS (BSIM4gNodeExt, k, total_offsetRHS + 0, -1, *j) ;
|
||||
(*j)++ ;
|
||||
}
|
||||
|
||||
total_offsetRHS += 1 ;
|
||||
}
|
||||
else if (here->BSIM4rgateMod == 3)
|
||||
{
|
||||
/* m * (ceqqgmid + ceqgcrg) */
|
||||
if (here->BSIM4gNodeMid != 0)
|
||||
{
|
||||
TopologyMatrixInsertRHS (BSIM4gNodeMid, k, total_offsetRHS + 0, -1, *j) ;
|
||||
(*j)++ ;
|
||||
}
|
||||
|
||||
total_offsetRHS += 1 ;
|
||||
}
|
||||
|
||||
|
||||
if (!here->BSIM4rbodyMod)
|
||||
{
|
||||
/* m * (ceqbd + ceqbs - ceqjd - ceqjs - ceqqb + Ibtoteq) */
|
||||
if (here->BSIM4bNodePrime != 0)
|
||||
{
|
||||
TopologyMatrixInsertRHS (BSIM4bNodePrime, k, total_offsetRHS + 0, 1, *j) ;
|
||||
(*j)++ ;
|
||||
}
|
||||
|
||||
/* m * (ceqdrn - ceqbs + ceqjs + ceqqg + ceqqb + ceqqd + ceqqgmid - ceqgstot + Istoteq) */
|
||||
if (here->BSIM4sNodePrime != 0)
|
||||
{
|
||||
TopologyMatrixInsertRHS (BSIM4sNodePrime, k, total_offsetRHS + 1, 1, *j) ;
|
||||
(*j)++ ;
|
||||
}
|
||||
|
||||
total_offsetRHS += 2 ;
|
||||
|
||||
} else {
|
||||
/* m * (ceqjd + ceqqjd) */
|
||||
if (here->BSIM4dbNode != 0)
|
||||
{
|
||||
TopologyMatrixInsertRHS (BSIM4dbNode, k, total_offsetRHS + 0, -1, *j) ;
|
||||
(*j)++ ;
|
||||
}
|
||||
|
||||
/* m * (ceqbd + ceqbs - ceqqb + Ibtoteq) */
|
||||
if (here->BSIM4bNodePrime != 0)
|
||||
{
|
||||
TopologyMatrixInsertRHS (BSIM4bNodePrime, k, total_offsetRHS + 1, 1, *j) ;
|
||||
(*j)++ ;
|
||||
}
|
||||
|
||||
/* m * (ceqjs + ceqqjs) */
|
||||
if (here->BSIM4sbNode != 0)
|
||||
{
|
||||
TopologyMatrixInsertRHS (BSIM4sbNode, k, total_offsetRHS + 2, -1, *j) ;
|
||||
(*j)++ ;
|
||||
}
|
||||
|
||||
/* m * (ceqdrn - ceqbs + ceqjs + ceqqd + ceqqg + ceqqb +
|
||||
ceqqjd + ceqqjs + ceqqgmid - ceqgstot + Istoteq) */
|
||||
if (here->BSIM4sNodePrime != 0)
|
||||
{
|
||||
TopologyMatrixInsertRHS (BSIM4sNodePrime, k, total_offsetRHS + 3, 1, *j) ;
|
||||
(*j)++ ;
|
||||
}
|
||||
|
||||
total_offsetRHS += 4 ;
|
||||
}
|
||||
|
||||
|
||||
if (model->BSIM4rdsMod)
|
||||
{
|
||||
/* m * ceqgdtot */
|
||||
if (here->BSIM4dNode != 0)
|
||||
{
|
||||
TopologyMatrixInsertRHS (BSIM4dNode, k, total_offsetRHS + 0, -1, *j) ;
|
||||
(*j)++ ;
|
||||
}
|
||||
|
||||
/* m * ceqgstot */
|
||||
if (here->BSIM4sNode != 0)
|
||||
{
|
||||
TopologyMatrixInsertRHS (BSIM4sNode, k, total_offsetRHS + 1, 1, *j) ;
|
||||
(*j)++ ;
|
||||
}
|
||||
|
||||
total_offsetRHS += 2 ;
|
||||
|
||||
}
|
||||
|
||||
|
||||
if (here->BSIM4trnqsMod)
|
||||
{
|
||||
/* m * (cqcheq - cqdef) */
|
||||
if (here->BSIM4qNode != 0)
|
||||
{
|
||||
TopologyMatrixInsertRHS (BSIM4qNode, k, total_offsetRHS + 0, 1, *j) ;
|
||||
(*j)++ ;
|
||||
}
|
||||
}
|
||||
|
||||
k++ ;
|
||||
}
|
||||
}
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
|
@ -0,0 +1,845 @@
|
|||
/*
|
||||
* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to
|
||||
* endorse or promote products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "ngspice/config.h"
|
||||
#include "cuda_runtime_api.h"
|
||||
#include "bsim4def.h"
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
|
||||
int
|
||||
cuBSIM4destroy
|
||||
(
|
||||
GENmodel *inModel
|
||||
)
|
||||
{
|
||||
BSIM4model *model = (BSIM4model *)inModel ;
|
||||
BSIM4instance *here ;
|
||||
|
||||
int i ;
|
||||
|
||||
for ( ; model != NULL ; model = model->BSIM4nextModel)
|
||||
{
|
||||
/* Special case here->d_pParam */
|
||||
i = 0 ;
|
||||
|
||||
for (here = model->BSIM4instances ; here != NULL ; here = here->BSIM4nextInstance)
|
||||
{
|
||||
if (here->pParam != NULL)
|
||||
cudaFree (model->pParamHost [i]) ;
|
||||
|
||||
i++ ;
|
||||
}
|
||||
|
||||
free (model->pParamHost) ;
|
||||
cudaFree (model->d_pParam) ;
|
||||
|
||||
/* DOUBLE */
|
||||
free (model->BSIM4paramCPU.BSIM4gbsRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gbsRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4cbsRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4cbsRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gbdRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gbdRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4cbdRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4cbdRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4vonRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4vonRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4vdsatRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4vdsatRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4csubRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4csubRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gdsRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gdsRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gmRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gmRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gmbsRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gmbsRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gcrgRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gcrgRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4IgidlRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4IgidlRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4IgislRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4IgislRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4IgcsRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4IgcsRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4IgcdRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4IgcdRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4IgsRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4IgsRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4IgdRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4IgdRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4IgbRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4IgbRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4cdRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4cdRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4qinvRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4qinvRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4cggbRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4cggbRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4cgsbRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4cgsbRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4cgdbRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4cgdbRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4cdgbRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4cdgbRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4cdsbRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4cdsbRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4cddbRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4cddbRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4cbgbRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4cbgbRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4cbsbRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4cbsbRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4cbdbRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4cbdbRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4csgbRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4csgbRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4cssbRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4cssbRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4csdbRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4csdbRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4cgbbRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4cgbbRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4csbbRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4csbbRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4cdbbRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4cdbbRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4cbbbRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4cbbbRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gtauRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gtauRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4qgateRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4qgateRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4qbulkRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4qbulkRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4qdrnRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4qdrnRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4qsrcRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4qsrcRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4capbsRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4capbsRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4capbdRWArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4capbdRWArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4icVDSArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4icVDSArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4icVGSArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4icVGSArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4icVBSArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4icVBSArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4vth0Array) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4vth0Array) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gbbsArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gbbsArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4ggidlbArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4ggidlbArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gbgsArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gbgsArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4ggidlgArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4ggidlgArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gbdsArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gbdsArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4ggidldArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4ggidldArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4ggislsArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4ggislsArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4ggislgArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4ggislgArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4ggislbArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4ggislbArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gIgsgArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gIgsgArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gIgcsgArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gIgcsgArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gIgcsdArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gIgcsdArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gIgcsbArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gIgcsbArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gIgdgArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gIgdgArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gIgcdgArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gIgcdgArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gIgcddArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gIgcddArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gIgcdbArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gIgcdbArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gIgbgArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gIgbgArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gIgbdArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gIgbdArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gIgbbArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gIgbbArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4ggidlsArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4ggidlsArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4ggisldArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4ggisldArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gstotArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gstotArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gstotdArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gstotdArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gstotgArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gstotgArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gstotbArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gstotbArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gdtotArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gdtotArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gdtotdArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gdtotdArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gdtotgArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gdtotgArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gdtotbArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gdtotbArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4cgdoArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4cgdoArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4qgdoArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4qgdoArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4cgsoArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4cgsoArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4qgsoArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4qgsoArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4AseffArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4AseffArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4PseffArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4PseffArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4nfArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4nfArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4XExpBVSArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4XExpBVSArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4vjsmFwdArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4vjsmFwdArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4IVjsmFwdArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4IVjsmFwdArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4vjsmRevArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4vjsmRevArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4IVjsmRevArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4IVjsmRevArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4SslpRevArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4SslpRevArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4SslpFwdArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4SslpFwdArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4AdeffArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4AdeffArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4PdeffArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4PdeffArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4XExpBVDArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4XExpBVDArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4vjdmFwdArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4vjdmFwdArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4IVjdmFwdArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4IVjdmFwdArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4vjdmRevArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4vjdmRevArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4IVjdmRevArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4IVjdmRevArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4DslpRevArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4DslpRevArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4DslpFwdArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4DslpFwdArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4SjctTempRevSatCurArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4SjctTempRevSatCurArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4SswTempRevSatCurArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4SswTempRevSatCurArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4SswgTempRevSatCurArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4SswgTempRevSatCurArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4DjctTempRevSatCurArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4DjctTempRevSatCurArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4DswTempRevSatCurArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4DswTempRevSatCurArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4DswgTempRevSatCurArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4DswgTempRevSatCurArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4vbscArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4vbscArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4thetavthArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4thetavthArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4eta0Array) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4eta0Array) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4k2oxArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4k2oxArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4nstarArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4nstarArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4vfbArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4vfbArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4vgs_effArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4vgs_effArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4vgd_effArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4vgd_effArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4dvgs_eff_dvgArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4dvgs_eff_dvgArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4dvgd_eff_dvgArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4dvgd_eff_dvgArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4VgsteffArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4VgsteffArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4grdswArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4grdswArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4AbulkArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4AbulkArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4vtfbphi1Array) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4vtfbphi1Array) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4ueffArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4ueffArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4u0tempArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4u0tempArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4vsattempArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4vsattempArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4EsatLArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4EsatLArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4VdseffArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4VdseffArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4vtfbphi2Array) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4vtfbphi2Array) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4CoxeffArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4CoxeffArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4AbovVgst2VtmArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4AbovVgst2VtmArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4IdovVdsArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4IdovVdsArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gcrgdArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gcrgdArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gcrgbArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gcrgbArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gcrggArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gcrggArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4grgeltdArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4grgeltdArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gcrgsArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gcrgsArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4sourceConductanceArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4sourceConductanceArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4drainConductanceArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4drainConductanceArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gstotsArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gstotsArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gdtotsArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gdtotsArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4vfbzbArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4vfbzbArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gIgssArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gIgssArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gIgddArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gIgddArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gIgbsArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gIgbsArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gIgcssArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gIgcssArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gIgcdsArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gIgcdsArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4noiGd0Array) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4noiGd0Array) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4cqdbArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4cqdbArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4cqsbArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4cqsbArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4cqgbArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4cqgbArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4qchqsArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4qchqsArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4cqbbArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4cqbbArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4taunetArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4taunetArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gtgArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gtgArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gtdArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gtdArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gtsArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gtsArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gtbArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gtbArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4mArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4mArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4grbpdArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4grbpdArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4grbdbArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4grbdbArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4grbpbArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4grbpbArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4grbpsArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4grbpsArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4grbsbArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4grbsbArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4dNodePrimeRHSValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4dNodePrimeRHSValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gNodePrimeRHSValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gNodePrimeRHSValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gNodeExtRHSValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gNodeExtRHSValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gNodeMidRHSValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gNodeMidRHSValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4bNodePrimeRHSValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4bNodePrimeRHSValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4sNodePrimeRHSValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4sNodePrimeRHSValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4dbNodeRHSValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4dbNodeRHSValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4sbNodeRHSValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4sbNodeRHSValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4dNodeRHSValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4dNodeRHSValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4sNodeRHSValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4sNodeRHSValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4qNodeRHSValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4qNodeRHSValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4GEgeValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4GEgeValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4GPgeValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4GPgeValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4GEgpValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4GEgpValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4GPgpValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4GPgpValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4GPdpValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4GPdpValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4GPspValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4GPspValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4GPbpValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4GPbpValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4GEdpValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4GEdpValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4GEspValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4GEspValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4GEbpValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4GEbpValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4GEgmValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4GEgmValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4GMgeValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4GMgeValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4GMgmValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4GMgmValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4GMdpValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4GMdpValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4GMgpValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4GMgpValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4GMspValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4GMspValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4GMbpValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4GMbpValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4DPgmValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4DPgmValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4GPgmValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4GPgmValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4SPgmValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4SPgmValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4BPgmValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4BPgmValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4DgpValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4DgpValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4DspValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4DspValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4DbpValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4DbpValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4SdpValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4SdpValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4SgpValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4SgpValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4SbpValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4SbpValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4DPdpValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4DPdpValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4DPdValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4DPdValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4DPgpValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4DPgpValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4DPspValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4DPspValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4DPbpValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4DPbpValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4DdpValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4DdpValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4DdValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4DdValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4SPdpValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4SPdpValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4SPgpValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4SPgpValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4SPspValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4SPspValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4SPsValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4SPsValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4SPbpValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4SPbpValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4SspValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4SspValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4SsValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4SsValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4BPdpValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4BPdpValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4BPgpValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4BPgpValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4BPspValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4BPspValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4BPbpValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4BPbpValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4DPdbValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4DPdbValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4SPsbValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4SPsbValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4DBdpValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4DBdpValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4DBdbValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4DBdbValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4DBbpValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4DBbpValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4DBbValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4DBbValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4BPdbValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4BPdbValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4BPbValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4BPbValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4BPsbValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4BPsbValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4BPbpIFValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4BPbpIFValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4SBspValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4SBspValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4SBbpValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4SBbpValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4SBbValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4SBbValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4SBsbValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4SBsbValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4BdbValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4BdbValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4BbpValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4BbpValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4BsbValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4BsbValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4BbValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4BbValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4QqValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4QqValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4QgpValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4QgpValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4QdpValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4QdpValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4QspValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4QspValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4QbpValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4QbpValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4DPqValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4DPqValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4SPqValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4SPqValueArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4GPqValueArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4GPqValueArray) ;
|
||||
|
||||
/* INT */
|
||||
free (model->BSIM4paramCPU.BSIM4offArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4offArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4dNodePrimeArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4dNodePrimeArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4sNodePrimeArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4sNodePrimeArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gNodePrimeArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gNodePrimeArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4bNodePrimeArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4bNodePrimeArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gNodeExtArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gNodeExtArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4gNodeMidArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4gNodeMidArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4dbNodeArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4dbNodeArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4sbNodeArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4sbNodeArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4sNodeArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4sNodeArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4dNodeArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4dNodeArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4qNodeArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4qNodeArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4rbodyModArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4rbodyModArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4modeArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4modeArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4rgateModArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4rgateModArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4trnqsModArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4trnqsModArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4acnqsModArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4acnqsModArray) ;
|
||||
|
||||
free (model->BSIM4paramCPU.BSIM4statesArray) ;
|
||||
cudaFree (model->BSIM4paramGPU.d_BSIM4statesArray) ;
|
||||
}
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
|
@ -0,0 +1,63 @@
|
|||
/*
|
||||
* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to
|
||||
* endorse or promote products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "ngspice/config.h"
|
||||
#include "cuda_runtime_api.h"
|
||||
#include "bsim4def.h"
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
|
||||
/* cudaMemcpy MACRO to check it for errors --> CUDAMEMCPYCHECK(name of pointer, dimension, type, status) */
|
||||
#define CUDAMEMCPYCHECK(a, b, c, d) \
|
||||
if (d != cudaSuccess) \
|
||||
{ \
|
||||
fprintf (stderr, "cuBSIM4getic routine...\n") ; \
|
||||
fprintf (stderr, "Error: cudaMemcpy failed on %s size of %d bytes\n", #a, (int)(b * sizeof(c))) ; \
|
||||
fprintf (stderr, "Error: %s = %d, %s\n", #d, d, cudaGetErrorString (d)) ; \
|
||||
return (E_NOMEM) ; \
|
||||
}
|
||||
|
||||
int
|
||||
cuBSIM4getic
|
||||
(
|
||||
GENmodel *inModel
|
||||
)
|
||||
{
|
||||
long unsigned int size ;
|
||||
cudaError_t status ;
|
||||
BSIM4model *model = (BSIM4model *)inModel ;
|
||||
|
||||
size = (long unsigned int)model->n_instances ;
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4icVDSArray, model->BSIM4paramCPU.BSIM4icVDSArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4icVDSArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4icVGSArray, model->BSIM4paramCPU.BSIM4icVGSArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4icVGSArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4icVBSArray, model->BSIM4paramCPU.BSIM4icVBSArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4icVBSArray, size, double, status)
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,633 @@
|
|||
/*
|
||||
* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to
|
||||
* endorse or promote products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "ngspice/config.h"
|
||||
#include "cuda_runtime_api.h"
|
||||
#include "bsim4def.h"
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
|
||||
/* cudaMalloc MACRO to check it for errors --> CUDAMALLOCCHECK(name of pointer, dimension, type, status) */
|
||||
#define CUDAMALLOCCHECK(a, b, c, d) \
|
||||
if (d != cudaSuccess) \
|
||||
{ \
|
||||
fprintf (stderr, "cuBSIM4temp routine...\n") ; \
|
||||
fprintf (stderr, "Error: cudaMalloc failed on %s size of %d bytes\n", #a, (int)(b * sizeof(c))) ; \
|
||||
fprintf (stderr, "Error: %s = %d, %s\n", #d, d, cudaGetErrorString (d)) ; \
|
||||
return (E_NOMEM) ; \
|
||||
}
|
||||
|
||||
/* cudaMemcpy MACRO to check it for errors --> CUDAMEMCPYCHECK(name of pointer, dimension, type, status) */
|
||||
#define CUDAMEMCPYCHECK(a, b, c, d) \
|
||||
if (d != cudaSuccess) \
|
||||
{ \
|
||||
fprintf (stderr, "cuBSIM4temp routine...\n") ; \
|
||||
fprintf (stderr, "Error: cudaMemcpy failed on %s size of %d bytes\n", #a, (int)(b * sizeof(c))) ; \
|
||||
fprintf (stderr, "Error: %s = %d, %s\n", #d, d, cudaGetErrorString (d)) ; \
|
||||
return (E_NOMEM) ; \
|
||||
}
|
||||
|
||||
int
|
||||
cuBSIM4temp
|
||||
(
|
||||
GENmodel *inModel
|
||||
)
|
||||
{
|
||||
int i ;
|
||||
long unsigned int size ;
|
||||
cudaError_t status ;
|
||||
BSIM4model *model = (BSIM4model *)inModel ;
|
||||
BSIM4instance *here ;
|
||||
|
||||
size = (long unsigned int)model->n_instances ;
|
||||
|
||||
/* Special case here->d_pParam */
|
||||
model->pParamHost = (struct bsim4SizeDependParam **) malloc (size * sizeof(struct bsim4SizeDependParam *)) ;
|
||||
status = cudaMalloc ((void **)&(model->d_pParam), size * sizeof(struct bsim4SizeDependParam *)) ;
|
||||
CUDAMALLOCCHECK (model->d_pParam, size, struct bsim4SizeDependParam *, status)
|
||||
|
||||
i = 0 ;
|
||||
|
||||
for (here = model->BSIM4instances ; here != NULL ; here = here->BSIM4nextInstance)
|
||||
{
|
||||
if (here->pParam != NULL)
|
||||
{
|
||||
status = cudaMalloc ((void **)&(model->pParamHost [i]), sizeof(struct bsim4SizeDependParam)) ;
|
||||
CUDAMALLOCCHECK (model->pParamHost [i], 1, struct bsim4SizeDependParam, status)
|
||||
|
||||
status = cudaMemcpy (model->pParamHost [i], here->pParam, sizeof(struct bsim4SizeDependParam), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK(model->pParamHost [i], 1, struct bsim4SizeDependParam, status)
|
||||
}
|
||||
else
|
||||
model->pParamHost [i] = NULL ;
|
||||
|
||||
i++ ;
|
||||
}
|
||||
|
||||
/* Structure pointer vectors in GPU */
|
||||
status = cudaMemcpy (model->d_pParam, model->pParamHost, size * sizeof(struct bsim4SizeDependParam *), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->d_pParam, size, struct bsim4SizeDependParam *, status)
|
||||
/* -------------------------------- */
|
||||
|
||||
/* DOUBLE */
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gbsRWArray, model->BSIM4paramCPU.BSIM4gbsRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gbsRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4cbsRWArray, model->BSIM4paramCPU.BSIM4cbsRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4cbsRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gbdRWArray, model->BSIM4paramCPU.BSIM4gbdRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gbdRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4cbdRWArray, model->BSIM4paramCPU.BSIM4cbdRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4cbdRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4vonRWArray, model->BSIM4paramCPU.BSIM4vonRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4vonRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4vdsatRWArray, model->BSIM4paramCPU.BSIM4vdsatRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4vdsatRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4csubRWArray, model->BSIM4paramCPU.BSIM4csubRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4csubRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gdsRWArray, model->BSIM4paramCPU.BSIM4gdsRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gdsRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gmRWArray, model->BSIM4paramCPU.BSIM4gmRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gmRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gmbsRWArray, model->BSIM4paramCPU.BSIM4gmbsRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gmbsRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gcrgRWArray, model->BSIM4paramCPU.BSIM4gcrgRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gcrgRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4IgidlRWArray, model->BSIM4paramCPU.BSIM4IgidlRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4IgidlRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4IgislRWArray, model->BSIM4paramCPU.BSIM4IgislRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4IgislRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4IgcsRWArray, model->BSIM4paramCPU.BSIM4IgcsRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4IgcsRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4IgcdRWArray, model->BSIM4paramCPU.BSIM4IgcdRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4IgcdRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4IgsRWArray, model->BSIM4paramCPU.BSIM4IgsRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4IgsRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4IgdRWArray, model->BSIM4paramCPU.BSIM4IgdRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4IgdRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4IgbRWArray, model->BSIM4paramCPU.BSIM4IgbRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4IgbRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4cdRWArray, model->BSIM4paramCPU.BSIM4cdRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4cdRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4qinvRWArray, model->BSIM4paramCPU.BSIM4qinvRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4qinvRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4cggbRWArray, model->BSIM4paramCPU.BSIM4cggbRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4cggbRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4cgsbRWArray, model->BSIM4paramCPU.BSIM4cgsbRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4cgsbRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4cgdbRWArray, model->BSIM4paramCPU.BSIM4cgdbRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4cgdbRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4cdgbRWArray, model->BSIM4paramCPU.BSIM4cdgbRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4cdgbRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4cdsbRWArray, model->BSIM4paramCPU.BSIM4cdsbRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4cdsbRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4cddbRWArray, model->BSIM4paramCPU.BSIM4cddbRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4cddbRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4cbgbRWArray, model->BSIM4paramCPU.BSIM4cbgbRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4cbgbRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4cbsbRWArray, model->BSIM4paramCPU.BSIM4cbsbRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4cbsbRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4cbdbRWArray, model->BSIM4paramCPU.BSIM4cbdbRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4cbdbRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4csgbRWArray, model->BSIM4paramCPU.BSIM4csgbRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4csgbRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4cssbRWArray, model->BSIM4paramCPU.BSIM4cssbRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4cssbRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4csdbRWArray, model->BSIM4paramCPU.BSIM4csdbRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4csdbRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4cgbbRWArray, model->BSIM4paramCPU.BSIM4cgbbRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4cgbbRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4csbbRWArray, model->BSIM4paramCPU.BSIM4csbbRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4csbbRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4cdbbRWArray, model->BSIM4paramCPU.BSIM4cdbbRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4cdbbRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4cbbbRWArray, model->BSIM4paramCPU.BSIM4cbbbRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4cbbbRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gtauRWArray, model->BSIM4paramCPU.BSIM4gtauRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gtauRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4qgateRWArray, model->BSIM4paramCPU.BSIM4qgateRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4qgateRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4qbulkRWArray, model->BSIM4paramCPU.BSIM4qbulkRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4qbulkRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4qdrnRWArray, model->BSIM4paramCPU.BSIM4qdrnRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4qdrnRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4qsrcRWArray, model->BSIM4paramCPU.BSIM4qsrcRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4qsrcRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4capbsRWArray, model->BSIM4paramCPU.BSIM4capbsRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4capbsRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4capbdRWArray, model->BSIM4paramCPU.BSIM4capbdRWArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4capbdRWArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4icVDSArray, model->BSIM4paramCPU.BSIM4icVDSArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4icVDSArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4icVGSArray, model->BSIM4paramCPU.BSIM4icVGSArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4icVGSArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4icVBSArray, model->BSIM4paramCPU.BSIM4icVBSArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4icVBSArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4vth0Array, model->BSIM4paramCPU.BSIM4vth0Array, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4vth0Array, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gbbsArray, model->BSIM4paramCPU.BSIM4gbbsArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gbbsArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4ggidlbArray, model->BSIM4paramCPU.BSIM4ggidlbArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4ggidlbArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gbgsArray, model->BSIM4paramCPU.BSIM4gbgsArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gbgsArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4ggidlgArray, model->BSIM4paramCPU.BSIM4ggidlgArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4ggidlgArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gbdsArray, model->BSIM4paramCPU.BSIM4gbdsArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gbdsArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4ggidldArray, model->BSIM4paramCPU.BSIM4ggidldArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4ggidldArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4ggislsArray, model->BSIM4paramCPU.BSIM4ggislsArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4ggislsArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4ggislgArray, model->BSIM4paramCPU.BSIM4ggislgArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4ggislgArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4ggislbArray, model->BSIM4paramCPU.BSIM4ggislbArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4ggislbArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gIgsgArray, model->BSIM4paramCPU.BSIM4gIgsgArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gIgsgArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gIgcsgArray, model->BSIM4paramCPU.BSIM4gIgcsgArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gIgcsgArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gIgcsdArray, model->BSIM4paramCPU.BSIM4gIgcsdArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gIgcsdArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gIgcsbArray, model->BSIM4paramCPU.BSIM4gIgcsbArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gIgcsbArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gIgdgArray, model->BSIM4paramCPU.BSIM4gIgdgArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gIgdgArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gIgcdgArray, model->BSIM4paramCPU.BSIM4gIgcdgArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gIgcdgArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gIgcddArray, model->BSIM4paramCPU.BSIM4gIgcddArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gIgcddArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gIgcdbArray, model->BSIM4paramCPU.BSIM4gIgcdbArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gIgcdbArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gIgbgArray, model->BSIM4paramCPU.BSIM4gIgbgArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gIgbgArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gIgbdArray, model->BSIM4paramCPU.BSIM4gIgbdArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gIgbdArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gIgbbArray, model->BSIM4paramCPU.BSIM4gIgbbArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gIgbbArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4ggidlsArray, model->BSIM4paramCPU.BSIM4ggidlsArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4ggidlsArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4ggisldArray, model->BSIM4paramCPU.BSIM4ggisldArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4ggisldArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gstotArray, model->BSIM4paramCPU.BSIM4gstotArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gstotArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gstotdArray, model->BSIM4paramCPU.BSIM4gstotdArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gstotdArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gstotgArray, model->BSIM4paramCPU.BSIM4gstotgArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gstotgArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gstotbArray, model->BSIM4paramCPU.BSIM4gstotbArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gstotbArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gdtotArray, model->BSIM4paramCPU.BSIM4gdtotArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gdtotArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gdtotdArray, model->BSIM4paramCPU.BSIM4gdtotdArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gdtotdArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gdtotgArray, model->BSIM4paramCPU.BSIM4gdtotgArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gdtotgArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gdtotbArray, model->BSIM4paramCPU.BSIM4gdtotbArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gdtotbArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4cgdoArray, model->BSIM4paramCPU.BSIM4cgdoArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4cgdoArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4qgdoArray, model->BSIM4paramCPU.BSIM4qgdoArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4qgdoArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4cgsoArray, model->BSIM4paramCPU.BSIM4cgsoArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4cgsoArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4qgsoArray, model->BSIM4paramCPU.BSIM4qgsoArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4qgsoArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4AseffArray, model->BSIM4paramCPU.BSIM4AseffArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4AseffArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4PseffArray, model->BSIM4paramCPU.BSIM4PseffArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4PseffArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4nfArray, model->BSIM4paramCPU.BSIM4nfArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4nfArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4XExpBVSArray, model->BSIM4paramCPU.BSIM4XExpBVSArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4XExpBVSArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4vjsmFwdArray, model->BSIM4paramCPU.BSIM4vjsmFwdArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4vjsmFwdArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4IVjsmFwdArray, model->BSIM4paramCPU.BSIM4IVjsmFwdArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4IVjsmFwdArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4vjsmRevArray, model->BSIM4paramCPU.BSIM4vjsmRevArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4vjsmRevArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4IVjsmRevArray, model->BSIM4paramCPU.BSIM4IVjsmRevArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4IVjsmRevArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4SslpRevArray, model->BSIM4paramCPU.BSIM4SslpRevArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4SslpRevArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4SslpFwdArray, model->BSIM4paramCPU.BSIM4SslpFwdArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4SslpFwdArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4AdeffArray, model->BSIM4paramCPU.BSIM4AdeffArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4AdeffArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4PdeffArray, model->BSIM4paramCPU.BSIM4PdeffArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4PdeffArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4XExpBVDArray, model->BSIM4paramCPU.BSIM4XExpBVDArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4XExpBVDArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4vjdmFwdArray, model->BSIM4paramCPU.BSIM4vjdmFwdArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4vjdmFwdArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4IVjdmFwdArray, model->BSIM4paramCPU.BSIM4IVjdmFwdArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4IVjdmFwdArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4vjdmRevArray, model->BSIM4paramCPU.BSIM4vjdmRevArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4vjdmRevArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4IVjdmRevArray, model->BSIM4paramCPU.BSIM4IVjdmRevArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4IVjdmRevArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4DslpRevArray, model->BSIM4paramCPU.BSIM4DslpRevArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4DslpRevArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4DslpFwdArray, model->BSIM4paramCPU.BSIM4DslpFwdArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4DslpFwdArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4SjctTempRevSatCurArray, model->BSIM4paramCPU.BSIM4SjctTempRevSatCurArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4SjctTempRevSatCurArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4SswTempRevSatCurArray, model->BSIM4paramCPU.BSIM4SswTempRevSatCurArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4SswTempRevSatCurArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4SswgTempRevSatCurArray, model->BSIM4paramCPU.BSIM4SswgTempRevSatCurArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4SswgTempRevSatCurArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4DjctTempRevSatCurArray, model->BSIM4paramCPU.BSIM4DjctTempRevSatCurArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4DjctTempRevSatCurArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4DswTempRevSatCurArray, model->BSIM4paramCPU.BSIM4DswTempRevSatCurArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4DswTempRevSatCurArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4DswgTempRevSatCurArray, model->BSIM4paramCPU.BSIM4DswgTempRevSatCurArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4DswgTempRevSatCurArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4vbscArray, model->BSIM4paramCPU.BSIM4vbscArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4vbscArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4thetavthArray, model->BSIM4paramCPU.BSIM4thetavthArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4thetavthArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4eta0Array, model->BSIM4paramCPU.BSIM4eta0Array, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4eta0Array, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4k2oxArray, model->BSIM4paramCPU.BSIM4k2oxArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4k2oxArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4nstarArray, model->BSIM4paramCPU.BSIM4nstarArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4nstarArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4vfbArray, model->BSIM4paramCPU.BSIM4vfbArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4vfbArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4vgs_effArray, model->BSIM4paramCPU.BSIM4vgs_effArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4vgs_effArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4vgd_effArray, model->BSIM4paramCPU.BSIM4vgd_effArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4vgd_effArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4dvgs_eff_dvgArray, model->BSIM4paramCPU.BSIM4dvgs_eff_dvgArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4dvgs_eff_dvgArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4dvgd_eff_dvgArray, model->BSIM4paramCPU.BSIM4dvgd_eff_dvgArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4dvgd_eff_dvgArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4VgsteffArray, model->BSIM4paramCPU.BSIM4VgsteffArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4VgsteffArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4grdswArray, model->BSIM4paramCPU.BSIM4grdswArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4grdswArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4AbulkArray, model->BSIM4paramCPU.BSIM4AbulkArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4AbulkArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4vtfbphi1Array, model->BSIM4paramCPU.BSIM4vtfbphi1Array, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4vtfbphi1Array, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4ueffArray, model->BSIM4paramCPU.BSIM4ueffArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4ueffArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4u0tempArray, model->BSIM4paramCPU.BSIM4u0tempArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4u0tempArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4vsattempArray, model->BSIM4paramCPU.BSIM4vsattempArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4vsattempArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4EsatLArray, model->BSIM4paramCPU.BSIM4EsatLArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4EsatLArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4VdseffArray, model->BSIM4paramCPU.BSIM4VdseffArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4VdseffArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4vtfbphi2Array, model->BSIM4paramCPU.BSIM4vtfbphi2Array, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4vtfbphi2Array, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4CoxeffArray, model->BSIM4paramCPU.BSIM4CoxeffArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4CoxeffArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4AbovVgst2VtmArray, model->BSIM4paramCPU.BSIM4AbovVgst2VtmArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4AbovVgst2VtmArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4IdovVdsArray, model->BSIM4paramCPU.BSIM4IdovVdsArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4IdovVdsArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gcrgdArray, model->BSIM4paramCPU.BSIM4gcrgdArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gcrgdArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gcrgbArray, model->BSIM4paramCPU.BSIM4gcrgbArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gcrgbArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gcrggArray, model->BSIM4paramCPU.BSIM4gcrggArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gcrggArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4grgeltdArray, model->BSIM4paramCPU.BSIM4grgeltdArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4grgeltdArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gcrgsArray, model->BSIM4paramCPU.BSIM4gcrgsArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gcrgsArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4sourceConductanceArray, model->BSIM4paramCPU.BSIM4sourceConductanceArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4sourceConductanceArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4drainConductanceArray, model->BSIM4paramCPU.BSIM4drainConductanceArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4drainConductanceArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gstotsArray, model->BSIM4paramCPU.BSIM4gstotsArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gstotsArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gdtotsArray, model->BSIM4paramCPU.BSIM4gdtotsArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gdtotsArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4vfbzbArray, model->BSIM4paramCPU.BSIM4vfbzbArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4vfbzbArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gIgssArray, model->BSIM4paramCPU.BSIM4gIgssArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gIgssArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gIgddArray, model->BSIM4paramCPU.BSIM4gIgddArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gIgddArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gIgbsArray, model->BSIM4paramCPU.BSIM4gIgbsArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gIgbsArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gIgcssArray, model->BSIM4paramCPU.BSIM4gIgcssArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gIgcssArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gIgcdsArray, model->BSIM4paramCPU.BSIM4gIgcdsArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gIgcdsArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4noiGd0Array, model->BSIM4paramCPU.BSIM4noiGd0Array, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4noiGd0Array, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4cqdbArray, model->BSIM4paramCPU.BSIM4cqdbArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4cqdbArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4cqsbArray, model->BSIM4paramCPU.BSIM4cqsbArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4cqsbArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4cqgbArray, model->BSIM4paramCPU.BSIM4cqgbArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4cqgbArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4qchqsArray, model->BSIM4paramCPU.BSIM4qchqsArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4qchqsArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4cqbbArray, model->BSIM4paramCPU.BSIM4cqbbArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4cqbbArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4taunetArray, model->BSIM4paramCPU.BSIM4taunetArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4taunetArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gtgArray, model->BSIM4paramCPU.BSIM4gtgArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gtgArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gtdArray, model->BSIM4paramCPU.BSIM4gtdArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gtdArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gtsArray, model->BSIM4paramCPU.BSIM4gtsArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gtsArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gtbArray, model->BSIM4paramCPU.BSIM4gtbArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gtbArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4mArray, model->BSIM4paramCPU.BSIM4mArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4mArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4grbpdArray, model->BSIM4paramCPU.BSIM4grbpdArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4grbpdArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4grbdbArray, model->BSIM4paramCPU.BSIM4grbdbArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4grbdbArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4grbpbArray, model->BSIM4paramCPU.BSIM4grbpbArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4grbpbArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4grbpsArray, model->BSIM4paramCPU.BSIM4grbpsArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4grbpsArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4grbsbArray, model->BSIM4paramCPU.BSIM4grbsbArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4grbsbArray, size, double, status)
|
||||
|
||||
/* INT */
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4offArray, model->BSIM4paramCPU.BSIM4offArray, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4offArray, size, int, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4dNodePrimeArray, model->BSIM4paramCPU.BSIM4dNodePrimeArray, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4dNodePrimeArray, size, int, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4sNodePrimeArray, model->BSIM4paramCPU.BSIM4sNodePrimeArray, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4sNodePrimeArray, size, int, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gNodePrimeArray, model->BSIM4paramCPU.BSIM4gNodePrimeArray, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gNodePrimeArray, size, int, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4bNodePrimeArray, model->BSIM4paramCPU.BSIM4bNodePrimeArray, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4bNodePrimeArray, size, int, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gNodeExtArray, model->BSIM4paramCPU.BSIM4gNodeExtArray, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gNodeExtArray, size, int, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4gNodeMidArray, model->BSIM4paramCPU.BSIM4gNodeMidArray, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4gNodeMidArray, size, int, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4dbNodeArray, model->BSIM4paramCPU.BSIM4dbNodeArray, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4dbNodeArray, size, int, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4sbNodeArray, model->BSIM4paramCPU.BSIM4sbNodeArray, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4sbNodeArray, size, int, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4sNodeArray, model->BSIM4paramCPU.BSIM4sNodeArray, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4sNodeArray, size, int, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4dNodeArray, model->BSIM4paramCPU.BSIM4dNodeArray, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4dNodeArray, size, int, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4qNodeArray, model->BSIM4paramCPU.BSIM4qNodeArray, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4qNodeArray, size, int, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4rbodyModArray, model->BSIM4paramCPU.BSIM4rbodyModArray, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4rbodyModArray, size, int, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4modeArray, model->BSIM4paramCPU.BSIM4modeArray, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4modeArray, size, int, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4rgateModArray, model->BSIM4paramCPU.BSIM4rgateModArray, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4rgateModArray, size, int, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4trnqsModArray, model->BSIM4paramCPU.BSIM4trnqsModArray, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4trnqsModArray, size, int, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4acnqsModArray, model->BSIM4paramCPU.BSIM4acnqsModArray, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.d_BSIM4acnqsModArray, size, int, status)
|
||||
|
||||
status = cudaMemcpy (model->BSIM4paramGPU.d_BSIM4statesArray, model->BSIM4paramCPU.BSIM4statesArray, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->BSIM4paramGPU.BSIM4statesArray, size, int, status)
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
|
@ -37,6 +37,21 @@ endif
|
|||
AM_CPPFLAGS = @AM_CPPFLAGS@ -I$(top_srcdir)/src/include
|
||||
AM_CFLAGS = $(STATIC)
|
||||
|
||||
if USE_CUSPICE_WANTED
|
||||
.cu.lo:
|
||||
$(AM_V_GEN)$(top_srcdir)/src/libtool_wrapper_for_cuda.tcl $@ $(AM_CFLAGS) $(NVCC) $(CUDA_CFLAGS) $(AM_CPPFLAGS) -c $<
|
||||
|
||||
libbsim4_la_SOURCES += \
|
||||
CUSPICE/b4topology.c \
|
||||
CUSPICE/cubsim4free.c \
|
||||
CUSPICE/cubsim4getic.c \
|
||||
CUSPICE/cubsim4load.cu \
|
||||
CUSPICE/cubsim4setup.c \
|
||||
CUSPICE/cubsim4temp.c
|
||||
|
||||
AM_CPPFLAGS += $(CUDA_CPPFLAGS)
|
||||
endif
|
||||
|
||||
MAINTAINERCLEANFILES = Makefile.in
|
||||
|
||||
EXTRA_DIST = B4TERMS_OF_USE
|
||||
|
|
|
|||
|
|
@ -16,6 +16,9 @@
|
|||
#include "ngspice/sperror.h"
|
||||
#include "ngspice/suffix.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
int
|
||||
BSIM4getic(
|
||||
|
|
@ -25,8 +28,18 @@ CKTcircuit *ckt)
|
|||
BSIM4model *model = (BSIM4model*)inModel;
|
||||
BSIM4instance *here;
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
int i, status ;
|
||||
#endif
|
||||
|
||||
for (; model ; model = model->BSIM4nextModel)
|
||||
{ for (here = model->BSIM4instances; here; here = here->BSIM4nextInstance)
|
||||
{
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
i = 0 ;
|
||||
#endif
|
||||
|
||||
for (here = model->BSIM4instances; here; here = here->BSIM4nextInstance)
|
||||
{
|
||||
if (!here->BSIM4icVDSGiven)
|
||||
{ here->BSIM4icVDS = *(ckt->CKTrhs + here->BSIM4dNode)
|
||||
|
|
@ -40,7 +53,23 @@ BSIM4instance *here;
|
|||
{ here->BSIM4icVBS = *(ckt->CKTrhs + here->BSIM4bNode)
|
||||
- *(ckt->CKTrhs + here->BSIM4sNode);
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
model->BSIM4paramCPU.BSIM4icVDSArray [i] = here->BSIM4icVDS ;
|
||||
model->BSIM4paramCPU.BSIM4icVGSArray [i] = here->BSIM4icVGS ;
|
||||
model->BSIM4paramCPU.BSIM4icVBSArray [i] = here->BSIM4icVBS ;
|
||||
|
||||
i++ ;
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuBSIM4getic ((GENmodel *)model) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
}
|
||||
return(OK);
|
||||
return (OK) ;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -35,6 +35,10 @@
|
|||
#include "ngspice/cpextern.h"
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
#define MAX_EXP 5.834617425e14
|
||||
#define MIN_EXP 1.713908431e-15
|
||||
#define EXP_THRESHOLD 34.0
|
||||
|
|
@ -2570,6 +2574,568 @@ do { if((here->ptr = SMPmakeElt(matrix,here->first,here->second))==(double *)NUL
|
|||
}
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
int i, j, jRHS, l, lRHS, status ;
|
||||
|
||||
/* Counting the instances */
|
||||
for (model = (BSIM4model *)inModel ; model != NULL ; model = model->BSIM4nextModel)
|
||||
{
|
||||
i = 0 ;
|
||||
|
||||
for (here = model->BSIM4instances ; here != NULL ; here = here->BSIM4nextInstance)
|
||||
{
|
||||
i++ ;
|
||||
}
|
||||
|
||||
/* How much instances we have */
|
||||
model->n_instances = i ;
|
||||
}
|
||||
|
||||
/* loop through all the BSIM4 models */
|
||||
for (model = (BSIM4model *)inModel ; model != NULL ; model = model->BSIM4nextModel)
|
||||
{
|
||||
/* Position Vector Allocation */
|
||||
model->PositionVector = TMALLOC (int, model->n_instances) ;
|
||||
|
||||
/* Position Vector Allocation for the RHS */
|
||||
model->PositionVectorRHS = TMALLOC (int, model->n_instances) ;
|
||||
|
||||
|
||||
model->offset = ckt->total_n_values ;
|
||||
model->offsetRHS = ckt->total_n_valuesRHS ;
|
||||
|
||||
i = 0 ;
|
||||
j = 0 ;
|
||||
jRHS = 0 ;
|
||||
l = 0 ;
|
||||
lRHS = 0 ;
|
||||
|
||||
/* loop through all the instances of the model */
|
||||
for (here = model->BSIM4instances ; here != NULL ; here = here->BSIM4nextInstance)
|
||||
{
|
||||
/* Position Vector Assignment */
|
||||
model->PositionVector [i] = model->offset + l ;
|
||||
|
||||
/* Position Vector Assignment for the RHS */
|
||||
model->PositionVectorRHS [i] = model->offsetRHS + lRHS ;
|
||||
|
||||
|
||||
/* For the Matrix */
|
||||
if (here->BSIM4rgateMod == 1)
|
||||
{
|
||||
/* m * geltd */
|
||||
if ((here->BSIM4gNodeExt != 0) && (here->BSIM4gNodeExt != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * geltd */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4gNodeExt != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * geltd */
|
||||
if ((here->BSIM4gNodeExt != 0) && (here->BSIM4gNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcggb + geltd - ggtg + gIgtotg) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4gNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcgdb - ggtd + gIgtotd) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4dNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcgsb - ggts + gIgtots) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4sNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcgbb - ggtb + gIgtotb) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* Different Values for the CKTloadOutput */
|
||||
l += 5 ;
|
||||
}
|
||||
else if (here->BSIM4rgateMod == 2)
|
||||
{
|
||||
/* m * gcrg */
|
||||
if ((here->BSIM4gNodeExt != 0) && (here->BSIM4gNodeExt != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * gcrgg */
|
||||
if ((here->BSIM4gNodeExt != 0) && (here->BSIM4gNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * gcrgd */
|
||||
if ((here->BSIM4gNodeExt != 0) && (here->BSIM4dNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * gcrgs */
|
||||
if ((here->BSIM4gNodeExt != 0) && (here->BSIM4sNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * gcrgb */
|
||||
if ((here->BSIM4gNodeExt != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * gcrg */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4gNodeExt != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcggb - gcrgg - ggtg + gIgtotg) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4gNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcgdb - gcrgd - ggtd + gIgtotd) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4dNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcgsb - gcrgs - ggts + gIgtots) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4sNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcgbb - gcrgb - ggtb + gIgtotb) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* Different Values for the CKTloadOutput */
|
||||
l += 9 ;
|
||||
}
|
||||
else if (here->BSIM4rgateMod == 3)
|
||||
{
|
||||
/* m * geltd */
|
||||
if ((here->BSIM4gNodeExt != 0) && (here->BSIM4gNodeExt != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * geltd */
|
||||
if ((here->BSIM4gNodeExt != 0) && (here->BSIM4gNodeMid != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * geltd */
|
||||
if ((here->BSIM4gNodeMid != 0) && (here->BSIM4gNodeExt != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (geltd + gcrg + gcgmgmb) */
|
||||
if ((here->BSIM4gNodeMid != 0) && (here->BSIM4gNodeMid != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcrgd + gcgmdb) */
|
||||
if ((here->BSIM4gNodeMid != 0) && (here->BSIM4dNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * gcrgg */
|
||||
if ((here->BSIM4gNodeMid != 0) && (here->BSIM4gNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcrgs + gcgmsb) */
|
||||
if ((here->BSIM4gNodeMid != 0) && (here->BSIM4sNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcrgb + gcgmbb) */
|
||||
if ((here->BSIM4gNodeMid != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * gcdgmb */
|
||||
if ((here->BSIM4dNodePrime != 0) && (here->BSIM4gNodeMid != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * gcrg */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4gNodeMid != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * gcsgmb */
|
||||
if ((here->BSIM4sNodePrime != 0) && (here->BSIM4gNodeMid != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * gcbgmb */
|
||||
if ((here->BSIM4bNodePrime != 0) && (here->BSIM4gNodeMid != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcggb - gcrgg - ggtg + gIgtotg) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4gNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcgdb - gcrgd - ggtd + gIgtotd) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4dNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcgsb - gcrgs - ggts + gIgtots) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4sNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcgbb - gcrgb - ggtb + gIgtotb) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* Different Values for the CKTloadOutput */
|
||||
l += 14 ;
|
||||
} else {
|
||||
/* m * (gcggb - ggtg + gIgtotg) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4gNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcgdb - ggtd + gIgtotd) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4dNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcgsb - ggts + gIgtots) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4sNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcgbb - ggtb + gIgtotb) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* Different Values for the CKTloadOutput */
|
||||
l += 4 ;
|
||||
}
|
||||
|
||||
|
||||
if (model->BSIM4rdsMod)
|
||||
{
|
||||
/* m * gdtotg */
|
||||
if ((here->BSIM4dNode != 0) && (here->BSIM4gNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * gdtots */
|
||||
if ((here->BSIM4dNode != 0) && (here->BSIM4sNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * gdtotb */
|
||||
if ((here->BSIM4dNode != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * gstotd */
|
||||
if ((here->BSIM4sNode != 0) && (here->BSIM4dNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * gstotg */
|
||||
if ((here->BSIM4sNode != 0) && (here->BSIM4gNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * gstotb */
|
||||
if ((here->BSIM4sNode != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* Different Values for the CKTloadOutput */
|
||||
l += 4 ;
|
||||
}
|
||||
|
||||
|
||||
/* m * (gdpr + here->BSIM4gds + here->BSIM4gbd + T1 * ddxpart_dVd -
|
||||
gdtotd + RevSum + gcddb + gbdpdp + dxpart * ggtd - gIdtotd) + m * ggidld */
|
||||
if ((here->BSIM4dNodePrime != 0) && (here->BSIM4dNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gdpr + gdtot) */
|
||||
if ((here->BSIM4dNodePrime != 0) && (here->BSIM4dNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (Gm + gcdgb - gdtotg + gbdpg - gIdtotg + dxpart * ggtg + T1 * ddxpart_dVg) + m * ggidlg */
|
||||
if ((here->BSIM4dNodePrime != 0) && (here->BSIM4gNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (here->BSIM4gds + gdtots - dxpart * ggts + gIdtots -
|
||||
T1 * ddxpart_dVs + FwdSum - gcdsb - gbdpsp) + m * (ggidlg + ggidld + ggidlb) */
|
||||
if ((here->BSIM4dNodePrime != 0) && (here->BSIM4sNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gjbd + gdtotb - Gmbs - gcdbb - gbdpb + gIdtotb - T1 * ddxpart_dVb - dxpart * ggtb) - m * ggidlb */
|
||||
if ((here->BSIM4dNodePrime != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gdpr - gdtotd) */
|
||||
if ((here->BSIM4dNode != 0) && (here->BSIM4dNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gdpr + gdtot) */
|
||||
if ((here->BSIM4dNode != 0) && (here->BSIM4dNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (here->BSIM4gds + gstotd + RevSum - gcsdb - gbspdp -
|
||||
T1 * dsxpart_dVd - sxpart * ggtd + gIstotd) + m * (ggisls + ggislg + ggislb) */
|
||||
if ((here->BSIM4sNodePrime != 0) && (here->BSIM4dNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcsgb - Gm - gstotg + gbspg + sxpart * ggtg + T1 * dsxpart_dVg - gIstotg) + m * ggislg */
|
||||
if ((here->BSIM4sNodePrime != 0) && (here->BSIM4gNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gspr + here->BSIM4gds + here->BSIM4gbs + T1 * dsxpart_dVs -
|
||||
gstots + FwdSum + gcssb + gbspsp + sxpart * ggts - gIstots) + m * ggisls */
|
||||
if ((here->BSIM4sNodePrime != 0) && (here->BSIM4sNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gspr + gstot) */
|
||||
if ((here->BSIM4sNodePrime != 0) && (here->BSIM4sNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gjbs + gstotb + Gmbs - gcsbb - gbspb - sxpart * ggtb - T1 * dsxpart_dVb + gIstotb) - m * ggislb */
|
||||
if ((here->BSIM4sNodePrime != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gspr - gstots) */
|
||||
if ((here->BSIM4sNode != 0) && (here->BSIM4sNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gspr + gstot) */
|
||||
if ((here->BSIM4sNode != 0) && (here->BSIM4sNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcbdb - gjbd + gbbdp - gIbtotd) - m * ggidld + m * (ggislg + ggisls + ggislb) */
|
||||
if ((here->BSIM4bNodePrime != 0) && (here->BSIM4dNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcbgb - here->BSIM4gbgs - gIbtotg) - m * ggidlg - m * ggislg */
|
||||
if ((here->BSIM4bNodePrime != 0) && (here->BSIM4gNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcbsb - gjbs + gbbsp - gIbtots) + m * (ggidlg + ggidld + ggidlb) - m * ggisls */
|
||||
if ((here->BSIM4bNodePrime != 0) && (here->BSIM4sNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gjbd + gjbs + gcbbb - here->BSIM4gbbs - gIbtotb) - m * ggidlb - m * ggislb */
|
||||
if ((here->BSIM4bNodePrime != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* Different Values for the CKTloadOutput */
|
||||
l += 16 ;
|
||||
|
||||
|
||||
if (here->BSIM4rbodyMod)
|
||||
{
|
||||
/* m * (gcdbdb - here->BSIM4gbd) */
|
||||
if ((here->BSIM4dNodePrime != 0) && (here->BSIM4dbNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (here->BSIM4gbs - gcsbsb) */
|
||||
if ((here->BSIM4sNodePrime != 0) && (here->BSIM4sbNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcdbdb - here->BSIM4gbd) */
|
||||
if ((here->BSIM4dbNode != 0) && (here->BSIM4dNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (here->BSIM4gbd - gcdbdb + here->BSIM4grbpd + here->BSIM4grbdb) */
|
||||
if ((here->BSIM4dbNode != 0) && (here->BSIM4dbNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * here->BSIM4grbpd */
|
||||
if ((here->BSIM4dbNode != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * here->BSIM4grbdb */
|
||||
if ((here->BSIM4dbNode != 0) && (here->BSIM4bNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * here->BSIM4grbpd */
|
||||
if ((here->BSIM4bNodePrime != 0) && (here->BSIM4dbNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * here->BSIM4grbpb */
|
||||
if ((here->BSIM4bNodePrime != 0) && (here->BSIM4bNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * here->BSIM4grbps */
|
||||
if ((here->BSIM4bNodePrime != 0) && (here->BSIM4sbNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (here->BSIM4grbpd + here->BSIM4grbps + here->BSIM4grbpb) */
|
||||
if ((here->BSIM4bNodePrime != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcsbsb - here->BSIM4gbs) */
|
||||
if ((here->BSIM4sbNode != 0) && (here->BSIM4sNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * here->BSIM4grbps */
|
||||
if ((here->BSIM4sbNode != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * here->BSIM4grbsb */
|
||||
if ((here->BSIM4sbNode != 0) && (here->BSIM4bNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (here->BSIM4gbs - gcsbsb + here->BSIM4grbps + here->BSIM4grbsb) */
|
||||
if ((here->BSIM4sbNode != 0) && (here->BSIM4sbNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * here->BSIM4grbdb */
|
||||
if ((here->BSIM4bNode != 0) && (here->BSIM4dbNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * here->BSIM4grbpb */
|
||||
if ((here->BSIM4bNode != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * here->BSIM4grbsb */
|
||||
if ((here->BSIM4bNode != 0) && (here->BSIM4sbNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (here->BSIM4grbsb + here->BSIM4grbdb + here->BSIM4grbpb) */
|
||||
if ((here->BSIM4bNode != 0) && (here->BSIM4bNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* Different Values for the CKTloadOutput */
|
||||
l += 12 ;
|
||||
}
|
||||
|
||||
|
||||
if (here->BSIM4trnqsMod)
|
||||
{
|
||||
/* m * (gqdef + here->BSIM4gtau) */
|
||||
if ((here->BSIM4qNode != 0) && (here->BSIM4qNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (ggtg - gcqgb) */
|
||||
if ((here->BSIM4qNode != 0) && (here->BSIM4gNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (ggtd - gcqdb) */
|
||||
if ((here->BSIM4qNode != 0) && (here->BSIM4dNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (ggts - gcqsb) */
|
||||
if ((here->BSIM4qNode != 0) && (here->BSIM4sNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (ggtb - gcqbb) */
|
||||
if ((here->BSIM4qNode != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * dxpart * here->BSIM4gtau */
|
||||
if ((here->BSIM4dNodePrime != 0) && (here->BSIM4qNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * sxpart * here->BSIM4gtau */
|
||||
if ((here->BSIM4sNodePrime != 0) && (here->BSIM4qNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * here->BSIM4gtau */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4qNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* Different Values for the CKTloadOutput */
|
||||
l += 8 ;
|
||||
}
|
||||
|
||||
|
||||
/* For the RHS */
|
||||
/* m * (ceqjd - ceqbd + ceqgdtot - ceqdrn - ceqqd + Idtoteq) */
|
||||
if (here->BSIM4dNodePrime != 0)
|
||||
jRHS++ ;
|
||||
|
||||
/* m * (ceqqg - ceqgcrg + Igtoteq) */
|
||||
if (here->BSIM4gNodePrime != 0)
|
||||
jRHS++ ;
|
||||
|
||||
/* Different Values for the CKTloadOutputRHS */
|
||||
lRHS += 2 ;
|
||||
|
||||
|
||||
if (here->BSIM4rgateMod == 2)
|
||||
{
|
||||
/* m * ceqgcrg */
|
||||
if (here->BSIM4gNodeExt != 0)
|
||||
jRHS++ ;
|
||||
|
||||
/* Different Values for the CKTloadOutputRHS */
|
||||
lRHS += 1 ;
|
||||
}
|
||||
else if (here->BSIM4rgateMod == 3)
|
||||
{
|
||||
/* m * (ceqqgmid + ceqgcrg) */
|
||||
if (here->BSIM4gNodeMid != 0)
|
||||
jRHS++ ;
|
||||
|
||||
/* Different Values for the CKTloadOutputRHS */
|
||||
lRHS += 1 ;
|
||||
}
|
||||
|
||||
|
||||
if (!here->BSIM4rbodyMod)
|
||||
{
|
||||
/* m * (ceqbd + ceqbs - ceqjd - ceqjs - ceqqb + Ibtoteq) */
|
||||
if (here->BSIM4bNodePrime != 0)
|
||||
jRHS++ ;
|
||||
|
||||
/* m * (ceqdrn - ceqbs + ceqjs + ceqqg + ceqqb + ceqqd + ceqqgmid - ceqgstot + Istoteq) */
|
||||
if (here->BSIM4sNodePrime != 0)
|
||||
jRHS++ ;
|
||||
|
||||
/* Different Values for the CKTloadOutputRHS */
|
||||
lRHS += 2 ;
|
||||
} else {
|
||||
/* m * (ceqjd + ceqqjd) */
|
||||
if (here->BSIM4dbNode != 0)
|
||||
jRHS++ ;
|
||||
|
||||
/* m * (ceqbd + ceqbs - ceqqb + Ibtoteq) */
|
||||
if (here->BSIM4bNodePrime != 0)
|
||||
jRHS++ ;
|
||||
|
||||
/* m * (ceqjs + ceqqjs) */
|
||||
if (here->BSIM4sbNode != 0)
|
||||
jRHS++ ;
|
||||
|
||||
/* m * (ceqdrn - ceqbs + ceqjs + ceqqd + ceqqg + ceqqb +
|
||||
ceqqjd + ceqqjs + ceqqgmid - ceqgstot + Istoteq) */
|
||||
if (here->BSIM4sNodePrime != 0)
|
||||
jRHS++ ;
|
||||
|
||||
/* Different Values for the CKTloadOutputRHS */
|
||||
lRHS += 4 ;
|
||||
}
|
||||
|
||||
|
||||
if (model->BSIM4rdsMod)
|
||||
{
|
||||
/* m * ceqgdtot */
|
||||
if (here->BSIM4dNode != 0)
|
||||
jRHS++ ;
|
||||
|
||||
/* m * ceqgstot */
|
||||
if (here->BSIM4sNode != 0)
|
||||
jRHS++ ;
|
||||
|
||||
/* Different Values for the CKTloadOutputRHS */
|
||||
lRHS += 2 ;
|
||||
}
|
||||
|
||||
|
||||
if (here->BSIM4trnqsMod)
|
||||
{
|
||||
/* m * (cqcheq - cqdef) */
|
||||
if (here->BSIM4qNode != 0)
|
||||
jRHS++ ;
|
||||
|
||||
/* Different Values for the CKTloadOutputRHS */
|
||||
lRHS += 1 ;
|
||||
}
|
||||
|
||||
i++ ;
|
||||
}
|
||||
|
||||
model->n_values = l ;
|
||||
ckt->total_n_values += model->n_values ;
|
||||
|
||||
model->n_Ptr = j ;
|
||||
ckt->total_n_Ptr += model->n_Ptr ;
|
||||
|
||||
model->n_valuesRHS = lRHS ;
|
||||
ckt->total_n_valuesRHS += model->n_valuesRHS ;
|
||||
|
||||
model->n_PtrRHS = jRHS ;
|
||||
ckt->total_n_PtrRHS += model->n_PtrRHS ;
|
||||
}
|
||||
|
||||
/* loop through all the BSIM4 models */
|
||||
for (model = (BSIM4model *)inModel ; model != NULL ; model = model->BSIM4nextModel)
|
||||
{
|
||||
status = cuBSIM4setup ((GENmodel *)model) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef USE_OMP
|
||||
InstCount = 0;
|
||||
model = (BSIM4model*)inModel;
|
||||
|
|
@ -2603,7 +3169,7 @@ do { if((here->ptr = SMPmakeElt(matrix,here->first,here->second))==(double *)NUL
|
|||
}
|
||||
#endif
|
||||
|
||||
return(OK);
|
||||
return (OK) ;
|
||||
}
|
||||
|
||||
int
|
||||
|
|
|
|||
|
|
@ -30,6 +30,10 @@
|
|||
#include "ngspice/sperror.h"
|
||||
#include "ngspice/suffix.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
#define Kb 1.3806226e-23
|
||||
#define KboQ 8.617087e-5
|
||||
#define EPS0 8.85418e-12
|
||||
|
|
@ -91,6 +95,10 @@ double vtfbphi2eot, phieot, TempRatioeot, Vtm0eot, Vtmeot,vbieot;
|
|||
|
||||
int Size_Not_Found, i;
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
int j, status ;
|
||||
#endif
|
||||
|
||||
/* loop through all the BSIM4 device models */
|
||||
for (; model != NULL; model = model->BSIM4nextModel)
|
||||
{ Temp = ckt->CKTtemp;
|
||||
|
|
@ -404,6 +412,9 @@ int Size_Not_Found, i;
|
|||
fprintf(stderr, "BVS reset to %g.\n", model->BSIM4bvs);
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
j = 0 ;
|
||||
#endif
|
||||
|
||||
/* loop through all the instances of the model */
|
||||
for (here = model->BSIM4instances; here != NULL;
|
||||
|
|
@ -2306,7 +2317,199 @@ int Size_Not_Found, i;
|
|||
SPfrontEnd->IFerrorf (ERR_FATAL, "Fatal error(s) detected during BSIM4.6.0 parameter checking for %s in model %s", model->BSIM4modName, here->BSIM4name);
|
||||
return(E_BADPARM);
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
model->BSIM4paramCPU.BSIM4gbsRWArray [j] = here->BSIM4gbs ;
|
||||
model->BSIM4paramCPU.BSIM4cbsRWArray [j] = here->BSIM4cbs ;
|
||||
model->BSIM4paramCPU.BSIM4gbdRWArray [j] = here->BSIM4gbd ;
|
||||
model->BSIM4paramCPU.BSIM4cbdRWArray [j] = here->BSIM4cbd ;
|
||||
model->BSIM4paramCPU.BSIM4vonRWArray [j] = here->BSIM4von ;
|
||||
model->BSIM4paramCPU.BSIM4vdsatRWArray [j] = here->BSIM4vdsat ;
|
||||
model->BSIM4paramCPU.BSIM4csubRWArray [j] = here->BSIM4csub ;
|
||||
model->BSIM4paramCPU.BSIM4gdsRWArray [j] = here->BSIM4gds ;
|
||||
model->BSIM4paramCPU.BSIM4gmRWArray [j] = here->BSIM4gm ;
|
||||
model->BSIM4paramCPU.BSIM4gmbsRWArray [j] = here->BSIM4gmbs ;
|
||||
model->BSIM4paramCPU.BSIM4gcrgRWArray [j] = here->BSIM4gcrg ;
|
||||
model->BSIM4paramCPU.BSIM4IgidlRWArray [j] = here->BSIM4Igidl ;
|
||||
model->BSIM4paramCPU.BSIM4IgislRWArray [j] = here->BSIM4Igisl ;
|
||||
model->BSIM4paramCPU.BSIM4IgcsRWArray [j] = here->BSIM4Igcs ;
|
||||
model->BSIM4paramCPU.BSIM4IgcdRWArray [j] = here->BSIM4Igcd ;
|
||||
model->BSIM4paramCPU.BSIM4IgsRWArray [j] = here->BSIM4Igs ;
|
||||
model->BSIM4paramCPU.BSIM4IgdRWArray [j] = here->BSIM4Igd ;
|
||||
model->BSIM4paramCPU.BSIM4IgbRWArray [j] = here->BSIM4Igb ;
|
||||
model->BSIM4paramCPU.BSIM4cdRWArray [j] = here->BSIM4cd ;
|
||||
model->BSIM4paramCPU.BSIM4qinvRWArray [j] = here->BSIM4qinv ;
|
||||
model->BSIM4paramCPU.BSIM4cggbRWArray [j] = here->BSIM4cggb ;
|
||||
model->BSIM4paramCPU.BSIM4cgsbRWArray [j] = here->BSIM4cgsb ;
|
||||
model->BSIM4paramCPU.BSIM4cgdbRWArray [j] = here->BSIM4cgdb ;
|
||||
model->BSIM4paramCPU.BSIM4cdgbRWArray [j] = here->BSIM4cdgb ;
|
||||
model->BSIM4paramCPU.BSIM4cdsbRWArray [j] = here->BSIM4cdsb ;
|
||||
model->BSIM4paramCPU.BSIM4cddbRWArray [j] = here->BSIM4cddb ;
|
||||
model->BSIM4paramCPU.BSIM4cbgbRWArray [j] = here->BSIM4cbgb ;
|
||||
model->BSIM4paramCPU.BSIM4cbsbRWArray [j] = here->BSIM4cbsb ;
|
||||
model->BSIM4paramCPU.BSIM4cbdbRWArray [j] = here->BSIM4cbdb ;
|
||||
model->BSIM4paramCPU.BSIM4csgbRWArray [j] = here->BSIM4csgb ;
|
||||
model->BSIM4paramCPU.BSIM4cssbRWArray [j] = here->BSIM4cssb ;
|
||||
model->BSIM4paramCPU.BSIM4csdbRWArray [j] = here->BSIM4csdb ;
|
||||
model->BSIM4paramCPU.BSIM4cgbbRWArray [j] = here->BSIM4cgbb ;
|
||||
model->BSIM4paramCPU.BSIM4csbbRWArray [j] = here->BSIM4csbb ;
|
||||
model->BSIM4paramCPU.BSIM4cdbbRWArray [j] = here->BSIM4cdbb ;
|
||||
model->BSIM4paramCPU.BSIM4cbbbRWArray [j] = here->BSIM4cbbb ;
|
||||
model->BSIM4paramCPU.BSIM4gtauRWArray [j] = here->BSIM4gtau ;
|
||||
model->BSIM4paramCPU.BSIM4qgateRWArray [j] = here->BSIM4qgate ;
|
||||
model->BSIM4paramCPU.BSIM4qbulkRWArray [j] = here->BSIM4qbulk ;
|
||||
model->BSIM4paramCPU.BSIM4qdrnRWArray [j] = here->BSIM4qdrn ;
|
||||
model->BSIM4paramCPU.BSIM4qsrcRWArray [j] = here->BSIM4qsrc ;
|
||||
model->BSIM4paramCPU.BSIM4capbsRWArray [j] = here->BSIM4capbs ;
|
||||
model->BSIM4paramCPU.BSIM4capbdRWArray [j] = here->BSIM4capbd ;
|
||||
model->BSIM4paramCPU.BSIM4icVDSArray [j] = here->BSIM4icVDS ;
|
||||
model->BSIM4paramCPU.BSIM4icVGSArray [j] = here->BSIM4icVGS ;
|
||||
model->BSIM4paramCPU.BSIM4icVBSArray [j] = here->BSIM4icVBS ;
|
||||
model->BSIM4paramCPU.BSIM4vth0Array [j] = here->BSIM4vth0 ;
|
||||
model->BSIM4paramCPU.BSIM4gbbsArray [j] = here->BSIM4gbbs ;
|
||||
model->BSIM4paramCPU.BSIM4ggidlbArray [j] = here->BSIM4ggidlb ;
|
||||
model->BSIM4paramCPU.BSIM4gbgsArray [j] = here->BSIM4gbgs ;
|
||||
model->BSIM4paramCPU.BSIM4ggidlgArray [j] = here->BSIM4ggidlg ;
|
||||
model->BSIM4paramCPU.BSIM4gbdsArray [j] = here->BSIM4gbds ;
|
||||
model->BSIM4paramCPU.BSIM4ggidldArray [j] = here->BSIM4ggidld ;
|
||||
model->BSIM4paramCPU.BSIM4ggislsArray [j] = here->BSIM4ggisls ;
|
||||
model->BSIM4paramCPU.BSIM4ggislgArray [j] = here->BSIM4ggislg ;
|
||||
model->BSIM4paramCPU.BSIM4ggislbArray [j] = here->BSIM4ggislb ;
|
||||
model->BSIM4paramCPU.BSIM4gIgsgArray [j] = here->BSIM4gIgsg ;
|
||||
model->BSIM4paramCPU.BSIM4gIgcsgArray [j] = here->BSIM4gIgcsg ;
|
||||
model->BSIM4paramCPU.BSIM4gIgcsdArray [j] = here->BSIM4gIgcsd ;
|
||||
model->BSIM4paramCPU.BSIM4gIgcsbArray [j] = here->BSIM4gIgcsb ;
|
||||
model->BSIM4paramCPU.BSIM4gIgdgArray [j] = here->BSIM4gIgdg ;
|
||||
model->BSIM4paramCPU.BSIM4gIgcdgArray [j] = here->BSIM4gIgcdg ;
|
||||
model->BSIM4paramCPU.BSIM4gIgcddArray [j] = here->BSIM4gIgcdd ;
|
||||
model->BSIM4paramCPU.BSIM4gIgcdbArray [j] = here->BSIM4gIgcdb ;
|
||||
model->BSIM4paramCPU.BSIM4gIgbgArray [j] = here->BSIM4gIgbg ;
|
||||
model->BSIM4paramCPU.BSIM4gIgbdArray [j] = here->BSIM4gIgbd ;
|
||||
model->BSIM4paramCPU.BSIM4gIgbbArray [j] = here->BSIM4gIgbb ;
|
||||
model->BSIM4paramCPU.BSIM4ggidlsArray [j] = here->BSIM4ggidls ;
|
||||
model->BSIM4paramCPU.BSIM4ggisldArray [j] = here->BSIM4ggisld ;
|
||||
model->BSIM4paramCPU.BSIM4gstotArray [j] = here->BSIM4gstot ;
|
||||
model->BSIM4paramCPU.BSIM4gstotdArray [j] = here->BSIM4gstotd ;
|
||||
model->BSIM4paramCPU.BSIM4gstotgArray [j] = here->BSIM4gstotg ;
|
||||
model->BSIM4paramCPU.BSIM4gstotbArray [j] = here->BSIM4gstotb ;
|
||||
model->BSIM4paramCPU.BSIM4gdtotArray [j] = here->BSIM4gdtot ;
|
||||
model->BSIM4paramCPU.BSIM4gdtotdArray [j] = here->BSIM4gdtotd ;
|
||||
model->BSIM4paramCPU.BSIM4gdtotgArray [j] = here->BSIM4gdtotg ;
|
||||
model->BSIM4paramCPU.BSIM4gdtotbArray [j] = here->BSIM4gdtotb ;
|
||||
model->BSIM4paramCPU.BSIM4cgdoArray [j] = here->BSIM4cgdo ;
|
||||
model->BSIM4paramCPU.BSIM4qgdoArray [j] = here->BSIM4qgdo ;
|
||||
model->BSIM4paramCPU.BSIM4cgsoArray [j] = here->BSIM4cgso ;
|
||||
model->BSIM4paramCPU.BSIM4qgsoArray [j] = here->BSIM4qgso ;
|
||||
model->BSIM4paramCPU.BSIM4AseffArray [j] = here->BSIM4Aseff ;
|
||||
model->BSIM4paramCPU.BSIM4PseffArray [j] = here->BSIM4Pseff ;
|
||||
model->BSIM4paramCPU.BSIM4nfArray [j] = here->BSIM4nf ;
|
||||
model->BSIM4paramCPU.BSIM4XExpBVSArray [j] = here->BSIM4XExpBVS ;
|
||||
model->BSIM4paramCPU.BSIM4vjsmFwdArray [j] = here->BSIM4vjsmFwd ;
|
||||
model->BSIM4paramCPU.BSIM4IVjsmFwdArray [j] = here->BSIM4IVjsmFwd ;
|
||||
model->BSIM4paramCPU.BSIM4vjsmRevArray [j] = here->BSIM4vjsmRev ;
|
||||
model->BSIM4paramCPU.BSIM4IVjsmRevArray [j] = here->BSIM4IVjsmRev ;
|
||||
model->BSIM4paramCPU.BSIM4SslpRevArray [j] = here->BSIM4SslpRev ;
|
||||
model->BSIM4paramCPU.BSIM4SslpFwdArray [j] = here->BSIM4SslpFwd ;
|
||||
model->BSIM4paramCPU.BSIM4AdeffArray [j] = here->BSIM4Adeff ;
|
||||
model->BSIM4paramCPU.BSIM4PdeffArray [j] = here->BSIM4Pdeff ;
|
||||
model->BSIM4paramCPU.BSIM4XExpBVDArray [j] = here->BSIM4XExpBVD ;
|
||||
model->BSIM4paramCPU.BSIM4vjdmFwdArray [j] = here->BSIM4vjdmFwd ;
|
||||
model->BSIM4paramCPU.BSIM4IVjdmFwdArray [j] = here->BSIM4IVjdmFwd ;
|
||||
model->BSIM4paramCPU.BSIM4vjdmRevArray [j] = here->BSIM4vjdmRev ;
|
||||
model->BSIM4paramCPU.BSIM4IVjdmRevArray [j] = here->BSIM4IVjdmRev ;
|
||||
model->BSIM4paramCPU.BSIM4DslpRevArray [j] = here->BSIM4DslpRev ;
|
||||
model->BSIM4paramCPU.BSIM4DslpFwdArray [j] = here->BSIM4DslpFwd ;
|
||||
model->BSIM4paramCPU.BSIM4SjctTempRevSatCurArray [j] = here->BSIM4SjctTempRevSatCur ;
|
||||
model->BSIM4paramCPU.BSIM4SswTempRevSatCurArray [j] = here->BSIM4SswTempRevSatCur ;
|
||||
model->BSIM4paramCPU.BSIM4SswgTempRevSatCurArray [j] = here->BSIM4SswgTempRevSatCur ;
|
||||
model->BSIM4paramCPU.BSIM4DjctTempRevSatCurArray [j] = here->BSIM4DjctTempRevSatCur ;
|
||||
model->BSIM4paramCPU.BSIM4DswTempRevSatCurArray [j] = here->BSIM4DswTempRevSatCur ;
|
||||
model->BSIM4paramCPU.BSIM4DswgTempRevSatCurArray [j] = here->BSIM4DswgTempRevSatCur ;
|
||||
model->BSIM4paramCPU.BSIM4vbscArray [j] = here->BSIM4vbsc ;
|
||||
model->BSIM4paramCPU.BSIM4thetavthArray [j] = here->BSIM4thetavth ;
|
||||
model->BSIM4paramCPU.BSIM4eta0Array [j] = here->BSIM4eta0 ;
|
||||
model->BSIM4paramCPU.BSIM4k2oxArray [j] = here->BSIM4k2ox ;
|
||||
model->BSIM4paramCPU.BSIM4nstarArray [j] = here->BSIM4nstar ;
|
||||
model->BSIM4paramCPU.BSIM4vfbArray [j] = here->BSIM4vfb ;
|
||||
model->BSIM4paramCPU.BSIM4vgs_effArray [j] = here->BSIM4vgs_eff ;
|
||||
model->BSIM4paramCPU.BSIM4vgd_effArray [j] = here->BSIM4vgd_eff ;
|
||||
model->BSIM4paramCPU.BSIM4dvgs_eff_dvgArray [j] = here->BSIM4dvgs_eff_dvg ;
|
||||
model->BSIM4paramCPU.BSIM4dvgd_eff_dvgArray [j] = here->BSIM4dvgd_eff_dvg ;
|
||||
model->BSIM4paramCPU.BSIM4VgsteffArray [j] = here->BSIM4Vgsteff ;
|
||||
model->BSIM4paramCPU.BSIM4grdswArray [j] = here->BSIM4grdsw ;
|
||||
model->BSIM4paramCPU.BSIM4AbulkArray [j] = here->BSIM4Abulk ;
|
||||
model->BSIM4paramCPU.BSIM4vtfbphi1Array [j] = here->BSIM4vtfbphi1 ;
|
||||
model->BSIM4paramCPU.BSIM4ueffArray [j] = here->BSIM4ueff ;
|
||||
model->BSIM4paramCPU.BSIM4u0tempArray [j] = here->BSIM4u0temp ;
|
||||
model->BSIM4paramCPU.BSIM4vsattempArray [j] = here->BSIM4vsattemp ;
|
||||
model->BSIM4paramCPU.BSIM4EsatLArray [j] = here->BSIM4EsatL ;
|
||||
model->BSIM4paramCPU.BSIM4VdseffArray [j] = here->BSIM4Vdseff ;
|
||||
model->BSIM4paramCPU.BSIM4vtfbphi2Array [j] = here->BSIM4vtfbphi2 ;
|
||||
model->BSIM4paramCPU.BSIM4CoxeffArray [j] = here->BSIM4Coxeff ;
|
||||
model->BSIM4paramCPU.BSIM4AbovVgst2VtmArray [j] = here->BSIM4AbovVgst2Vtm ;
|
||||
model->BSIM4paramCPU.BSIM4IdovVdsArray [j] = here->BSIM4IdovVds ;
|
||||
model->BSIM4paramCPU.BSIM4gcrgdArray [j] = here->BSIM4gcrgd ;
|
||||
model->BSIM4paramCPU.BSIM4gcrgbArray [j] = here->BSIM4gcrgb ;
|
||||
model->BSIM4paramCPU.BSIM4gcrggArray [j] = here->BSIM4gcrgg ;
|
||||
model->BSIM4paramCPU.BSIM4grgeltdArray [j] = here->BSIM4grgeltd ;
|
||||
model->BSIM4paramCPU.BSIM4gcrgsArray [j] = here->BSIM4gcrgs ;
|
||||
model->BSIM4paramCPU.BSIM4sourceConductanceArray [j] = here->BSIM4sourceConductance ;
|
||||
model->BSIM4paramCPU.BSIM4drainConductanceArray [j] = here->BSIM4drainConductance ;
|
||||
model->BSIM4paramCPU.BSIM4gstotsArray [j] = here->BSIM4gstots ;
|
||||
model->BSIM4paramCPU.BSIM4gdtotsArray [j] = here->BSIM4gdtots ;
|
||||
model->BSIM4paramCPU.BSIM4vfbzbArray [j] = here->BSIM4vfbzb ;
|
||||
model->BSIM4paramCPU.BSIM4gIgssArray [j] = here->BSIM4gIgss ;
|
||||
model->BSIM4paramCPU.BSIM4gIgddArray [j] = here->BSIM4gIgdd ;
|
||||
model->BSIM4paramCPU.BSIM4gIgbsArray [j] = here->BSIM4gIgbs ;
|
||||
model->BSIM4paramCPU.BSIM4gIgcssArray [j] = here->BSIM4gIgcss ;
|
||||
model->BSIM4paramCPU.BSIM4gIgcdsArray [j] = here->BSIM4gIgcds ;
|
||||
model->BSIM4paramCPU.BSIM4noiGd0Array [j] = here->BSIM4noiGd0 ;
|
||||
model->BSIM4paramCPU.BSIM4cqdbArray [j] = here->BSIM4cqdb ;
|
||||
model->BSIM4paramCPU.BSIM4cqsbArray [j] = here->BSIM4cqsb ;
|
||||
model->BSIM4paramCPU.BSIM4cqgbArray [j] = here->BSIM4cqgb ;
|
||||
model->BSIM4paramCPU.BSIM4qchqsArray [j] = here->BSIM4qchqs ;
|
||||
model->BSIM4paramCPU.BSIM4cqbbArray [j] = here->BSIM4cqbb ;
|
||||
model->BSIM4paramCPU.BSIM4taunetArray [j] = here->BSIM4taunet ;
|
||||
model->BSIM4paramCPU.BSIM4gtgArray [j] = here->BSIM4gtg ;
|
||||
model->BSIM4paramCPU.BSIM4gtdArray [j] = here->BSIM4gtd ;
|
||||
model->BSIM4paramCPU.BSIM4gtsArray [j] = here->BSIM4gts ;
|
||||
model->BSIM4paramCPU.BSIM4gtbArray [j] = here->BSIM4gtb ;
|
||||
model->BSIM4paramCPU.BSIM4mArray [j] = here->BSIM4m ;
|
||||
model->BSIM4paramCPU.BSIM4grbpdArray [j] = here->BSIM4grbpd ;
|
||||
model->BSIM4paramCPU.BSIM4grbdbArray [j] = here->BSIM4grbdb ;
|
||||
model->BSIM4paramCPU.BSIM4grbpbArray [j] = here->BSIM4grbpb ;
|
||||
model->BSIM4paramCPU.BSIM4grbpsArray [j] = here->BSIM4grbps ;
|
||||
model->BSIM4paramCPU.BSIM4grbsbArray [j] = here->BSIM4grbsb ;
|
||||
model->BSIM4paramCPU.BSIM4offArray [j] = here->BSIM4off ;
|
||||
model->BSIM4paramCPU.BSIM4dNodePrimeArray [j] = here->BSIM4dNodePrime ;
|
||||
model->BSIM4paramCPU.BSIM4sNodePrimeArray [j] = here->BSIM4sNodePrime ;
|
||||
model->BSIM4paramCPU.BSIM4gNodePrimeArray [j] = here->BSIM4gNodePrime ;
|
||||
model->BSIM4paramCPU.BSIM4bNodePrimeArray [j] = here->BSIM4bNodePrime ;
|
||||
model->BSIM4paramCPU.BSIM4gNodeExtArray [j] = here->BSIM4gNodeExt ;
|
||||
model->BSIM4paramCPU.BSIM4gNodeMidArray [j] = here->BSIM4gNodeMid ;
|
||||
model->BSIM4paramCPU.BSIM4dbNodeArray [j] = here->BSIM4dbNode ;
|
||||
model->BSIM4paramCPU.BSIM4sbNodeArray [j] = here->BSIM4sbNode ;
|
||||
model->BSIM4paramCPU.BSIM4sNodeArray [j] = here->BSIM4sNode ;
|
||||
model->BSIM4paramCPU.BSIM4dNodeArray [j] = here->BSIM4dNode ;
|
||||
model->BSIM4paramCPU.BSIM4qNodeArray [j] = here->BSIM4qNode ;
|
||||
model->BSIM4paramCPU.BSIM4rbodyModArray [j] = here->BSIM4rbodyMod ;
|
||||
model->BSIM4paramCPU.BSIM4modeArray [j] = here->BSIM4mode ;
|
||||
model->BSIM4paramCPU.BSIM4rgateModArray [j] = here->BSIM4rgateMod ;
|
||||
model->BSIM4paramCPU.BSIM4trnqsModArray [j] = here->BSIM4trnqsMod ;
|
||||
model->BSIM4paramCPU.BSIM4acnqsModArray [j] = here->BSIM4acnqsMod ;
|
||||
model->BSIM4paramCPU.BSIM4statesArray [j] = here->BSIM4states ;
|
||||
|
||||
j++ ;
|
||||
#endif
|
||||
|
||||
} /* End instance */
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuBSIM4temp ((GENmodel *)model) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
}
|
||||
return(OK);
|
||||
return (OK) ;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -881,6 +881,543 @@ struct bsim4SizeDependParam
|
|||
struct bsim4SizeDependParam *pNext;
|
||||
};
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
typedef struct sBSIM4paramCPUstruct {
|
||||
|
||||
double *BSIM4cpuPointersD [243] ;
|
||||
#define BSIM4gbsRWArray BSIM4cpuPointersD[0]
|
||||
#define BSIM4cbsRWArray BSIM4cpuPointersD[1]
|
||||
#define BSIM4gbdRWArray BSIM4cpuPointersD[2]
|
||||
#define BSIM4cbdRWArray BSIM4cpuPointersD[3]
|
||||
#define BSIM4vonRWArray BSIM4cpuPointersD[4]
|
||||
#define BSIM4vdsatRWArray BSIM4cpuPointersD[5]
|
||||
#define BSIM4csubRWArray BSIM4cpuPointersD[6]
|
||||
#define BSIM4gdsRWArray BSIM4cpuPointersD[7]
|
||||
#define BSIM4gmRWArray BSIM4cpuPointersD[8]
|
||||
#define BSIM4gmbsRWArray BSIM4cpuPointersD[9]
|
||||
#define BSIM4gcrgRWArray BSIM4cpuPointersD[10]
|
||||
#define BSIM4IgidlRWArray BSIM4cpuPointersD[11]
|
||||
#define BSIM4IgislRWArray BSIM4cpuPointersD[12]
|
||||
#define BSIM4IgcsRWArray BSIM4cpuPointersD[13]
|
||||
#define BSIM4IgcdRWArray BSIM4cpuPointersD[14]
|
||||
#define BSIM4IgsRWArray BSIM4cpuPointersD[15]
|
||||
#define BSIM4IgdRWArray BSIM4cpuPointersD[16]
|
||||
#define BSIM4IgbRWArray BSIM4cpuPointersD[17]
|
||||
#define BSIM4cdRWArray BSIM4cpuPointersD[18]
|
||||
#define BSIM4qinvRWArray BSIM4cpuPointersD[19]
|
||||
#define BSIM4cggbRWArray BSIM4cpuPointersD[20]
|
||||
#define BSIM4cgsbRWArray BSIM4cpuPointersD[21]
|
||||
#define BSIM4cgdbRWArray BSIM4cpuPointersD[22]
|
||||
#define BSIM4cdgbRWArray BSIM4cpuPointersD[23]
|
||||
#define BSIM4cdsbRWArray BSIM4cpuPointersD[24]
|
||||
#define BSIM4cddbRWArray BSIM4cpuPointersD[25]
|
||||
#define BSIM4cbgbRWArray BSIM4cpuPointersD[26]
|
||||
#define BSIM4cbsbRWArray BSIM4cpuPointersD[27]
|
||||
#define BSIM4cbdbRWArray BSIM4cpuPointersD[28]
|
||||
#define BSIM4csgbRWArray BSIM4cpuPointersD[29]
|
||||
#define BSIM4cssbRWArray BSIM4cpuPointersD[30]
|
||||
#define BSIM4csdbRWArray BSIM4cpuPointersD[31]
|
||||
#define BSIM4cgbbRWArray BSIM4cpuPointersD[32]
|
||||
#define BSIM4csbbRWArray BSIM4cpuPointersD[33]
|
||||
#define BSIM4cdbbRWArray BSIM4cpuPointersD[34]
|
||||
#define BSIM4cbbbRWArray BSIM4cpuPointersD[35]
|
||||
#define BSIM4gtauRWArray BSIM4cpuPointersD[36]
|
||||
#define BSIM4qgateRWArray BSIM4cpuPointersD[37]
|
||||
#define BSIM4qbulkRWArray BSIM4cpuPointersD[38]
|
||||
#define BSIM4qdrnRWArray BSIM4cpuPointersD[39]
|
||||
#define BSIM4qsrcRWArray BSIM4cpuPointersD[40]
|
||||
#define BSIM4capbsRWArray BSIM4cpuPointersD[41]
|
||||
#define BSIM4capbdRWArray BSIM4cpuPointersD[42]
|
||||
#define BSIM4icVDSArray BSIM4cpuPointersD[43]
|
||||
#define BSIM4icVGSArray BSIM4cpuPointersD[44]
|
||||
#define BSIM4icVBSArray BSIM4cpuPointersD[45]
|
||||
#define BSIM4vth0Array BSIM4cpuPointersD[46]
|
||||
#define BSIM4gbbsArray BSIM4cpuPointersD[47]
|
||||
#define BSIM4ggidlbArray BSIM4cpuPointersD[48]
|
||||
#define BSIM4gbgsArray BSIM4cpuPointersD[49]
|
||||
#define BSIM4ggidlgArray BSIM4cpuPointersD[50]
|
||||
#define BSIM4gbdsArray BSIM4cpuPointersD[51]
|
||||
#define BSIM4ggidldArray BSIM4cpuPointersD[52]
|
||||
#define BSIM4ggislsArray BSIM4cpuPointersD[53]
|
||||
#define BSIM4ggislgArray BSIM4cpuPointersD[54]
|
||||
#define BSIM4ggislbArray BSIM4cpuPointersD[55]
|
||||
#define BSIM4gIgsgArray BSIM4cpuPointersD[56]
|
||||
#define BSIM4gIgcsgArray BSIM4cpuPointersD[57]
|
||||
#define BSIM4gIgcsdArray BSIM4cpuPointersD[58]
|
||||
#define BSIM4gIgcsbArray BSIM4cpuPointersD[59]
|
||||
#define BSIM4gIgdgArray BSIM4cpuPointersD[60]
|
||||
#define BSIM4gIgcdgArray BSIM4cpuPointersD[61]
|
||||
#define BSIM4gIgcddArray BSIM4cpuPointersD[62]
|
||||
#define BSIM4gIgcdbArray BSIM4cpuPointersD[63]
|
||||
#define BSIM4gIgbgArray BSIM4cpuPointersD[64]
|
||||
#define BSIM4gIgbdArray BSIM4cpuPointersD[65]
|
||||
#define BSIM4gIgbbArray BSIM4cpuPointersD[66]
|
||||
#define BSIM4ggidlsArray BSIM4cpuPointersD[67]
|
||||
#define BSIM4ggisldArray BSIM4cpuPointersD[68]
|
||||
#define BSIM4gstotArray BSIM4cpuPointersD[69]
|
||||
#define BSIM4gstotdArray BSIM4cpuPointersD[70]
|
||||
#define BSIM4gstotgArray BSIM4cpuPointersD[71]
|
||||
#define BSIM4gstotbArray BSIM4cpuPointersD[72]
|
||||
#define BSIM4gdtotArray BSIM4cpuPointersD[73]
|
||||
#define BSIM4gdtotdArray BSIM4cpuPointersD[74]
|
||||
#define BSIM4gdtotgArray BSIM4cpuPointersD[75]
|
||||
#define BSIM4gdtotbArray BSIM4cpuPointersD[76]
|
||||
#define BSIM4cgdoArray BSIM4cpuPointersD[77]
|
||||
#define BSIM4qgdoArray BSIM4cpuPointersD[78]
|
||||
#define BSIM4cgsoArray BSIM4cpuPointersD[79]
|
||||
#define BSIM4qgsoArray BSIM4cpuPointersD[80]
|
||||
#define BSIM4AseffArray BSIM4cpuPointersD[81]
|
||||
#define BSIM4PseffArray BSIM4cpuPointersD[82]
|
||||
#define BSIM4nfArray BSIM4cpuPointersD[83]
|
||||
#define BSIM4XExpBVSArray BSIM4cpuPointersD[84]
|
||||
#define BSIM4vjsmFwdArray BSIM4cpuPointersD[85]
|
||||
#define BSIM4IVjsmFwdArray BSIM4cpuPointersD[86]
|
||||
#define BSIM4vjsmRevArray BSIM4cpuPointersD[87]
|
||||
#define BSIM4IVjsmRevArray BSIM4cpuPointersD[88]
|
||||
#define BSIM4SslpRevArray BSIM4cpuPointersD[89]
|
||||
#define BSIM4SslpFwdArray BSIM4cpuPointersD[90]
|
||||
#define BSIM4AdeffArray BSIM4cpuPointersD[91]
|
||||
#define BSIM4PdeffArray BSIM4cpuPointersD[92]
|
||||
#define BSIM4XExpBVDArray BSIM4cpuPointersD[93]
|
||||
#define BSIM4vjdmFwdArray BSIM4cpuPointersD[94]
|
||||
#define BSIM4IVjdmFwdArray BSIM4cpuPointersD[95]
|
||||
#define BSIM4vjdmRevArray BSIM4cpuPointersD[96]
|
||||
#define BSIM4IVjdmRevArray BSIM4cpuPointersD[97]
|
||||
#define BSIM4DslpRevArray BSIM4cpuPointersD[98]
|
||||
#define BSIM4DslpFwdArray BSIM4cpuPointersD[99]
|
||||
#define BSIM4SjctTempRevSatCurArray BSIM4cpuPointersD[100]
|
||||
#define BSIM4SswTempRevSatCurArray BSIM4cpuPointersD[101]
|
||||
#define BSIM4SswgTempRevSatCurArray BSIM4cpuPointersD[102]
|
||||
#define BSIM4DjctTempRevSatCurArray BSIM4cpuPointersD[103]
|
||||
#define BSIM4DswTempRevSatCurArray BSIM4cpuPointersD[104]
|
||||
#define BSIM4DswgTempRevSatCurArray BSIM4cpuPointersD[105]
|
||||
#define BSIM4vbscArray BSIM4cpuPointersD[106]
|
||||
#define BSIM4thetavthArray BSIM4cpuPointersD[107]
|
||||
#define BSIM4eta0Array BSIM4cpuPointersD[108]
|
||||
#define BSIM4k2oxArray BSIM4cpuPointersD[109]
|
||||
#define BSIM4nstarArray BSIM4cpuPointersD[110]
|
||||
#define BSIM4vfbArray BSIM4cpuPointersD[111]
|
||||
#define BSIM4vgs_effArray BSIM4cpuPointersD[112]
|
||||
#define BSIM4vgd_effArray BSIM4cpuPointersD[113]
|
||||
#define BSIM4dvgs_eff_dvgArray BSIM4cpuPointersD[114]
|
||||
#define BSIM4dvgd_eff_dvgArray BSIM4cpuPointersD[115]
|
||||
#define BSIM4VgsteffArray BSIM4cpuPointersD[116]
|
||||
#define BSIM4grdswArray BSIM4cpuPointersD[117]
|
||||
#define BSIM4AbulkArray BSIM4cpuPointersD[118]
|
||||
#define BSIM4vtfbphi1Array BSIM4cpuPointersD[119]
|
||||
#define BSIM4ueffArray BSIM4cpuPointersD[120]
|
||||
#define BSIM4u0tempArray BSIM4cpuPointersD[121]
|
||||
#define BSIM4vsattempArray BSIM4cpuPointersD[122]
|
||||
#define BSIM4EsatLArray BSIM4cpuPointersD[123]
|
||||
#define BSIM4VdseffArray BSIM4cpuPointersD[124]
|
||||
#define BSIM4vtfbphi2Array BSIM4cpuPointersD[125]
|
||||
#define BSIM4CoxeffArray BSIM4cpuPointersD[126]
|
||||
#define BSIM4AbovVgst2VtmArray BSIM4cpuPointersD[127]
|
||||
#define BSIM4IdovVdsArray BSIM4cpuPointersD[128]
|
||||
#define BSIM4gcrgdArray BSIM4cpuPointersD[129]
|
||||
#define BSIM4gcrgbArray BSIM4cpuPointersD[130]
|
||||
#define BSIM4gcrggArray BSIM4cpuPointersD[131]
|
||||
#define BSIM4grgeltdArray BSIM4cpuPointersD[132]
|
||||
#define BSIM4gcrgsArray BSIM4cpuPointersD[133]
|
||||
#define BSIM4sourceConductanceArray BSIM4cpuPointersD[134]
|
||||
#define BSIM4drainConductanceArray BSIM4cpuPointersD[135]
|
||||
#define BSIM4gstotsArray BSIM4cpuPointersD[136]
|
||||
#define BSIM4gdtotsArray BSIM4cpuPointersD[137]
|
||||
#define BSIM4vfbzbArray BSIM4cpuPointersD[138]
|
||||
#define BSIM4gIgssArray BSIM4cpuPointersD[139]
|
||||
#define BSIM4gIgddArray BSIM4cpuPointersD[140]
|
||||
#define BSIM4gIgbsArray BSIM4cpuPointersD[141]
|
||||
#define BSIM4gIgcssArray BSIM4cpuPointersD[142]
|
||||
#define BSIM4gIgcdsArray BSIM4cpuPointersD[143]
|
||||
#define BSIM4noiGd0Array BSIM4cpuPointersD[144]
|
||||
#define BSIM4cqdbArray BSIM4cpuPointersD[145]
|
||||
#define BSIM4cqsbArray BSIM4cpuPointersD[146]
|
||||
#define BSIM4cqgbArray BSIM4cpuPointersD[147]
|
||||
#define BSIM4qchqsArray BSIM4cpuPointersD[148]
|
||||
#define BSIM4cqbbArray BSIM4cpuPointersD[149]
|
||||
#define BSIM4taunetArray BSIM4cpuPointersD[150]
|
||||
#define BSIM4gtgArray BSIM4cpuPointersD[151]
|
||||
#define BSIM4gtdArray BSIM4cpuPointersD[152]
|
||||
#define BSIM4gtsArray BSIM4cpuPointersD[153]
|
||||
#define BSIM4gtbArray BSIM4cpuPointersD[154]
|
||||
#define BSIM4mArray BSIM4cpuPointersD[155]
|
||||
#define BSIM4grbpdArray BSIM4cpuPointersD[156]
|
||||
#define BSIM4grbdbArray BSIM4cpuPointersD[157]
|
||||
#define BSIM4grbpbArray BSIM4cpuPointersD[158]
|
||||
#define BSIM4grbpsArray BSIM4cpuPointersD[159]
|
||||
#define BSIM4grbsbArray BSIM4cpuPointersD[160]
|
||||
#define BSIM4dNodePrimeRHSValueArray BSIM4cpuPointersD[161]
|
||||
#define BSIM4gNodePrimeRHSValueArray BSIM4cpuPointersD[162]
|
||||
#define BSIM4gNodeExtRHSValueArray BSIM4cpuPointersD[163]
|
||||
#define BSIM4gNodeMidRHSValueArray BSIM4cpuPointersD[164]
|
||||
#define BSIM4bNodePrimeRHSValueArray BSIM4cpuPointersD[165]
|
||||
#define BSIM4sNodePrimeRHSValueArray BSIM4cpuPointersD[166]
|
||||
#define BSIM4dbNodeRHSValueArray BSIM4cpuPointersD[167]
|
||||
#define BSIM4sbNodeRHSValueArray BSIM4cpuPointersD[168]
|
||||
#define BSIM4dNodeRHSValueArray BSIM4cpuPointersD[169]
|
||||
#define BSIM4sNodeRHSValueArray BSIM4cpuPointersD[170]
|
||||
#define BSIM4qNodeRHSValueArray BSIM4cpuPointersD[171]
|
||||
#define BSIM4GEgeValueArray BSIM4cpuPointersD[172]
|
||||
#define BSIM4GPgeValueArray BSIM4cpuPointersD[173]
|
||||
#define BSIM4GEgpValueArray BSIM4cpuPointersD[174]
|
||||
#define BSIM4GPgpValueArray BSIM4cpuPointersD[175]
|
||||
#define BSIM4GPdpValueArray BSIM4cpuPointersD[176]
|
||||
#define BSIM4GPspValueArray BSIM4cpuPointersD[177]
|
||||
#define BSIM4GPbpValueArray BSIM4cpuPointersD[178]
|
||||
#define BSIM4GEdpValueArray BSIM4cpuPointersD[179]
|
||||
#define BSIM4GEspValueArray BSIM4cpuPointersD[180]
|
||||
#define BSIM4GEbpValueArray BSIM4cpuPointersD[181]
|
||||
#define BSIM4GEgmValueArray BSIM4cpuPointersD[182]
|
||||
#define BSIM4GMgeValueArray BSIM4cpuPointersD[183]
|
||||
#define BSIM4GMgmValueArray BSIM4cpuPointersD[184]
|
||||
#define BSIM4GMdpValueArray BSIM4cpuPointersD[185]
|
||||
#define BSIM4GMgpValueArray BSIM4cpuPointersD[186]
|
||||
#define BSIM4GMspValueArray BSIM4cpuPointersD[187]
|
||||
#define BSIM4GMbpValueArray BSIM4cpuPointersD[188]
|
||||
#define BSIM4DPgmValueArray BSIM4cpuPointersD[189]
|
||||
#define BSIM4GPgmValueArray BSIM4cpuPointersD[190]
|
||||
#define BSIM4SPgmValueArray BSIM4cpuPointersD[191]
|
||||
#define BSIM4BPgmValueArray BSIM4cpuPointersD[192]
|
||||
#define BSIM4DgpValueArray BSIM4cpuPointersD[193]
|
||||
#define BSIM4DspValueArray BSIM4cpuPointersD[194]
|
||||
#define BSIM4DbpValueArray BSIM4cpuPointersD[195]
|
||||
#define BSIM4SdpValueArray BSIM4cpuPointersD[196]
|
||||
#define BSIM4SgpValueArray BSIM4cpuPointersD[197]
|
||||
#define BSIM4SbpValueArray BSIM4cpuPointersD[198]
|
||||
#define BSIM4DPdpValueArray BSIM4cpuPointersD[199]
|
||||
#define BSIM4DPdValueArray BSIM4cpuPointersD[200]
|
||||
#define BSIM4DPgpValueArray BSIM4cpuPointersD[201]
|
||||
#define BSIM4DPspValueArray BSIM4cpuPointersD[202]
|
||||
#define BSIM4DPbpValueArray BSIM4cpuPointersD[203]
|
||||
#define BSIM4DdpValueArray BSIM4cpuPointersD[204]
|
||||
#define BSIM4DdValueArray BSIM4cpuPointersD[205]
|
||||
#define BSIM4SPdpValueArray BSIM4cpuPointersD[206]
|
||||
#define BSIM4SPgpValueArray BSIM4cpuPointersD[207]
|
||||
#define BSIM4SPspValueArray BSIM4cpuPointersD[208]
|
||||
#define BSIM4SPsValueArray BSIM4cpuPointersD[209]
|
||||
#define BSIM4SPbpValueArray BSIM4cpuPointersD[210]
|
||||
#define BSIM4SspValueArray BSIM4cpuPointersD[211]
|
||||
#define BSIM4SsValueArray BSIM4cpuPointersD[212]
|
||||
#define BSIM4BPdpValueArray BSIM4cpuPointersD[213]
|
||||
#define BSIM4BPgpValueArray BSIM4cpuPointersD[214]
|
||||
#define BSIM4BPspValueArray BSIM4cpuPointersD[215]
|
||||
#define BSIM4BPbpValueArray BSIM4cpuPointersD[216]
|
||||
#define BSIM4DPdbValueArray BSIM4cpuPointersD[217]
|
||||
#define BSIM4SPsbValueArray BSIM4cpuPointersD[218]
|
||||
#define BSIM4DBdpValueArray BSIM4cpuPointersD[219]
|
||||
#define BSIM4DBdbValueArray BSIM4cpuPointersD[220]
|
||||
#define BSIM4DBbpValueArray BSIM4cpuPointersD[221]
|
||||
#define BSIM4DBbValueArray BSIM4cpuPointersD[222]
|
||||
#define BSIM4BPdbValueArray BSIM4cpuPointersD[223]
|
||||
#define BSIM4BPbValueArray BSIM4cpuPointersD[224]
|
||||
#define BSIM4BPsbValueArray BSIM4cpuPointersD[225]
|
||||
#define BSIM4BPbpIFValueArray BSIM4cpuPointersD[226]
|
||||
#define BSIM4SBspValueArray BSIM4cpuPointersD[227]
|
||||
#define BSIM4SBbpValueArray BSIM4cpuPointersD[228]
|
||||
#define BSIM4SBbValueArray BSIM4cpuPointersD[229]
|
||||
#define BSIM4SBsbValueArray BSIM4cpuPointersD[230]
|
||||
#define BSIM4BdbValueArray BSIM4cpuPointersD[231]
|
||||
#define BSIM4BbpValueArray BSIM4cpuPointersD[232]
|
||||
#define BSIM4BsbValueArray BSIM4cpuPointersD[233]
|
||||
#define BSIM4BbValueArray BSIM4cpuPointersD[234]
|
||||
#define BSIM4QqValueArray BSIM4cpuPointersD[235]
|
||||
#define BSIM4QgpValueArray BSIM4cpuPointersD[236]
|
||||
#define BSIM4QdpValueArray BSIM4cpuPointersD[237]
|
||||
#define BSIM4QspValueArray BSIM4cpuPointersD[238]
|
||||
#define BSIM4QbpValueArray BSIM4cpuPointersD[239]
|
||||
#define BSIM4DPqValueArray BSIM4cpuPointersD[240]
|
||||
#define BSIM4SPqValueArray BSIM4cpuPointersD[241]
|
||||
#define BSIM4GPqValueArray BSIM4cpuPointersD[242]
|
||||
|
||||
int *BSIM4cpuPointersI [18] ;
|
||||
#define BSIM4offArray BSIM4cpuPointersI[0]
|
||||
#define BSIM4dNodePrimeArray BSIM4cpuPointersI[1]
|
||||
#define BSIM4sNodePrimeArray BSIM4cpuPointersI[2]
|
||||
#define BSIM4gNodePrimeArray BSIM4cpuPointersI[3]
|
||||
#define BSIM4bNodePrimeArray BSIM4cpuPointersI[4]
|
||||
#define BSIM4gNodeExtArray BSIM4cpuPointersI[5]
|
||||
#define BSIM4gNodeMidArray BSIM4cpuPointersI[6]
|
||||
#define BSIM4dbNodeArray BSIM4cpuPointersI[7]
|
||||
#define BSIM4sbNodeArray BSIM4cpuPointersI[8]
|
||||
#define BSIM4sNodeArray BSIM4cpuPointersI[9]
|
||||
#define BSIM4dNodeArray BSIM4cpuPointersI[10]
|
||||
#define BSIM4qNodeArray BSIM4cpuPointersI[11]
|
||||
#define BSIM4rbodyModArray BSIM4cpuPointersI[12]
|
||||
#define BSIM4modeArray BSIM4cpuPointersI[13]
|
||||
#define BSIM4rgateModArray BSIM4cpuPointersI[14]
|
||||
#define BSIM4trnqsModArray BSIM4cpuPointersI[15]
|
||||
#define BSIM4acnqsModArray BSIM4cpuPointersI[16]
|
||||
#define BSIM4statesArray BSIM4cpuPointersI[17]
|
||||
} BSIM4paramCPUstruct ;
|
||||
|
||||
typedef struct sBSIM4paramGPUstruct {
|
||||
|
||||
double *BSIM4cudaPointersD [243] ;
|
||||
#define d_BSIM4gbsRWArray BSIM4cudaPointersD[0]
|
||||
#define d_BSIM4cbsRWArray BSIM4cudaPointersD[1]
|
||||
#define d_BSIM4gbdRWArray BSIM4cudaPointersD[2]
|
||||
#define d_BSIM4cbdRWArray BSIM4cudaPointersD[3]
|
||||
#define d_BSIM4vonRWArray BSIM4cudaPointersD[4]
|
||||
#define d_BSIM4vdsatRWArray BSIM4cudaPointersD[5]
|
||||
#define d_BSIM4csubRWArray BSIM4cudaPointersD[6]
|
||||
#define d_BSIM4gdsRWArray BSIM4cudaPointersD[7]
|
||||
#define d_BSIM4gmRWArray BSIM4cudaPointersD[8]
|
||||
#define d_BSIM4gmbsRWArray BSIM4cudaPointersD[9]
|
||||
#define d_BSIM4gcrgRWArray BSIM4cudaPointersD[10]
|
||||
#define d_BSIM4IgidlRWArray BSIM4cudaPointersD[11]
|
||||
#define d_BSIM4IgislRWArray BSIM4cudaPointersD[12]
|
||||
#define d_BSIM4IgcsRWArray BSIM4cudaPointersD[13]
|
||||
#define d_BSIM4IgcdRWArray BSIM4cudaPointersD[14]
|
||||
#define d_BSIM4IgsRWArray BSIM4cudaPointersD[15]
|
||||
#define d_BSIM4IgdRWArray BSIM4cudaPointersD[16]
|
||||
#define d_BSIM4IgbRWArray BSIM4cudaPointersD[17]
|
||||
#define d_BSIM4cdRWArray BSIM4cudaPointersD[18]
|
||||
#define d_BSIM4qinvRWArray BSIM4cudaPointersD[19]
|
||||
#define d_BSIM4cggbRWArray BSIM4cudaPointersD[20]
|
||||
#define d_BSIM4cgsbRWArray BSIM4cudaPointersD[21]
|
||||
#define d_BSIM4cgdbRWArray BSIM4cudaPointersD[22]
|
||||
#define d_BSIM4cdgbRWArray BSIM4cudaPointersD[23]
|
||||
#define d_BSIM4cdsbRWArray BSIM4cudaPointersD[24]
|
||||
#define d_BSIM4cddbRWArray BSIM4cudaPointersD[25]
|
||||
#define d_BSIM4cbgbRWArray BSIM4cudaPointersD[26]
|
||||
#define d_BSIM4cbsbRWArray BSIM4cudaPointersD[27]
|
||||
#define d_BSIM4cbdbRWArray BSIM4cudaPointersD[28]
|
||||
#define d_BSIM4csgbRWArray BSIM4cudaPointersD[29]
|
||||
#define d_BSIM4cssbRWArray BSIM4cudaPointersD[30]
|
||||
#define d_BSIM4csdbRWArray BSIM4cudaPointersD[31]
|
||||
#define d_BSIM4cgbbRWArray BSIM4cudaPointersD[32]
|
||||
#define d_BSIM4csbbRWArray BSIM4cudaPointersD[33]
|
||||
#define d_BSIM4cdbbRWArray BSIM4cudaPointersD[34]
|
||||
#define d_BSIM4cbbbRWArray BSIM4cudaPointersD[35]
|
||||
#define d_BSIM4gtauRWArray BSIM4cudaPointersD[36]
|
||||
#define d_BSIM4qgateRWArray BSIM4cudaPointersD[37]
|
||||
#define d_BSIM4qbulkRWArray BSIM4cudaPointersD[38]
|
||||
#define d_BSIM4qdrnRWArray BSIM4cudaPointersD[39]
|
||||
#define d_BSIM4qsrcRWArray BSIM4cudaPointersD[40]
|
||||
#define d_BSIM4capbsRWArray BSIM4cudaPointersD[41]
|
||||
#define d_BSIM4capbdRWArray BSIM4cudaPointersD[42]
|
||||
#define d_BSIM4icVDSArray BSIM4cudaPointersD[43]
|
||||
#define d_BSIM4icVGSArray BSIM4cudaPointersD[44]
|
||||
#define d_BSIM4icVBSArray BSIM4cudaPointersD[45]
|
||||
#define d_BSIM4vth0Array BSIM4cudaPointersD[46]
|
||||
#define d_BSIM4gbbsArray BSIM4cudaPointersD[47]
|
||||
#define d_BSIM4ggidlbArray BSIM4cudaPointersD[48]
|
||||
#define d_BSIM4gbgsArray BSIM4cudaPointersD[49]
|
||||
#define d_BSIM4ggidlgArray BSIM4cudaPointersD[50]
|
||||
#define d_BSIM4gbdsArray BSIM4cudaPointersD[51]
|
||||
#define d_BSIM4ggidldArray BSIM4cudaPointersD[52]
|
||||
#define d_BSIM4ggislsArray BSIM4cudaPointersD[53]
|
||||
#define d_BSIM4ggislgArray BSIM4cudaPointersD[54]
|
||||
#define d_BSIM4ggislbArray BSIM4cudaPointersD[55]
|
||||
#define d_BSIM4gIgsgArray BSIM4cudaPointersD[56]
|
||||
#define d_BSIM4gIgcsgArray BSIM4cudaPointersD[57]
|
||||
#define d_BSIM4gIgcsdArray BSIM4cudaPointersD[58]
|
||||
#define d_BSIM4gIgcsbArray BSIM4cudaPointersD[59]
|
||||
#define d_BSIM4gIgdgArray BSIM4cudaPointersD[60]
|
||||
#define d_BSIM4gIgcdgArray BSIM4cudaPointersD[61]
|
||||
#define d_BSIM4gIgcddArray BSIM4cudaPointersD[62]
|
||||
#define d_BSIM4gIgcdbArray BSIM4cudaPointersD[63]
|
||||
#define d_BSIM4gIgbgArray BSIM4cudaPointersD[64]
|
||||
#define d_BSIM4gIgbdArray BSIM4cudaPointersD[65]
|
||||
#define d_BSIM4gIgbbArray BSIM4cudaPointersD[66]
|
||||
#define d_BSIM4ggidlsArray BSIM4cudaPointersD[67]
|
||||
#define d_BSIM4ggisldArray BSIM4cudaPointersD[68]
|
||||
#define d_BSIM4gstotArray BSIM4cudaPointersD[69]
|
||||
#define d_BSIM4gstotdArray BSIM4cudaPointersD[70]
|
||||
#define d_BSIM4gstotgArray BSIM4cudaPointersD[71]
|
||||
#define d_BSIM4gstotbArray BSIM4cudaPointersD[72]
|
||||
#define d_BSIM4gdtotArray BSIM4cudaPointersD[73]
|
||||
#define d_BSIM4gdtotdArray BSIM4cudaPointersD[74]
|
||||
#define d_BSIM4gdtotgArray BSIM4cudaPointersD[75]
|
||||
#define d_BSIM4gdtotbArray BSIM4cudaPointersD[76]
|
||||
#define d_BSIM4cgdoArray BSIM4cudaPointersD[77]
|
||||
#define d_BSIM4qgdoArray BSIM4cudaPointersD[78]
|
||||
#define d_BSIM4cgsoArray BSIM4cudaPointersD[79]
|
||||
#define d_BSIM4qgsoArray BSIM4cudaPointersD[80]
|
||||
#define d_BSIM4AseffArray BSIM4cudaPointersD[81]
|
||||
#define d_BSIM4PseffArray BSIM4cudaPointersD[82]
|
||||
#define d_BSIM4nfArray BSIM4cudaPointersD[83]
|
||||
#define d_BSIM4XExpBVSArray BSIM4cudaPointersD[84]
|
||||
#define d_BSIM4vjsmFwdArray BSIM4cudaPointersD[85]
|
||||
#define d_BSIM4IVjsmFwdArray BSIM4cudaPointersD[86]
|
||||
#define d_BSIM4vjsmRevArray BSIM4cudaPointersD[87]
|
||||
#define d_BSIM4IVjsmRevArray BSIM4cudaPointersD[88]
|
||||
#define d_BSIM4SslpRevArray BSIM4cudaPointersD[89]
|
||||
#define d_BSIM4SslpFwdArray BSIM4cudaPointersD[90]
|
||||
#define d_BSIM4AdeffArray BSIM4cudaPointersD[91]
|
||||
#define d_BSIM4PdeffArray BSIM4cudaPointersD[92]
|
||||
#define d_BSIM4XExpBVDArray BSIM4cudaPointersD[93]
|
||||
#define d_BSIM4vjdmFwdArray BSIM4cudaPointersD[94]
|
||||
#define d_BSIM4IVjdmFwdArray BSIM4cudaPointersD[95]
|
||||
#define d_BSIM4vjdmRevArray BSIM4cudaPointersD[96]
|
||||
#define d_BSIM4IVjdmRevArray BSIM4cudaPointersD[97]
|
||||
#define d_BSIM4DslpRevArray BSIM4cudaPointersD[98]
|
||||
#define d_BSIM4DslpFwdArray BSIM4cudaPointersD[99]
|
||||
#define d_BSIM4SjctTempRevSatCurArray BSIM4cudaPointersD[100]
|
||||
#define d_BSIM4SswTempRevSatCurArray BSIM4cudaPointersD[101]
|
||||
#define d_BSIM4SswgTempRevSatCurArray BSIM4cudaPointersD[102]
|
||||
#define d_BSIM4DjctTempRevSatCurArray BSIM4cudaPointersD[103]
|
||||
#define d_BSIM4DswTempRevSatCurArray BSIM4cudaPointersD[104]
|
||||
#define d_BSIM4DswgTempRevSatCurArray BSIM4cudaPointersD[105]
|
||||
#define d_BSIM4vbscArray BSIM4cudaPointersD[106]
|
||||
#define d_BSIM4thetavthArray BSIM4cudaPointersD[107]
|
||||
#define d_BSIM4eta0Array BSIM4cudaPointersD[108]
|
||||
#define d_BSIM4k2oxArray BSIM4cudaPointersD[109]
|
||||
#define d_BSIM4nstarArray BSIM4cudaPointersD[110]
|
||||
#define d_BSIM4vfbArray BSIM4cudaPointersD[111]
|
||||
#define d_BSIM4vgs_effArray BSIM4cudaPointersD[112]
|
||||
#define d_BSIM4vgd_effArray BSIM4cudaPointersD[113]
|
||||
#define d_BSIM4dvgs_eff_dvgArray BSIM4cudaPointersD[114]
|
||||
#define d_BSIM4dvgd_eff_dvgArray BSIM4cudaPointersD[115]
|
||||
#define d_BSIM4VgsteffArray BSIM4cudaPointersD[116]
|
||||
#define d_BSIM4grdswArray BSIM4cudaPointersD[117]
|
||||
#define d_BSIM4AbulkArray BSIM4cudaPointersD[118]
|
||||
#define d_BSIM4vtfbphi1Array BSIM4cudaPointersD[119]
|
||||
#define d_BSIM4ueffArray BSIM4cudaPointersD[120]
|
||||
#define d_BSIM4u0tempArray BSIM4cudaPointersD[121]
|
||||
#define d_BSIM4vsattempArray BSIM4cudaPointersD[122]
|
||||
#define d_BSIM4EsatLArray BSIM4cudaPointersD[123]
|
||||
#define d_BSIM4VdseffArray BSIM4cudaPointersD[124]
|
||||
#define d_BSIM4vtfbphi2Array BSIM4cudaPointersD[125]
|
||||
#define d_BSIM4CoxeffArray BSIM4cudaPointersD[126]
|
||||
#define d_BSIM4AbovVgst2VtmArray BSIM4cudaPointersD[127]
|
||||
#define d_BSIM4IdovVdsArray BSIM4cudaPointersD[128]
|
||||
#define d_BSIM4gcrgdArray BSIM4cudaPointersD[129]
|
||||
#define d_BSIM4gcrgbArray BSIM4cudaPointersD[130]
|
||||
#define d_BSIM4gcrggArray BSIM4cudaPointersD[131]
|
||||
#define d_BSIM4grgeltdArray BSIM4cudaPointersD[132]
|
||||
#define d_BSIM4gcrgsArray BSIM4cudaPointersD[133]
|
||||
#define d_BSIM4sourceConductanceArray BSIM4cudaPointersD[134]
|
||||
#define d_BSIM4drainConductanceArray BSIM4cudaPointersD[135]
|
||||
#define d_BSIM4gstotsArray BSIM4cudaPointersD[136]
|
||||
#define d_BSIM4gdtotsArray BSIM4cudaPointersD[137]
|
||||
#define d_BSIM4vfbzbArray BSIM4cudaPointersD[138]
|
||||
#define d_BSIM4gIgssArray BSIM4cudaPointersD[139]
|
||||
#define d_BSIM4gIgddArray BSIM4cudaPointersD[140]
|
||||
#define d_BSIM4gIgbsArray BSIM4cudaPointersD[141]
|
||||
#define d_BSIM4gIgcssArray BSIM4cudaPointersD[142]
|
||||
#define d_BSIM4gIgcdsArray BSIM4cudaPointersD[143]
|
||||
#define d_BSIM4noiGd0Array BSIM4cudaPointersD[144]
|
||||
#define d_BSIM4cqdbArray BSIM4cudaPointersD[145]
|
||||
#define d_BSIM4cqsbArray BSIM4cudaPointersD[146]
|
||||
#define d_BSIM4cqgbArray BSIM4cudaPointersD[147]
|
||||
#define d_BSIM4qchqsArray BSIM4cudaPointersD[148]
|
||||
#define d_BSIM4cqbbArray BSIM4cudaPointersD[149]
|
||||
#define d_BSIM4taunetArray BSIM4cudaPointersD[150]
|
||||
#define d_BSIM4gtgArray BSIM4cudaPointersD[151]
|
||||
#define d_BSIM4gtdArray BSIM4cudaPointersD[152]
|
||||
#define d_BSIM4gtsArray BSIM4cudaPointersD[153]
|
||||
#define d_BSIM4gtbArray BSIM4cudaPointersD[154]
|
||||
#define d_BSIM4mArray BSIM4cudaPointersD[155]
|
||||
#define d_BSIM4grbpdArray BSIM4cudaPointersD[156]
|
||||
#define d_BSIM4grbdbArray BSIM4cudaPointersD[157]
|
||||
#define d_BSIM4grbpbArray BSIM4cudaPointersD[158]
|
||||
#define d_BSIM4grbpsArray BSIM4cudaPointersD[159]
|
||||
#define d_BSIM4grbsbArray BSIM4cudaPointersD[160]
|
||||
#define d_BSIM4dNodePrimeRHSValueArray BSIM4cudaPointersD[161]
|
||||
#define d_BSIM4gNodePrimeRHSValueArray BSIM4cudaPointersD[162]
|
||||
#define d_BSIM4gNodeExtRHSValueArray BSIM4cudaPointersD[163]
|
||||
#define d_BSIM4gNodeMidRHSValueArray BSIM4cudaPointersD[164]
|
||||
#define d_BSIM4bNodePrimeRHSValueArray BSIM4cudaPointersD[165]
|
||||
#define d_BSIM4sNodePrimeRHSValueArray BSIM4cudaPointersD[166]
|
||||
#define d_BSIM4dbNodeRHSValueArray BSIM4cudaPointersD[167]
|
||||
#define d_BSIM4sbNodeRHSValueArray BSIM4cudaPointersD[168]
|
||||
#define d_BSIM4dNodeRHSValueArray BSIM4cudaPointersD[169]
|
||||
#define d_BSIM4sNodeRHSValueArray BSIM4cudaPointersD[170]
|
||||
#define d_BSIM4qNodeRHSValueArray BSIM4cudaPointersD[171]
|
||||
#define d_BSIM4GEgeValueArray BSIM4cudaPointersD[172]
|
||||
#define d_BSIM4GPgeValueArray BSIM4cudaPointersD[173]
|
||||
#define d_BSIM4GEgpValueArray BSIM4cudaPointersD[174]
|
||||
#define d_BSIM4GPgpValueArray BSIM4cudaPointersD[175]
|
||||
#define d_BSIM4GPdpValueArray BSIM4cudaPointersD[176]
|
||||
#define d_BSIM4GPspValueArray BSIM4cudaPointersD[177]
|
||||
#define d_BSIM4GPbpValueArray BSIM4cudaPointersD[178]
|
||||
#define d_BSIM4GEdpValueArray BSIM4cudaPointersD[179]
|
||||
#define d_BSIM4GEspValueArray BSIM4cudaPointersD[180]
|
||||
#define d_BSIM4GEbpValueArray BSIM4cudaPointersD[181]
|
||||
#define d_BSIM4GEgmValueArray BSIM4cudaPointersD[182]
|
||||
#define d_BSIM4GMgeValueArray BSIM4cudaPointersD[183]
|
||||
#define d_BSIM4GMgmValueArray BSIM4cudaPointersD[184]
|
||||
#define d_BSIM4GMdpValueArray BSIM4cudaPointersD[185]
|
||||
#define d_BSIM4GMgpValueArray BSIM4cudaPointersD[186]
|
||||
#define d_BSIM4GMspValueArray BSIM4cudaPointersD[187]
|
||||
#define d_BSIM4GMbpValueArray BSIM4cudaPointersD[188]
|
||||
#define d_BSIM4DPgmValueArray BSIM4cudaPointersD[189]
|
||||
#define d_BSIM4GPgmValueArray BSIM4cudaPointersD[190]
|
||||
#define d_BSIM4SPgmValueArray BSIM4cudaPointersD[191]
|
||||
#define d_BSIM4BPgmValueArray BSIM4cudaPointersD[192]
|
||||
#define d_BSIM4DgpValueArray BSIM4cudaPointersD[193]
|
||||
#define d_BSIM4DspValueArray BSIM4cudaPointersD[194]
|
||||
#define d_BSIM4DbpValueArray BSIM4cudaPointersD[195]
|
||||
#define d_BSIM4SdpValueArray BSIM4cudaPointersD[196]
|
||||
#define d_BSIM4SgpValueArray BSIM4cudaPointersD[197]
|
||||
#define d_BSIM4SbpValueArray BSIM4cudaPointersD[198]
|
||||
#define d_BSIM4DPdpValueArray BSIM4cudaPointersD[199]
|
||||
#define d_BSIM4DPdValueArray BSIM4cudaPointersD[200]
|
||||
#define d_BSIM4DPgpValueArray BSIM4cudaPointersD[201]
|
||||
#define d_BSIM4DPspValueArray BSIM4cudaPointersD[202]
|
||||
#define d_BSIM4DPbpValueArray BSIM4cudaPointersD[203]
|
||||
#define d_BSIM4DdpValueArray BSIM4cudaPointersD[204]
|
||||
#define d_BSIM4DdValueArray BSIM4cudaPointersD[205]
|
||||
#define d_BSIM4SPdpValueArray BSIM4cudaPointersD[206]
|
||||
#define d_BSIM4SPgpValueArray BSIM4cudaPointersD[207]
|
||||
#define d_BSIM4SPspValueArray BSIM4cudaPointersD[208]
|
||||
#define d_BSIM4SPsValueArray BSIM4cudaPointersD[209]
|
||||
#define d_BSIM4SPbpValueArray BSIM4cudaPointersD[210]
|
||||
#define d_BSIM4SspValueArray BSIM4cudaPointersD[211]
|
||||
#define d_BSIM4SsValueArray BSIM4cudaPointersD[212]
|
||||
#define d_BSIM4BPdpValueArray BSIM4cudaPointersD[213]
|
||||
#define d_BSIM4BPgpValueArray BSIM4cudaPointersD[214]
|
||||
#define d_BSIM4BPspValueArray BSIM4cudaPointersD[215]
|
||||
#define d_BSIM4BPbpValueArray BSIM4cudaPointersD[216]
|
||||
#define d_BSIM4DPdbValueArray BSIM4cudaPointersD[217]
|
||||
#define d_BSIM4SPsbValueArray BSIM4cudaPointersD[218]
|
||||
#define d_BSIM4DBdpValueArray BSIM4cudaPointersD[219]
|
||||
#define d_BSIM4DBdbValueArray BSIM4cudaPointersD[220]
|
||||
#define d_BSIM4DBbpValueArray BSIM4cudaPointersD[221]
|
||||
#define d_BSIM4DBbValueArray BSIM4cudaPointersD[222]
|
||||
#define d_BSIM4BPdbValueArray BSIM4cudaPointersD[223]
|
||||
#define d_BSIM4BPbValueArray BSIM4cudaPointersD[224]
|
||||
#define d_BSIM4BPsbValueArray BSIM4cudaPointersD[225]
|
||||
#define d_BSIM4BPbpIFValueArray BSIM4cudaPointersD[226]
|
||||
#define d_BSIM4SBspValueArray BSIM4cudaPointersD[227]
|
||||
#define d_BSIM4SBbpValueArray BSIM4cudaPointersD[228]
|
||||
#define d_BSIM4SBbValueArray BSIM4cudaPointersD[229]
|
||||
#define d_BSIM4SBsbValueArray BSIM4cudaPointersD[230]
|
||||
#define d_BSIM4BdbValueArray BSIM4cudaPointersD[231]
|
||||
#define d_BSIM4BbpValueArray BSIM4cudaPointersD[232]
|
||||
#define d_BSIM4BsbValueArray BSIM4cudaPointersD[233]
|
||||
#define d_BSIM4BbValueArray BSIM4cudaPointersD[234]
|
||||
#define d_BSIM4QqValueArray BSIM4cudaPointersD[235]
|
||||
#define d_BSIM4QgpValueArray BSIM4cudaPointersD[236]
|
||||
#define d_BSIM4QdpValueArray BSIM4cudaPointersD[237]
|
||||
#define d_BSIM4QspValueArray BSIM4cudaPointersD[238]
|
||||
#define d_BSIM4QbpValueArray BSIM4cudaPointersD[239]
|
||||
#define d_BSIM4DPqValueArray BSIM4cudaPointersD[240]
|
||||
#define d_BSIM4SPqValueArray BSIM4cudaPointersD[241]
|
||||
#define d_BSIM4GPqValueArray BSIM4cudaPointersD[242]
|
||||
|
||||
int *BSIM4cudaPointersI [18] ;
|
||||
#define d_BSIM4offArray BSIM4cudaPointersI[0]
|
||||
#define d_BSIM4dNodePrimeArray BSIM4cudaPointersI[1]
|
||||
#define d_BSIM4sNodePrimeArray BSIM4cudaPointersI[2]
|
||||
#define d_BSIM4gNodePrimeArray BSIM4cudaPointersI[3]
|
||||
#define d_BSIM4bNodePrimeArray BSIM4cudaPointersI[4]
|
||||
#define d_BSIM4gNodeExtArray BSIM4cudaPointersI[5]
|
||||
#define d_BSIM4gNodeMidArray BSIM4cudaPointersI[6]
|
||||
#define d_BSIM4dbNodeArray BSIM4cudaPointersI[7]
|
||||
#define d_BSIM4sbNodeArray BSIM4cudaPointersI[8]
|
||||
#define d_BSIM4sNodeArray BSIM4cudaPointersI[9]
|
||||
#define d_BSIM4dNodeArray BSIM4cudaPointersI[10]
|
||||
#define d_BSIM4qNodeArray BSIM4cudaPointersI[11]
|
||||
#define d_BSIM4rbodyModArray BSIM4cudaPointersI[12]
|
||||
#define d_BSIM4modeArray BSIM4cudaPointersI[13]
|
||||
#define d_BSIM4rgateModArray BSIM4cudaPointersI[14]
|
||||
#define d_BSIM4trnqsModArray BSIM4cudaPointersI[15]
|
||||
#define d_BSIM4acnqsModArray BSIM4cudaPointersI[16]
|
||||
#define d_BSIM4statesArray BSIM4cudaPointersI[17]
|
||||
} BSIM4paramGPUstruct ;
|
||||
#endif
|
||||
|
||||
typedef struct sBSIM4model
|
||||
{
|
||||
|
|
@ -2774,6 +3311,27 @@ typedef struct sBSIM4model
|
|||
unsigned BSIM4pk2weGiven :1;
|
||||
unsigned BSIM4pku0weGiven :1;
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
struct bsim4SizeDependParam **d_pParam ;
|
||||
struct bsim4SizeDependParam **pParamHost ;
|
||||
|
||||
BSIM4paramCPUstruct BSIM4paramCPU ;
|
||||
BSIM4paramGPUstruct BSIM4paramGPU ;
|
||||
|
||||
int offset ;
|
||||
int n_values ;
|
||||
int n_Ptr ;
|
||||
int *PositionVector ;
|
||||
int *d_PositionVector ;
|
||||
|
||||
int offsetRHS ;
|
||||
int n_valuesRHS ;
|
||||
int n_PtrRHS ;
|
||||
int *PositionVectorRHS ;
|
||||
int *d_PositionVectorRHS ;
|
||||
|
||||
int n_instances ;
|
||||
#endif
|
||||
|
||||
} BSIM4model;
|
||||
|
||||
|
|
|
|||
|
|
@ -35,3 +35,7 @@ extern int BSIM4bindCSC (GENmodel*, CKTcircuit*) ;
|
|||
extern int BSIM4bindCSCComplex (GENmodel*, CKTcircuit*) ;
|
||||
extern int BSIM4bindCSCComplexToReal (GENmodel*, CKTcircuit*) ;
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
extern int BSIM4topology (GENmodel *, CKTcircuit *, int *, int *) ;
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -6,6 +6,9 @@
|
|||
#include "bsim4ext.h"
|
||||
#include "bsim4init.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
SPICEdev BSIM4info = {
|
||||
{
|
||||
|
|
@ -42,7 +45,11 @@ SPICEdev BSIM4info = {
|
|||
|
||||
BSIM4param, /* DEVparam */
|
||||
BSIM4mParam, /* DEVmodParam */
|
||||
#ifdef USE_CUSPICE
|
||||
cuBSIM4load, /* DEVload */
|
||||
#else
|
||||
BSIM4load, /* DEVload */
|
||||
#endif
|
||||
BSIM4setup, /* DEVsetup */
|
||||
BSIM4unsetup, /* DEVunsetup */
|
||||
BSIM4setup, /* DEVpzSetup */
|
||||
|
|
@ -81,6 +88,11 @@ SPICEdev BSIM4info = {
|
|||
BSIM4bindCSCComplexToReal, /* DEVbindCSCComplexToReal */
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
cuBSIM4destroy, /* cuDEVdestroy */
|
||||
BSIM4topology, /* DEVtopology */
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -81,8 +81,12 @@ SPICEdev BSIM4v4info = {
|
|||
BSIM4v4bindCSCComplexToReal, /* DEVbindCSCComplexToReal */
|
||||
#endif
|
||||
|
||||
};
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
SPICEdev *
|
||||
get_bsim4v4_info(void)
|
||||
|
|
|
|||
|
|
@ -81,8 +81,12 @@ SPICEdev BSIM4v5info = {
|
|||
BSIM4v5bindCSCComplexToReal, /* DEVbindCSCComplexToReal */
|
||||
#endif
|
||||
|
||||
};
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
SPICEdev *
|
||||
get_bsim4v5_info(void)
|
||||
|
|
|
|||
|
|
@ -81,8 +81,12 @@ SPICEdev BSIM4v6info = {
|
|||
BSIM4v6bindCSCComplexToReal, /* DEVbindCSCComplexToReal */
|
||||
#endif
|
||||
|
||||
};
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
SPICEdev *
|
||||
get_bsim4v6_info(void)
|
||||
|
|
|
|||
|
|
@ -79,6 +79,11 @@ SPICEdev B4SOIinfo = {
|
|||
/* DEVbindCSCComplexToReal */ B4SOIbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
SPICEdev *
|
||||
|
|
@ -86,5 +91,3 @@ get_b4soi_info (void)
|
|||
{
|
||||
return &B4SOIinfo;
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,99 @@
|
|||
/*
|
||||
* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to
|
||||
* endorse or promote products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "ngspice/ngspice.h"
|
||||
#include "ngspice/cktdefs.h"
|
||||
#include "capdefs.h"
|
||||
#include "ngspice/sperror.h"
|
||||
|
||||
#define TopologyMatrixInsert(Ptr, instance_ID, offset, Value, global_ID) \
|
||||
ckt->CKTtopologyMatrixCOOi [global_ID] = (int)(here->Ptr - basePtr) ; \
|
||||
ckt->CKTtopologyMatrixCOOj [global_ID] = model->PositionVector [instance_ID] + offset ; \
|
||||
ckt->CKTtopologyMatrixCOOx [global_ID] = Value ;
|
||||
|
||||
#define TopologyMatrixInsertRHS(offset, instance_ID, offsetRHS, Value, global_ID) \
|
||||
ckt->CKTtopologyMatrixCOOiRHS [global_ID] = here->offset ; \
|
||||
ckt->CKTtopologyMatrixCOOjRHS [global_ID] = model->PositionVectorRHS [instance_ID] + offsetRHS ; \
|
||||
ckt->CKTtopologyMatrixCOOxRHS [global_ID] = Value ;
|
||||
|
||||
int
|
||||
CAPtopology (GENmodel *inModel, CKTcircuit *ckt, int *i, int *j)
|
||||
{
|
||||
CAPmodel *model = (CAPmodel *)inModel ;
|
||||
CAPinstance *here ;
|
||||
int k ;
|
||||
double *basePtr ;
|
||||
basePtr = ckt->CKTmatrix->CKTkluAx ;
|
||||
|
||||
/* loop through all the capacitor models */
|
||||
for ( ; model != NULL ; model = model->CAPnextModel)
|
||||
{
|
||||
k = 0 ;
|
||||
|
||||
/* loop through all the instances of the model */
|
||||
for (here = model->CAPinstances ; here != NULL ; here = here->CAPnextInstance)
|
||||
{
|
||||
if ((here->CAPposNode != 0) && (here->CAPposNode != 0))
|
||||
{
|
||||
TopologyMatrixInsert (CAPposPosptr, k, 0, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
if ((here->CAPnegNode != 0) && (here->CAPnegNode != 0))
|
||||
{
|
||||
TopologyMatrixInsert (CAPnegNegptr, k, 0, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
if ((here->CAPposNode != 0) && (here->CAPnegNode != 0))
|
||||
{
|
||||
TopologyMatrixInsert (CAPposNegptr, k, 0, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
if ((here->CAPnegNode != 0) && (here->CAPposNode != 0))
|
||||
{
|
||||
TopologyMatrixInsert (CAPnegPosptr, k, 0, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
if (here->CAPposNode != 0)
|
||||
{
|
||||
TopologyMatrixInsertRHS (CAPposNode, k, 0, -1, *j) ;
|
||||
(*j)++ ;
|
||||
}
|
||||
|
||||
if (here->CAPnegNode != 0)
|
||||
{
|
||||
TopologyMatrixInsertRHS (CAPnegNode, k, 0, 1, *j) ;
|
||||
(*j)++ ;
|
||||
}
|
||||
|
||||
k++ ;
|
||||
}
|
||||
}
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
|
@ -0,0 +1,69 @@
|
|||
/*
|
||||
* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to
|
||||
* endorse or promote products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "ngspice/config.h"
|
||||
#include "cuda_runtime_api.h"
|
||||
#include "capdefs.h"
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
|
||||
int
|
||||
cuCAPdestroy
|
||||
(
|
||||
GENmodel *inModel
|
||||
)
|
||||
{
|
||||
CAPmodel *model = (CAPmodel *)inModel ;
|
||||
|
||||
for ( ; model != NULL ; model = model->CAPnextModel)
|
||||
{
|
||||
/* DOUBLE */
|
||||
free (model->CAPparamCPU.CAPinitCondArray) ;
|
||||
cudaFree (model->CAPparamGPU.d_CAPinitCondArray) ;
|
||||
|
||||
free (model->CAPparamCPU.CAPcapacArray) ;
|
||||
cudaFree (model->CAPparamGPU.d_CAPcapacArray) ;
|
||||
|
||||
free (model->CAPparamCPU.CAPmArray) ;
|
||||
cudaFree (model->CAPparamGPU.d_CAPmArray) ;
|
||||
|
||||
free (model->CAPparamCPU.CAPgeqValueArray) ;
|
||||
cudaFree (model->CAPparamGPU.d_CAPgeqValueArray) ;
|
||||
|
||||
free (model->CAPparamCPU.CAPceqValueArray) ;
|
||||
cudaFree (model->CAPparamGPU.d_CAPceqValueArray) ;
|
||||
|
||||
/* INT */
|
||||
free (model->CAPparamCPU.CAPposNodeArray) ;
|
||||
cudaFree (model->CAPparamGPU.d_CAPposNodeArray) ;
|
||||
|
||||
free (model->CAPparamCPU.CAPnegNodeArray) ;
|
||||
cudaFree (model->CAPparamGPU.d_CAPnegNodeArray) ;
|
||||
|
||||
free (model->CAPparamCPU.CAPstateArray) ;
|
||||
cudaFree (model->CAPparamGPU.d_CAPstateArray) ;
|
||||
}
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
|
@ -0,0 +1,56 @@
|
|||
/*
|
||||
* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to
|
||||
* endorse or promote products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "ngspice/config.h"
|
||||
#include "cuda_runtime_api.h"
|
||||
#include "capdefs.h"
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
|
||||
/* cudaMemcpy MACRO to check it for errors --> CUDAMEMCPYCHECK(name of pointer, dimension, type, status) */
|
||||
#define CUDAMEMCPYCHECK(a, b, c, d) \
|
||||
if (d != cudaSuccess) \
|
||||
{ \
|
||||
fprintf (stderr, "cuCAPgetic routine...\n") ; \
|
||||
fprintf (stderr, "Error: cudaMemcpy failed on %s size of %d bytes\n", #a, (int)(b * sizeof(c))) ; \
|
||||
fprintf (stderr, "Error: %s = %d, %s\n", #d, d, cudaGetErrorString (d)) ; \
|
||||
return (E_NOMEM) ; \
|
||||
}
|
||||
|
||||
int
|
||||
cuCAPgetic
|
||||
(
|
||||
GENmodel *inModel
|
||||
)
|
||||
{
|
||||
long unsigned int size ;
|
||||
cudaError_t status ;
|
||||
CAPmodel *model = (CAPmodel *)inModel ;
|
||||
|
||||
size = (long unsigned int)model->n_instances ;
|
||||
status = cudaMemcpy (model->CAPparamGPU.d_CAPinitCondArray, model->CAPparamCPU.CAPinitCondArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK(model->CAPparamGPU.d_CAPinitCondArray, size, double, status)
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
|
@ -0,0 +1,162 @@
|
|||
/*
|
||||
* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to
|
||||
* endorse or promote products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "ngspice/config.h"
|
||||
#include "ngspice/CUSPICE/cuniinteg.cuh"
|
||||
#include "capdefs.h"
|
||||
|
||||
extern "C"
|
||||
__global__ void cuCAPload_kernel (CAPparamGPUstruct, double *, double *, double *,
|
||||
int, double, double, int, int, int, int *, double *, int *, double *) ;
|
||||
|
||||
extern "C"
|
||||
int
|
||||
cuCAPload
|
||||
(
|
||||
GENmodel *inModel, CKTcircuit *ckt
|
||||
)
|
||||
{
|
||||
CAPmodel *model = (CAPmodel *)inModel ;
|
||||
int cond1, thread_x, thread_y, block_x ;
|
||||
|
||||
cudaError_t status ;
|
||||
|
||||
/* check if capacitors are in the circuit or are open circuited */
|
||||
if (ckt->CKTmode & (MODETRAN|MODEAC|MODETRANOP))
|
||||
{
|
||||
/* evaluate device independent analysis conditions */
|
||||
cond1 = (((ckt->CKTmode & MODEDC) && (ckt->CKTmode & MODEINITJCT))
|
||||
|| ((ckt->CKTmode & MODEUIC) && (ckt->CKTmode & MODEINITTRAN))) ;
|
||||
|
||||
/* loop through all the resistor models */
|
||||
for ( ; model != NULL ; model = model->CAPnextModel)
|
||||
{
|
||||
/* Determining how many blocks should exist in the kernel */
|
||||
thread_x = 1 ;
|
||||
thread_y = 256 ;
|
||||
if (model->n_instances % thread_y != 0)
|
||||
block_x = (int)((model->n_instances + thread_y - 1) / thread_y) ;
|
||||
else
|
||||
block_x = model->n_instances / thread_y ;
|
||||
|
||||
dim3 thread (thread_x, thread_y) ;
|
||||
|
||||
/* Kernel launch */
|
||||
status = cudaGetLastError () ; // clear error status
|
||||
|
||||
cuCAPload_kernel <<< block_x, thread >>> (model->CAPparamGPU, ckt->d_CKTrhsOld, ckt->d_CKTstate0,
|
||||
ckt->d_CKTstate1, ckt->CKTmode, ckt->CKTag [0], ckt->CKTag [1],
|
||||
ckt->CKTorder, model->n_instances, cond1,
|
||||
model->d_PositionVector, ckt->d_CKTloadOutput,
|
||||
model->d_PositionVectorRHS, ckt->d_CKTloadOutputRHS) ;
|
||||
|
||||
cudaDeviceSynchronize () ;
|
||||
|
||||
status = cudaGetLastError () ; // check for launch error
|
||||
if (status != cudaSuccess)
|
||||
{
|
||||
fprintf (stderr, "Kernel launch failure in the Capacitor Model\n\n") ;
|
||||
return (E_NOMEM) ;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
||||
extern "C"
|
||||
__global__
|
||||
void
|
||||
cuCAPload_kernel
|
||||
(
|
||||
CAPparamGPUstruct CAPentry, double *CKTrhsOld, double *CKTstate_0,
|
||||
double *CKTstate_1, int CKTmode, double CKTag_0, double CKTag_1,
|
||||
int CKTorder, int n_instances, int cond1, int *d_PositionVector,
|
||||
double *d_CKTloadOutput, int *d_PositionVectorRHS, double *d_CKTloadOutputRHS
|
||||
)
|
||||
{
|
||||
int instance_ID ;
|
||||
double vcap, geq, ceq, m ;
|
||||
int error ;
|
||||
|
||||
instance_ID = threadIdx.y + blockDim.y * blockIdx.x ;
|
||||
|
||||
if (instance_ID < n_instances)
|
||||
{
|
||||
if (threadIdx.x == 0)
|
||||
{
|
||||
m = CAPentry.d_CAPmArray [instance_ID] ;
|
||||
|
||||
if (cond1)
|
||||
{
|
||||
vcap = CAPentry.d_CAPinitCondArray [instance_ID] ;
|
||||
} else {
|
||||
vcap = CKTrhsOld [CAPentry.d_CAPposNodeArray [instance_ID]] -
|
||||
CKTrhsOld [CAPentry.d_CAPnegNodeArray [instance_ID]] ;
|
||||
}
|
||||
|
||||
if (CKTmode & (MODETRAN | MODEAC))
|
||||
{
|
||||
#ifndef PREDICTOR
|
||||
if (CKTmode & MODEINITPRED)
|
||||
{
|
||||
CKTstate_0 [CAPentry.d_CAPstateArray [instance_ID]] =
|
||||
CKTstate_1 [CAPentry.d_CAPstateArray [instance_ID]] ;
|
||||
} else { /* only const caps - no poly's */
|
||||
#endif /* PREDICTOR */
|
||||
CKTstate_0 [CAPentry.d_CAPstateArray [instance_ID]] = CAPentry.d_CAPcapacArray [instance_ID] * vcap ;
|
||||
if (CKTmode & MODEINITTRAN)
|
||||
{
|
||||
CKTstate_1 [CAPentry.d_CAPstateArray [instance_ID]] =
|
||||
CKTstate_0 [CAPentry.d_CAPstateArray [instance_ID]] ;
|
||||
}
|
||||
#ifndef PREDICTOR
|
||||
}
|
||||
#endif /* PREDICTOR */
|
||||
error = cuNIintegrate_device_kernel (CKTstate_0, CKTstate_1, &geq, &ceq,
|
||||
CAPentry.d_CAPcapacArray [instance_ID],
|
||||
CAPentry.d_CAPstateArray [instance_ID],
|
||||
CKTag_0, CKTag_1, CKTorder) ;
|
||||
if (error)
|
||||
printf ("Error in the integration!\n\n") ;
|
||||
//return (error) ;
|
||||
|
||||
if (CKTmode & MODEINITTRAN)
|
||||
{
|
||||
CKTstate_1 [CAPentry.d_CAPstateArray [instance_ID] + 1] =
|
||||
CKTstate_0 [CAPentry.d_CAPstateArray [instance_ID] + 1] ;
|
||||
}
|
||||
|
||||
d_CKTloadOutput [d_PositionVector [instance_ID]] = m * geq ;
|
||||
d_CKTloadOutputRHS [d_PositionVectorRHS [instance_ID]] = m * ceq ;
|
||||
|
||||
} else {
|
||||
CKTstate_0 [CAPentry.d_CAPstateArray [instance_ID]] = CAPentry.d_CAPcapacArray [instance_ID] * vcap ;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return ;
|
||||
}
|
||||
|
|
@ -0,0 +1,111 @@
|
|||
/*
|
||||
* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to
|
||||
* endorse or promote products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "ngspice/config.h"
|
||||
#include "cuda_runtime_api.h"
|
||||
#include "capdefs.h"
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
|
||||
/* cudaMalloc MACRO to check it for errors --> CUDAMALLOCCHECK(name of pointer, dimension, type, status) */
|
||||
#define CUDAMALLOCCHECK(a, b, c, d) \
|
||||
if (d != cudaSuccess) \
|
||||
{ \
|
||||
fprintf (stderr, "cuCAPsetup routine...\n") ; \
|
||||
fprintf (stderr, "Error: cudaMalloc failed on %s size of %d bytes\n", #a, (int)(b * sizeof(c))) ; \
|
||||
fprintf (stderr, "Error: %s = %d, %s\n", #d, d, cudaGetErrorString (d)) ; \
|
||||
return (E_NOMEM) ; \
|
||||
}
|
||||
|
||||
/* cudaMemcpy MACRO to check it for errors --> CUDAMEMCPYCHECK(name of pointer, dimension, type, status) */
|
||||
#define CUDAMEMCPYCHECK(a, b, c, d) \
|
||||
if (d != cudaSuccess) \
|
||||
{ \
|
||||
fprintf (stderr, "cuCAPsetup routine...\n") ; \
|
||||
fprintf (stderr, "Error: cudaMemcpy failed on %s size of %d bytes\n", #a, (int)(b * sizeof(c))) ; \
|
||||
fprintf (stderr, "Error: %s = %d, %s\n", #d, d, cudaGetErrorString (d)) ; \
|
||||
return (E_NOMEM) ; \
|
||||
}
|
||||
|
||||
int
|
||||
cuCAPsetup
|
||||
(
|
||||
GENmodel *inModel
|
||||
)
|
||||
{
|
||||
long unsigned int size ;
|
||||
cudaError_t status ;
|
||||
CAPmodel *model = (CAPmodel *)inModel ;
|
||||
|
||||
size = (long unsigned int)model->n_instances ;
|
||||
|
||||
/* Space Allocation to GPU */
|
||||
status = cudaMalloc ((void **)&(model->d_PositionVector), size * sizeof(int)) ;
|
||||
CUDAMALLOCCHECK (model->d_PositionVector, size, int, status)
|
||||
|
||||
status = cudaMemcpy (model->d_PositionVector, model->PositionVector, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->d_PositionVector, size, int, status)
|
||||
|
||||
status = cudaMalloc ((void **)&(model->d_PositionVectorRHS), size * sizeof(int)) ;
|
||||
CUDAMALLOCCHECK (model->d_PositionVectorRHS, size, int, status)
|
||||
|
||||
status = cudaMemcpy (model->d_PositionVectorRHS, model->PositionVectorRHS, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->d_PositionVectorRHS, size, int, status)
|
||||
|
||||
/* DOUBLE */
|
||||
model->CAPparamCPU.CAPinitCondArray = (double *) malloc (size * sizeof(double)) ;
|
||||
status = cudaMalloc ((void **)&(model->CAPparamGPU.d_CAPinitCondArray), size * sizeof(double)) ;
|
||||
CUDAMALLOCCHECK (model->CAPparamGPU.d_CAPinitCondArray, size, double, status)
|
||||
|
||||
model->CAPparamCPU.CAPcapacArray = (double *) malloc (size * sizeof(double)) ;
|
||||
status = cudaMalloc ((void **)&(model->CAPparamGPU.d_CAPcapacArray), size * sizeof(double)) ;
|
||||
CUDAMALLOCCHECK (model->CAPparamGPU.d_CAPcapacArray, size, double, status)
|
||||
|
||||
model->CAPparamCPU.CAPmArray = (double *) malloc (size * sizeof(double)) ;
|
||||
status = cudaMalloc ((void **)&(model->CAPparamGPU.d_CAPmArray), size * sizeof(double)) ;
|
||||
CUDAMALLOCCHECK (model->CAPparamGPU.d_CAPmArray, size, double, status)
|
||||
|
||||
model->CAPparamCPU.CAPgeqValueArray = (double *) malloc (size * sizeof(double)) ;
|
||||
status = cudaMalloc ((void **)&(model->CAPparamGPU.d_CAPgeqValueArray), size * sizeof(double)) ;
|
||||
CUDAMALLOCCHECK (model->CAPparamGPU.d_CAPgeqValueArray, size, double, status)
|
||||
|
||||
model->CAPparamCPU.CAPceqValueArray = (double *) malloc (size * sizeof(double)) ;
|
||||
status = cudaMalloc ((void **)&(model->CAPparamGPU.d_CAPceqValueArray), size * sizeof(double)) ;
|
||||
CUDAMALLOCCHECK (model->CAPparamGPU.d_CAPceqValueArray, size, double, status)
|
||||
|
||||
/* INT */
|
||||
model->CAPparamCPU.CAPposNodeArray = (int *) malloc (size * sizeof(int)) ;
|
||||
status = cudaMalloc ((void **)&(model->CAPparamGPU.d_CAPposNodeArray), size * sizeof(int)) ;
|
||||
CUDAMALLOCCHECK (model->CAPparamGPU.d_CAPposNodeArray, size, int, status)
|
||||
|
||||
model->CAPparamCPU.CAPnegNodeArray = (int *) malloc (size * sizeof(int)) ;
|
||||
status = cudaMalloc ((void **)&(model->CAPparamGPU.d_CAPnegNodeArray), size * sizeof(int)) ;
|
||||
CUDAMALLOCCHECK (model->CAPparamGPU.d_CAPnegNodeArray, size, int, status)
|
||||
|
||||
model->CAPparamCPU.CAPstateArray = (int *) malloc (size * sizeof(int)) ;
|
||||
status = cudaMalloc ((void **)&(model->CAPparamGPU.d_CAPstateArray), size * sizeof(int)) ;
|
||||
CUDAMALLOCCHECK (model->CAPparamGPU.d_CAPstateArray, size, int, status)
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
|
@ -0,0 +1,71 @@
|
|||
/*
|
||||
* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to
|
||||
* endorse or promote products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "ngspice/config.h"
|
||||
#include "cuda_runtime_api.h"
|
||||
#include "capdefs.h"
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
|
||||
/* cudaMemcpy MACRO to check it for errors --> CUDAMEMCPYCHECK(name of pointer, dimension, type, status) */
|
||||
#define CUDAMEMCPYCHECK(a, b, c, d) \
|
||||
if (d != cudaSuccess) \
|
||||
{ \
|
||||
fprintf (stderr, "cuCAPtemp routine...\n") ; \
|
||||
fprintf (stderr, "Error: cudaMemcpy failed on %s size of %d bytes\n", #a, (int)(b * sizeof(c))) ; \
|
||||
fprintf (stderr, "Error: %s = %d, %s\n", #d, d, cudaGetErrorString (d)) ; \
|
||||
return (E_NOMEM) ; \
|
||||
}
|
||||
|
||||
int
|
||||
cuCAPtemp
|
||||
(
|
||||
GENmodel *inModel
|
||||
)
|
||||
{
|
||||
long unsigned int size ;
|
||||
cudaError_t status ;
|
||||
CAPmodel *model = (CAPmodel *)inModel ;
|
||||
|
||||
size = (long unsigned int)model->n_instances ;
|
||||
|
||||
/* DOUBLE */
|
||||
status = cudaMemcpy (model->CAPparamGPU.d_CAPcapacArray, model->CAPparamCPU.CAPcapacArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK(model->CAPparamGPU.d_CAPcapacArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->CAPparamGPU.d_CAPmArray, model->CAPparamCPU.CAPmArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK(model->CAPparamGPU.d_CAPmArray, size, double, status)
|
||||
|
||||
/* INT */
|
||||
status = cudaMemcpy (model->CAPparamGPU.d_CAPposNodeArray, model->CAPparamCPU.CAPposNodeArray, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK(model->CAPparamGPU.d_CAPposNodeArray, size, int, status)
|
||||
|
||||
status = cudaMemcpy (model->CAPparamGPU.d_CAPnegNodeArray, model->CAPparamCPU.CAPnegNodeArray, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK(model->CAPparamGPU.d_CAPnegNodeArray, size, int, status)
|
||||
|
||||
status = cudaMemcpy (model->CAPparamGPU.d_CAPstateArray, model->CAPparamCPU.CAPstateArray, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK(model->CAPparamGPU.CAPstateArray, size, int, status)
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
|
@ -38,4 +38,19 @@ endif
|
|||
AM_CPPFLAGS = @AM_CPPFLAGS@ -I$(top_srcdir)/src/include
|
||||
AM_CFLAGS = $(STATIC)
|
||||
|
||||
if USE_CUSPICE_WANTED
|
||||
.cu.lo:
|
||||
$(AM_V_GEN)$(top_srcdir)/src/libtool_wrapper_for_cuda.tcl $@ $(AM_CFLAGS) $(NVCC) $(CUDA_CFLAGS) $(AM_CPPFLAGS) -c $<
|
||||
|
||||
libcap_la_SOURCES += \
|
||||
CUSPICE/captopology.c \
|
||||
CUSPICE/cucapfree.c \
|
||||
CUSPICE/cucapgetic.c \
|
||||
CUSPICE/cucapload.cu \
|
||||
CUSPICE/cucapsetup.c \
|
||||
CUSPICE/cucaptemp.c
|
||||
|
||||
AM_CPPFLAGS += $(CUDA_CPPFLAGS)
|
||||
endif
|
||||
|
||||
MAINTAINERCLEANFILES = Makefile.in
|
||||
|
|
|
|||
|
|
@ -76,6 +76,35 @@ typedef struct sCAPinstance {
|
|||
+3 for the derivatives - pointer to the
|
||||
beginning of the array */
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
typedef struct sCAPparamCPUstruct {
|
||||
double *CAPcpuPointersD [5] ;
|
||||
#define CAPinitCondArray CAPcpuPointersD[0]
|
||||
#define CAPcapacArray CAPcpuPointersD[1]
|
||||
#define CAPmArray CAPcpuPointersD[2]
|
||||
#define CAPgeqValueArray CAPcpuPointersD[3]
|
||||
#define CAPceqValueArray CAPcpuPointersD[4]
|
||||
|
||||
int *CAPcpuPointersI [3] ;
|
||||
#define CAPposNodeArray CAPcpuPointersI[0]
|
||||
#define CAPnegNodeArray CAPcpuPointersI[1]
|
||||
#define CAPstateArray CAPcpuPointersI[2]
|
||||
} CAPparamCPUstruct ;
|
||||
|
||||
typedef struct sCAPparamGPUstruct {
|
||||
double *CAPcudaPointersD [5] ;
|
||||
#define d_CAPinitCondArray CAPcudaPointersD[0]
|
||||
#define d_CAPcapacArray CAPcudaPointersD[1]
|
||||
#define d_CAPmArray CAPcudaPointersD[2]
|
||||
#define d_CAPgeqValueArray CAPcudaPointersD[3]
|
||||
#define d_CAPceqValueArray CAPcudaPointersD[4]
|
||||
|
||||
int *CAPcudaPointersI [3] ;
|
||||
#define d_CAPposNodeArray CAPcudaPointersI[0]
|
||||
#define d_CAPnegNodeArray CAPcudaPointersI[1]
|
||||
#define d_CAPstateArray CAPcudaPointersI[2]
|
||||
} CAPparamGPUstruct ;
|
||||
#endif
|
||||
|
||||
/* data per model */
|
||||
|
||||
|
|
@ -118,6 +147,25 @@ typedef struct sCAPmodel { /* model structure for a capacitor */
|
|||
unsigned CAPthickGiven : 1; /* flags indicates insulator thickness given */
|
||||
unsigned CAPbv_maxGiven : 1; /* flags indicates maximum voltage is given */
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
CAPparamCPUstruct CAPparamCPU ;
|
||||
CAPparamGPUstruct CAPparamGPU ;
|
||||
|
||||
int offset ;
|
||||
int n_values ;
|
||||
int n_Ptr ;
|
||||
int *PositionVector ;
|
||||
int *d_PositionVector ;
|
||||
|
||||
int offsetRHS ;
|
||||
int n_valuesRHS ;
|
||||
int n_PtrRHS ;
|
||||
int *PositionVectorRHS ;
|
||||
int *d_PositionVectorRHS ;
|
||||
|
||||
int n_instances ;
|
||||
#endif
|
||||
|
||||
} CAPmodel;
|
||||
|
||||
/* device parameters */
|
||||
|
|
|
|||
|
|
@ -29,3 +29,7 @@ extern int CAPbindCSC (GENmodel*, CKTcircuit*) ;
|
|||
extern int CAPbindCSCComplex (GENmodel*, CKTcircuit*) ;
|
||||
extern int CAPbindCSCComplexToReal (GENmodel*, CKTcircuit*) ;
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
extern int CAPtopology (GENmodel *, CKTcircuit *, int *, int *) ;
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -6,6 +6,9 @@
|
|||
#include "capext.h"
|
||||
#include "capinit.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
SPICEdev CAPinfo = {
|
||||
{ "Capacitor",
|
||||
|
|
@ -41,7 +44,11 @@ SPICEdev CAPinfo = {
|
|||
|
||||
/* DEVparam */ CAPparam,
|
||||
/* DEVmodParam */ CAPmParam,
|
||||
#ifdef USE_CUSPICE
|
||||
/* DEVload */ cuCAPload,
|
||||
#else
|
||||
/* DEVload */ CAPload,
|
||||
#endif
|
||||
/* DEVsetup */ CAPsetup,
|
||||
/* DEVunsetup */ NULL,
|
||||
/* DEVpzSetup */ CAPsetup,
|
||||
|
|
@ -80,6 +87,11 @@ SPICEdev CAPinfo = {
|
|||
/* DEVbindCSCComplexToReal */ CAPbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ cuCAPdestroy,
|
||||
/* DEVtopology */ CAPtopology,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -12,6 +12,9 @@ Modified: September 2003 Paolo Nenzi
|
|||
#include "ngspice/sperror.h"
|
||||
#include "ngspice/suffix.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
/*ARGSUSED*/
|
||||
int
|
||||
|
|
@ -117,6 +120,92 @@ do { if((here->ptr = SMPmakeElt(matrix, here->first, here->second)) == NULL){\
|
|||
TSTALLOC(CAPnegPosptr,CAPnegNode,CAPposNode);
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
int i, j, k, status ;
|
||||
|
||||
/* Counting the instances */
|
||||
for (model = (CAPmodel *)inModel ; model != NULL ; model = model->CAPnextModel)
|
||||
{
|
||||
i = 0 ;
|
||||
|
||||
for (here = model->CAPinstances ; here != NULL ; here = here->CAPnextInstance)
|
||||
{
|
||||
i++ ;
|
||||
}
|
||||
|
||||
/* How much instances we have */
|
||||
model->n_instances = i ;
|
||||
}
|
||||
|
||||
/* loop through all the capacitor models */
|
||||
for (model = (CAPmodel *)inModel ; model != NULL ; model = model->CAPnextModel)
|
||||
{
|
||||
model->offset = ckt->total_n_values ;
|
||||
model->offsetRHS = ckt->total_n_valuesRHS ;
|
||||
|
||||
j = 0 ;
|
||||
k = 0 ;
|
||||
|
||||
/* loop through all the instances of the model */
|
||||
for (here = model->CAPinstances ; here != NULL ; here = here->CAPnextInstance)
|
||||
{
|
||||
/* For the Matrix */
|
||||
if ((here->CAPposNode != 0) && (here->CAPposNode != 0))
|
||||
j++ ;
|
||||
|
||||
if ((here->CAPnegNode != 0) && (here->CAPnegNode != 0))
|
||||
j++ ;
|
||||
|
||||
if ((here->CAPposNode != 0) && (here->CAPnegNode != 0))
|
||||
j++ ;
|
||||
|
||||
if ((here->CAPnegNode != 0) && (here->CAPposNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* For the RHS */
|
||||
if (here->CAPposNode != 0)
|
||||
k++ ;
|
||||
|
||||
if (here->CAPnegNode != 0)
|
||||
k++ ;
|
||||
}
|
||||
|
||||
model->n_values = model->n_instances ;
|
||||
ckt->total_n_values += model->n_values ;
|
||||
|
||||
model->n_Ptr = j ;
|
||||
ckt->total_n_Ptr += model->n_Ptr ;
|
||||
|
||||
model->n_valuesRHS = model->n_instances ;
|
||||
ckt->total_n_valuesRHS += model->n_valuesRHS ;
|
||||
|
||||
model->n_PtrRHS = k ;
|
||||
ckt->total_n_PtrRHS += model->n_PtrRHS ;
|
||||
|
||||
|
||||
/* Position Vector assignment */
|
||||
model->PositionVector = TMALLOC (int, model->n_instances) ;
|
||||
|
||||
for (j = 0 ; j < model->n_instances ; j++)
|
||||
model->PositionVector [j] = model->offset + j ;
|
||||
|
||||
/* Position Vector assignment for the RHS */
|
||||
model->PositionVectorRHS = TMALLOC (int, model->n_instances) ;
|
||||
|
||||
for (j = 0 ; j < model->n_instances ; j++)
|
||||
model->PositionVectorRHS [j] = model->offsetRHS + j ;
|
||||
}
|
||||
|
||||
/* loop through all the capacitor models */
|
||||
for (model = (CAPmodel *)inModel ; model != NULL ; model = model->CAPnextModel)
|
||||
{
|
||||
status = cuCAPsetup ((GENmodel *)model) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
}
|
||||
#endif
|
||||
|
||||
return(OK);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -16,6 +16,9 @@ Modified: September 2003 Paolo Nenzi
|
|||
#include "ngspice/sperror.h"
|
||||
#include "ngspice/suffix.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
/*ARGSUSED*/
|
||||
int
|
||||
|
|
@ -28,9 +31,17 @@ CAPtemp(GENmodel *inModel, CKTcircuit *ckt)
|
|||
double factor;
|
||||
double tc1, tc2;
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
int i, status ;
|
||||
#endif
|
||||
|
||||
/* loop through all the capacitor models */
|
||||
for( ; model != NULL; model = model->CAPnextModel ) {
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
i = 0 ;
|
||||
#endif
|
||||
|
||||
/* loop through all the instances of the model */
|
||||
for (here = model->CAPinstances; here != NULL ;
|
||||
here=here->CAPnextInstance) {
|
||||
|
|
@ -85,8 +96,25 @@ CAPtemp(GENmodel *inModel, CKTcircuit *ckt)
|
|||
|
||||
here->CAPcapac = here->CAPcapac * factor * here->CAPscale;
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
model->CAPparamCPU.CAPcapacArray[i] = here->CAPcapac ;
|
||||
model->CAPparamCPU.CAPmArray[i] = here->CAPm ;
|
||||
model->CAPparamCPU.CAPposNodeArray[i] = here->CAPposNode ;
|
||||
model->CAPparamCPU.CAPnegNodeArray[i] = here->CAPnegNode ;
|
||||
model->CAPparamCPU.CAPstateArray[i] = here->CAPstate ;
|
||||
|
||||
i++ ;
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuCAPtemp ((GENmodel *)model) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
}
|
||||
return(OK);
|
||||
return (OK) ;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -80,6 +80,11 @@ SPICEdev CCCSinfo = {
|
|||
/* DEVbindCSCComplexToReal */ CCCSbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -81,6 +81,11 @@ SPICEdev CCVSinfo = {
|
|||
/* DEVbindCSCComplexToReal */ CCVSbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -81,6 +81,11 @@ SPICEdev CPLinfo = {
|
|||
/* DEVbindCSCComplexToReal */ NULL,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
SPICEdev *
|
||||
|
|
|
|||
|
|
@ -83,6 +83,11 @@ SPICEdev CSWinfo = {
|
|||
/* DEVbindCSCComplexToReal */ CSWbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -82,8 +82,12 @@ SPICEdev DIOinfo = {
|
|||
/* DEVbindCSCComplexToReal */ DIObindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
};
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
SPICEdev *
|
||||
get_dio_info(void)
|
||||
|
|
|
|||
|
|
@ -81,6 +81,11 @@ SPICEdev HFETAinfo = {
|
|||
/* DEVbindCSCComplexToReal */ HFETAbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -81,8 +81,12 @@ SPICEdev HFET2info = {
|
|||
/* DEVbindCSCComplexToReal */ HFET2bindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
};
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
SPICEdev *
|
||||
get_hfet2_info(void)
|
||||
|
|
|
|||
|
|
@ -79,8 +79,12 @@ SPICEdev HSM2info = {
|
|||
/* DEVbindCSCComplexToReal */ HSM2bindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
};
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
SPICEdev *
|
||||
get_hsm2_info(void)
|
||||
|
|
|
|||
|
|
@ -79,8 +79,12 @@ SPICEdev HSMHVinfo = {
|
|||
/* DEVbindCSCComplexToReal */ HSMHVbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
};
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
SPICEdev *
|
||||
get_hsmhv_info(void)
|
||||
|
|
|
|||
|
|
@ -0,0 +1,63 @@
|
|||
/*
|
||||
* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to
|
||||
* endorse or promote products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "ngspice/config.h"
|
||||
#include "cuda_runtime_api.h"
|
||||
#include "inddefs.h"
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
|
||||
int
|
||||
cuINDdestroy
|
||||
(
|
||||
GENmodel *inModel
|
||||
)
|
||||
{
|
||||
INDmodel *model = (INDmodel *)inModel ;
|
||||
|
||||
for ( ; model != NULL ; model = model->INDnextModel)
|
||||
{
|
||||
/* DOUBLE */
|
||||
free (model->INDparamCPU.INDinitCondArray) ;
|
||||
cudaFree (model->INDparamGPU.d_INDinitCondArray) ;
|
||||
|
||||
free (model->INDparamCPU.INDinductArray) ;
|
||||
cudaFree (model->INDparamGPU.d_INDinductArray) ;
|
||||
|
||||
free (model->INDparamCPU.INDreqValueArray) ;
|
||||
cudaFree (model->INDparamGPU.d_INDreqValueArray) ;
|
||||
|
||||
free (model->INDparamCPU.INDveqValueArray) ;
|
||||
cudaFree (model->INDparamGPU.d_INDveqValueArray) ;
|
||||
|
||||
/* INT */
|
||||
free (model->INDparamCPU.INDbrEqArray) ;
|
||||
cudaFree (model->INDparamGPU.d_INDbrEqArray) ;
|
||||
|
||||
free (model->INDparamCPU.INDstateArray) ;
|
||||
cudaFree (model->INDparamGPU.d_INDstateArray) ;
|
||||
}
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
|
@ -0,0 +1,170 @@
|
|||
/*
|
||||
* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to
|
||||
* endorse or promote products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "ngspice/config.h"
|
||||
#include "ngspice/CUSPICE/cuniinteg.cuh"
|
||||
#include "inddefs.h"
|
||||
|
||||
/* cudaMalloc MACRO to check it for errors --> CUDAMALLOCCHECK(name of pointer, dimension, type, status) */
|
||||
#define CUDAMALLOCCHECK(a, b, c, d) \
|
||||
if (d != cudaSuccess) \
|
||||
{ \
|
||||
fprintf (stderr, "cuINDload routine...\n") ; \
|
||||
fprintf (stderr, "Error: cudaMalloc failed on %s size of %d bytes\n", #a, (int)(b * sizeof(c))) ; \
|
||||
fprintf (stderr, "Error: %s = %d, %s\n", #d, d, cudaGetErrorString (d)) ; \
|
||||
return (E_NOMEM) ; \
|
||||
}
|
||||
|
||||
/* cudaMemcpy MACRO to check it for errors --> CUDAMEMCPYCHECK(name of pointer, dimension, type, status) */
|
||||
#define CUDAMEMCPYCHECK(a, b, c, d) \
|
||||
if (d != cudaSuccess) \
|
||||
{ \
|
||||
fprintf (stderr, "cuINDload routine...\n") ; \
|
||||
fprintf (stderr, "Error: cudaMemcpy failed on %s size of %d bytes\n", #a, (int)(b * sizeof(c))) ; \
|
||||
fprintf (stderr, "Error: %s = %d, %s\n", #d, d, cudaGetErrorString (d)) ; \
|
||||
return (E_NOMEM) ; \
|
||||
}
|
||||
|
||||
extern "C"
|
||||
__global__ void cuINDload_kernel (INDparamGPUstruct, double *, double *, double *, int, double, double, int, int, int *, double *, int *, double *) ;
|
||||
|
||||
extern "C"
|
||||
int
|
||||
cuINDload
|
||||
(
|
||||
GENmodel *inModel, CKTcircuit *ckt
|
||||
)
|
||||
{
|
||||
INDmodel *model = (INDmodel *)inModel ;
|
||||
int thread_x, thread_y, block_x ;
|
||||
|
||||
cudaError_t status ;
|
||||
|
||||
/* loop through all the inductor models */
|
||||
for ( ; model != NULL ; model = model->INDnextModel)
|
||||
{
|
||||
/* Determining how many blocks should exist in the kernel */
|
||||
thread_x = 1 ;
|
||||
thread_y = 256 ;
|
||||
if (model->n_instances % thread_y != 0)
|
||||
block_x = (int)(model->n_instances / thread_y) + 1 ;
|
||||
else
|
||||
block_x = model->n_instances / thread_y ;
|
||||
|
||||
dim3 thread (thread_x, thread_y) ;
|
||||
|
||||
/* Kernel launch */
|
||||
status = cudaGetLastError () ; // clear error status
|
||||
|
||||
cuINDload_kernel <<< block_x, thread >>> (model->INDparamGPU, ckt->d_CKTrhsOld, ckt->d_CKTstate0,
|
||||
ckt->d_CKTstate1, ckt->CKTmode, ckt->CKTag [0], ckt->CKTag [1],
|
||||
ckt->CKTorder, model->n_instances,
|
||||
model->d_PositionVector, ckt->d_CKTloadOutput,
|
||||
model->d_PositionVectorRHS, ckt->d_CKTloadOutputRHS) ;
|
||||
|
||||
cudaDeviceSynchronize () ;
|
||||
|
||||
status = cudaGetLastError () ; // check for launch error
|
||||
if (status != cudaSuccess)
|
||||
{
|
||||
fprintf (stderr, "Kernel launch failure in the Inductor Model\n\n") ;
|
||||
return (E_NOMEM) ;
|
||||
}
|
||||
}
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
||||
extern "C"
|
||||
__global__
|
||||
void
|
||||
cuINDload_kernel
|
||||
(
|
||||
INDparamGPUstruct INDentry, double *CKTrhsOld, double *CKTstate_0,
|
||||
double *CKTstate_1, int CKTmode, double CKTag_0, double CKTag_1,
|
||||
int CKTorder, int ind_n_instances,
|
||||
int *d_PositionVector, double *d_CKTloadOutput,
|
||||
int *d_PositionVectorRHS, double *d_CKTloadOutputRHS
|
||||
)
|
||||
{
|
||||
int instance_ID ;
|
||||
int error ;
|
||||
double req, veq ;
|
||||
|
||||
instance_ID = threadIdx.y + blockDim.y * blockIdx.x ;
|
||||
|
||||
if (instance_ID < ind_n_instances)
|
||||
{
|
||||
if (threadIdx.x == 0)
|
||||
{
|
||||
if (!(CKTmode & (MODEDC | MODEINITPRED)))
|
||||
{
|
||||
if (CKTmode & MODEUIC && CKTmode & MODEINITTRAN)
|
||||
CKTstate_0 [INDentry.d_INDstateArray [instance_ID]] =
|
||||
INDentry.d_INDinductArray [instance_ID] * INDentry.d_INDinitCondArray [instance_ID] ;
|
||||
else
|
||||
CKTstate_0 [INDentry.d_INDstateArray [instance_ID]] =
|
||||
INDentry.d_INDinductArray [instance_ID] * CKTrhsOld [INDentry.d_INDbrEqArray [instance_ID]] ;
|
||||
}
|
||||
|
||||
if (CKTmode & MODEDC)
|
||||
{
|
||||
req = 0.0 ;
|
||||
veq = 0.0 ;
|
||||
} else {
|
||||
#ifndef PREDICTOR
|
||||
if (CKTmode & MODEINITPRED)
|
||||
CKTstate_0 [INDentry.d_INDstateArray [instance_ID]] =
|
||||
CKTstate_1 [INDentry.d_INDstateArray [instance_ID]] ;
|
||||
else
|
||||
#endif /*PREDICTOR*/
|
||||
if (CKTmode & MODEINITTRAN)
|
||||
CKTstate_1 [INDentry.d_INDstateArray [instance_ID]] =
|
||||
CKTstate_0 [INDentry.d_INDstateArray [instance_ID]] ;
|
||||
|
||||
error = cuNIintegrate_device_kernel (CKTstate_0, CKTstate_1, &req, &veq,
|
||||
INDentry.d_INDinductArray [instance_ID],
|
||||
INDentry.d_INDstateArray [instance_ID],
|
||||
CKTag_0, CKTag_1, CKTorder) ;
|
||||
if (error)
|
||||
printf ("Error in the integration!\n\n") ;
|
||||
//return (error) ;
|
||||
}
|
||||
|
||||
if (CKTmode & MODEINITTRAN)
|
||||
CKTstate_1 [INDentry.d_INDstateArray [instance_ID] + 1] =
|
||||
CKTstate_0 [INDentry.d_INDstateArray [instance_ID] + 1] ;
|
||||
|
||||
/* Output for the Matrix */
|
||||
d_CKTloadOutput [d_PositionVector [instance_ID]] = 1.0 ;
|
||||
d_CKTloadOutput [d_PositionVector [instance_ID] + 1] = req ;
|
||||
|
||||
/* Output for the RHS */
|
||||
d_CKTloadOutputRHS [d_PositionVectorRHS [instance_ID]] = veq ;
|
||||
}
|
||||
}
|
||||
|
||||
return ;
|
||||
}
|
||||
|
|
@ -0,0 +1,103 @@
|
|||
/*
|
||||
* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to
|
||||
* endorse or promote products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "ngspice/config.h"
|
||||
#include "cuda_runtime_api.h"
|
||||
#include "inddefs.h"
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
|
||||
/* cudaMalloc MACRO to check it for errors --> CUDAMALLOCCHECK(name of pointer, dimension, type, status) */
|
||||
#define CUDAMALLOCCHECK(a, b, c, d) \
|
||||
if (d != cudaSuccess) \
|
||||
{ \
|
||||
fprintf (stderr, "cuINDsetup routine...\n") ; \
|
||||
fprintf (stderr, "Error: cudaMalloc failed on %s size of %d bytes\n", #a, (int)(b * sizeof(c))) ; \
|
||||
fprintf (stderr, "Error: %s = %d, %s\n", #d, d, cudaGetErrorString (d)) ; \
|
||||
return (E_NOMEM) ; \
|
||||
}
|
||||
|
||||
/* cudaMemcpy MACRO to check it for errors --> CUDAMEMCPYCHECK(name of pointer, dimension, type, status) */
|
||||
#define CUDAMEMCPYCHECK(a, b, c, d) \
|
||||
if (d != cudaSuccess) \
|
||||
{ \
|
||||
fprintf (stderr, "cuINDsetup routine...\n") ; \
|
||||
fprintf (stderr, "Error: cudaMemcpy failed on %s size of %d bytes\n", #a, (int)(b * sizeof(c))) ; \
|
||||
fprintf (stderr, "Error: %s = %d, %s\n", #d, d, cudaGetErrorString (d)) ; \
|
||||
return (E_NOMEM) ; \
|
||||
}
|
||||
|
||||
int
|
||||
cuINDsetup
|
||||
(
|
||||
GENmodel *inModel
|
||||
)
|
||||
{
|
||||
long unsigned int size ;
|
||||
cudaError_t status ;
|
||||
INDmodel *model = (INDmodel *)inModel ;
|
||||
|
||||
size = (long unsigned int)model->n_instances ;
|
||||
|
||||
/* Space Allocation to GPU */
|
||||
status = cudaMalloc ((void **)&(model->d_PositionVector), size * sizeof(int)) ;
|
||||
CUDAMALLOCCHECK (model->d_PositionVector, size, int, status)
|
||||
|
||||
status = cudaMemcpy (model->d_PositionVector, model->PositionVector, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->d_PositionVector, size, int, status)
|
||||
|
||||
status = cudaMalloc ((void **)&(model->d_PositionVectorRHS), size * sizeof(int)) ;
|
||||
CUDAMALLOCCHECK (model->d_PositionVectorRHS, size, int, status)
|
||||
|
||||
status = cudaMemcpy (model->d_PositionVectorRHS, model->PositionVectorRHS, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->d_PositionVectorRHS, size, int, status)
|
||||
|
||||
/* DOUBLE */
|
||||
model->INDparamCPU.INDinitCondArray = (double *) malloc (size * sizeof(double)) ;
|
||||
status = cudaMalloc ((void **)&(model->INDparamGPU.d_INDinitCondArray), size * sizeof(double)) ;
|
||||
CUDAMALLOCCHECK (model->INDparamGPU.d_INDinitCondArray, size, double, status)
|
||||
|
||||
model->INDparamCPU.INDinductArray = (double *) malloc (size * sizeof(double)) ;
|
||||
status = cudaMalloc ((void **)&(model->INDparamGPU.d_INDinductArray), size * sizeof(double)) ;
|
||||
CUDAMALLOCCHECK (model->INDparamGPU.d_INDinductArray, size, double, status)
|
||||
|
||||
model->INDparamCPU.INDreqValueArray = (double *) malloc (size * sizeof(double)) ;
|
||||
status = cudaMalloc ((void **)&(model->INDparamGPU.d_INDreqValueArray), size * sizeof(double)) ;
|
||||
CUDAMALLOCCHECK (model->INDparamGPU.d_INDreqValueArray, size, double, status)
|
||||
|
||||
model->INDparamCPU.INDveqValueArray = (double *) malloc (size * sizeof(double)) ;
|
||||
status = cudaMalloc ((void **)&(model->INDparamGPU.d_INDveqValueArray), size * sizeof(double)) ;
|
||||
CUDAMALLOCCHECK (model->INDparamGPU.d_INDveqValueArray, size, double, status)
|
||||
|
||||
/* INT */
|
||||
model->INDparamCPU.INDbrEqArray = (int *) malloc (size * sizeof(int)) ;
|
||||
status = cudaMalloc ((void **)&(model->INDparamGPU.d_INDbrEqArray), size * sizeof(int)) ;
|
||||
CUDAMALLOCCHECK (model->INDparamGPU.d_INDbrEqArray, size, int, status)
|
||||
|
||||
model->INDparamCPU.INDstateArray = (int *) malloc (size * sizeof(int)) ;
|
||||
status = cudaMalloc ((void **)&(model->INDparamGPU.d_INDstateArray), size * sizeof(int)) ;
|
||||
CUDAMALLOCCHECK (model->INDparamGPU.d_INDstateArray, size, int, status)
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
|
@ -0,0 +1,68 @@
|
|||
/*
|
||||
* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to
|
||||
* endorse or promote products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "ngspice/config.h"
|
||||
#include "cuda_runtime_api.h"
|
||||
#include "inddefs.h"
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
|
||||
/* cudaMemcpy MACRO to check it for errors --> CUDAMEMCPYCHECK(name of pointer, dimension, type, status) */
|
||||
#define CUDAMEMCPYCHECK(a, b, c, d) \
|
||||
if (d != cudaSuccess) \
|
||||
{ \
|
||||
fprintf (stderr, "cuINDtemp routine...\n") ; \
|
||||
fprintf (stderr, "Error: cudaMemcpy failed on %s size of %d bytes\n", #a, (int)(b * sizeof(c))) ; \
|
||||
fprintf (stderr, "Error: %s = %d, %s\n", #d, d, cudaGetErrorString (d)) ; \
|
||||
return (E_NOMEM) ; \
|
||||
}
|
||||
|
||||
int
|
||||
cuINDtemp
|
||||
(
|
||||
GENmodel *inModel
|
||||
)
|
||||
{
|
||||
long unsigned int size ;
|
||||
cudaError_t status ;
|
||||
INDmodel *model = (INDmodel *)inModel ;
|
||||
|
||||
size = (long unsigned int)model->n_instances ;
|
||||
|
||||
/* DOUBLE */
|
||||
status = cudaMemcpy (model->INDparamGPU.d_INDinitCondArray, model->INDparamCPU.INDinitCondArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK(model->INDparamGPU.d_INDinitCondArray, size, double, status)
|
||||
|
||||
status = cudaMemcpy (model->INDparamGPU.d_INDinductArray, model->INDparamCPU.INDinductArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK(model->INDparamGPU.d_INDinductArray, size, double, status)
|
||||
|
||||
/* INT */
|
||||
status = cudaMemcpy (model->INDparamGPU.d_INDbrEqArray, model->INDparamCPU.INDbrEqArray, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK(model->INDparamGPU.d_INDbrEqArray, size, int, status)
|
||||
|
||||
status = cudaMemcpy (model->INDparamGPU.d_INDstateArray, model->INDparamCPU.INDstateArray, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK(model->INDparamGPU.INDstateArray, size, int, status)
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
|
@ -0,0 +1,60 @@
|
|||
/*
|
||||
* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to
|
||||
* endorse or promote products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "ngspice/config.h"
|
||||
#include "cuda_runtime_api.h"
|
||||
#include "inddefs.h"
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
|
||||
int
|
||||
cuMUTdestroy
|
||||
(
|
||||
GENmodel *inModel
|
||||
)
|
||||
{
|
||||
MUTmodel *model = (MUTmodel *)inModel ;
|
||||
|
||||
for ( ; model != NULL ; model = model->MUTnextModel)
|
||||
{
|
||||
/* DOUBLE */
|
||||
free (model->MUTparamCPU.MUTfactorArray) ;
|
||||
cudaFree (model->MUTparamGPU.d_MUTfactorArray) ;
|
||||
|
||||
/* INT */
|
||||
free (model->MUTparamCPU.MUTflux1Array) ;
|
||||
cudaFree (model->MUTparamGPU.d_MUTflux1Array) ;
|
||||
|
||||
free (model->MUTparamCPU.MUTflux2Array) ;
|
||||
cudaFree (model->MUTparamGPU.d_MUTflux2Array) ;
|
||||
|
||||
free (model->MUTparamCPU.MUTbrEq1Array) ;
|
||||
cudaFree (model->MUTparamGPU.d_MUTbrEq1Array) ;
|
||||
|
||||
free (model->MUTparamCPU.MUTbrEq2Array) ;
|
||||
cudaFree (model->MUTparamGPU.d_MUTbrEq2Array) ;
|
||||
}
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
|
@ -0,0 +1,169 @@
|
|||
/*
|
||||
* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to
|
||||
* endorse or promote products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "ngspice/config.h"
|
||||
#include "ngspice/CUSPICE/cuniinteg.cuh"
|
||||
#include "inddefs.h"
|
||||
|
||||
/* cudaMalloc MACRO to check it for errors --> CUDAMALLOCCHECK(name of pointer, dimension, type, status) */
|
||||
#define CUDAMALLOCCHECK(a, b, c, d) \
|
||||
if (d != cudaSuccess) \
|
||||
{ \
|
||||
fprintf (stderr, "cuMUTload routine...\n") ; \
|
||||
fprintf (stderr, "Error: cudaMalloc failed on %s size of %d bytes\n", #a, (int)(b * sizeof(c))) ; \
|
||||
fprintf (stderr, "Error: %s = %d, %s\n", #d, d, cudaGetErrorString (d)) ; \
|
||||
return (E_NOMEM) ; \
|
||||
}
|
||||
|
||||
/* cudaMemcpy MACRO to check it for errors --> CUDAMEMCPYCHECK(name of pointer, dimension, type, status) */
|
||||
#define CUDAMEMCPYCHECK(a, b, c, d) \
|
||||
if (d != cudaSuccess) \
|
||||
{ \
|
||||
fprintf (stderr, "cuMUTload routine...\n") ; \
|
||||
fprintf (stderr, "Error: cudaMemcpy failed on %s size of %d bytes\n", #a, (int)(b * sizeof(c))) ; \
|
||||
fprintf (stderr, "Error: %s = %d, %s\n", #d, d, cudaGetErrorString (d)) ; \
|
||||
return (E_NOMEM) ; \
|
||||
}
|
||||
|
||||
extern "C"
|
||||
__global__ void cuMUTload_kernel (MUTparamGPUstruct, double *, double *, double *, int, double, double, int, int, int *, double *, int *, double *) ;
|
||||
|
||||
extern "C"
|
||||
int
|
||||
cuMUTload
|
||||
(
|
||||
GENmodel *inModel, CKTcircuit *ckt
|
||||
)
|
||||
{
|
||||
MUTmodel *model = (MUTmodel *)inModel ;
|
||||
int thread_x, thread_y, block_x ;
|
||||
|
||||
cudaError_t status ;
|
||||
|
||||
/* loop through all the mutual inductor models */
|
||||
for ( ; model != NULL ; model = model->MUTnextModel)
|
||||
{
|
||||
/* Determining how many blocks should exist in the kernel */
|
||||
thread_x = 1 ;
|
||||
thread_y = 256 ;
|
||||
if (model->n_instances % thread_y != 0)
|
||||
block_x = (int)(model->n_instances / thread_y) + 1 ;
|
||||
else
|
||||
block_x = model->n_instances / thread_y ;
|
||||
|
||||
dim3 thread (thread_x, thread_y) ;
|
||||
|
||||
/* Kernel launch */
|
||||
status = cudaGetLastError () ; // clear error status
|
||||
|
||||
cuMUTload_kernel <<< block_x, thread >>> (model->MUTparamGPU, ckt->d_CKTrhsOld, ckt->d_CKTstate0,
|
||||
ckt->d_CKTstate1, ckt->CKTmode, ckt->CKTag [0], ckt->CKTag [1],
|
||||
ckt->CKTorder, model->n_instances,
|
||||
model->d_PositionVector, ckt->d_CKTloadOutput,
|
||||
model->d_PositionVectorRHS, ckt->d_CKTloadOutputRHS) ;
|
||||
|
||||
cudaDeviceSynchronize () ;
|
||||
|
||||
status = cudaGetLastError () ; // check for launch error
|
||||
if (status != cudaSuccess)
|
||||
{
|
||||
fprintf (stderr, "Kernel launch failure in the Mutual Inductor Model\n\n") ;
|
||||
return (E_NOMEM) ;
|
||||
}
|
||||
}
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
||||
extern "C"
|
||||
__global__
|
||||
void
|
||||
cuMUTload_kernel
|
||||
(
|
||||
MUTparamGPUstruct MUTentry, double *CKTrhsOld, double *CKTstate_0,
|
||||
double *CKTstate_1, int CKTmode, double CKTag_0, double CKTag_1,
|
||||
int CKTorder, int mut_n_instances,
|
||||
int *d_PositionVector, double *d_CKTloadOutput,
|
||||
int *d_PositionVectorRHS, double *d_CKTloadOutputRHS
|
||||
)
|
||||
{
|
||||
int instance_ID ;
|
||||
int error ;
|
||||
double req_dummy, veq ;
|
||||
|
||||
instance_ID = threadIdx.y + blockDim.y * blockIdx.x ;
|
||||
|
||||
if (instance_ID < mut_n_instances)
|
||||
{
|
||||
if (threadIdx.x == 0)
|
||||
{
|
||||
if (!(CKTmode & (MODEDC | MODEINITPRED)))
|
||||
{
|
||||
CKTstate_0 [MUTentry.d_MUTflux1Array [instance_ID]] += MUTentry.d_MUTfactorArray [instance_ID] * CKTrhsOld [MUTentry.d_MUTbrEq2Array [instance_ID]] ;
|
||||
CKTstate_0 [MUTentry.d_MUTflux2Array [instance_ID]] += MUTentry.d_MUTfactorArray [instance_ID] * CKTrhsOld [MUTentry.d_MUTbrEq1Array [instance_ID]] ;
|
||||
}
|
||||
|
||||
/* Inductor-related */
|
||||
if (CKTmode & MODEINITTRAN)
|
||||
{
|
||||
CKTstate_1 [MUTentry.d_MUTflux1Array [instance_ID]] = CKTstate_0 [MUTentry.d_MUTflux1Array [instance_ID]] ;
|
||||
CKTstate_1 [MUTentry.d_MUTflux2Array [instance_ID]] = CKTstate_0 [MUTentry.d_MUTflux2Array [instance_ID]] ;
|
||||
}
|
||||
|
||||
if (!(CKTmode & MODEDC))
|
||||
{
|
||||
error = cuNIintegrate_device_kernel (CKTstate_0, CKTstate_1, &req_dummy, &veq,
|
||||
1.0, MUTentry.d_MUTflux1Array [instance_ID],
|
||||
CKTag_0, CKTag_1, CKTorder) ;
|
||||
if (error)
|
||||
printf ("Error in the integration 1 of MUTload!\n\n") ;
|
||||
|
||||
/* Output for the RHS */
|
||||
d_CKTloadOutputRHS [d_PositionVectorRHS [MUTentry.d_MUTinstanceIND1Array [instance_ID]]] = veq ;
|
||||
|
||||
|
||||
error = cuNIintegrate_device_kernel (CKTstate_0, CKTstate_1, &req_dummy, &veq,
|
||||
1.0, MUTentry.d_MUTflux2Array [instance_ID],
|
||||
CKTag_0, CKTag_1, CKTorder) ;
|
||||
if (error)
|
||||
printf ("Error in the integration 2 of MUTload!\n\n") ;
|
||||
|
||||
/* Output for the RHS */
|
||||
d_CKTloadOutputRHS [d_PositionVectorRHS [MUTentry.d_MUTinstanceIND2Array [instance_ID]]] = veq ;
|
||||
}
|
||||
|
||||
if (CKTmode & MODEINITTRAN)
|
||||
{
|
||||
CKTstate_1 [MUTentry.d_MUTflux1Array [instance_ID] + 1] = CKTstate_0 [MUTentry.d_MUTflux1Array [instance_ID] + 1] ;
|
||||
CKTstate_1 [MUTentry.d_MUTflux2Array [instance_ID] + 1] = CKTstate_0 [MUTentry.d_MUTflux2Array [instance_ID] + 1] ;
|
||||
|
||||
}
|
||||
|
||||
d_CKTloadOutput [d_PositionVector [instance_ID]] = MUTentry.d_MUTfactorArray [instance_ID] * CKTag_0 ;
|
||||
}
|
||||
}
|
||||
|
||||
return ;
|
||||
}
|
||||
|
|
@ -0,0 +1,113 @@
|
|||
/*
|
||||
* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to
|
||||
* endorse or promote products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "ngspice/config.h"
|
||||
#include "cuda_runtime_api.h"
|
||||
#include "inddefs.h"
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
|
||||
/* cudaMalloc MACRO to check it for errors --> CUDAMALLOCCHECK(name of pointer, dimension, type, status) */
|
||||
#define CUDAMALLOCCHECK(a, b, c, d) \
|
||||
if (d != cudaSuccess) \
|
||||
{ \
|
||||
fprintf (stderr, "cuMUTsetup routine...\n") ; \
|
||||
fprintf (stderr, "Error: cudaMalloc failed on %s size of %d bytes\n", #a, (int)(b * sizeof(c))) ; \
|
||||
fprintf (stderr, "Error: %s = %d, %s\n", #d, d, cudaGetErrorString (d)) ; \
|
||||
return (E_NOMEM) ; \
|
||||
}
|
||||
|
||||
/* cudaMemcpy MACRO to check it for errors --> CUDAMEMCPYCHECK(name of pointer, dimension, type, status) */
|
||||
#define CUDAMEMCPYCHECK(a, b, c, d) \
|
||||
if (d != cudaSuccess) \
|
||||
{ \
|
||||
fprintf (stderr, "cuMUTsetup routine...\n") ; \
|
||||
fprintf (stderr, "Error: cudaMemcpy failed on %s size of %d bytes\n", #a, (int)(b * sizeof(c))) ; \
|
||||
fprintf (stderr, "Error: %s = %d, %s\n", #d, d, cudaGetErrorString (d)) ; \
|
||||
return (E_NOMEM) ; \
|
||||
}
|
||||
|
||||
int
|
||||
cuMUTsetup
|
||||
(
|
||||
GENmodel *inModel
|
||||
)
|
||||
{
|
||||
long unsigned int size ;
|
||||
cudaError_t status ;
|
||||
MUTmodel *model = (MUTmodel *)inModel ;
|
||||
|
||||
size = (long unsigned int)model->n_instances ;
|
||||
|
||||
/* Space Allocation to GPU */
|
||||
status = cudaMalloc ((void **)&(model->d_PositionVector), size * sizeof(int)) ;
|
||||
CUDAMALLOCCHECK (model->d_PositionVector, size, int, status)
|
||||
|
||||
status = cudaMemcpy (model->d_PositionVector, model->PositionVector, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->d_PositionVector, size, int, status)
|
||||
|
||||
status = cudaMalloc ((void **)&(model->d_PositionVectorRHS), (long unsigned int)model->n_instancesRHS * sizeof(int)) ;
|
||||
CUDAMALLOCCHECK (model->d_PositionVectorRHS, (long unsigned int)model->n_instancesRHS, int, status)
|
||||
|
||||
status = cudaMemcpy (model->d_PositionVectorRHS, model->PositionVectorRHS, (long unsigned int)model->n_instancesRHS * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->d_PositionVectorRHS, (long unsigned int)model->n_instancesRHS, int, status)
|
||||
|
||||
/* PARTICULAR SITUATION */
|
||||
status = cudaMalloc ((void **)&(model->MUTparamGPU.d_MUTinstanceIND1Array), size * sizeof(int)) ;
|
||||
CUDAMALLOCCHECK (model->MUTparamGPU.d_MUTinstanceIND1Array, size, int, status)
|
||||
|
||||
status = cudaMemcpy (model->MUTparamGPU.d_MUTinstanceIND1Array, model->MUTparamCPU.MUTinstanceIND1Array, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->MUTparamGPU.d_MUTinstanceIND1Array, size, int, status)
|
||||
|
||||
status = cudaMalloc ((void **)&(model->MUTparamGPU.d_MUTinstanceIND2Array), size * sizeof(int)) ;
|
||||
CUDAMALLOCCHECK (model->MUTparamGPU.d_MUTinstanceIND2Array, size, int, status)
|
||||
|
||||
status = cudaMemcpy (model->MUTparamGPU.d_MUTinstanceIND2Array, model->MUTparamCPU.MUTinstanceIND2Array, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->MUTparamGPU.d_MUTinstanceIND2Array, size, int, status)
|
||||
|
||||
|
||||
/* DOUBLE */
|
||||
model->MUTparamCPU.MUTfactorArray = (double *) malloc (size * sizeof(double)) ;
|
||||
status = cudaMalloc ((void **)&(model->MUTparamGPU.d_MUTfactorArray), size * sizeof(double)) ;
|
||||
CUDAMALLOCCHECK (model->MUTparamGPU.d_MUTfactorArray, size, double, status)
|
||||
|
||||
/* INT */
|
||||
model->MUTparamCPU.MUTflux1Array = (int *) malloc (size * sizeof(int)) ;
|
||||
status = cudaMalloc ((void **)&(model->MUTparamGPU.d_MUTflux1Array), size * sizeof(int)) ;
|
||||
CUDAMALLOCCHECK (model->MUTparamGPU.d_MUTflux1Array, size, int, status)
|
||||
|
||||
model->MUTparamCPU.MUTflux2Array = (int *) malloc (size * sizeof(int)) ;
|
||||
status = cudaMalloc ((void **)&(model->MUTparamGPU.d_MUTflux2Array), size * sizeof(int)) ;
|
||||
CUDAMALLOCCHECK (model->MUTparamGPU.d_MUTflux2Array, size, int, status)
|
||||
|
||||
model->MUTparamCPU.MUTbrEq1Array = (int *) malloc (size * sizeof(int)) ;
|
||||
status = cudaMalloc ((void **)&(model->MUTparamGPU.d_MUTbrEq1Array), size * sizeof(int)) ;
|
||||
CUDAMALLOCCHECK (model->MUTparamGPU.d_MUTbrEq1Array, size, int, status)
|
||||
|
||||
model->MUTparamCPU.MUTbrEq2Array = (int *) malloc (size * sizeof(int)) ;
|
||||
status = cudaMalloc ((void **)&(model->MUTparamGPU.d_MUTbrEq2Array), size * sizeof(int)) ;
|
||||
CUDAMALLOCCHECK (model->MUTparamGPU.d_MUTbrEq2Array, size, int, status)
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
|
@ -0,0 +1,71 @@
|
|||
/*
|
||||
* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to
|
||||
* endorse or promote products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "ngspice/config.h"
|
||||
#include "cuda_runtime_api.h"
|
||||
#include "inddefs.h"
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
|
||||
/* cudaMemcpy MACRO to check it for errors --> CUDAMEMCPYCHECK(name of pointer, dimension, type, status) */
|
||||
#define CUDAMEMCPYCHECK(a, b, c, d) \
|
||||
if (d != cudaSuccess) \
|
||||
{ \
|
||||
fprintf (stderr, "cuMUTtemp routine...\n") ; \
|
||||
fprintf (stderr, "Error: cudaMemcpy failed on %s size of %d bytes\n", #a, (int)(b * sizeof(c))) ; \
|
||||
fprintf (stderr, "Error: %s = %d, %s\n", #d, d, cudaGetErrorString (d)) ; \
|
||||
return (E_NOMEM) ; \
|
||||
}
|
||||
|
||||
int
|
||||
cuMUTtemp
|
||||
(
|
||||
GENmodel *inModel
|
||||
)
|
||||
{
|
||||
long unsigned int size ;
|
||||
cudaError_t status ;
|
||||
MUTmodel *model = (MUTmodel *)inModel ;
|
||||
|
||||
size = (long unsigned int)model->n_instances ;
|
||||
|
||||
/* DOUBLE */
|
||||
status = cudaMemcpy (model->MUTparamGPU.d_MUTfactorArray, model->MUTparamCPU.MUTfactorArray, size * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK(model->MUTparamGPU.d_MUTfactorArray, size, double, status)
|
||||
|
||||
/* INT */
|
||||
status = cudaMemcpy (model->MUTparamGPU.d_MUTflux1Array, model->MUTparamCPU.MUTflux1Array, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK(model->MUTparamGPU.d_MUTflux1Array, size, int, status)
|
||||
|
||||
status = cudaMemcpy (model->MUTparamGPU.d_MUTflux2Array, model->MUTparamCPU.MUTflux2Array, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK(model->MUTparamGPU.d_MUTflux2Array, size, int, status)
|
||||
|
||||
status = cudaMemcpy (model->MUTparamGPU.d_MUTbrEq1Array, model->MUTparamCPU.MUTbrEq1Array, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK(model->MUTparamGPU.d_MUTbrEq1Array, size, int, status)
|
||||
|
||||
status = cudaMemcpy (model->MUTparamGPU.d_MUTbrEq2Array, model->MUTparamCPU.MUTbrEq2Array, size * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK(model->MUTparamGPU.MUTbrEq2Array, size, int, status)
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
|
@ -0,0 +1,99 @@
|
|||
/*
|
||||
* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to
|
||||
* endorse or promote products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "ngspice/ngspice.h"
|
||||
#include "ngspice/cktdefs.h"
|
||||
#include "inddefs.h"
|
||||
#include "ngspice/sperror.h"
|
||||
|
||||
#define TopologyMatrixInsert(Ptr, instance_ID, offset, Value, global_ID) \
|
||||
ckt->CKTtopologyMatrixCOOi [global_ID] = (int)(here->Ptr - basePtr) ; \
|
||||
ckt->CKTtopologyMatrixCOOj [global_ID] = model->PositionVector [instance_ID] + offset ; \
|
||||
ckt->CKTtopologyMatrixCOOx [global_ID] = Value ;
|
||||
|
||||
#define TopologyMatrixInsertRHS(offset, instance_ID, offsetRHS, Value, global_ID) \
|
||||
ckt->CKTtopologyMatrixCOOiRHS [global_ID] = here->offset ; \
|
||||
ckt->CKTtopologyMatrixCOOjRHS [global_ID] = model->PositionVectorRHS [instance_ID] + offsetRHS ; \
|
||||
ckt->CKTtopologyMatrixCOOxRHS [global_ID] = Value ;
|
||||
|
||||
int
|
||||
INDtopology (GENmodel *inModel, CKTcircuit *ckt, int *i, int *j)
|
||||
{
|
||||
INDmodel *model = (INDmodel *)inModel ;
|
||||
INDinstance *here ;
|
||||
int k ;
|
||||
double *basePtr ;
|
||||
basePtr = ckt->CKTmatrix->CKTkluAx ;
|
||||
|
||||
/* loop through all the inductor models */
|
||||
for ( ; model != NULL ; model = model->INDnextModel)
|
||||
{
|
||||
k = 0 ;
|
||||
|
||||
/* loop through all the instances of the model */
|
||||
for (here = model->INDinstances ; here != NULL ; here = here->INDnextInstance)
|
||||
{
|
||||
if ((here->INDposNode != 0) && (here->INDbrEq != 0))
|
||||
{
|
||||
TopologyMatrixInsert (INDposIbrptr, k, 0, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
if ((here->INDnegNode != 0) && (here->INDbrEq != 0))
|
||||
{
|
||||
TopologyMatrixInsert (INDnegIbrptr, k, 0, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
if ((here->INDbrEq != 0) && (here->INDnegNode != 0))
|
||||
{
|
||||
TopologyMatrixInsert (INDibrNegptr, k, 0, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
if ((here->INDbrEq != 0) && (here->INDposNode != 0))
|
||||
{
|
||||
TopologyMatrixInsert (INDibrPosptr, k, 0, 1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
if ((here->INDbrEq != 0) && (here->INDbrEq != 0))
|
||||
{
|
||||
TopologyMatrixInsert (INDibrIbrptr, k, 1, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
if (here->INDbrEq != 0)
|
||||
{
|
||||
TopologyMatrixInsertRHS (INDbrEq, k, 0, 1, *j) ;
|
||||
(*j)++ ;
|
||||
}
|
||||
|
||||
k++ ;
|
||||
}
|
||||
}
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
|
@ -0,0 +1,72 @@
|
|||
/*
|
||||
* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to
|
||||
* endorse or promote products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "ngspice/ngspice.h"
|
||||
#include "ngspice/cktdefs.h"
|
||||
#include "inddefs.h"
|
||||
#include "ngspice/sperror.h"
|
||||
|
||||
#define TopologyMatrixInsert(Ptr, instance_ID, offset, Value, global_ID) \
|
||||
ckt->CKTtopologyMatrixCOOi [global_ID] = (int)(here->Ptr - basePtr) ; \
|
||||
ckt->CKTtopologyMatrixCOOj [global_ID] = model->PositionVector [instance_ID] + offset ; \
|
||||
ckt->CKTtopologyMatrixCOOx [global_ID] = Value ;
|
||||
|
||||
int
|
||||
MUTtopology (GENmodel *inModel, CKTcircuit *ckt, int *i, int *j)
|
||||
{
|
||||
NG_IGNORE (j) ;
|
||||
|
||||
MUTmodel *model = (MUTmodel *)inModel ;
|
||||
MUTinstance *here ;
|
||||
int k ;
|
||||
double *basePtr ;
|
||||
basePtr = ckt->CKTmatrix->CKTkluAx ;
|
||||
|
||||
/* loop through all the mutual inductor models */
|
||||
for ( ; model != NULL ; model = model->MUTnextModel)
|
||||
{
|
||||
k = 0 ;
|
||||
|
||||
/* loop through all the instances of the model */
|
||||
for (here = model->MUTinstances ; here != NULL ; here = here->MUTnextInstance)
|
||||
{
|
||||
if ((here->MUTind1->INDbrEq != 0) && (here->MUTind2->INDbrEq != 0))
|
||||
{
|
||||
TopologyMatrixInsert (MUTbr1br2, k, 0, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
if ((here->MUTind2->INDbrEq != 0) && (here->MUTind1->INDbrEq != 0))
|
||||
{
|
||||
TopologyMatrixInsert (MUTbr2br1, k, 0, -1, *i) ;
|
||||
(*i)++ ;
|
||||
}
|
||||
|
||||
k++ ;
|
||||
}
|
||||
}
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
|
@ -48,4 +48,25 @@ endif
|
|||
AM_CPPFLAGS = @AM_CPPFLAGS@ -I$(top_srcdir)/src/include
|
||||
AM_CFLAGS = $(STATIC)
|
||||
|
||||
if USE_CUSPICE_WANTED
|
||||
.cu.lo:
|
||||
$(AM_V_GEN)$(top_srcdir)/src/libtool_wrapper_for_cuda.tcl $@ $(AM_CFLAGS) $(NVCC) $(CUDA_CFLAGS) $(AM_CPPFLAGS) -c $<
|
||||
|
||||
libind_la_SOURCES += \
|
||||
CUSPICE/indtopology.c \
|
||||
CUSPICE/cuindfree.c \
|
||||
CUSPICE/cuindload.cu \
|
||||
CUSPICE/cuindsetup.c \
|
||||
CUSPICE/cuindtemp.c
|
||||
|
||||
libind_la_SOURCES += \
|
||||
CUSPICE/muttopology.c \
|
||||
CUSPICE/cumutfree.c \
|
||||
CUSPICE/cumutload.cu \
|
||||
CUSPICE/cumutsetup.c \
|
||||
CUSPICE/cumuttemp.c
|
||||
|
||||
AM_CPPFLAGS += $(CUDA_CPPFLAGS)
|
||||
endif
|
||||
|
||||
MAINTAINERCLEANFILES = Makefile.in
|
||||
|
|
|
|||
|
|
@ -67,6 +67,11 @@ typedef struct sINDinstance {
|
|||
BindElement *INDibrIbrptrStructPtr ;
|
||||
#endif
|
||||
|
||||
/* PARTICULAR SITUATION */
|
||||
#ifdef USE_CUSPICE
|
||||
int instanceID ;
|
||||
#endif
|
||||
|
||||
} INDinstance ;
|
||||
|
||||
#define INDflux INDstate /* flux in the inductor */
|
||||
|
|
@ -75,6 +80,31 @@ typedef struct sINDinstance {
|
|||
+3 for the derivatives - pointer to the
|
||||
beginning of the array */
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
typedef struct sINDparamCPUstruct {
|
||||
double *INDcpuPointersD [4] ;
|
||||
#define INDinitCondArray INDcpuPointersD[0]
|
||||
#define INDinductArray INDcpuPointersD[1]
|
||||
#define INDreqValueArray INDcpuPointersD[2]
|
||||
#define INDveqValueArray INDcpuPointersD[3]
|
||||
|
||||
int *INDcpuPointersI [2] ;
|
||||
#define INDbrEqArray INDcpuPointersI[0]
|
||||
#define INDstateArray INDcpuPointersI[1]
|
||||
} INDparamCPUstruct ;
|
||||
|
||||
typedef struct sINDparamGPUstruct {
|
||||
double *INDcudaPointersD [4] ;
|
||||
#define d_INDinitCondArray INDcudaPointersD[0]
|
||||
#define d_INDinductArray INDcudaPointersD[1]
|
||||
#define d_INDreqValueArray INDcudaPointersD[2]
|
||||
#define d_INDveqValueArray INDcudaPointersD[3]
|
||||
|
||||
int *INDcudaPointersI [2] ;
|
||||
#define d_INDbrEqArray INDcudaPointersI[0]
|
||||
#define d_INDstateArray INDcudaPointersI[1]
|
||||
} INDparamGPUstruct ;
|
||||
#endif
|
||||
|
||||
/* per model data */
|
||||
|
||||
|
|
@ -107,8 +137,27 @@ typedef struct sINDmodel { /* model structure for an inductor */
|
|||
unsigned INDmIndGiven : 1; /* flag to indicate model inductance given */
|
||||
|
||||
double INDspecInd; /* Specific (one turn) inductance */
|
||||
} INDmodel;
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
INDparamCPUstruct INDparamCPU ;
|
||||
INDparamGPUstruct INDparamGPU ;
|
||||
|
||||
int offset ;
|
||||
int n_values ;
|
||||
int n_Ptr ;
|
||||
int *PositionVector ;
|
||||
int *d_PositionVector ;
|
||||
|
||||
int offsetRHS ;
|
||||
int n_valuesRHS ;
|
||||
int n_PtrRHS ;
|
||||
int *PositionVectorRHS ;
|
||||
int *d_PositionVectorRHS ;
|
||||
|
||||
int n_instances ;
|
||||
#endif
|
||||
|
||||
} INDmodel;
|
||||
|
||||
|
||||
/* structures used to describe mutual inductors */
|
||||
|
|
@ -141,6 +190,33 @@ int MUTsenParmNo; /* parameter # for sensitivity use;
|
|||
|
||||
} MUTinstance ;
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
typedef struct sMUTparamCPUstruct {
|
||||
double *MUTcpuPointersD [1] ;
|
||||
#define MUTfactorArray MUTcpuPointersD[0]
|
||||
|
||||
int *MUTcpuPointersI [6] ;
|
||||
#define MUTflux1Array MUTcpuPointersI[0]
|
||||
#define MUTflux2Array MUTcpuPointersI[1]
|
||||
#define MUTbrEq1Array MUTcpuPointersI[2]
|
||||
#define MUTbrEq2Array MUTcpuPointersI[3]
|
||||
#define MUTinstanceIND1Array MUTcpuPointersI[4]
|
||||
#define MUTinstanceIND2Array MUTcpuPointersI[5]
|
||||
} MUTparamCPUstruct ;
|
||||
|
||||
typedef struct sMUTparamGPUstruct {
|
||||
double *MUTcudaPointersD [1] ;
|
||||
#define d_MUTfactorArray MUTcudaPointersD[0]
|
||||
|
||||
int *MUTcudaPointersI [6] ;
|
||||
#define d_MUTflux1Array MUTcudaPointersI[0]
|
||||
#define d_MUTflux2Array MUTcudaPointersI[1]
|
||||
#define d_MUTbrEq1Array MUTcudaPointersI[2]
|
||||
#define d_MUTbrEq2Array MUTcudaPointersI[3]
|
||||
#define d_MUTinstanceIND1Array MUTcudaPointersI[4]
|
||||
#define d_MUTinstanceIND2Array MUTcudaPointersI[5]
|
||||
} MUTparamGPUstruct ;
|
||||
#endif
|
||||
|
||||
/* per model data */
|
||||
|
||||
|
|
@ -154,6 +230,25 @@ IFuid MUTmodName; /* pointer to character string naming this model */
|
|||
|
||||
/* --- end of generic struct GENmodel --- */
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
MUTparamCPUstruct MUTparamCPU ;
|
||||
MUTparamGPUstruct MUTparamGPU ;
|
||||
|
||||
int offset ;
|
||||
int n_values ;
|
||||
int n_Ptr ;
|
||||
int *PositionVector ;
|
||||
int *d_PositionVector ;
|
||||
|
||||
int *PositionVectorRHS ;
|
||||
int *d_PositionVectorRHS ;
|
||||
|
||||
int n_instances ;
|
||||
|
||||
/* PARTICULAR SITUATION */
|
||||
int n_instancesRHS ;
|
||||
#endif
|
||||
|
||||
} MUTmodel;
|
||||
|
||||
|
||||
|
|
@ -192,6 +287,7 @@ IFuid MUTmodName; /* pointer to character string naming this model */
|
|||
#define IND_QUEST_SENS_CPLX 205
|
||||
#define IND_QUEST_SENS_DC 206
|
||||
|
||||
|
||||
/* device parameters */
|
||||
#define MUT_COEFF 401
|
||||
#define MUT_IND1 402
|
||||
|
|
|
|||
|
|
@ -46,4 +46,9 @@ extern int MUTbindCSCComplex (GENmodel*, CKTcircuit*) ;
|
|||
extern int MUTbindCSCComplexToReal (GENmodel*, CKTcircuit*) ;
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
extern int INDtopology (GENmodel *, CKTcircuit *, int *, int *) ;
|
||||
extern int MUTtopology (GENmodel *, CKTcircuit *, int *, int *) ;
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -6,6 +6,9 @@
|
|||
#include "indext.h"
|
||||
#include "indinit.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
SPICEdev INDinfo = {
|
||||
{
|
||||
|
|
@ -41,7 +44,11 @@ SPICEdev INDinfo = {
|
|||
|
||||
/* DEVparam */ INDparam,
|
||||
/* DEVmodParam */ INDmParam,
|
||||
#ifdef USE_CUSPICE
|
||||
/* DEVload */ cuINDload,
|
||||
#else
|
||||
/* DEVload */ INDload,
|
||||
#endif
|
||||
/* DEVsetup */ INDsetup,
|
||||
/* DEVunsetup */ INDunsetup,
|
||||
/* DEVpzSetup */ INDsetup,
|
||||
|
|
@ -80,6 +87,11 @@ SPICEdev INDinfo = {
|
|||
/* DEVbindCSCComplexToReal */ INDbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ cuINDdestroy,
|
||||
/* DEVtopology */ INDtopology,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
@ -117,7 +129,11 @@ SPICEdev MUTinfo = {
|
|||
|
||||
/* DEVparam */ MUTparam,
|
||||
/* DEVmodParam */ NULL,
|
||||
#ifdef USE_CUSPICE
|
||||
/* DEVload */ cuMUTload,
|
||||
#else
|
||||
/* DEVload */ NULL,/* load handled by INDload */
|
||||
#endif
|
||||
/* DEVsetup */ MUTsetup,
|
||||
/* DEVunsetup */ NULL,
|
||||
/* DEVpzSetup */ MUTsetup,
|
||||
|
|
@ -146,7 +162,7 @@ SPICEdev MUTinfo = {
|
|||
#ifdef CIDER
|
||||
/* DEVdump */ NULL,
|
||||
/* DEVacct */ NULL,
|
||||
#endif
|
||||
#endif
|
||||
&MUTiSize,
|
||||
&MUTmSize,
|
||||
|
||||
|
|
@ -156,6 +172,11 @@ SPICEdev MUTinfo = {
|
|||
/* DEVbindCSCComplexToReal */ MUTbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ cuMUTdestroy,
|
||||
/* DEVtopology */ MUTtopology,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -29,6 +29,7 @@ INDload(GENmodel *inModel, CKTcircuit *ckt)
|
|||
int ktype;
|
||||
int itype;
|
||||
|
||||
|
||||
/* loop through all the inductor models */
|
||||
for( ; model != NULL; model = model->INDnextModel ) {
|
||||
|
||||
|
|
|
|||
|
|
@ -22,6 +22,7 @@ INDsAcLoad(GENmodel *inModel, CKTcircuit *ckt)
|
|||
INDmodel *model = (INDmodel*)inModel;
|
||||
INDinstance *here;
|
||||
double cind,icind,val,ival;
|
||||
|
||||
MUTinstance *muthere;
|
||||
MUTmodel *mutmodel;
|
||||
double cind1;
|
||||
|
|
@ -47,6 +48,7 @@ INDsAcLoad(GENmodel *inModel, CKTcircuit *ckt)
|
|||
double k2;
|
||||
int ktype;
|
||||
int itype;
|
||||
|
||||
SENstruct *info;
|
||||
|
||||
info = ckt->CKTsenInfo;
|
||||
|
|
@ -139,6 +141,7 @@ INDsAcLoad(GENmodel *inModel, CKTcircuit *ckt)
|
|||
/* loop through all the instances of the model */
|
||||
for (here = model->INDinstances; here != NULL ;
|
||||
here=here->INDnextInstance) {
|
||||
|
||||
if(here->INDsenParmNo){
|
||||
cind = *(ckt->CKTrhsOld + here->INDbrEq);
|
||||
icind = *(ckt->CKTirhsOld + here->INDbrEq);
|
||||
|
|
|
|||
|
|
@ -10,6 +10,10 @@ Author: 1985 Thomas L. Quarles
|
|||
#include "ngspice/sperror.h"
|
||||
#include "ngspice/suffix.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
int
|
||||
INDsetup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *states)
|
||||
/* load the inductor structure with those pointers needed later
|
||||
|
|
@ -22,8 +26,8 @@ INDsetup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *states)
|
|||
CKTnode *tmp;
|
||||
|
||||
/* loop through all the inductor models */
|
||||
for( ; model != NULL; model = model->INDnextModel ) {
|
||||
|
||||
for ( ; model != NULL ; model = model->INDnextModel)
|
||||
{
|
||||
/* Default Value Processing for Model Parameters */
|
||||
if (!model->INDmIndGiven) {
|
||||
model->INDmInd = 0.0;
|
||||
|
|
@ -100,7 +104,97 @@ do { if((here->ptr = SMPmakeElt(matrix, here->first, here->second)) == NULL){\
|
|||
TSTALLOC(INDibrIbrptr,INDbrEq,INDbrEq);
|
||||
}
|
||||
}
|
||||
return(OK);
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
int i, j, k, status ;
|
||||
|
||||
/* Counting the instances */
|
||||
for (model = (INDmodel *)inModel ; model != NULL ; model = model->INDnextModel)
|
||||
{
|
||||
i = 0 ;
|
||||
|
||||
for (here = model->INDinstances ; here != NULL ; here = here->INDnextInstance)
|
||||
{
|
||||
i++ ;
|
||||
}
|
||||
|
||||
/* How much instances we have */
|
||||
model->n_instances = i ;
|
||||
}
|
||||
|
||||
/* loop through all the inductor models */
|
||||
for (model = (INDmodel *)inModel ; model != NULL ; model = model->INDnextModel)
|
||||
{
|
||||
model->offset = ckt->total_n_values ;
|
||||
model->offsetRHS = ckt->total_n_valuesRHS ;
|
||||
|
||||
j = 0 ;
|
||||
k = 0 ;
|
||||
|
||||
/* loop through all the instances of the model */
|
||||
for (here = model->INDinstances ; here != NULL ; here = here->INDnextInstance)
|
||||
{
|
||||
/* For the Matrix */
|
||||
if ((here->INDposNode != 0) && (here->INDbrEq != 0))
|
||||
j++ ;
|
||||
|
||||
if ((here->INDnegNode != 0) && (here->INDbrEq != 0))
|
||||
j++ ;
|
||||
|
||||
if ((here->INDbrEq != 0) && (here->INDnegNode != 0))
|
||||
j++ ;
|
||||
|
||||
if ((here->INDbrEq != 0) && (here->INDposNode != 0))
|
||||
j++ ;
|
||||
|
||||
if ((here->INDbrEq != 0) && (here->INDbrEq != 0))
|
||||
j++ ;
|
||||
|
||||
/* For the RHS */
|
||||
if (here->INDbrEq != 0)
|
||||
k++ ;
|
||||
}
|
||||
|
||||
/* 2 Different Values for Every Instance */
|
||||
model->n_values = 2 * model->n_instances ;
|
||||
ckt->total_n_values += model->n_values ;
|
||||
|
||||
model->n_Ptr = j ;
|
||||
ckt->total_n_Ptr += model->n_Ptr ;
|
||||
|
||||
model->n_valuesRHS = model->n_instances ;
|
||||
ckt->total_n_valuesRHS += model->n_valuesRHS ;
|
||||
|
||||
model->n_PtrRHS = k ;
|
||||
ckt->total_n_PtrRHS += model->n_PtrRHS ;
|
||||
|
||||
|
||||
/* Position Vector assignment */
|
||||
model->PositionVector = TMALLOC (int, model->n_instances) ;
|
||||
|
||||
for (j = 0 ; j < model->n_instances ; j++)
|
||||
{
|
||||
/* 2 Different Values for Every Instance */
|
||||
model->PositionVector [j] = model->offset + 2 * j ;
|
||||
}
|
||||
|
||||
/* Position Vector assignment for the RHS */
|
||||
model->PositionVectorRHS = TMALLOC (int, model->n_instances) ;
|
||||
|
||||
for (j = 0 ; j < model->n_instances ; j++)
|
||||
model->PositionVectorRHS [j] = model->offsetRHS + j ;
|
||||
}
|
||||
|
||||
/* loop through all the inductor models */
|
||||
for (model = (INDmodel *)inModel ; model != NULL ; model = model->INDnextModel)
|
||||
{
|
||||
status = cuINDsetup ((GENmodel *)model) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
}
|
||||
#endif
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
||||
int
|
||||
|
|
|
|||
|
|
@ -28,6 +28,7 @@ INDsUpdate(GENmodel *inModel, CKTcircuit *ckt)
|
|||
double dummy1;
|
||||
double dummy2;
|
||||
SENstruct *info;
|
||||
|
||||
MUTinstance *muthere;
|
||||
MUTmodel *mutmodel;
|
||||
double sxp1;
|
||||
|
|
@ -37,6 +38,7 @@ INDsUpdate(GENmodel *inModel, CKTcircuit *ckt)
|
|||
int ktype;
|
||||
int itype;
|
||||
|
||||
|
||||
info = ckt->CKTsenInfo;
|
||||
if(ckt->CKTmode & MODEINITTRAN) return(OK);
|
||||
|
||||
|
|
@ -123,6 +125,7 @@ INDsUpdate(GENmodel *inModel, CKTcircuit *ckt)
|
|||
/* loop through all the instances of the model */
|
||||
for (here = model->INDinstances; here != NULL ;
|
||||
here=here->INDnextInstance) {
|
||||
|
||||
for(iparmno = 1;iparmno<=info->SENparms;iparmno++){
|
||||
|
||||
if(ckt->CKTmode&MODETRANOP){
|
||||
|
|
|
|||
|
|
@ -5,13 +5,15 @@ Author: 2003 Paolo Nenzi
|
|||
/*
|
||||
*/
|
||||
|
||||
|
||||
#include "ngspice/ngspice.h"
|
||||
#include "ngspice/cktdefs.h"
|
||||
#include "inddefs.h"
|
||||
#include "ngspice/sperror.h"
|
||||
#include "ngspice/suffix.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
/*ARGSUSED*/
|
||||
int
|
||||
|
|
@ -23,9 +25,17 @@ INDtemp(GENmodel *inModel, CKTcircuit *ckt)
|
|||
double factor;
|
||||
double tc1, tc2;
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
int i, status ;
|
||||
#endif
|
||||
|
||||
/* loop through all the inductor models */
|
||||
for( ; model != NULL; model = model->INDnextModel ) {
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
i = 0 ;
|
||||
#endif
|
||||
|
||||
/* loop through all the instances of the model */
|
||||
for (here = model->INDinstances; here != NULL ;
|
||||
here=here->INDnextInstance) {
|
||||
|
|
@ -71,8 +81,24 @@ INDtemp(GENmodel *inModel, CKTcircuit *ckt)
|
|||
here->INDinduct = here->INDinduct * factor * here->INDscale;
|
||||
here->INDinduct = here->INDinduct / here->INDm;
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
model->INDparamCPU.INDinitCondArray[i] = here->INDinitCond ;
|
||||
model->INDparamCPU.INDinductArray[i] = here->INDinduct ;
|
||||
model->INDparamCPU.INDbrEqArray[i] = here->INDbrEq ;
|
||||
model->INDparamCPU.INDstateArray[i] = here->INDstate ;
|
||||
|
||||
i++ ;
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuINDtemp ((GENmodel *)model) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
}
|
||||
return(OK);
|
||||
return (OK) ;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -15,6 +15,9 @@ Author: 1985 Thomas L. Quarles
|
|||
#include "ngspice/sperror.h"
|
||||
#include "ngspice/suffix.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
/*ARGSUSED*/
|
||||
int
|
||||
|
|
@ -27,8 +30,8 @@ MUTsetup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *states)
|
|||
NG_IGNORE(states);
|
||||
|
||||
/* loop through all the mutual inductor models */
|
||||
for( ; model != NULL; model = model->MUTnextModel ) {
|
||||
|
||||
for ( ; model != NULL ; model = model->MUTnextModel)
|
||||
{
|
||||
/* loop through all the instances of the model */
|
||||
for (here = model->MUTinstances; here != NULL ;
|
||||
here=here->MUTnextInstance) {
|
||||
|
|
@ -66,5 +69,100 @@ do { if((here->ptr = SMPmakeElt(matrix, here->first, here->second)) == NULL){\
|
|||
TSTALLOC(MUTbr2br1,MUTind2->INDbrEq,MUTind1->INDbrEq);
|
||||
}
|
||||
}
|
||||
return(OK);
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
int i, j, status ;
|
||||
INDmodel *indmodel ;
|
||||
INDinstance *indhere ;
|
||||
|
||||
/* Counting the instances */
|
||||
for (model = (MUTmodel *)inModel ; model != NULL ; model = model->MUTnextModel)
|
||||
{
|
||||
i = 0 ;
|
||||
|
||||
for (here = model->MUTinstances ; here != NULL ; here = here->MUTnextInstance)
|
||||
{
|
||||
i++ ;
|
||||
}
|
||||
|
||||
/* How much instances we have */
|
||||
model->n_instances = i ;
|
||||
}
|
||||
|
||||
/* loop through all the mutual inductor models */
|
||||
for (model = (MUTmodel *)inModel ; model != NULL ; model = model->MUTnextModel)
|
||||
{
|
||||
model->offset = ckt->total_n_values ;
|
||||
|
||||
j = 0 ;
|
||||
|
||||
/* loop through all the instances of the model */
|
||||
for (here = model->MUTinstances ; here != NULL ; here = here->MUTnextInstance)
|
||||
{
|
||||
/* For the Matrix */
|
||||
if ((here->MUTind1->INDbrEq != 0) && (here->MUTind2->INDbrEq != 0))
|
||||
j++ ;
|
||||
|
||||
if ((here->MUTind2->INDbrEq != 0) && (here->MUTind1->INDbrEq != 0))
|
||||
j++ ;
|
||||
}
|
||||
|
||||
model->n_values = model->n_instances ;
|
||||
ckt->total_n_values += model->n_values ;
|
||||
|
||||
model->n_Ptr = j ;
|
||||
ckt->total_n_Ptr += model->n_Ptr ;
|
||||
|
||||
|
||||
/* Position Vector assignment */
|
||||
model->PositionVector = TMALLOC (int, model->n_instances) ;
|
||||
|
||||
for (j = 0 ; j < model->n_instances ; j++)
|
||||
model->PositionVector [j] = model->offset + j ;
|
||||
|
||||
|
||||
|
||||
/* PARTICULAR SITUATION */
|
||||
/* Pick up the IND model from one of the two IND instances */
|
||||
indmodel = model->MUTinstances->MUTind1->INDmodPtr ;
|
||||
model->n_instancesRHS = indmodel->n_instances ;
|
||||
|
||||
/* Position Vector assignment for the RHS */
|
||||
model->PositionVectorRHS = TMALLOC (int, model->n_instancesRHS) ;
|
||||
|
||||
for (j = 0 ; j < model->n_instancesRHS ; j++)
|
||||
model->PositionVectorRHS [j] = indmodel->PositionVectorRHS [j] ;
|
||||
|
||||
/* InstanceID assignment for every IND instance */
|
||||
j = 0 ;
|
||||
for (indhere = indmodel->INDinstances ; indhere != NULL ; indhere = indhere->INDnextInstance)
|
||||
{
|
||||
indhere->instanceID = j ;
|
||||
|
||||
j++ ;
|
||||
}
|
||||
|
||||
/* InstanceID storing for every MUT instance */
|
||||
model->MUTparamCPU.MUTinstanceIND1Array = TMALLOC (int, model->n_instances) ;
|
||||
model->MUTparamCPU.MUTinstanceIND2Array = TMALLOC (int, model->n_instances) ;
|
||||
j = 0 ;
|
||||
for (here = model->MUTinstances ; here != NULL ; here = here->MUTnextInstance)
|
||||
{
|
||||
model->MUTparamCPU.MUTinstanceIND1Array [j] = here->MUTind1->instanceID ;
|
||||
model->MUTparamCPU.MUTinstanceIND2Array [j] = here->MUTind2->instanceID ;
|
||||
|
||||
j++ ;
|
||||
}
|
||||
}
|
||||
|
||||
/* loop through all the mutual inductor models */
|
||||
for (model = (MUTmodel *)inModel ; model != NULL ; model = model->MUTnextModel)
|
||||
{
|
||||
status = cuMUTsetup ((GENmodel *)model) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
}
|
||||
#endif
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -5,13 +5,15 @@ Author: 2003 Paolo Nenzi
|
|||
/*
|
||||
*/
|
||||
|
||||
|
||||
#include "ngspice/ngspice.h"
|
||||
#include "ngspice/cktdefs.h"
|
||||
#include "inddefs.h"
|
||||
#include "ngspice/sperror.h"
|
||||
#include "ngspice/suffix.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
/*ARGSUSED*/
|
||||
int
|
||||
|
|
@ -23,9 +25,17 @@ MUTtemp(GENmodel *inModel, CKTcircuit *ckt)
|
|||
|
||||
NG_IGNORE(ckt);
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
int i, status ;
|
||||
#endif
|
||||
|
||||
/* loop through all the mutual inductor models */
|
||||
for( ; model != NULL; model = model->MUTnextModel ) {
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
i = 0 ;
|
||||
#endif
|
||||
|
||||
/* loop through all the instances of the model */
|
||||
for (here = model->MUTinstances; here != NULL ;
|
||||
here=here->MUTnextInstance) {
|
||||
|
|
@ -39,8 +49,25 @@ MUTtemp(GENmodel *inModel, CKTcircuit *ckt)
|
|||
* M = k * \/l1 * l2
|
||||
*/
|
||||
here->MUTfactor = here->MUTcoupling * sqrt(ind1 * ind2);
|
||||
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
model->MUTparamCPU.MUTfactorArray[i] = here->MUTfactor ;
|
||||
model->MUTparamCPU.MUTflux1Array[i] = here->MUTind1->INDflux ;
|
||||
model->MUTparamCPU.MUTflux2Array[i] = here->MUTind2->INDflux ;
|
||||
model->MUTparamCPU.MUTbrEq1Array[i] = here->MUTind1->INDbrEq ;
|
||||
model->MUTparamCPU.MUTbrEq2Array[i] = here->MUTind2->INDbrEq ;
|
||||
|
||||
i++ ;
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuMUTtemp ((GENmodel *)model) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
}
|
||||
return(OK);
|
||||
return (OK) ;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -0,0 +1,85 @@
|
|||
/*
|
||||
* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to
|
||||
* endorse or promote products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "ngspice/config.h"
|
||||
#include "cuda_runtime_api.h"
|
||||
#include "isrcdefs.h"
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
|
||||
int
|
||||
cuISRCdestroy
|
||||
(
|
||||
GENmodel *inModel
|
||||
)
|
||||
{
|
||||
ISRCmodel *model = (ISRCmodel *)inModel ;
|
||||
ISRCinstance *here ;
|
||||
int i ;
|
||||
|
||||
for ( ; model != NULL ; model = model->ISRCnextModel)
|
||||
{
|
||||
/* Special case VSRCparamGPU.VSRCcoeffsArray */
|
||||
i = 0 ;
|
||||
|
||||
for (here = model->ISRCinstances ; here != NULL ; here = here->ISRCnextInstance)
|
||||
{
|
||||
cudaFree (model->ISRCparamCPU.ISRCcoeffsArray[i]) ;
|
||||
|
||||
i++ ;
|
||||
}
|
||||
free (model->ISRCparamCPU.ISRCcoeffsArray) ;
|
||||
cudaFree (model->ISRCparamGPU.d_ISRCcoeffsArray) ;
|
||||
|
||||
i = 0 ;
|
||||
|
||||
for (here = model->ISRCinstances ; here != NULL ; here = here->ISRCnextInstance)
|
||||
{
|
||||
free (model->ISRCparamCPU.ISRCcoeffsArrayHost [i]) ;
|
||||
|
||||
i++ ;
|
||||
}
|
||||
free (model->ISRCparamCPU.ISRCcoeffsArrayHost) ;
|
||||
/* ----------------------------------------- */
|
||||
|
||||
/* DOUBLE */
|
||||
free (model->ISRCparamCPU.ISRCdcvalueArray) ;
|
||||
cudaFree (model->ISRCparamGPU.d_ISRCdcvalueArray) ;
|
||||
|
||||
free (model->ISRCparamCPU.ISRCValueArray) ;
|
||||
cudaFree (model->ISRCparamGPU.d_ISRCValueArray) ;
|
||||
|
||||
/* INT */
|
||||
free (model->ISRCparamCPU.ISRCdcGivenArray) ;
|
||||
cudaFree (model->ISRCparamGPU.d_ISRCdcGivenArray) ;
|
||||
|
||||
free (model->ISRCparamCPU.ISRCfunctionTypeArray) ;
|
||||
cudaFree (model->ISRCparamGPU.d_ISRCfunctionTypeArray) ;
|
||||
|
||||
free (model->ISRCparamCPU.ISRCfunctionOrderArray) ;
|
||||
cudaFree (model->ISRCparamGPU.d_ISRCfunctionOrderArray) ;
|
||||
}
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
|
@ -0,0 +1,431 @@
|
|||
/*
|
||||
* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to
|
||||
* endorse or promote products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "ngspice/config.h"
|
||||
#include "ngspice/CUSPICE/cuniinteg.cuh"
|
||||
#include "isrcdefs.h"
|
||||
|
||||
#ifdef XSPICE_EXP
|
||||
/* gtri - begin - wbk - modify for supply ramping option */
|
||||
#include "ngspice/cmproto.h"
|
||||
/* gtri - end - wbk - modify for supply ramping option */
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
/*** TRNOISE and TRRANDOM don't work in the CUDA implementation ***/
|
||||
|
||||
/* cudaMemcpy MACRO to check it for errors --> CUDAMEMCPYCHECK(name of pointer, dimension, type, status) */
|
||||
#define CUDAMEMCPYCHECK(a, b, c, d) \
|
||||
if (d != cudaSuccess) \
|
||||
{ \
|
||||
fprintf (stderr, "cuISRCload routine...\n") ; \
|
||||
fprintf (stderr, "Error: cudaMemcpy failed on %s size of %d bytes\n", #a, (int)(b * sizeof(c))) ; \
|
||||
fprintf (stderr, "Error: %s = %d, %s\n", #d, d, cudaGetErrorString (d)) ; \
|
||||
return (E_NOMEM) ; \
|
||||
}
|
||||
|
||||
extern "C"
|
||||
__global__ void cuISRCload_kernel (ISRCparamGPUstruct, int, double, double, double, double, int, int *, double *) ;
|
||||
|
||||
extern "C"
|
||||
int
|
||||
cuISRCload
|
||||
(
|
||||
GENmodel *inModel, CKTcircuit *ckt
|
||||
)
|
||||
{
|
||||
ISRCmodel *model = (ISRCmodel *)inModel ;
|
||||
int thread_x, thread_y, block_x ;
|
||||
|
||||
cudaError_t status ;
|
||||
|
||||
/* loop through all the inductor models */
|
||||
for ( ; model != NULL ; model = model->ISRCnextModel)
|
||||
{
|
||||
/* Determining how many blocks should exist in the kernel */
|
||||
thread_x = 1 ;
|
||||
thread_y = 256 ;
|
||||
if (model->n_instances % thread_y != 0)
|
||||
block_x = (int)((model->n_instances + thread_y - 1) / thread_y) ;
|
||||
else
|
||||
block_x = model->n_instances / thread_y ;
|
||||
|
||||
dim3 thread (thread_x, thread_y) ;
|
||||
|
||||
/* Kernel launch */
|
||||
status = cudaGetLastError () ; // clear error status
|
||||
|
||||
cuISRCload_kernel <<< block_x, thread >>> (model->ISRCparamGPU, ckt->CKTmode, ckt->CKTtime,
|
||||
ckt->CKTstep, ckt->CKTfinalTime, ckt->CKTsrcFact,
|
||||
model->n_instances, model->d_PositionVectorRHS,
|
||||
ckt->d_CKTloadOutputRHS) ;
|
||||
|
||||
cudaDeviceSynchronize () ;
|
||||
|
||||
status = cudaGetLastError () ; // check for launch error
|
||||
if (status != cudaSuccess)
|
||||
{
|
||||
fprintf (stderr, "Kernel launch failure in the Current Source Model\n\n") ;
|
||||
return (E_NOMEM) ;
|
||||
}
|
||||
}
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
||||
extern "C"
|
||||
__global__
|
||||
void
|
||||
cuISRCload_kernel
|
||||
(
|
||||
ISRCparamGPUstruct ISRCentry, int CKTmode, double CKTtime,
|
||||
double CKTstep, double CKTfinalTime, double CKTsrcFact, int n_instances,
|
||||
int *d_PositionVectorRHS, double *d_CKTloadOutputRHS
|
||||
)
|
||||
{
|
||||
int instance_ID ;
|
||||
double value, time ;
|
||||
|
||||
instance_ID = threadIdx.y + blockDim.y * blockIdx.x ;
|
||||
|
||||
if (instance_ID < n_instances)
|
||||
{
|
||||
if (threadIdx.x == 0)
|
||||
{
|
||||
if ((CKTmode & (MODEDCOP | MODEDCTRANCURVE)) && ISRCentry.d_ISRCdcGivenArray [instance_ID])
|
||||
{
|
||||
/* load using DC value */
|
||||
|
||||
#ifdef XSPICE_EXP
|
||||
/* gtri - begin - wbk - modify to process srcFact, etc. for all sources */
|
||||
value = ISRCentry.d_ISRCdcvalueArray [instance_ID] ;
|
||||
#else
|
||||
value = ISRCentry.d_ISRCdcvalueArray [instance_ID] * CKTsrcFact ;
|
||||
#endif
|
||||
|
||||
} else {
|
||||
if (CKTmode & (MODEDC))
|
||||
time = 0 ;
|
||||
else
|
||||
time = CKTtime ;
|
||||
|
||||
/* use the transient functions */
|
||||
switch (ISRCentry.d_ISRCfunctionTypeArray [instance_ID])
|
||||
{
|
||||
default:
|
||||
|
||||
#ifdef XSPICE_EXP
|
||||
value = ISRCentry.d_ISRCdcvalueArray [instance_ID] ;
|
||||
#else
|
||||
value = ISRCentry.d_ISRCdcvalueArray [instance_ID] * CKTsrcFact ;
|
||||
#endif
|
||||
|
||||
break ;
|
||||
|
||||
case PULSE:
|
||||
{
|
||||
double V1, V2, TD, TR, TF, PW, PER, basetime = 0 ;
|
||||
|
||||
#ifdef XSPICE
|
||||
double PHASE, phase, deltat ;
|
||||
#endif
|
||||
|
||||
V1 = ISRCentry.d_ISRCcoeffsArray [instance_ID] [0] ;
|
||||
V2 = ISRCentry.d_ISRCcoeffsArray [instance_ID] [1] ;
|
||||
TD = ISRCentry.d_ISRCfunctionOrderArray [instance_ID] > 2
|
||||
? ISRCentry.d_ISRCcoeffsArray [instance_ID] [2] : 0.0 ;
|
||||
TR = ISRCentry.d_ISRCfunctionOrderArray [instance_ID] > 3
|
||||
&& ISRCentry.d_ISRCcoeffsArray [instance_ID] [3] != 0.0
|
||||
? ISRCentry.d_ISRCcoeffsArray [instance_ID] [3] : CKTstep ;
|
||||
TF = ISRCentry.d_ISRCfunctionOrderArray [instance_ID] > 4
|
||||
&& ISRCentry.d_ISRCcoeffsArray [instance_ID] [4] != 0.0
|
||||
? ISRCentry.d_ISRCcoeffsArray [instance_ID] [4] : CKTstep ;
|
||||
PW = ISRCentry.d_ISRCfunctionOrderArray [instance_ID] > 5
|
||||
&& ISRCentry.d_ISRCcoeffsArray [instance_ID] [5] != 0.0
|
||||
? ISRCentry.d_ISRCcoeffsArray [instance_ID] [5] : CKTfinalTime ;
|
||||
PER = ISRCentry.d_ISRCfunctionOrderArray [instance_ID] > 6
|
||||
&& ISRCentry.d_ISRCcoeffsArray [instance_ID] [6] != 0.0
|
||||
? ISRCentry.d_ISRCcoeffsArray [instance_ID] [6] : CKTfinalTime ;
|
||||
|
||||
/* shift time by delay time TD */
|
||||
time -= TD ;
|
||||
|
||||
#ifdef XSPICE
|
||||
/* gtri - begin - wbk - add PHASE parameter */
|
||||
PHASE = ISRCentry.d_ISRCfunctionOrderArray [instance_ID] > 7
|
||||
? ISRCentry.d_ISRCcoeffsArray [instance_ID] [7] : 0.0 ;
|
||||
|
||||
/* normalize phase to cycles */
|
||||
phase = PHASE / 360.0 ;
|
||||
phase = fmod (phase, 1.0) ;
|
||||
deltat = phase * PER ;
|
||||
while (deltat > 0)
|
||||
deltat -= PER ;
|
||||
|
||||
/* shift time by pase (neg. for pos. phase value) */
|
||||
time += deltat ;
|
||||
|
||||
/* gtri - end - wbk - add PHASE parameter */
|
||||
#endif
|
||||
|
||||
if (time > PER)
|
||||
{
|
||||
/* repeating signal - figure out where we are */
|
||||
/* in period */
|
||||
basetime = PER * floor (time / PER) ;
|
||||
time -= basetime ;
|
||||
}
|
||||
if (time <= 0 || time >= TR + PW + TF)
|
||||
value = V1 ;
|
||||
else if (time >= TR && time <= TR + PW)
|
||||
value = V2 ;
|
||||
else if (time > 0 && time < TR)
|
||||
value = V1 + (V2 - V1) * (time) / TR ;
|
||||
else /* time > TR + PW && < TR + PW + TF */
|
||||
value = V2 + (V1 - V2) * (time - (TR + PW)) / TF ;
|
||||
}
|
||||
break ;
|
||||
|
||||
case SINE:
|
||||
{
|
||||
double VO, VA, FREQ, TD, THETA ;
|
||||
|
||||
/* gtri - begin - wbk - add PHASE parameter */
|
||||
#ifdef XSPICE
|
||||
double PHASE, phase ;
|
||||
|
||||
PHASE = ISRCentry.d_ISRCfunctionOrderArray [instance_ID] > 5
|
||||
? ISRCentry.d_ISRCcoeffsArray [instance_ID] [5] : 0.0 ;
|
||||
|
||||
/* compute phase in radians */
|
||||
phase = PHASE * M_PI / 180.0 ;
|
||||
#endif
|
||||
|
||||
VO = ISRCentry.d_ISRCcoeffsArray [instance_ID] [0] ;
|
||||
VA = ISRCentry.d_ISRCcoeffsArray [instance_ID] [1] ;
|
||||
FREQ = ISRCentry.d_ISRCfunctionOrderArray [instance_ID] > 2
|
||||
&& ISRCentry.d_ISRCcoeffsArray [instance_ID] [2] != 0.0
|
||||
? ISRCentry.d_ISRCcoeffsArray [instance_ID] [2] : (1 / CKTfinalTime) ;
|
||||
TD = ISRCentry.d_ISRCfunctionOrderArray [instance_ID] > 3
|
||||
? ISRCentry.d_ISRCcoeffsArray [instance_ID] [3] : 0.0 ;
|
||||
THETA = ISRCentry.d_ISRCfunctionOrderArray [instance_ID] > 4
|
||||
? ISRCentry.d_ISRCcoeffsArray [instance_ID] [4] : 0.0 ;
|
||||
|
||||
time -= TD ;
|
||||
if (time <= 0)
|
||||
|
||||
#ifdef XSPICE
|
||||
value = VO + VA * sin (phase) ;
|
||||
else
|
||||
value = VO + VA * sin (FREQ * time * 2.0 * M_PI + phase) * exp (-time * THETA) ;
|
||||
#else
|
||||
value = VO ;
|
||||
else
|
||||
value = VO + VA * sin (FREQ * time * 2.0 * M_PI) * exp (-time * THETA) ;
|
||||
#endif
|
||||
/* gtri - end - wbk - add PHASE parameter */
|
||||
|
||||
}
|
||||
break ;
|
||||
|
||||
case EXP:
|
||||
{
|
||||
double V1, V2, TD1, TD2, TAU1, TAU2 ;
|
||||
|
||||
V1 = ISRCentry.d_ISRCcoeffsArray [instance_ID] [0] ;
|
||||
V2 = ISRCentry.d_ISRCcoeffsArray [instance_ID] [1] ;
|
||||
TD1 = ISRCentry.d_ISRCfunctionOrderArray [instance_ID] > 2
|
||||
&& ISRCentry.d_ISRCcoeffsArray [instance_ID] [2] != 0.0
|
||||
? ISRCentry.d_ISRCcoeffsArray [instance_ID] [2] : CKTstep ;
|
||||
TAU1 = ISRCentry.d_ISRCfunctionOrderArray [instance_ID] > 3
|
||||
&& ISRCentry.d_ISRCcoeffsArray [instance_ID] [3] != 0.0
|
||||
? ISRCentry.d_ISRCcoeffsArray [instance_ID] [3] : CKTstep ;
|
||||
TD2 = ISRCentry.d_ISRCfunctionOrderArray [instance_ID] > 4
|
||||
&& ISRCentry.d_ISRCcoeffsArray [instance_ID] [4] != 0.0
|
||||
? ISRCentry.d_ISRCcoeffsArray [instance_ID] [4] : TD1 + CKTstep ;
|
||||
TAU2 = ISRCentry.d_ISRCfunctionOrderArray [instance_ID] > 5
|
||||
&& ISRCentry.d_ISRCcoeffsArray [instance_ID] [5]
|
||||
? ISRCentry.d_ISRCcoeffsArray [instance_ID] [5] : CKTstep ;
|
||||
|
||||
if (time <= TD1)
|
||||
value = V1 ;
|
||||
else if (time <= TD2)
|
||||
value = V1 + (V2 - V1) * (1 - exp (-(time - TD1) / TAU1)) ;
|
||||
else
|
||||
value = V1 + (V2 - V1) * (1 - exp (-(time - TD1) / TAU1)) +
|
||||
(V1 - V2) * (1 - exp (-(time - TD2) / TAU2)) ;
|
||||
}
|
||||
break ;
|
||||
|
||||
case SFFM:
|
||||
{
|
||||
double VO, VA, FC, MDI, FS ;
|
||||
|
||||
/* gtri - begin - wbk - add PHASE parameters */
|
||||
#ifdef XSPICE
|
||||
double PHASEC, PHASES, phasec, phases ;
|
||||
|
||||
PHASEC = ISRCentry.d_ISRCfunctionOrderArray [instance_ID] > 5
|
||||
? ISRCentry.d_ISRCcoeffsArray [instance_ID] [5] : 0.0 ;
|
||||
PHASES = ISRCentry.d_ISRCfunctionOrderArray [instance_ID] > 6
|
||||
? ISRCentry.d_ISRCcoeffsArray [instance_ID] [6] : 0.0 ;
|
||||
|
||||
/* compute phases in radians */
|
||||
phasec = PHASEC * M_PI / 180.0 ;
|
||||
phases = PHASES * M_PI / 180.0 ;
|
||||
#endif
|
||||
|
||||
VO = ISRCentry.d_ISRCcoeffsArray [instance_ID] [0] ;
|
||||
VA = ISRCentry.d_ISRCcoeffsArray [instance_ID] [1] ;
|
||||
FC = ISRCentry.d_ISRCfunctionOrderArray [instance_ID] > 2
|
||||
&& ISRCentry.d_ISRCcoeffsArray [instance_ID] [2]
|
||||
? ISRCentry.d_ISRCcoeffsArray [instance_ID] [2] : (1 / CKTfinalTime) ;
|
||||
MDI = ISRCentry.d_ISRCfunctionOrderArray [instance_ID] > 3
|
||||
? ISRCentry.d_ISRCcoeffsArray [instance_ID] [3] : 0.0 ;
|
||||
FS = ISRCentry.d_ISRCfunctionOrderArray [instance_ID] > 4
|
||||
&& ISRCentry.d_ISRCcoeffsArray [instance_ID] [4]
|
||||
? ISRCentry.d_ISRCcoeffsArray [instance_ID] [4] : (1 / CKTfinalTime) ;
|
||||
|
||||
#ifdef XSPICE
|
||||
/* compute waveform value */
|
||||
value = VO + VA * sin ((2.0 * M_PI * FC * time + phasec) +
|
||||
MDI * sin (2.0 * M_PI * FS * time + phases)) ;
|
||||
#else
|
||||
value = VO + VA * sin ((2.0 * M_PI * FC * time) +
|
||||
MDI * sin (2.0 * M_PI * FS * time)) ;
|
||||
#endif
|
||||
/* gtri - end - wbk - add PHASE parameters */
|
||||
|
||||
}
|
||||
break ;
|
||||
|
||||
case AM:
|
||||
{
|
||||
double VA, FC, MF, VO, TD ;
|
||||
|
||||
/* gtri - begin - wbk - add PHASE parameters */
|
||||
#ifdef XSPICE
|
||||
double PHASEC, PHASES, phasec, phases ;
|
||||
|
||||
PHASEC = ISRCentry.d_ISRCfunctionOrderArray [instance_ID] > 5
|
||||
? ISRCentry.d_ISRCcoeffsArray [instance_ID] [5] : 0.0 ;
|
||||
PHASES = ISRCentry.d_ISRCfunctionOrderArray [instance_ID] > 6
|
||||
? ISRCentry.d_ISRCcoeffsArray [instance_ID] [6] : 0.0 ;
|
||||
|
||||
/* compute phases in radians */
|
||||
phasec = PHASEC * M_PI / 180.0 ;
|
||||
phases = PHASES * M_PI / 180.0 ;
|
||||
#endif
|
||||
|
||||
VA = ISRCentry.d_ISRCcoeffsArray [instance_ID] [0] ;
|
||||
VO = ISRCentry.d_ISRCcoeffsArray [instance_ID] [1] ;
|
||||
MF = ISRCentry.d_ISRCfunctionOrderArray [instance_ID] > 2
|
||||
&& ISRCentry.d_ISRCcoeffsArray [instance_ID] [2]
|
||||
? ISRCentry.d_ISRCcoeffsArray [instance_ID] [2] : (1 / CKTfinalTime) ;
|
||||
FC = ISRCentry.d_ISRCfunctionOrderArray [instance_ID] > 3
|
||||
? ISRCentry.d_ISRCcoeffsArray [instance_ID] [3] : 0.0 ;
|
||||
TD = ISRCentry.d_ISRCfunctionOrderArray [instance_ID] > 4
|
||||
&& ISRCentry.d_ISRCcoeffsArray [instance_ID] [4]
|
||||
? ISRCentry.d_ISRCcoeffsArray [instance_ID] [4] : 0.0 ;
|
||||
|
||||
time -= TD ;
|
||||
if (time <= 0)
|
||||
value = 0 ;
|
||||
else
|
||||
#ifdef XSPICE
|
||||
/* compute waveform value */
|
||||
value = VA * (VO + sin (2.0 * M_PI * MF * time + phases )) *
|
||||
sin (2.0 * M_PI * FC * time + phases) ;
|
||||
#else
|
||||
value = VA * (VO + sin (2.0 * M_PI * MF * time)) *
|
||||
sin (2.0 * M_PI * FC * time) ;
|
||||
/* gtri - end - wbk - add PHASE parameters */
|
||||
#endif
|
||||
|
||||
}
|
||||
break ;
|
||||
|
||||
case PWL:
|
||||
{
|
||||
int i ;
|
||||
if (time < ISRCentry.d_ISRCcoeffsArray [instance_ID] [0])
|
||||
{
|
||||
value = ISRCentry.d_ISRCcoeffsArray [instance_ID] [1] ;
|
||||
break ;
|
||||
}
|
||||
|
||||
for (i = 0 ; i <= (ISRCentry.d_ISRCfunctionOrderArray [instance_ID] / 2) - 1 ; i++)
|
||||
{
|
||||
if ((ISRCentry.d_ISRCcoeffsArray [instance_ID] [2 * i] == time))
|
||||
{
|
||||
value = ISRCentry.d_ISRCcoeffsArray [instance_ID] [2 * i + 1] ;
|
||||
goto loadDone ;
|
||||
}
|
||||
if ((ISRCentry.d_ISRCcoeffsArray [instance_ID] [2 * i] < time)
|
||||
&& (ISRCentry.d_ISRCcoeffsArray [instance_ID] [2 * (i + 1)] > time))
|
||||
{
|
||||
value = ISRCentry.d_ISRCcoeffsArray [instance_ID] [2 * i + 1] +
|
||||
(((time - ISRCentry.d_ISRCcoeffsArray [instance_ID] [2 * i]) /
|
||||
(ISRCentry.d_ISRCcoeffsArray [instance_ID] [2 * (i + 1)] -
|
||||
ISRCentry.d_ISRCcoeffsArray [instance_ID] [2 * i])) *
|
||||
(ISRCentry.d_ISRCcoeffsArray [instance_ID] [2 * i + 3] -
|
||||
ISRCentry.d_ISRCcoeffsArray [instance_ID] [2 * i + 1])) ;
|
||||
goto loadDone ;
|
||||
}
|
||||
}
|
||||
value = ISRCentry.d_ISRCcoeffsArray [instance_ID]
|
||||
[ISRCentry.d_ISRCfunctionOrderArray [instance_ID] - 1] ;
|
||||
break ;
|
||||
}
|
||||
} // switch
|
||||
} // else (line 593)
|
||||
|
||||
loadDone:
|
||||
|
||||
#ifdef XSPICE_EXP
|
||||
/* gtri - begin - wbk - modify for supply ramping option */
|
||||
value *= CKTsrcFact ;
|
||||
value *= cm_analog_ramp_factor () ;
|
||||
#else
|
||||
if (CKTmode & MODETRANOP)
|
||||
value *= CKTsrcFact ;
|
||||
/* gtri - end - wbk - modify for supply ramping option */
|
||||
#endif
|
||||
|
||||
d_CKTloadOutputRHS [d_PositionVectorRHS [instance_ID]] = value ;
|
||||
|
||||
/* gtri - end - wbk - modify to process srcFact, etc. for all sources */
|
||||
|
||||
#ifdef XSPICE
|
||||
/* gtri - begin - wbk - record value so it can be output if requested */
|
||||
here->ISRCcurrent = value ;
|
||||
/* gtri - end - wbk - record value so it can be output if requested */
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
return ;
|
||||
}
|
||||
|
|
@ -0,0 +1,127 @@
|
|||
/*
|
||||
* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to
|
||||
* endorse or promote products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "ngspice/config.h"
|
||||
#include "cuda_runtime_api.h"
|
||||
#include "isrcdefs.h"
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
|
||||
/* cudaMalloc MACRO to check it for errors --> CUDAMALLOCCHECK(name of pointer, dimension, type, status) */
|
||||
#define CUDAMALLOCCHECK(a, b, c, d) \
|
||||
if (d != cudaSuccess) \
|
||||
{ \
|
||||
fprintf (stderr, "cuISRCsetup routine...\n") ; \
|
||||
fprintf (stderr, "Error: cudaMalloc failed on %s size1 of %d bytes\n", #a, (int)(b * sizeof(c))) ; \
|
||||
fprintf (stderr, "Error: %s = %d, %s\n", #d, d, cudaGetErrorString (d)) ; \
|
||||
return (E_NOMEM) ; \
|
||||
}
|
||||
|
||||
/* cudaMemcpy MACRO to check it for errors --> CUDAMEMCPYCHECK(name of pointer, dimension, type, status) */
|
||||
#define CUDAMEMCPYCHECK(a, b, c, d) \
|
||||
if (d != cudaSuccess) \
|
||||
{ \
|
||||
fprintf (stderr, "cuISRCsetup routine...\n") ; \
|
||||
fprintf (stderr, "Error: cudaMemcpy failed on %s size1 of %d bytes\n", #a, (int)(b * sizeof(c))) ; \
|
||||
fprintf (stderr, "Error: %s = %d, %s\n", #d, d, cudaGetErrorString (d)) ; \
|
||||
return (E_NOMEM) ; \
|
||||
}
|
||||
|
||||
int
|
||||
cuISRCsetup
|
||||
(
|
||||
GENmodel *inModel
|
||||
)
|
||||
{
|
||||
int i ;
|
||||
long unsigned int size1, size2 ;
|
||||
cudaError_t status ;
|
||||
ISRCmodel *model = (ISRCmodel *)inModel ;
|
||||
ISRCinstance *here ;
|
||||
|
||||
size1 = (long unsigned int)model->n_instances ;
|
||||
|
||||
/* Space Allocation to GPU */
|
||||
status = cudaMalloc ((void **)&(model->d_PositionVectorRHS), size1 * sizeof(int)) ;
|
||||
CUDAMALLOCCHECK (model->d_PositionVectorRHS, size1, int, status)
|
||||
|
||||
status = cudaMemcpy (model->d_PositionVectorRHS, model->PositionVectorRHS, size1 * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->d_PositionVectorRHS, size1, int, status)
|
||||
|
||||
/* Special case ISRCparamGPU.ISRCcoeffsArray */
|
||||
model->ISRCparamCPU.ISRCcoeffsArray = (double **) malloc (size1 * sizeof(double *)) ;
|
||||
status = cudaMalloc ((void **)&(model->ISRCparamGPU.d_ISRCcoeffsArray), size1 * sizeof(double *)) ;
|
||||
CUDAMALLOCCHECK (model->ISRCparamGPU.ISRCcoeffsArray, size1, double*, status)
|
||||
|
||||
i = 0 ;
|
||||
|
||||
for (here = model->ISRCinstances ; here != NULL ; here = here->ISRCnextInstance)
|
||||
{
|
||||
size2 = (long unsigned int)here->n_coeffs ;
|
||||
status = cudaMalloc ((void **)&(model->ISRCparamCPU.ISRCcoeffsArray[i]), size2 * sizeof(double)) ;
|
||||
CUDAMALLOCCHECK (model->ISRCparamCPU.ISRCcoeffsArray[i], size2, double, status)
|
||||
|
||||
i++ ;
|
||||
}
|
||||
|
||||
/* Structure pointer vectors in GPU */
|
||||
status = cudaMemcpy (model->ISRCparamGPU.d_ISRCcoeffsArray, model->ISRCparamCPU.ISRCcoeffsArray, size1 * sizeof(double *), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->ISRCparamGPU.d_ISRCcoeffsArray, size1, sizeof(double *), status)
|
||||
|
||||
i = 0 ;
|
||||
|
||||
model->ISRCparamCPU.ISRCcoeffsArrayHost = (double **) malloc (size1 * sizeof(double *)) ;
|
||||
for (here = model->ISRCinstances ; here != NULL ; here = here->ISRCnextInstance)
|
||||
{
|
||||
size2 = (long unsigned int)here->n_coeffs ;
|
||||
model->ISRCparamCPU.ISRCcoeffsArrayHost [i] = (double *) malloc (size2 * sizeof(double)) ;
|
||||
|
||||
i++ ;
|
||||
}
|
||||
/* ----------------------------------------- */
|
||||
|
||||
/* DOUBLE */
|
||||
model->ISRCparamCPU.ISRCdcvalueArray = (double *) malloc (size1 * sizeof(double)) ;
|
||||
status = cudaMalloc ((void **)&(model->ISRCparamGPU.d_ISRCdcvalueArray), size1 * sizeof(double)) ;
|
||||
CUDAMALLOCCHECK (model->ISRCparamGPU.d_ISRCdcvalueArray, size1, double, status)
|
||||
|
||||
model->ISRCparamCPU.ISRCValueArray = (double *) malloc (size1 * sizeof(double)) ;
|
||||
status = cudaMalloc ((void **)&(model->ISRCparamGPU.d_ISRCValueArray), size1 * sizeof(double)) ;
|
||||
CUDAMALLOCCHECK (model->ISRCparamGPU.d_ISRCValueArray, size1, double, status)
|
||||
|
||||
/* INT */
|
||||
model->ISRCparamCPU.ISRCdcGivenArray = (int *) malloc (size1 * sizeof(int)) ;
|
||||
status = cudaMalloc ((void **)&(model->ISRCparamGPU.d_ISRCdcGivenArray), size1 * sizeof(int)) ;
|
||||
CUDAMALLOCCHECK (model->ISRCparamGPU.d_ISRCdcGivenArray, size1, int, status)
|
||||
|
||||
model->ISRCparamCPU.ISRCfunctionTypeArray = (int *) malloc (size1 * sizeof(int)) ;
|
||||
status = cudaMalloc ((void **)&(model->ISRCparamGPU.d_ISRCfunctionTypeArray), size1 * sizeof(int)) ;
|
||||
CUDAMALLOCCHECK (model->ISRCparamGPU.d_ISRCfunctionTypeArray, size1, int, status)
|
||||
|
||||
model->ISRCparamCPU.ISRCfunctionOrderArray = (int *) malloc (size1 * sizeof(int)) ;
|
||||
status = cudaMalloc ((void **)&(model->ISRCparamGPU.d_ISRCfunctionOrderArray), size1 * sizeof(int)) ;
|
||||
CUDAMALLOCCHECK (model->ISRCparamGPU.d_ISRCfunctionOrderArray, size1, int, status)
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
|
|
@ -0,0 +1,81 @@
|
|||
/*
|
||||
* Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors may be used to
|
||||
* endorse or promote products derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
|
||||
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "ngspice/config.h"
|
||||
#include "cuda_runtime_api.h"
|
||||
#include "isrcdefs.h"
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
|
||||
/* cudaMemcpy MACRO to check it for errors --> CUDAMEMCPYCHECK(name of pointer, dimension, type, status) */
|
||||
#define CUDAMEMCPYCHECK(a, b, c, d) \
|
||||
if (d != cudaSuccess) \
|
||||
{ \
|
||||
fprintf (stderr, "cuISRCtemp routine...\n") ; \
|
||||
fprintf (stderr, "Error: cudaMemcpy failed on %s size1 of %d bytes\n", #a, (int)(b * sizeof(c))) ; \
|
||||
fprintf (stderr, "Error: %s = %d, %s\n", #d, d, cudaGetErrorString (d)) ; \
|
||||
return (E_NOMEM) ; \
|
||||
}
|
||||
|
||||
int
|
||||
cuISRCtemp
|
||||
(
|
||||
GENmodel *inModel
|
||||
)
|
||||
{
|
||||
int i ;
|
||||
long unsigned int size1, size2 ;
|
||||
cudaError_t status ;
|
||||
ISRCmodel *model = (ISRCmodel *)inModel ;
|
||||
ISRCinstance *here ;
|
||||
|
||||
size1 = (long unsigned int)model->n_instances ;
|
||||
|
||||
i = 0 ;
|
||||
|
||||
for (here = model->ISRCinstances ; here != NULL ; here = here->ISRCnextInstance)
|
||||
{
|
||||
size2 = (long unsigned int)here->n_coeffs ;
|
||||
status = cudaMemcpy (model->ISRCparamCPU.ISRCcoeffsArray [i], model->ISRCparamCPU.ISRCcoeffsArrayHost [i], size2 * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (model->ISRCparamCPU.ISRCcoeffsArray [i], size2, double, status)
|
||||
|
||||
i++ ;
|
||||
}
|
||||
|
||||
/* DOUBLE */
|
||||
status = cudaMemcpy (model->ISRCparamGPU.d_ISRCdcvalueArray, model->ISRCparamCPU.ISRCdcvalueArray, size1 * sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK(model->ISRCparamGPU.d_ISRCdcvalueArray, size1, double, status)
|
||||
|
||||
/* INT */
|
||||
status = cudaMemcpy (model->ISRCparamGPU.d_ISRCdcGivenArray, model->ISRCparamCPU.ISRCdcGivenArray, size1 * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK(model->ISRCparamGPU.d_ISRCdcGivenArray, size1, int, status)
|
||||
|
||||
status = cudaMemcpy (model->ISRCparamGPU.d_ISRCfunctionTypeArray, model->ISRCparamCPU.ISRCfunctionTypeArray, size1 * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK(model->ISRCparamGPU.d_ISRCfunctionTypeArray, size1, int, status)
|
||||
|
||||
status = cudaMemcpy (model->ISRCparamGPU.d_ISRCfunctionOrderArray, model->ISRCparamCPU.ISRCfunctionOrderArray, size1 * sizeof(int), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK(model->ISRCparamGPU.ISRCfunctionOrderArray, size1, int, status)
|
||||
|
||||
return (OK) ;
|
||||
}
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue