drop `NEWN', use `TMALLOC'
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ad869c6d2d
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232debc6ec
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@ -1128,7 +1128,7 @@ doset(CKTcircuit *ckt, int typecode, GENinstance *dev, GENmodel *mod, IFparm *op
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switch (opt->dataType & (IF_VARTYPES & ~IF_VECTOR)) {
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case IF_FLAG:
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case IF_INTEGER:
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iptr = nval.v.vec.iVec = NEWN(int, n);
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iptr = nval.v.vec.iVec = TMALLOC(int, n);
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for (i = 0; i < n; i++)
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*iptr++ = (int)floor(*dptr++ + 0.5);
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@ -50,7 +50,6 @@
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} while(0)
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#define NEW(TYPE) (TMALLOC(TYPE, 1))
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#define NEWN(TYPE,COUNT) (TMALLOC(TYPE, COUNT))
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#define R_NORM(A,B) { \
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@ -149,11 +149,11 @@ int sens_sens(CKTcircuit *ckt, int restart)
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size += 1;
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/* Create an extra rhs */
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delta_I = NEWN(double, size);
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delta_iI = NEWN(double, size);
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delta_I = TMALLOC(double, size);
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delta_iI = TMALLOC(double, size);
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delta_I_delta_Y = NEWN(double, size);
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delta_iI_delta_Y = NEWN(double, size);
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delta_I_delta_Y = TMALLOC(double, size);
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delta_iI_delta_Y = TMALLOC(double, size);
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num_vars = 0;
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@ -165,7 +165,7 @@ int sens_sens(CKTcircuit *ckt, int restart)
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return OK; /* XXXX Should be E_ something */
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k = 0;
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output_names = NEWN(IFuid, num_vars);
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output_names = TMALLOC(IFuid, num_vars);
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for (sg = sgen_init(ckt, is_dc); sg; sgen_next(&sg)) {
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if (!sg->is_instparam) {
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sprintf(namebuf, "%s:%s",
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@ -203,11 +203,11 @@ int sens_sens(CKTcircuit *ckt, int restart)
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FREE(output_names);
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if (is_dc) {
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output_values = NEWN(double, num_vars);
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output_values = TMALLOC(double, num_vars);
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output_cvalues = NULL;
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} else {
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output_values = NULL;
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output_cvalues = NEWN(IFcomplex, num_vars);
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output_cvalues = TMALLOC(IFcomplex, num_vars);
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if (job->step_type != SENS_LINEAR)
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SPfrontEnd->OUTattributes (sen_data, NULL, OUT_SCALE_LOG, NULL);
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@ -198,7 +198,7 @@ DCpss(CKTcircuit *ckt,
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ckt->CKTtimeListSize = (int)(1 / ckt->CKTguessedFreq / maxstepsize + 0.5);
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ltra_num = CKTtypelook("LTRA");
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if (ltra_num >= 0 && ckt->CKThead[ltra_num] != NULL)
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ckt->CKTtimePoints = NEWN(double, ckt->CKTtimeListSize);
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ckt->CKTtimePoints = TMALLOC(double, ckt->CKTtimeListSize);
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/* end LTRA code addition */
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/* Breakpoints initialization */
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@ -128,7 +128,7 @@ DCtran(CKTcircuit *ckt,
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ckt->CKTtimeListSize = (int) ceil( ckt->CKTfinalTime / maxstepsize );
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ltra_num = CKTtypelook("LTRA");
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if (ltra_num >= 0 && ckt->CKThead[ltra_num] != NULL)
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ckt->CKTtimePoints = NEWN(double, ckt->CKTtimeListSize);
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ckt->CKTtimePoints = TMALLOC(double, ckt->CKTtimeListSize);
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/* end LTRA code addition */
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if(ckt->CKTbreaks) FREE(ckt->CKTbreaks);
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@ -31,8 +31,8 @@ ASRCconvTest(GENmodel *inModel, CKTcircuit *ckt)
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FREE(asrc_derivs);
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}
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asrc_nvals = i;
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asrc_vals = NEWN(double, i);
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asrc_derivs = NEWN(double, i);
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asrc_vals = TMALLOC(double, i);
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asrc_derivs = TMALLOC(double, i);
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}
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for (i = 0; i < here->ASRCtree->numVars; i++)
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@ -49,8 +49,8 @@ ASRCload(GENmodel *inModel, CKTcircuit *ckt)
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FREE(asrc_derivs);
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}
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asrc_nvals = i;
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asrc_vals = NEWN(double, i);
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asrc_derivs = NEWN(double, i);
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asrc_vals = TMALLOC(double, i);
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asrc_derivs = TMALLOC(double, i);
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}
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j = 0;
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@ -76,7 +76,7 @@ ASRCload(GENmodel *inModel, CKTcircuit *ckt)
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/* The ac load precomputation and storage */
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if (ckt->CKTmode & MODEINITSMSIG) {
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int size = here->ASRCtree->numVars + 1;
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here->ASRCacValues = NEWN(double, size);
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here->ASRCacValues = TMALLOC(double, size);
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for (i = 0; i < here->ASRCtree->numVars; i++)
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here->ASRCacValues[i] = asrc_derivs[i];
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}
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@ -48,8 +48,8 @@ ASRCpzLoad(GENmodel *inModel, CKTcircuit *ckt, SPcomplex *s)
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FREE(asrc_derivs);
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}
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asrc_nvals = i;
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asrc_vals = NEWN(double, i);
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asrc_derivs = NEWN(double, i);
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asrc_vals = TMALLOC(double, i);
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asrc_derivs = TMALLOC(double, i);
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}
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/* Fill the vector of values from the previous solution */
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