Merge branch 'pre-master-44' into bt_dev
This commit is contained in:
Brian Taylor
commit
17f549a9ed
6
ANALYSES
6
ANALYSES
|
|
@ -1,5 +1,3 @@
|
|||
12345678901234567890123456789012345678901234567890123456789012345678901234567890
|
||||
|
||||
ANALYSES
|
||||
========
|
||||
|
||||
|
|
@ -46,7 +44,9 @@ Table of Contents
|
|||
2 Operating point analysis (OP)
|
||||
|
||||
The operating point analysis determines the dc operating point of the
|
||||
circuit with inductors shorted and capacitors opened.
|
||||
circuit with inductors shorted and capacitors opened. If a simple matrix
|
||||
solution fails, two versions of gmin stepping may be followed by source
|
||||
stepping and finally an OP search by a transient simulation.
|
||||
|
||||
|
||||
3 Operating point sweep Analysis (DC)
|
||||
|
|
|
|||
1
AUTHORS
1
AUTHORS
|
|
@ -15,6 +15,7 @@ Phil Barker,
|
|||
Steven Borley,
|
||||
Krzysztof Blaszkowski,
|
||||
Stuart Brorson,
|
||||
Árpád Bűrmen,
|
||||
Alessio Cacciatori,
|
||||
Mansun Chan,
|
||||
Wayne A. Christopher,
|
||||
|
|
|
|||
6
BUGS
6
BUGS
|
|
@ -30,9 +30,3 @@ OPEN BUGS:
|
|||
algorithms, does not give correct results for all tested input files.
|
||||
The effort to correct that issue seems to be large.
|
||||
|
||||
|
||||
* voltage (and current) controlled switches need better timing
|
||||
|
||||
The controlled switches (SW, CSW), which still stem from the original
|
||||
spice3f5 implementation, sometimes lead to wrong results when on and off
|
||||
ramp times differ considerably.
|
||||
|
|
|
|||
6
DEVICES
6
DEVICES
|
|
@ -827,16 +827,16 @@ will be updated every time the device specific code is altered or changed to ref
|
|||
13.8 r2_cmc
|
||||
|
||||
More models are available at https://github.com/dwarning/VA-Models,
|
||||
user compiled models are possible as well (See ngspice manual, chapter 13).
|
||||
user compiled models are possible as well (See ngspice manual, chapter 9).
|
||||
|
||||
|
||||
14. XSpice code models
|
||||
|
||||
more than 100 models are available, please see ngspice manual chapt. 12
|
||||
more than 100 models are available, please see ngspice manual chapt. 8
|
||||
|
||||
15. Digital Building Blocks (U instances)
|
||||
|
||||
U instances are digital primitives which may be used (in proper combination) to
|
||||
model digital devices, e.g. from the 74xx or 40xx families. ngspice maps them
|
||||
onto XSPICE models, which allows a fast event based simulation. Please see the
|
||||
ngspice manual, chapter 14.
|
||||
ngspice manual, chapter 10.
|
||||
|
|
|
|||
12
FAQ
12
FAQ
|
|
@ -96,7 +96,7 @@
|
|||
from a tcl script and vector plotted or post processed using tcl. A small
|
||||
GUI may be built by the user to analyze a circuit or a set of circuits.
|
||||
Tclspice is obtained compiling ngspice activating an additional option.
|
||||
This has not been used and tested for recently.
|
||||
This has not been used and tested for some time now.
|
||||
|
||||
|
||||
1.4 Why resurrecting Berkeley's Spice?
|
||||
|
|
@ -135,7 +135,7 @@
|
|||
most of the commercial simulators available tracked each other in netlist
|
||||
language, this should not be an impossible task. The most important goal
|
||||
here is to provide a reliable support for model libraries coming from
|
||||
foundries.
|
||||
foundries. Some compatibility switches are available.
|
||||
|
||||
+ Compact models: The interest in using ngspice is intimately connected
|
||||
to the available models. To provide the latest models available for
|
||||
|
|
@ -256,7 +256,7 @@
|
|||
|
||||
The latest version released is:
|
||||
|
||||
ngspice-41 (released on Aug 13 2023)
|
||||
ngspice-43 (released on July 14 2024)
|
||||
|
||||
|
||||
2.2. What are the latest features in the current release?
|
||||
|
|
@ -308,8 +308,8 @@
|
|||
|
||||
3.1. What systems are supported?
|
||||
|
||||
Ngspice is written in C, and uses some GNU extensions. You may use
|
||||
a GNU C compiler and a LINUX environment to compile it. Ngspice can
|
||||
Ngspice is written in C, C++, and uses some GNU extensions. You may use
|
||||
a GNU C/C++ compiler and a LINUX environment to compile it. Ngspice can
|
||||
be compiled under Windows using the mingw or cygwin environment as
|
||||
well as MS Visual Studio. It will readily compile on macOS.
|
||||
FreeBSD or Solaris will do, but are not officially supported.
|
||||
|
|
@ -356,7 +356,7 @@
|
|||
|
||||
4.4. Disclaimer and Copyright
|
||||
|
||||
Copyright: Holger Vogt, 2023
|
||||
Copyright: Holger Vogt, 2024
|
||||
License: Creative Commons Attribution Share-Alike (CC-BY-SA) v4.0.
|
||||
This document is provided as is. The information in it is not
|
||||
warranted to be correct: you use it at your own risk.
|
||||
|
|
|
|||
81
INSTALL
81
INSTALL
|
|
@ -56,7 +56,7 @@ This file describes the procedures to install ngspice from sources.
|
|||
library and ngspice as a tcl/tk library.
|
||||
|
||||
Compilation to 64 bit is recommended and available per default in
|
||||
the ./compile_linux.sh compule script. 32 bit might be possible,
|
||||
the ./compile_linux_new.sh compile script. 32 bit might be possible,
|
||||
but is not tested.
|
||||
|
||||
The following software must be installed in your system to compile
|
||||
|
|
@ -64,7 +64,8 @@ This file describes the procedures to install ngspice from sources.
|
|||
output):
|
||||
bison, flex, X11 headers and libs, Xaw, Xmu, Xext, Xft, FontConfig,
|
||||
Xrender, freetype headers and readline.
|
||||
Typically one needs the headers (e.g. libX11-devel) and the libs (e.g. libX11-6).
|
||||
Typically one needs the headers (e.g. libX11-devel) and the libs (e.g. libX11-6)
|
||||
of the packages mentioned above.
|
||||
|
||||
ngspice as a shared library (no graphics and no command-line interfaces)
|
||||
will need bison and flex only.
|
||||
|
|
@ -73,11 +74,11 @@ This file describes the procedures to install ngspice from sources.
|
|||
internal fft algorithms.
|
||||
|
||||
If you want to compile the source from the git repository, or if you want to
|
||||
use the compile script ./compile_linux.sh, you will need additional software:
|
||||
use the compile script ./compile_linux_new.sh, you will need additional software:
|
||||
autoconf, automake, libtool.
|
||||
|
||||
The following software may be needed when enabling additional features:
|
||||
editline, tcl/tk.
|
||||
editline (as a replacement for readline), tcl/tk (when compiling tclspice).
|
||||
|
||||
Please have a look at the current ngspice manual, downloadable at
|
||||
http://ngspice.sourceforge.net/docs.html, which gives you much more
|
||||
|
|
@ -86,20 +87,20 @@ This file describes the procedures to install ngspice from sources.
|
|||
For compiling ngspice as a shared library, see section 1.4.
|
||||
|
||||
|
||||
1.2 Install from tarball (e.g. ngspice-41.tar.gz)
|
||||
1.2 Install from tarball (e.g. ngspice-43.tar.gz)
|
||||
|
||||
This covers installation from a release distribution (for example
|
||||
ngspice-41.tar.gz, the so called tar ball).
|
||||
ngspice-43.tar.gz, the so called tar ball).
|
||||
|
||||
After downloading the tar ball to a local directory, unpack it by command:
|
||||
|
||||
$ tar -zxvf ngspice-41.tar.gz
|
||||
$ tar -zxvf ngspice-43.tar.gz
|
||||
|
||||
Now change directories in to the top-level source directory (where this
|
||||
INSTALL file can be found).
|
||||
|
||||
The most comfortable way to compile ngspice is running the compile script
|
||||
compile_linux.sh within the terminal window by ./compile_linux.sh. The
|
||||
compile_linux.sh within the terminal window by ./compile_linux_new.sh. The
|
||||
script has to be declared as 'executable', and admin
|
||||
rights are required to allow the installation of ngspice.
|
||||
|
||||
|
|
@ -110,31 +111,27 @@ This file describes the procedures to install ngspice from sources.
|
|||
|
||||
$ mkdir release
|
||||
$ cd release
|
||||
$ ../configure --with-x --with-readline=yes --disable-debug
|
||||
$ ../configure --with-x
|
||||
$ make
|
||||
$ sudo make install
|
||||
|
||||
The default install directory for executables is /usr/local/bin, the XSPICE
|
||||
code models will be installed in /usr/local/lib/ngspice. Some distros use lib64
|
||||
instead.
|
||||
|
||||
A simple ../configure might be sufficient for a basic ngspice, but the preferred
|
||||
arguments to ../configure are
|
||||
--with-x --with-readline=yes and --disable-debug
|
||||
providing you with a comfortably working ngspice.
|
||||
|
||||
See the section 1.5 titled 'Advanced Install' for instructions about additional arguments
|
||||
that can be passed to ../configure to customise the build and installation.
|
||||
instead. The following options are now included automatically: readline, openmp,
|
||||
osdi, xspice. Only CIDER has to be selected as an extra option.
|
||||
|
||||
A fully featured ngspice on LINUX may be obtained with the following commands:
|
||||
$ mkdir release
|
||||
$ cd release
|
||||
$ ../configure --with-x --enable-xspice --disable-debug --enable-cider --with-readline=yes --enable-predictor --enable-osdi --enable-openmp
|
||||
$ ../configure --with-x --enable-cider --enable-predictor
|
||||
$ make 2>&1 | tee make.log
|
||||
$ sudo make install
|
||||
|
||||
To remove the executables and libraries from the install directory, you may call
|
||||
$ sudo make uninstall
|
||||
|
||||
To disable one of the already inlcuded options, you may call --with-readline=no, or
|
||||
--disable-openmp, --disable-osdi, --disable-xspice
|
||||
|
||||
|
||||
1.3 Install from the git repository
|
||||
|
|
@ -155,7 +152,7 @@ This file describes the procedures to install ngspice from sources.
|
|||
directory, so to e.g. maintain separate debug and release versions.
|
||||
|
||||
The most comfortable way to compile ngspice is running the compile script
|
||||
compile_linux.sh within the terminal window by ./compile_linux.sh. Admin
|
||||
compile_linux_new.sh within the terminal window by ./compile_linux_new.sh. Admin
|
||||
rights are required to allow the installation included in the script.
|
||||
|
||||
If you want to copile ngspice manually, you may run
|
||||
|
|
@ -163,7 +160,7 @@ This file describes the procedures to install ngspice from sources.
|
|||
$ ./autogen.sh
|
||||
$ mkdir debug
|
||||
$ cd debug
|
||||
$ ../configure --with-x --with-readline=yes
|
||||
$ ../configure --with-x
|
||||
$ make
|
||||
$ sudo make install
|
||||
|
||||
|
|
@ -178,7 +175,7 @@ This file describes the procedures to install ngspice from sources.
|
|||
$ ./autogen.sh
|
||||
$ mkdir release
|
||||
$ cd release
|
||||
$ ../configure --with-x --enable-xspice --disable-debug --enable-cider --with-readline=yes --enable-openmp --enable-predictor --enable-osdi
|
||||
$ ../configure --with-x --enable-cider --enable-predictor
|
||||
$ make 2>&1 | tee make.log
|
||||
$ sudo make install
|
||||
|
||||
|
|
@ -189,7 +186,7 @@ This file describes the procedures to install ngspice from sources.
|
|||
1.4 ngspice as a shared library
|
||||
|
||||
The relevant configure options for the ngspice shared library are:
|
||||
$ --with-ngshared --enable-xspice --disable-debug --enable-cider --enable-osdi --enable-openmp
|
||||
$ --with-ngshared --enable-cider
|
||||
|
||||
Typically the two aliases libngspice.so, libngspice.so.0 and the compiled
|
||||
library libngspice.so.0.0.1 are made. The install locations depend on
|
||||
|
|
@ -217,15 +214,7 @@ This file describes the procedures to install ngspice from sources.
|
|||
|
||||
1.5.1 Most useful options:
|
||||
|
||||
--enable-osdi
|
||||
Add the OSDI interface to ngspice. This interface allow to dynamically
|
||||
load compiled Veriloag-A compact models. Compiling is done with
|
||||
OpenVAF. Thus for the first time ngspice has access to modern
|
||||
device models like BSOMBULK or BSIM_CMG.
|
||||
|
||||
--enable-cider
|
||||
Cider is a mixed-level simulator that couples Spice3 and DSIM
|
||||
to simulate devices from their technological parameters.
|
||||
(the following are already included)
|
||||
|
||||
--enable-xspice
|
||||
Enable XSpice enhancements,
|
||||
|
|
@ -240,11 +229,18 @@ This file describes the procedures to install ngspice from sources.
|
|||
Parallelization is done by OpenMP, for MOS models in BSIM3.3.0
|
||||
BSIM4.6.0 and and BSOI4 only. See the ngspice manual for details.
|
||||
|
||||
--disable-debug
|
||||
This option will remove the '-g' option passed to the compiler
|
||||
and add -O2 optimization (instead of default O0).
|
||||
This speeds up simulating significantly, and is recommended for
|
||||
normal use.
|
||||
--enable-osdi
|
||||
Add the OSDI interface to ngspice. This interface allow to dynamically
|
||||
load compiled Veriloag-A compact models. Compiling is done with
|
||||
OpenVAF. Thus for the first time ngspice has access to modern
|
||||
device models like BSOMBULK or BSIM_CMG.
|
||||
|
||||
|
||||
(the following have to be selected to become available)
|
||||
|
||||
--enable-cider
|
||||
Cider is a mixed-level simulator that couples Spice3 and DSIM
|
||||
to simulate devices from their technological parameters.
|
||||
|
||||
--enable-oldapps
|
||||
The old apllications ngsconvert ngproc2mod ngmultidec and ngmakeidx
|
||||
|
|
@ -254,11 +250,11 @@ This file describes the procedures to install ngspice from sources.
|
|||
Disable using fftw fast fourier transform library. Use internal
|
||||
fft instead. Default is 'yes'.
|
||||
|
||||
|
||||
--with-editline=yes
|
||||
Enables the use of the BSD editline library (libedit) instead
|
||||
of readline.
|
||||
See https://www.thrysoee.dk/editline/
|
||||
(requires --with-readline=no)
|
||||
|
||||
--enable-shortcheck
|
||||
Enables a 'make check' with strongly reduced runtime. Besides some
|
||||
|
|
@ -494,7 +490,7 @@ This file describes the procedures to install ngspice from sources.
|
|||
automake, libtool, FLEX and BISON, all available with pacman in MSYSS2).
|
||||
Some links are given below which describe the procedures.
|
||||
|
||||
Installing from the tarball, e.g. ngspice-36.tar.gz, is simple: After
|
||||
Installing from the tarball, e.g. ngspice-43.tar.gz, is simple: After
|
||||
expanding, you may just run ./compile_min.sh from the ngspice directory.
|
||||
|
||||
The default installation location of ngspice is the Windows path
|
||||
|
|
@ -517,16 +513,11 @@ This file describes the procedures to install ngspice from sources.
|
|||
$ make
|
||||
$ make install
|
||||
|
||||
The most useful options are:
|
||||
--enable-xspice
|
||||
--enable-cider
|
||||
--disable-debug (-O2 optimization, no debug information)
|
||||
|
||||
A fully featured ngspice on Windows may be obtained with the following commands:
|
||||
$ ./autogen.sh
|
||||
$ mkdir release
|
||||
$ cd release
|
||||
$ ../configure --with-wingui --enable-cider --disable-debug --enable-openmp --enable-xspice --enable-osdi
|
||||
$ ../configure --with-wingui --enable-cider --disable-debug
|
||||
$ make install
|
||||
|
||||
However, to compile code extracted from the git repository the procedure is
|
||||
|
|
|
|||
|
|
@ -8,11 +8,12 @@ EXTRA_DIST = FAQ autogen.sh Stuarts_Poly_Notes \
|
|||
DEVICES INTERNALS NEWS README README.tcl README.optran\
|
||||
README.shared-xspice README.vdmos README_OSDI.md\
|
||||
README_OSDI_howto README.cpl-gc README.utf8 \
|
||||
examples m4 visualc \
|
||||
examples m4 visualc Dockerfile \
|
||||
cross-compile.sh cross-compile-shared.sh \
|
||||
compile_min.sh compile_linux.sh compile_min_shared.sh \
|
||||
compile_linux_shared.sh compile_cyg_make_short_check_64.sh \
|
||||
compile_macos_clang.sh compile_macos_gcc.sh \
|
||||
compile_macos_clang.sh compile_macos_gcc.sh compile_macos_shared.sh \
|
||||
compile_macos_clang_M2.sh compile_macos_clang_M2_shared.sh \
|
||||
compile_linux_dist.sh ngspice.pc.in .gitignore
|
||||
|
||||
MAINTAINERCLEANFILES = Makefile.in aclocal.m4 ar-lib compile config.guess \
|
||||
|
|
|
|||
50
NEWS
50
NEWS
|
|
@ -1,3 +1,45 @@
|
|||
Ngspice-43, July 14th, 2024
|
||||
============
|
||||
- New features:
|
||||
+ Compile on Apple M2
|
||||
+ Update to VBIC model: Enable self-heating in AC sim, enable nqs.
|
||||
+ Enable single terminal n devices (Verilog-A modules)
|
||||
+ Add path or filepath (without file name) to variable sourcepath,
|
||||
when calling command 'source'
|
||||
+ B source pwl, enable monotonic negative growth of abscissa values.
|
||||
+ Enable coupling of more than 2 inductots in a single line:
|
||||
K1 L1 L2 L3 L4 L5 0.99
|
||||
+ Enable reading library search paths from env. variables like
|
||||
.lib "$ENVS1/$ENVS2/libraries/sky130_fd_pr/latest/models/sky130.lib.spice" tt
|
||||
+ Add '.save nosub' to suppress storing the node vectors from inside
|
||||
of subcircuits.
|
||||
+ Transform nested braces {{}} into {()} also in .param statements
|
||||
+ Save path to .include file, add it to the search paths
|
||||
for loading the next .include file.
|
||||
+ In ./configure, the following options are now standard:
|
||||
non-debug, osdi, xspice, readline, klu, openmp
|
||||
+ in case of netlist errors, try identifying the file and line number
|
||||
of its origin.
|
||||
+ Add diode model parameters, Level 3, for diode breakdown voltage
|
||||
as used in sky130 PDK
|
||||
+ New environmental variable NGSPICE_OSDI_DIR may contain
|
||||
a path for *.osdi files (compiled Verilog-A models)
|
||||
+ optran 0 0 0 0 0 uic may be used to load initial conditions (.ic=xxx
|
||||
statements) without starting an op iteration.
|
||||
+ Add variable ps_scan_gates_optimize (default 1). If < 1, then turn off
|
||||
the optimizations in scan_gates.
|
||||
+ new exported function ngSpice_nospinit() to set variable no_spinit
|
||||
+ Update to JFET model (add emission coefficient)
|
||||
+ MOS models 1...3: updated noise code
|
||||
+ Update to fft window functions, scaling etc.
|
||||
+ Add transformer model with params on the .subckt line
|
||||
+ timing .model statements at the global level for subckts with U* instances
|
||||
+ variable 'rsdiode' sets RS of a diode, if not given in the .model line.
|
||||
+ Update the AM voltage/current sources: enable amplitude
|
||||
modulation, carrier suppression.
|
||||
+ Remove some ADMS remnants.
|
||||
|
||||
|
||||
Ngspice-42, Dec 24th, 2023
|
||||
============
|
||||
- New features:
|
||||
|
|
@ -27,7 +69,6 @@ Ngspice-42, Dec 24th, 2023
|
|||
+ Add scripts for running the paranoia tests in parallel on Linux with valgrind.
|
||||
|
||||
|
||||
|
||||
Ngspice-41, Aug 13th, 2023
|
||||
============
|
||||
- New features:
|
||||
|
|
@ -60,7 +101,8 @@ Ngspice-41, Aug 13th, 2023
|
|||
+ Several crash bugs (double delete, access NULL pointer etc) removed
|
||||
which have occurred mostly due to incomplete or faulty inputs.
|
||||
+ Memory leaks for CIDER removed
|
||||
|
||||
|
||||
|
||||
Ngspice-40, Mar 31st, 2023
|
||||
============
|
||||
- New features:
|
||||
|
|
@ -153,7 +195,7 @@ Ngspice-38, Oct 30th, 2022
|
|||
Ngspice-37, May 22nd, 2022
|
||||
============
|
||||
- New features:
|
||||
+ Reduce XSPICE memory consumption dramatically
|
||||
+ Reduce XSPICE memory consumption dramatically
|
||||
(> factor of 10).
|
||||
+ Add source stepping to B source
|
||||
+ Add 'esave' command to save only specific event nodes.
|
||||
|
|
@ -320,7 +362,7 @@ Ngspice-32, Apr 25th, 2020
|
|||
- New features:
|
||||
+ Add resource info on memory used and available for macOS
|
||||
+ redesign of memory monitoring
|
||||
+ Replace B source pwl by XSPICE PWL Controlled Source that has smooth rounded and
|
||||
+ Replace B source pwl by XSPICE PWL Controlled Source that has smooth rounded and
|
||||
stepless differentiable corners.
|
||||
+ Get a variable directly from an input file with i/o redirection
|
||||
+ Make 64 bit compilation the standard
|
||||
|
|
|
|||
11
README
11
README
|
|
@ -5,16 +5,17 @@ Ngspice is a mixed-level/mixed-signal circuit simulator. Its code
|
|||
is based on three open source software packages: Spice3f5, Cider1b1
|
||||
and Xspice.
|
||||
|
||||
Spice3 does not need any introduction, is the most popular circuit
|
||||
simulator. In over 30 years of its life Spice3 has become a de-facto
|
||||
standard for simulating circuits.
|
||||
Spice3 does not need any introduction, it is the ancestor of many
|
||||
commercial or open source circuit simulators. In over 30 years
|
||||
since its existence it has set several de-facto standards for
|
||||
simulating circuits.
|
||||
|
||||
Cider couples Spice3f5 circuit level simulator to a device simulator
|
||||
Cider couples the Spice3 circuit level simulator to a device simulator
|
||||
to provide greater simulation accuracy of critical devices. So you may
|
||||
create device models for diodes, bipolar, JFet and MOSFETs derived
|
||||
from their cross-sectional structures and materials.
|
||||
|
||||
Xspice is an extension to Spice3C1 that provides code modelling support
|
||||
Xspice is an extension to Spice3 that provides code modelling support
|
||||
and simulation of digital components through an embedded event driven
|
||||
algorithm.
|
||||
|
||||
|
|
|
|||
|
|
@ -1,8 +1,8 @@
|
|||
#!/bin/bash
|
||||
# ngspice build script for CYGWIN console (X11), release version, 64 bit
|
||||
# compile_cyg_make_check.sh
|
||||
# compile_cyg_make_short_check.sh
|
||||
|
||||
# short version, cd into release64_cyg, then call make, make install, make check
|
||||
# short version, skipping several of the device checks
|
||||
|
||||
#Procedure:
|
||||
# Install CYGWIN, plus bison, flex, auto tools, perl, libiconv, libintl
|
||||
|
|
@ -11,8 +11,8 @@
|
|||
# './compile_cyg_auto.sh'
|
||||
|
||||
# Options:
|
||||
# CIDER, XSPICE, OSDI, KLU, and OpenMP may be selected at will.
|
||||
# --disable-debug will give O2 optimization (versus O0 for debug) and removes all debugging info.
|
||||
# CIDER may be selected at will.
|
||||
# XSPICE, OSDI, KLU, and OpenMP may be deselected if not require
|
||||
# --enable-oldapps will make ngnutmeg ngsconvert ngproc2mod ngmultidec ngmakeidx in addition to ngspice
|
||||
# --enable-shortcheck will provide a fast 'make check' by checking only BSIM3 and BSIM4
|
||||
|
||||
|
|
@ -29,8 +29,7 @@ echo
|
|||
cd release64_cyg
|
||||
if [ $? -ne 0 ]; then echo "cd release64_cyg failed"; exit 1 ; fi
|
||||
echo
|
||||
../configure --with-x=yes --with-readline=yes --disable-debug --enable-cider --enable-openmp --enable-xspice --enable-osdi --enable-klu --enable-predictor --enable-shortcheck CFLAGS="-O2 -m64" LDFLAGS="-s -m64"
|
||||
#../configure --with-x=no --with-readline=yes --disable-debug --enable-xspice --enable-cider --enable-openmp
|
||||
../configure --with-x=yes --enable-cider --enable-shortcheck CFLAGS="-O2 -m64" LDFLAGS="-s -m64"
|
||||
|
||||
if [ $? -ne 0 ]; then echo "../configure failed"; exit 1 ; fi
|
||||
|
||||
|
|
|
|||
|
|
@ -12,17 +12,10 @@
|
|||
# CentOS users may need to add -std=c99 to the CFLAGS in the ../configure
|
||||
# statement.
|
||||
# Options:
|
||||
# --enable-osdi will enable the OSDI interface, which, in conjuction with the
|
||||
# external OpenVAF Verilig-A compiler, will allow access to advanced compact
|
||||
# device models writen in Verilog-A.
|
||||
# Please see the ngspice manual, chapt. 13, for more info on using OSDI/OpenVAF.
|
||||
# --enable-klu will add the new matrix solver in addition to Sparse 1.3.
|
||||
# CIDER, XSPICE, KLU, and OpenMP may be selected at will.
|
||||
# --disable-debug will give O2 optimization (versus O0 for debug) and removes all debugging info.
|
||||
# --enable-cider will enable the CIDER process simulator to construct devices
|
||||
# in a semiconductor.
|
||||
# XSPICE, KLU, OSDI, and OpenMP may be deselected if not required.
|
||||
|
||||
# ngspice as shared library:
|
||||
# Replace --with-x by --with-ngshared in line ../configure ... .
|
||||
# Add (optionally) --enable-relpath to avoid absolute paths when searching for code models.
|
||||
# It might be necessary to uncomment and run ./autogen.sh .
|
||||
|
||||
SECONDS=0
|
||||
|
|
@ -49,13 +42,13 @@ if test "$1" = "d"; then
|
|||
if [ $? -ne 0 ]; then echo "cd debug failed"; exit 1 ; fi
|
||||
echo "configuring for 64 bit debug"
|
||||
echo
|
||||
../configure --with-x --enable-xspice --enable-cider --enable-predictor --enable-osdi --enable-klu --with-readline=yes --enable-openmp --prefix="/usr/local" --libdir="/usr/local/lib" CFLAGS="-g -m64 -O0 -Wall -Wno-unused-but-set-variable" LDFLAGS="-m64 -g"
|
||||
../configure --with-x --enable-cider --prefix="/usr/local" --libdir="/usr/local/lib" CFLAGS="-g -m64 -O0 -Wall -Wno-unused-but-set-variable" LDFLAGS="-m64 -g"
|
||||
else
|
||||
cd release
|
||||
if [ $? -ne 0 ]; then echo "cd release failed"; exit 1 ; fi
|
||||
echo "configuring for 64 bit release"
|
||||
echo
|
||||
../configure --with-x --enable-xspice --enable-cider --enable-predictor --enable-osdi --enable-klu --with-readline=yes --enable-openmp --disable-debug --prefix="/usr/local" --libdir="/usr/local/lib" CFLAGS="-m64 -O2" LDFLAGS="-m64 -s"
|
||||
../configure --with-x --enable-cider --prefix="/usr/local" --libdir="/usr/local/lib" CFLAGS="-m64 -O2" LDFLAGS="-m64 -s"
|
||||
fi
|
||||
if [ $? -ne 0 ]; then echo "../configure failed"; exit 1 ; fi
|
||||
|
||||
|
|
|
|||
|
|
@ -27,7 +27,7 @@ if [ $? -ne 0 ]; then echo "cd release failed"; exit 1 ; fi
|
|||
echo "configuring for 64 bit release"
|
||||
echo
|
||||
|
||||
../configure --with-x --enable-xspice --enable-cider --with-readline=yes --enable-openmp --enable-osdi --disable-debug CFLAGS="-m64 -O2" LDFLAGS="-m64 -s"
|
||||
../configure --with-x --enable-cider CFLAGS="-m64 -O2" LDFLAGS="-m64 -s"
|
||||
|
||||
if [ $? -ne 0 ]; then echo "../configure failed"; exit 1 ; fi
|
||||
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
#!/bin/bash
|
||||
# ngspice build script for Linux, release or debug version, 64 bit
|
||||
# ngspice build script for Linux, to build ngspice as a shared library, release or
|
||||
# debug version, 64 bit
|
||||
# compile_linux_shared.sh <d>
|
||||
|
||||
# Procedure:
|
||||
|
|
@ -8,11 +9,9 @@
|
|||
# Declare 'compile_linux_shared.sh' as being executable and start compiling with
|
||||
# './compile_linux_shared.sh' or './compile_linux_shared.sh d' from the ngspice directory.
|
||||
# Options:
|
||||
# --enable-osdi will add the osdi interface which allows to dynamically load compiled Verilog-A
|
||||
# compact models. Compiling the VA code of the models is done by the OpenVAF compiler.
|
||||
# Please see the ngspice manual, chapt. 13, for more info on OSDI/OpenVAF.
|
||||
# CIDER, XSPICE, KLU, and OpenMP may be selected at will.
|
||||
# --disable-debug will give O2 optimization (versus O0 for debug) and removes all debugging info.
|
||||
# --enable-cider will enable the CIDER process simulator to construct devices
|
||||
# in a semiconductor.
|
||||
# XSPICE, KLU, OSDI, and OpenMP may be deselected if not required.
|
||||
|
||||
# Add (optionally) --enable-relpath to avoid absolute paths when searching for code models.
|
||||
# It might be necessary to uncomment and run ./autogen.sh especially if sources have been
|
||||
|
|
@ -44,7 +43,7 @@ if test "$1" = "d"; then
|
|||
echo
|
||||
# The --prefix (and perhaps --libdir) may be used to determine a different install location
|
||||
# (depending on the Linux distribution, and on the calling programs search path).
|
||||
../configure --with-ngshared --enable-xspice --enable-cider --enable-openmp --enable-osdi --enable-klu --prefix=/usr CFLAGS="-g -m64 -O0 -Wall" LDFLAGS="-m64 -g"
|
||||
../configure --with-ngshared --enable-cider --prefix=/usr CFLAGS="-g -m64 -O0 -Wall" LDFLAGS="-m64 -g"
|
||||
else
|
||||
cd releasesh
|
||||
if [ $? -ne 0 ]; then echo "cd releasesh failed"; exit 1 ; fi
|
||||
|
|
@ -52,7 +51,7 @@ else
|
|||
echo
|
||||
# The --prefix (and perhaps --libdir) may be used to determine a different install location
|
||||
# (depending on the Linux distribution, and on the calling programs search path).
|
||||
../configure --with-ngshared --enable-xspice --enable-cider --enable-openmp --enable-osdi --enable-klu --disable-debug --prefix=/usr CFLAGS="-m64 -O2" LDFLAGS="-m64 -s"
|
||||
../configure --with-ngshared --enable-cider --prefix=/usr CFLAGS="-m64 -O2" LDFLAGS="-m64 -s"
|
||||
fi
|
||||
if [ $? -ne 0 ]; then echo "../configure failed"; exit 1 ; fi
|
||||
|
||||
|
|
|
|||
|
|
@ -1,18 +1,17 @@
|
|||
#!/bin/bash
|
||||
# ngspice build script for macOS, release or debug version, 64 bit
|
||||
# compile_macos.sh <d>
|
||||
# compile_macos_clang.sh <d>
|
||||
# tested with macOS BigSur 11.7.9, MacBook Air i5
|
||||
# OpenMP is not available!
|
||||
|
||||
# Procedure:
|
||||
# Install gcc, bison, flex, libtool, autoconf, automake,
|
||||
# libx11 and libx11-dev (headers), libXaw and libXaw-dev, libreadline and dev
|
||||
# Declare 'compile_linux.sh' executable and start compiling with
|
||||
# './compile_macos.sh' or './compile_macos.sh d' from the ngspice directory.
|
||||
# XCODE and commandline tools
|
||||
# Declare 'compile_macos_clang.sh' executable and start compiling with
|
||||
# './compile_macos_clang.sh' or './compile_macos_clang.sh d' from the ngspice directory.
|
||||
# Options:
|
||||
# --adms and --enable-adms will install extra HICUM, EKV and MEXTRAM models via the
|
||||
# adms interface. You need to download and install the *.va files via ng-adms-va.tgz
|
||||
# Please see the ngspice manual, chapt. 13, for more info on adms.
|
||||
# CIDER, XSPICE, and OpenMP may be selected at will.
|
||||
# --disable-debug will give O2 optimization (versus O0 for debug) and removes all debugging info.
|
||||
# KLU, OSDI, and XSPICE may be deselected at will.
|
||||
|
||||
# ngspice as shared library:
|
||||
# Replace --with-x by --with-ngshared in line ../configure ... .
|
||||
|
|
@ -37,29 +36,21 @@ fi
|
|||
./autogen.sh
|
||||
if [ $? -ne 0 ]; then echo "./autogen.sh failed"; exit 1 ; fi
|
||||
|
||||
# Alternatively, if compiling sources from git, and want to add adms created devices,
|
||||
# you may need to uncomment the following two lines (and don't forget to add adms option
|
||||
# to the ../configure statement):
|
||||
#./autogen.sh --adms
|
||||
#if [ $? -ne 0 ]; then echo "./autogen.sh failed"; exit 1 ; fi
|
||||
|
||||
echo
|
||||
if test "$1" = "d"; then
|
||||
cd debug
|
||||
if [ $? -ne 0 ]; then echo "cd debug failed"; exit 1 ; fi
|
||||
echo "configuring for 64 bit debug"
|
||||
echo
|
||||
# You may add --enable-adms to the following command for adding adms generated devices
|
||||
# Builtin readline is not compatible (Big Sur), readline via Homebrew required (in /usr/local/opt)
|
||||
# Standard clang does not support OpenMP
|
||||
../configure --with-x --enable-xspice --enable-cider --enable-predictor --enable-osdi --enable-klu --with-readline=/usr/local/opt/readline CFLAGS="-m64 -O0 -g -Wall -I/opt/X11/include/freetype2 -I/usr/local/opt/readline/include" LDFLAGS="-m64 -g -L/usr/local/opt/readline/lib -L/opt/X11/lib"
|
||||
../configure --with-x --enable-cider --disable-openmp --with-readline=/usr/local/opt/readline CFLAGS="-m64 -O0 -g -Wall -I/opt/X11/include/freetype2 -I/usr/local/opt/readline/include" LDFLAGS="-m64 -g -L/usr/local/opt/readline/lib -L/opt/X11/lib"
|
||||
else
|
||||
cd release
|
||||
if [ $? -ne 0 ]; then echo "cd release failed"; exit 1 ; fi
|
||||
echo "configuring for 64 bit release"
|
||||
echo
|
||||
# You may add --enable-adms to the following command for adding adms generated devices
|
||||
../configure --with-x --enable-xspice --enable-cider --enable-predictor --enable-osdi --enable-klu --with-readline=/usr/local/opt/readline --disable-debug CFLAGS="-m64 -O2 -I/opt/X11/include/freetype2 -I/usr/local/opt/readline/include -I/usr/local/opt/ncurses/include" LDFLAGS="-m64 -L/usr/local/opt/readline/lib -L/usr/local/opt/ncurses/lib -L/opt/X11/lib"
|
||||
../configure --with-x --enable-cider --disable-openmp --with-readline=/usr/local/opt/readline CFLAGS="-m64 -O2 -I/opt/X11/include/freetype2 -I/usr/local/opt/readline/include -I/usr/local/opt/ncurses/include" LDFLAGS="-m64 -L/usr/local/opt/readline/lib -L/usr/local/opt/ncurses/lib -L/opt/X11/lib"
|
||||
fi
|
||||
if [ $? -ne 0 ]; then echo "../configure failed"; exit 1 ; fi
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,77 @@
|
|||
#!/bin/bash
|
||||
# ngspice build script for macOS, release or debug version, 64 bit
|
||||
# compile_macos_clang_M2.sh <d>
|
||||
|
||||
# Procedure:
|
||||
# Install gcc, bison, flex, libtool, autoconf, automake,
|
||||
# libx11 and libx11-dev (headers), libXaw and libXaw-dev, libreadline and dev
|
||||
# XCODE, commandline tools
|
||||
# Declare 'compile_macos_clang_M2.sh' executable and start compiling with
|
||||
# './compile_macoss_clang_M2.sh' or './compile_macoss_clang_M2.sh d' from the ngspice directory.
|
||||
# Options:
|
||||
# CIDER may be selected at will.
|
||||
# OpenMP has been installed from https://mac.r-project.org/openmp/
|
||||
|
||||
# ngspice as shared library:
|
||||
# Replace --with-x by --with-ngshared in line ../configure ... .
|
||||
# Add (optionally) --enable-relpath to avoid absolute paths when searching for code models.
|
||||
# It might be necessary to uncomment and run ./autogen.sh .
|
||||
|
||||
SECONDS=0
|
||||
|
||||
if test "$1" = "d"; then
|
||||
if [ ! -d "debug" ]; then
|
||||
mkdir debug
|
||||
if [ $? -ne 0 ]; then echo "mkdir debug failed"; exit 1 ; fi
|
||||
fi
|
||||
else
|
||||
if [ ! -d "release" ]; then
|
||||
mkdir release
|
||||
if [ $? -ne 0 ]; then echo "mkdir release failed"; exit 1 ; fi
|
||||
fi
|
||||
fi
|
||||
|
||||
# If compiling sources from git, you may need to uncomment the following two lines:
|
||||
./autogen.sh
|
||||
if [ $? -ne 0 ]; then echo "./autogen.sh failed"; exit 1 ; fi
|
||||
|
||||
echo
|
||||
if test "$1" = "d"; then
|
||||
cd debug
|
||||
if [ $? -ne 0 ]; then echo "cd debug failed"; exit 1 ; fi
|
||||
echo "configuring for 64 bit debug"
|
||||
echo
|
||||
# Builtin readline is not compatible (Big Sur), readline via Homebrew required (in /opt/homebrew/opt)
|
||||
# Standard clang does not support OpenMP, uses https://mac.r-project.org/openmp/
|
||||
|
||||
../configure --with-x --enable-cider --with-readline=/opt/homebrew/opt/readline --enable-debug CFLAGS="-m64 -O0 -g -Wall -I/opt/X11/include/freetype2 -I/opt/homebrew/opt/readline/include" LDFLAGS="-m64 -g -L/opt/homebrew/opt/readline/lib -L/opt/X11/lib -L/usr/local/lib -lomp"
|
||||
else
|
||||
cd release
|
||||
if [ $? -ne 0 ]; then echo "cd release failed"; exit 1 ; fi
|
||||
echo "configuring for 64 bit release"
|
||||
echo
|
||||
../configure --with-x --enable-cider --with-readline=/opt/homebrew/opt/readline CFLAGS="-m64 -O2 -I/opt/X11/include/freetype2 -I/opt/homebrew/opt/readline/include -I/opt/homebrew/opt/ncurses/include" LDFLAGS="-m64 -L/opt/homebrew/opt/readline/lib -L/opt/homebrew/opt/ncurses/lib -L/opt/X11/lib -L/usr/local/lib -lomp"
|
||||
fi
|
||||
if [ $? -ne 0 ]; then echo "../configure failed"; exit 1 ; fi
|
||||
|
||||
echo
|
||||
# make clean is required for properly making the code models
|
||||
echo "cleaning (see make_clean.log)"
|
||||
make clean 2>&1 -j8 | tee make_clean.log
|
||||
exitcode=${PIPESTATUS[0]}
|
||||
if [ $exitcode -ne 0 ]; then echo "make clean failed"; exit 1 ; fi
|
||||
echo "compiling (see make.log)"
|
||||
make 2>&1 -j8 | tee make.log
|
||||
exitcode=${PIPESTATUS[0]}
|
||||
if [ $exitcode -ne 0 ]; then echo "make failed"; exit 1 ; fi
|
||||
# Install to /usr/local
|
||||
echo "installing (see make_install.log)"
|
||||
make install 2>&1 | tee make_install.log
|
||||
exitcode=${PIPESTATUS[0]}
|
||||
if [ $exitcode -ne 0 ]; then echo "make install failed"; exit 1 ; fi
|
||||
|
||||
ELAPSED="Elapsed compile time: $(($SECONDS / 3600))hrs $((($SECONDS / 60) % 60))min $(($SECONDS % 60))sec"
|
||||
echo
|
||||
echo $ELAPSED
|
||||
echo "success"
|
||||
exit 0
|
||||
|
|
@ -0,0 +1,76 @@
|
|||
#!/bin/bash
|
||||
# ngspice build script for macOS, release or debug version, 64 bit
|
||||
# compile_macos_clang_M2.sh <d>
|
||||
# tested with Mac mini, Apple M2
|
||||
|
||||
# Procedure:
|
||||
# Install gcc, bison, flex, libtool, autoconf, automake,
|
||||
# libx11 and libx11-dev (headers), libXaw and libXaw-dev, libreadline and dev
|
||||
# XCODE, commandline tools
|
||||
# Declare 'compile_macos_clang_M2.sh' executable and start compiling with
|
||||
# './compile_macoss_clang_M2.sh' or './compile_macoss_clang_M2.sh d' from the ngspice directory.
|
||||
# Options:
|
||||
# CIDER may be selected at will.
|
||||
# OpenMP has been installed from https://mac.r-project.org/openmp/
|
||||
|
||||
# ngspice as shared library:
|
||||
# Replace --with-x by --with-ngshared in line ../configure ... .
|
||||
# Add (optionally) --enable-relpath to avoid absolute paths when searching for code models.
|
||||
# It might be necessary to uncomment and run ./autogen.sh .
|
||||
|
||||
SECONDS=0
|
||||
|
||||
if test "$1" = "d"; then
|
||||
if [ ! -d "debug" ]; then
|
||||
mkdir debug
|
||||
if [ $? -ne 0 ]; then echo "mkdir debug failed"; exit 1 ; fi
|
||||
fi
|
||||
else
|
||||
if [ ! -d "release" ]; then
|
||||
mkdir release
|
||||
if [ $? -ne 0 ]; then echo "mkdir release failed"; exit 1 ; fi
|
||||
fi
|
||||
fi
|
||||
|
||||
# If compiling sources from git, you may need to uncomment the following two lines:
|
||||
./autogen.sh
|
||||
if [ $? -ne 0 ]; then echo "./autogen.sh failed"; exit 1 ; fi
|
||||
|
||||
echo
|
||||
if test "$1" = "d"; then
|
||||
cd debug
|
||||
if [ $? -ne 0 ]; then echo "cd debug failed"; exit 1 ; fi
|
||||
echo "configuring for 64 bit debug"
|
||||
echo
|
||||
|
||||
../configure --with-ngshared --enable-cider --with-readline=/opt/homebrew/opt/readline --enable-debug CFLAGS="-m64 -O0 -g -Wall -I/opt/X11/include/freetype2 -I/opt/homebrew/opt/readline/include" LDFLAGS="-m64 -g -L/opt/homebrew/opt/readline/lib -L/opt/X11/lib -L/usr/local/lib -lomp"
|
||||
else
|
||||
cd release
|
||||
if [ $? -ne 0 ]; then echo "cd release failed"; exit 1 ; fi
|
||||
echo "configuring for 64 bit release"
|
||||
echo
|
||||
../configure --with-ngshared --enable-cider --with-readline=/opt/homebrew/opt/readline CFLAGS="-m64 -O2 -I/opt/X11/include/freetype2 -I/opt/homebrew/opt/readline/include -I/opt/homebrew/opt/ncurses/include" LDFLAGS="-m64 -L/opt/homebrew/opt/readline/lib -L/opt/homebrew/opt/ncurses/lib -L/opt/X11/lib -L/usr/local/lib -lomp"
|
||||
fi
|
||||
if [ $? -ne 0 ]; then echo "../configure failed"; exit 1 ; fi
|
||||
|
||||
echo
|
||||
# make clean is required for properly making the code models
|
||||
echo "cleaning (see make_clean.log)"
|
||||
make clean 2>&1 -j8 | tee make_clean.log
|
||||
exitcode=${PIPESTATUS[0]}
|
||||
if [ $exitcode -ne 0 ]; then echo "make clean failed"; exit 1 ; fi
|
||||
echo "compiling (see make.log)"
|
||||
make 2>&1 -j8 | tee make.log
|
||||
exitcode=${PIPESTATUS[0]}
|
||||
if [ $exitcode -ne 0 ]; then echo "make failed"; exit 1 ; fi
|
||||
# Install to /usr/local
|
||||
echo "installing (see make_install.log)"
|
||||
make install 2>&1 | tee make_install.log
|
||||
exitcode=${PIPESTATUS[0]}
|
||||
if [ $exitcode -ne 0 ]; then echo "make install failed"; exit 1 ; fi
|
||||
|
||||
ELAPSED="Elapsed compile time: $(($SECONDS / 3600))hrs $((($SECONDS / 60) % 60))min $(($SECONDS % 60))sec"
|
||||
echo
|
||||
echo $ELAPSED
|
||||
echo "success"
|
||||
exit 0
|
||||
|
|
@ -1,17 +1,16 @@
|
|||
#!/bin/bash
|
||||
# ngspice build script for macOS, release or debug version, 64 bit
|
||||
# compile_macos.sh <d>
|
||||
# tested with macOS BigSur 11.7.9, MacBook Air i5
|
||||
|
||||
# Procedure:
|
||||
# Install gcc, bison, flex, libtool, autoconf, automake,
|
||||
# libx11 and libx11-dev (headers), libXaw and libXaw-dev, libreadline and dev
|
||||
# Declare 'compile_linux.sh' executable and start compiling with
|
||||
# XCODE and commandline tools
|
||||
# Declare 'compile_macos_gcc.sh' executable and start compiling with
|
||||
# './compile_macos.sh' or './compile_macos.sh d' from the ngspice directory.
|
||||
# Options:
|
||||
# --adms and --enable-adms will install extra HICUM, EKV and MEXTRAM models via the
|
||||
# adms interface. You need to download and install the *.va files via ng-adms-va.tgz
|
||||
# Please see the ngspice manual, chapt. 13, for more info on adms.
|
||||
# CIDER, XSPICE, and OpenMP may be selected at will.
|
||||
# KLU, OSDI, XSPICE, and OpenMP may be deselected at will.
|
||||
# --disable-debug will give O2 optimization (versus O0 for debug) and removes all debugging info.
|
||||
|
||||
# ngspice as shared library:
|
||||
|
|
@ -37,29 +36,21 @@ fi
|
|||
./autogen.sh
|
||||
if [ $? -ne 0 ]; then echo "./autogen.sh failed"; exit 1 ; fi
|
||||
|
||||
# Alternatively, if compiling sources from git, and want to add adms created devices,
|
||||
# you may need to uncomment the following two lines (and don't forget to add adms option
|
||||
# to the ../configure statement):
|
||||
#./autogen.sh --adms
|
||||
#if [ $? -ne 0 ]; then echo "./autogen.sh failed"; exit 1 ; fi
|
||||
|
||||
echo
|
||||
if test "$1" = "d"; then
|
||||
cd debug
|
||||
if [ $? -ne 0 ]; then echo "cd debug failed"; exit 1 ; fi
|
||||
echo "configuring for 64 bit debug"
|
||||
echo
|
||||
# You may add --enable-adms to the following command for adding adms generated devices
|
||||
# Builtin readline is not compatible (Big Sur), readline via Homebrew required (in /usr/local/opt)
|
||||
# Use gcc-11 from Homebrew to support OpenMP
|
||||
../configure --with-x --enable-xspice --enable-cider --enable-osdi --with-readline=/usr/local/opt/readline --enable-klu CC="gcc-11" CXX="g++-11" CFLAGS="-m64 -O0 -g -Wall -I/opt/X11/include/freetype2 -I/usr/local/opt/readline/include" LDFLAGS="-m64 -g -L/usr/local/opt/readline/lib -L/opt/X11/lib"
|
||||
../configure --with-x --enable-cider --with-readline=/usr/local/opt/readline CC="gcc-11" CXX="g++-11" CFLAGS="-m64 -O0 -g -Wall -I/opt/X11/include/freetype2 -I/usr/local/opt/readline/include" LDFLAGS="-m64 -g -L/usr/local/opt/readline/lib -L/opt/X11/lib"
|
||||
else
|
||||
cd release
|
||||
if [ $? -ne 0 ]; then echo "cd release failed"; exit 1 ; fi
|
||||
echo "configuring for 64 bit release"
|
||||
echo
|
||||
# You may add --enable-adms to the following command for adding adms generated devices
|
||||
../configure --with-x --enable-xspice --enable-cider --enable-osdi --with-readline=/usr/local/opt/readline --disable-debug --enable-openmp --enable-klu CC="gcc-11" CXX="g++-11" CFLAGS="-m64 -O2 -I/opt/X11/include/freetype2 -I/usr/local/opt/readline/include -I/usr/local/opt/ncurses/include -I/usr/local/include" LDFLAGS="-m64 -L/usr/local/opt/readline/lib -L/usr/local/opt/ncurses/lib -L/opt/X11/lib -L/usr/local/lib"
|
||||
../configure --with-x --enable-cider --with-readline=/usr/local/opt/readline CC="gcc-11" CXX="g++-11" CFLAGS="-m64 -O2 -I/opt/X11/include/freetype2 -I/usr/local/opt/readline/include -I/usr/local/opt/ncurses/include -I/usr/local/include" LDFLAGS="-m64 -L/usr/local/opt/readline/lib -L/usr/local/opt/ncurses/lib -L/opt/X11/lib -L/usr/local/lib"
|
||||
fi
|
||||
if [ $? -ne 0 ]; then echo "../configure failed"; exit 1 ; fi
|
||||
|
||||
|
|
|
|||
|
|
@ -1,21 +1,15 @@
|
|||
#!/bin/bash
|
||||
# ngspice build script for MINGW in MSYS2, release or debug version, 64 bit
|
||||
# compile_min_shared.sh
|
||||
# tested with macOS BigSur 11.7.9, MacBook Air i5
|
||||
|
||||
#Procedure:
|
||||
# Install MSYS2, plus gcc 64 bit, bison, flex, autoconf, automake, libtool
|
||||
# See https://github.com/orlp/dev-on-windows/wiki/Installing-GCC--&-MSYS2
|
||||
# start compiling with
|
||||
# './compile_min_shared.sh' for release or './compile_min_shared.sh d'
|
||||
# './compile_macos_shared.sh' for release or './compile_macos_shared.sh d'
|
||||
# for debug version of shared ngspice
|
||||
|
||||
# Options:
|
||||
# --adms and --enable-adms will install extra HICUM, EKV and MEXTRAM models via the
|
||||
# adms interface.
|
||||
# Please see http://ngspice.sourceforge.net/admshowto.html for more info on adms.
|
||||
# CIDER, XSPICE, and OpenMP may be selected at will.
|
||||
# --disable-debug will give O2 optimization (versus O0 for debug) and removes all debugging info.
|
||||
# To obtain a 32 bit executable, replace -m64 by -m32 ./configure lines.
|
||||
# KLU, OSDI, XSPICE, and OpenMP may be deselected at will.
|
||||
|
||||
# Add (optionally) --enable-relpath to avoid absolute paths when searching for code models.
|
||||
# It might be necessary to uncomment and run ./autogen.sh .
|
||||
|
|
@ -38,28 +32,19 @@ fi
|
|||
./autogen.sh
|
||||
if [ $? -ne 0 ]; then echo "./autogen.sh failed"; exit 1 ; fi
|
||||
|
||||
# Alternatively, if compiling sources from git, and want to add adms created devices,
|
||||
# you may need to uncomment the following two lines (and don't forget to add adms option
|
||||
# to the ../configure statement):
|
||||
#./autogen.sh --adms
|
||||
#if [ $? -ne 0 ]; then echo "./autogen.sh failed"; exit 1 ; fi
|
||||
|
||||
echo
|
||||
if test "$1" = "d"; then
|
||||
cd debug-sh
|
||||
if [ $? -ne 0 ]; then echo "cd debug-sh failed"; exit 1 ; fi
|
||||
echo "configuring for 64 bit debug"
|
||||
echo
|
||||
# You may add --enable-adms to the following command for adding adms generated devices
|
||||
../configure --with-ngshared --enable-xspice --enable-cider --enable-openmp CFLAGS="-O0" LDFLAGS=" -lomp"
|
||||
../configure --with-ngshared --enable-cider CFLAGS="-O0" LDFLAGS=" -lomp"
|
||||
else
|
||||
cd release-sh
|
||||
if [ $? -ne 0 ]; then echo "cd release-sh failed"; exit 1 ; fi
|
||||
echo "configuring for 64 bit release"
|
||||
echo
|
||||
# You may add --enable-adms to the following command for adding adms generated devices
|
||||
# ../configure --with-ngshared --enable-xspice --enable-cider --enable-openmp --disable-debug CFLAGS="-O2" LDFLAGS="-lomp"
|
||||
../configure --with-ngshared --enable-xspice --enable-cider --disable-debug --enable-openmp CC="gcc-11" CXX="g++-11" CFLAGS="-m64 -O2 -I/usr/local/include" LDFLAGS="-m64 -L/usr/local/lib"
|
||||
../configure --with-ngshared --enable-cider CC="gcc-11" CXX="g++-11" CFLAGS="-m64 -O2 -I/usr/local/include" LDFLAGS="-m64 -L/usr/local/lib"
|
||||
fi
|
||||
if [ $? -ne 0 ]; then echo "../configure failed"; exit 1 ; fi
|
||||
|
||||
|
|
|
|||
|
|
@ -10,15 +10,18 @@
|
|||
# './compile_min.sh' for release or './compile_min.sh d' for debug version.
|
||||
|
||||
# Options:
|
||||
# CIDER, XSPICE, OpenMP, OSDI, and KLU may be selected at will.
|
||||
# --disable-debug will give O2 optimization (versus O0 for debug) and removes all debugging info.
|
||||
# CIDER may be selected at will.
|
||||
# XSPICE, OpenMP, OSDI, and KLU may be deselected. if not required.
|
||||
# --enable-oldapps will make ngnutmeg ngsconvert ngproc2mod ngmultidec ngmakeidx in addition to ngspice
|
||||
|
||||
# ngspice as shared library:
|
||||
# Replace --with-wingui by --with-ngshared in line ../configure ... .
|
||||
# Add (optionally) --enable-relpath to avoid absolute paths when searching for code models.
|
||||
# ngspice as console app:
|
||||
# Install readline, ncurses
|
||||
# Remove --with-wingui in line ../configure ... .
|
||||
# It might be necessary to uncomment and run ./autogen.sh .
|
||||
|
||||
# ngspice as shared library:
|
||||
# Use compile_min_shared.sh
|
||||
|
||||
SECONDS=0
|
||||
|
||||
if test "$1" = "d"; then
|
||||
|
|
@ -43,13 +46,19 @@ if test "$1" = "d"; then
|
|||
if [ $? -ne 0 ]; then echo "cd debug failed"; exit 1 ; fi
|
||||
echo "configuring for 64 bit debug"
|
||||
echo
|
||||
../configure --with-wingui --enable-xspice --enable-cider --enable-klu --enable-openmp --enable-osdi --enable-predictor prefix="C:/Spice64d" CFLAGS="-g -m64 -O0 -Wall -Wno-unused-but-set-variable" LDFLAGS="-g -m64"
|
||||
# executable with GUI
|
||||
../configure --with-wingui --enable-cider prefix="C:/Spice64d" CFLAGS="-g -m64 -O0 -Wall -Wno-unused-but-set-variable" LDFLAGS="-g -m64"
|
||||
# console executable
|
||||
# ../configure --enable-cider prefix="C:/Spice64d" CFLAGS="-g -m64 -O0 -Wall -Wno-unused-but-set-variable" LDFLAGS="-g -m64"
|
||||
else
|
||||
cd release
|
||||
if [ $? -ne 0 ]; then echo "cd release failed"; exit 1 ; fi
|
||||
echo "configuring for 64 bit release"
|
||||
echo
|
||||
../configure --with-wingui --enable-xspice --enable-cider --enable-klu --enable-openmp --enable-osdi --enable-predictor --disable-debug prefix="C:/Spice64" CFLAGS="-m64 -O2" LDFLAGS="-m64 -s"
|
||||
# executable with GUI
|
||||
../configure --with-wingui --enable-cider prefix="C:/Spice64" CFLAGS="-m64 -O2" LDFLAGS="-m64 -s"
|
||||
# console executable
|
||||
# ../configure --with-wingui=no --enable-cider prefix="C:/Spice64" CFLAGS="-m64 -O2" LDFLAGS="-m64 -s"
|
||||
fi
|
||||
if [ $? -ne 0 ]; then echo "../configure failed"; exit 1 ; fi
|
||||
|
||||
|
|
|
|||
|
|
@ -11,9 +11,9 @@
|
|||
|
||||
# Options:
|
||||
# Please see http://ngspice.sourceforge.net/admshowto.html for more info on adms.
|
||||
# CIDER, XSPICE, KLU, and OpenMP may be selected at will.
|
||||
# --disable-debug will give O2 optimization (versus O0 for debug) and removes all debugging info.
|
||||
# To obtain a 32 bit executable, replace -m64 by -m32 ./configure lines.
|
||||
# CIDER may be selected at will.
|
||||
# XSPICE, KLU, and OpenMP may be deselected, if not required.
|
||||
# To obtain a 32 bit executable, replace -m64 by -m32 ./configure lines (not tested).
|
||||
|
||||
# Add (optionally) --enable-relpath to avoid absolute paths when searching for code models.
|
||||
# It might be necessary to uncomment and run ./autogen.sh .
|
||||
|
|
@ -42,13 +42,13 @@ if test "$1" = "d"; then
|
|||
if [ $? -ne 0 ]; then echo "cd debug-sh failed"; exit 1 ; fi
|
||||
echo "configuring for 64 bit debug"
|
||||
echo
|
||||
../configure --with-ngshared --enable-xspice --enable-cider --enable-openmp --enable-osdi --enable-klu --enable-relpath prefix="C:/Spice64d" CFLAGS="-m64 -g -O0 -Wall" LDFLAGS="-m64"
|
||||
../configure --with-ngshared --enable-cider --enable-relpath prefix="C:/Spice64d" CFLAGS="-m64 -g -O0 -Wall" LDFLAGS="-m64"
|
||||
else
|
||||
cd release-sh
|
||||
if [ $? -ne 0 ]; then echo "cd release-sh failed"; exit 1 ; fi
|
||||
echo "configuring for 64 bit release"
|
||||
echo
|
||||
../configure --with-ngshared --enable-xspice --enable-cider --enable-openmp --enable-osdi --enable-klu --enable-relpath --disable-debug prefix="C:/Spice64" CFLAGS="-m64 -O2" LDFLAGS="-m64 -s"
|
||||
../configure --with-ngshared --enable-cider --enable-relpath --disable-debug prefix="C:/Spice64" CFLAGS="-m64 -O2" LDFLAGS="-m64 -s"
|
||||
fi
|
||||
if [ $? -ne 0 ]; then echo "../configure failed"; exit 1 ; fi
|
||||
|
||||
|
|
|
|||
121
configure.ac
121
configure.ac
|
|
@ -16,7 +16,7 @@
|
|||
# problem to the user.
|
||||
AC_PREREQ([2.59])
|
||||
|
||||
m4_define([ngspice_major_version], [42+])
|
||||
m4_define([ngspice_major_version], [43+])
|
||||
m4_define([ngspice_minor_version], [0])
|
||||
m4_define([ngspice_version],
|
||||
[ngspice_major_version])
|
||||
|
|
@ -117,7 +117,7 @@ LT_INIT([shared static])
|
|||
# --> Set 'LT_NGSPICE_AGE' to 0.
|
||||
|
||||
LT_NGSPICE_CURRENT=0
|
||||
LT_NGSPICE_REVISION=9
|
||||
LT_NGSPICE_REVISION=10
|
||||
LT_NGSPICE_AGE=0
|
||||
LIBNGSPICE_SO_VERSION=$LT_NGSPICE_CURRENT.$LT_NGSPICE_REVISION.$LT_NGSPICE_AGE
|
||||
|
||||
|
|
@ -409,12 +409,15 @@ fi
|
|||
|
||||
####
|
||||
### check for operating system at compile time
|
||||
AM_CONDITIONAL([DLIBS_FULLY_RESOLVED], false)
|
||||
case $host_os in
|
||||
*mingw* | *msys* )
|
||||
AC_DEFINE([OS_COMPILED], [1], [MINGW for MS Windows])
|
||||
AM_CONDITIONAL([DLIBS_FULLY_RESOLVED], true)
|
||||
;;
|
||||
*cygwin* )
|
||||
AC_DEFINE([OS_COMPILED], [2], [Cygwin for MS Windows])
|
||||
AM_CONDITIONAL([DLIBS_FULLY_RESOLVED], true)
|
||||
;;
|
||||
*freebsd* )
|
||||
AC_DEFINE([OS_COMPILED], [3], [FreeBSD])
|
||||
|
|
@ -907,7 +910,7 @@ AC_CHECK_FUNCS([localtime])
|
|||
|
||||
AC_CHECK_FUNCS([ftime gettimeofday])
|
||||
# Do not use time or getrusage function for CPU time measurement under OpenMP
|
||||
if test "x$enable_openmp" != xyes; then
|
||||
if test "x$enable_openmp" = xno; then
|
||||
AC_CHECK_FUNCS([time getrusage])
|
||||
fi
|
||||
AC_CHECK_FUNCS([utimes])
|
||||
|
|
@ -989,10 +992,12 @@ AM_CONDITIONAL([RELPATH], [test "x$enable_relpath" = xyes])
|
|||
if test "x$enable_relpath" = xyes; then
|
||||
AC_DEFINE_UNQUOTED([NGSPICEBINDIR], ["`echo ../bin`"], [Define the directory for executables])
|
||||
AC_DEFINE_UNQUOTED([NGSPICEDATADIR], ["`echo ../share/ngspice`"], [Define the directory for architecture independent data files])
|
||||
AC_DEFINE_UNQUOTED([NGSPICELIBDIR], ["`echo ../lib/ngspice`"], [Define the directory for architecture-dependent libraries])
|
||||
AC_DEFINE([HAS_RELPATH], [1], [rel. path of libraries and scripts])
|
||||
else
|
||||
AC_DEFINE_UNQUOTED([NGSPICEBINDIR], ["`echo $dprefix/bin`"], [Define the directory for executables])
|
||||
AC_DEFINE_UNQUOTED([NGSPICEDATADIR], ["`echo $dprefix/share/ngspice`"], [Define the directory for architecture independent data files])
|
||||
AC_DEFINE_UNQUOTED([NGSPICELIBDIR], ["`echo $dprefix/lib/ngspice`"], [Define the directory for architecture-dependent libraries])
|
||||
fi
|
||||
|
||||
# Create timestamp, may be overruled by setting env var SOURCE_DATE_EPOCH
|
||||
|
|
@ -1252,63 +1257,68 @@ if test "x$enable_expdevices" = xyes; then
|
|||
fi
|
||||
|
||||
# ---- Option to include GNU readline support in ngspice CLI ----
|
||||
# ---- Default: disabled. ----
|
||||
# ---- Default: enabled. ----
|
||||
# ---- Hope to see in the future readline replacement. ----
|
||||
|
||||
if test "x$with_readline" = xno ; then
|
||||
if test "x$with_wingui" = xyes || test "x$with_ngshared" = xyes; then
|
||||
AC_MSG_RESULT([GNU readline disabled.])
|
||||
else
|
||||
if test "x$with_readline" = x || test "x$with_readline" = xyes ; then
|
||||
if test "x$with_tcl" = x || test "x$with_tcl" = xno ; then
|
||||
AC_MSG_RESULT([Checking for readline:])
|
||||
AC_CHECK_HEADERS([readline/readline.h readline/history.h],
|
||||
[AC_DEFINE([HAVE_GNUREADLINE], [], [Define if we have GNU readline])],
|
||||
[AC_MSG_ERROR([Couldn't find GNU readline headers.])])
|
||||
AC_SEARCH_LIBS([tputs], [ncurses tinfo termcap],
|
||||
[AC_DEFINE([HAVE_TERMCAP], [], [Define if we have ncurses/terminfo or termcap])],
|
||||
[AC_MSG_ERROR([Found neither ncurses/terminfo or termcap])])
|
||||
AC_CHECK_LIB([readline], [readline],
|
||||
[LIBS="$LIBS -lreadline"],
|
||||
[AC_MSG_ERROR([Couldn't find readline libraries.])])
|
||||
fi
|
||||
else
|
||||
# Especially defined for macOS (Big Sur), with readline installed from Brew
|
||||
for dir in \
|
||||
$with_readline
|
||||
do
|
||||
if test "x$with_tcl" = x || test "x$with_tcl" = xno ; then
|
||||
AC_MSG_RESULT([Checking for readline:])
|
||||
AC_CHECK_HEADERS([$dir/include/readline/readline.h $dir/include/readline/history.h],
|
||||
[AC_DEFINE([HAVE_GNUREADLINE], [], [Define if we have GNU readline])],
|
||||
[AC_MSG_ERROR([Couldn't find GNU readline headers.])])
|
||||
AC_SEARCH_LIBS([tputs], [ncurses tinfo termcap],
|
||||
[AC_DEFINE([HAVE_TERMCAP], [], [Define if we have ncurses/terminfo or termcap])],
|
||||
[AC_MSG_ERROR([Found neither ncurses/terminfo or termcap])])
|
||||
AC_CHECK_LIB([readline], [readline],
|
||||
[LIBS="$LIBS -lreadline"],
|
||||
[AC_MSG_ERROR([Couldn't find readline libraries.])])
|
||||
fi
|
||||
done
|
||||
fi
|
||||
fi
|
||||
|
||||
# ---- Option to include BSD editline support in ngspice CLI ----
|
||||
# ---- Default: disabled. ----
|
||||
|
||||
if test "x$with_editline" != xyes; then
|
||||
AC_MSG_RESULT([BSD editline disabled.])
|
||||
else
|
||||
AC_MSG_RESULT([Checking for editline:])
|
||||
AC_CHECK_HEADERS([editline/readline.h],
|
||||
[AC_DEFINE([HAVE_BSDEDITLINE], [1], [Define to enable BSD editline])],
|
||||
[AC_MSG_ERROR([Couldn't find BSD editline headers.])])
|
||||
AC_SEARCH_LIBS([tputs], [ncurses tinfo termcap],
|
||||
[AC_DEFINE([HAVE_TERMCAP], [], [Define if we have ncurses/terminfo or termcap])],
|
||||
[AC_MSG_ERROR([Found neither ncurses/terminfo or termcap])])
|
||||
AC_CHECK_LIB([edit], [readline],
|
||||
[LIBS="$LIBS -ledit"],
|
||||
[AC_MSG_ERROR([Couldn't find editline libraries.])],
|
||||
[-lncurses])
|
||||
if test "x$with_readline" = xno ; then
|
||||
AC_MSG_RESULT([GNU readline disabled.])
|
||||
else
|
||||
if test "x$with_readline" = x || test "x$with_readline" = xyes ; then
|
||||
if test "x$with_tcl" = x || test "x$with_tcl" = xno ; then
|
||||
AC_MSG_RESULT([Checking for readline:])
|
||||
AC_CHECK_HEADERS([readline/readline.h readline/history.h],
|
||||
[AC_DEFINE([HAVE_GNUREADLINE], [], [Define if we have GNU readline])],
|
||||
[AC_MSG_ERROR([Couldn't find GNU readline headers.])])
|
||||
AC_SEARCH_LIBS([tputs], [ncurses tinfo termcap],
|
||||
[AC_DEFINE([HAVE_TERMCAP], [], [Define if we have ncurses/terminfo or termcap])],
|
||||
[AC_MSG_ERROR([Found neither ncurses/terminfo or termcap])])
|
||||
AC_CHECK_LIB([readline], [readline],
|
||||
[LIBS="$LIBS -lreadline"],
|
||||
[AC_MSG_ERROR([Couldn't find readline libraries.])])
|
||||
fi
|
||||
else
|
||||
# Especially defined for macOS (Big Sur), with readline installed from Brew
|
||||
for dir in \
|
||||
$with_readline
|
||||
do
|
||||
if test "x$with_tcl" = x || test "x$with_tcl" = xno ; then
|
||||
AC_MSG_RESULT([Checking for readline:])
|
||||
AC_CHECK_HEADERS([$dir/include/readline/readline.h $dir/include/readline/history.h],
|
||||
[AC_DEFINE([HAVE_GNUREADLINE], [], [Define if we have GNU readline])],
|
||||
[AC_MSG_ERROR([Couldn't find GNU readline headers.])])
|
||||
AC_SEARCH_LIBS([tputs], [ncurses tinfo termcap],
|
||||
[AC_DEFINE([HAVE_TERMCAP], [], [Define if we have ncurses/terminfo or termcap])],
|
||||
[AC_MSG_ERROR([Found neither ncurses/terminfo or termcap])])
|
||||
AC_CHECK_LIB([readline], [readline],
|
||||
[LIBS="$LIBS -lreadline"],
|
||||
[AC_MSG_ERROR([Couldn't find readline libraries.])])
|
||||
fi
|
||||
done
|
||||
fi
|
||||
fi
|
||||
|
||||
# ---- Option to include BSD editline support in ngspice CLI ----
|
||||
# ---- Default: disabled. ----
|
||||
|
||||
if test "x$with_editline" != xyes; then
|
||||
AC_MSG_RESULT([BSD editline disabled.])
|
||||
else
|
||||
AC_MSG_RESULT([Checking for editline:])
|
||||
AC_CHECK_HEADERS([editline/readline.h],
|
||||
[AC_DEFINE([HAVE_BSDEDITLINE], [1], [Define to enable BSD editline])],
|
||||
[AC_MSG_ERROR([Couldn't find BSD editline headers.])])
|
||||
AC_SEARCH_LIBS([tputs], [ncurses tinfo termcap],
|
||||
[AC_DEFINE([HAVE_TERMCAP], [], [Define if we have ncurses/terminfo or termcap])],
|
||||
[AC_MSG_ERROR([Found neither ncurses/terminfo or termcap])])
|
||||
AC_CHECK_LIB([edit], [readline],
|
||||
[LIBS="$LIBS -ledit"],
|
||||
[AC_MSG_ERROR([Couldn't find editline libraries.])],
|
||||
[-lncurses])
|
||||
fi
|
||||
fi
|
||||
|
||||
# Use AC_CHECK_HEADERS so the HAVE_*_H symbol gets defined
|
||||
|
|
@ -1436,6 +1446,7 @@ AC_CONFIG_FILES([Makefile
|
|||
src/xspice/enh/Makefile
|
||||
src/xspice/ipc/Makefile
|
||||
src/xspice/idn/Makefile
|
||||
src/xspice/verilog/Makefile
|
||||
src/osdi/Makefile
|
||||
tests/Makefile
|
||||
tests/bsim1/Makefile
|
||||
|
|
|
|||
|
|
@ -15,7 +15,7 @@ vss2 +32 0 0
|
|||
|
||||
.options Temp=27.0
|
||||
|
||||
* BSIM3v3.3.0 model with modified default parameters 0.18µm
|
||||
* BSIM3v3.3.0 model with modified default parameters 0.18µm
|
||||
.model n1 nmos level=49 version=3.3.0 tox=3.5n nch=2.4e17 nsub=5e16 vth0=0.15
|
||||
.model p1 pmos level=49 version=3.3.0 tox=3.5n nch=2.5e17 nsub=5e16 vth0=-0.15
|
||||
|
||||
|
|
|
|||
|
|
@ -14,7 +14,7 @@ vss2 32 0 0
|
|||
|
||||
.options Temp=27.0
|
||||
|
||||
* BSIM3v3.3.0 model with modified default parameters 0.18µm
|
||||
* BSIM3v3.3.0 model with modified default parameters 0.18µm
|
||||
.model n1 nmos level=49 version=3.3.0 tox=3.5n nch=2.4e17 nsub=5e16 vth0=0.15
|
||||
.model p1 pmos level=49 version=3.3.0 tox=3.5n nch=2.5e17 nsub=5e16 vth0=-0.15
|
||||
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@ vdsp 22 0 -0.1
|
|||
vssp 33 0 0
|
||||
vbsp 44 0 0
|
||||
|
||||
* BSIM3v3.3.0 model with modified default parameters 0.18µm
|
||||
* BSIM3v3.3.0 model with modified default parameters 0.18µm
|
||||
.model n1 nmos level=49 version=3.3.0 tox=3.5n nch=2.4e17 nsub=5e16 vth0=0.15
|
||||
.model p1 pmos level=49 version=3.3.0 tox=3.5n nch=2.5e17 nsub=5e16 vth0=-0.15
|
||||
|
||||
|
|
|
|||
|
|
@ -16,12 +16,12 @@ vbsp 44 0 0
|
|||
|
||||
.options Temp=27.0
|
||||
|
||||
* BSIM3v3.3.0 model with modified default parameters 0.18µm
|
||||
* BSIM3v3.3.0 model with modified default parameters 0.18µm
|
||||
.model n1 nmos level=49 version=3.3.0 tox=3.5n nch=2.4e17 nsub=5e16 vth0=0.15
|
||||
.model p1 pmos level=49 version=3.3.0 tox=3.5n nch=2.5e17 nsub=5e16 vth0=-0.15
|
||||
|
||||
*.include ./Modelcards/modelcard.nmos $ Berkeley model cards limited to L >= 0.35µm
|
||||
*.include ./Modelcards/modelcard.pmos $ Berkeley model cards limited to L >= 0.35µm
|
||||
*.include ./Modelcards/modelcard.nmos $ Berkeley model cards limited to L >= 0.35µm
|
||||
*.include ./Modelcards/modelcard.pmos $ Berkeley model cards limited to L >= 0.35µm
|
||||
|
||||
* update of the default parameters required
|
||||
*.model n1 NMOS level=49 version=3.3.0 $ nearly no current due to VT > 2 V ?
|
||||
|
|
|
|||
|
|
@ -16,12 +16,12 @@ vbsp 44 0 0
|
|||
|
||||
.options Temp=27.0
|
||||
|
||||
* BSIM3v3.3.0 model with modified default parameters 0.18µm
|
||||
* BSIM3v3.3.0 model with modified default parameters 0.18µm
|
||||
.model n1 nmos level=49 version=3.3.0 tox=3.5n nch=2.4e17 nsub=5e16 vth0=0.15
|
||||
.model p1 pmos level=49 version=3.3.0 tox=3.5n nch=2.5e17 nsub=5e16 vth0=-0.15
|
||||
|
||||
*.include ./Modelcards/modelcard.nmos $ Berkeley model cards limited to L >= 0.35µm
|
||||
*.include ./Modelcards/modelcard.pmos $ Berkeley model cards limited to L >= 0.35µm
|
||||
*.include ./Modelcards/modelcard.nmos $ Berkeley model cards limited to L >= 0.35µm
|
||||
*.include ./Modelcards/modelcard.pmos $ Berkeley model cards limited to L >= 0.35µm
|
||||
|
||||
* update of the default parameters required
|
||||
*.model n1 NMOS level=49 version=3.3.0 $ nearly no current due to VT > 2 V ?
|
||||
|
|
|
|||
|
|
@ -14,7 +14,7 @@ vss2 32 0 0
|
|||
|
||||
.options Temp=27.0
|
||||
|
||||
* BSIM3v3.3.0 model with modified default parameters 0.18µm
|
||||
* BSIM3v3.3.0 model with modified default parameters 0.18µm
|
||||
.model n1 nmos level=49 version=3.3.0 tox=3.5n nch=2.4e17 nsub=5e16 vth0=0.15
|
||||
.model p1 pmos level=49 version=3.3.0 tox=3.5n nch=2.5e17 nsub=5e16 vth0=-0.15
|
||||
|
||||
|
|
|
|||
|
|
@ -14,7 +14,7 @@ vss2 32 0 0
|
|||
|
||||
.options Temp=27.0
|
||||
|
||||
* BSIM3v3.3.0 model with modified default parameters 0.18µm
|
||||
* BSIM3v3.3.0 model with modified default parameters 0.18µm
|
||||
.model n1 nmos level=49 version=3.3.0 tox=3.5n nch=2.4e17 nsub=5e16 vth0=0.15
|
||||
.model p1 pmos level=49 version=3.3.0 tox=3.5n nch=2.5e17 nsub=5e16 vth0=-0.15
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,10 @@
|
|||
Verilog-controlled simple timer.
|
||||
|
||||
* This is the model for an RS flip-flop implemented by Icarus Verilog.
|
||||
|
||||
.model vlog_ff d_cosim simulation="ivlng" sim_args=["555"]
|
||||
|
||||
* The bulk of the circuit is in a shared file.
|
||||
|
||||
.include ../verilator/555.shared
|
||||
.end
|
||||
|
|
@ -0,0 +1,46 @@
|
|||
The circuits in this directory illustrate the use of the d_cosim
|
||||
XSPICE code model as a container for a Verilog simulation using
|
||||
Icarus Verilog. Icarus Verilog must be built with the --enable-libvvp option,
|
||||
so that its simulation engine is available as a dynamic library.
|
||||
The Verilog source code and included parts of the circuit definitions
|
||||
can be found in the adjacent "verilator" directory.
|
||||
|
||||
The example circuits are:
|
||||
|
||||
555.cir: The probably familiar NE555 oscillator provides a minimal example
|
||||
of combined simulation with SPICE and Verilog.
|
||||
The digital part of the IC, a simple SR flip-flop, is expressed in Verilog.
|
||||
|
||||
delay.v: A very simple example of using delays in Verilog to generate
|
||||
waveform outputs.
|
||||
|
||||
pwm.c: Verilog delays controlling a pulse-width modulated output generate
|
||||
an approximate sine wave.
|
||||
|
||||
adc.cir: Slightly more complex Verilog describes the controlling part
|
||||
of a switched-capacitor ADC.
|
||||
|
||||
Before a simulation can be run, the associated Verilog code must be compiled:
|
||||
|
||||
iverilog -o 555 ../verilator/555.v
|
||||
|
||||
Similar compilations are needed to prepare the other examples.
|
||||
|
||||
The simulations require additional dynamic libraries, ivlng.so (or ivlng.DLL)
|
||||
and ivlng.vpi: they are expected to be in the usual installation location.
|
||||
|
||||
To use the versions in a built source tree that has not been installed,
|
||||
the .model definitions in the circuit files must be changed to the ugly:
|
||||
|
||||
.model vlog_ff d_cosim sim_args=["555"]
|
||||
+ simulation = "../../../release/src/xspice/verilog/.libs/ivlng"
|
||||
+ lib_args = [ "libvvp"
|
||||
+ "../../../release/src/xspice/verilog/.libs/ivlngvpi.so" ]
|
||||
|
||||
Or for Windows builds using MSVC:
|
||||
|
||||
.model vlog_ff d_cosim sim_args=["555"]
|
||||
+ simulation = "..\..\..\visualc\xspice\verilog\ivlng.DLL"
|
||||
+ lib_args = [ "libvvp"
|
||||
+ "..\..\..\visualc\xspice\verilog\shim.vpi" ]
|
||||
|
||||
|
|
@ -0,0 +1,10 @@
|
|||
Simulation of a switched-capacitor SAR ADC with Verilator and d_cosim
|
||||
|
||||
* Model line for the digital control implemented by Icarus Verilog.
|
||||
|
||||
.model dut d_cosim simulation="ivlng" sim_args=["adc"]
|
||||
|
||||
* The bulk of the circuit is in a shared file.
|
||||
|
||||
.include ../verilator/adc.shared
|
||||
.end
|
||||
|
|
@ -0,0 +1,10 @@
|
|||
* Waveform generation by Verilog delays
|
||||
|
||||
adut null [ d4 d3 d2 d1 d0 ] ring
|
||||
.model ring d_cosim simulation="ivlng" sim_args = [ "delay" ]
|
||||
|
||||
.control
|
||||
tran 20u 100u
|
||||
plot d4 d3 d2 d1 d0 digitop
|
||||
.endc
|
||||
.end
|
||||
|
|
@ -0,0 +1,12 @@
|
|||
* Waveform generation by PWM in Verilog
|
||||
|
||||
adut null [ out ] pwm_sin
|
||||
.model pwm_sin d_cosim simulation="ivlng" sim_args = [ "pwm" ]
|
||||
|
||||
r1 out smooth 100k
|
||||
c1 smooth 0 1u
|
||||
.control
|
||||
tran 1m 2
|
||||
plot out-3.3 smooth
|
||||
.endc
|
||||
.end
|
||||
|
|
@ -0,0 +1,11 @@
|
|||
Verilog-controlled simple timer.
|
||||
|
||||
* This is the model for an RS flip-flop implemented by Verilator.
|
||||
|
||||
.model vlog_ff d_cosim simulation="./555"
|
||||
|
||||
* The bulk of the circuit is in a shared file.
|
||||
|
||||
.include 555.shared
|
||||
.end
|
||||
|
||||
|
|
@ -0,0 +1,60 @@
|
|||
* This file is not intended to be used directly, but by 555.cir.
|
||||
* That allows it to be shared by different implemnetations.
|
||||
|
||||
* This sub-circuit simulates the NE555 timer IC, with the very simple
|
||||
* digital part as a Verilog module.
|
||||
|
||||
.subckt NE555 trigger threshold reset control output discharge vcc ground
|
||||
|
||||
* Resistor chain
|
||||
|
||||
r1 vcc control 5k
|
||||
r2 control trigger_ref 5k
|
||||
r3 trigger_ref ground 5k
|
||||
|
||||
* Two XSPICE ADC instances serve as comparators.
|
||||
|
||||
.model comparator adc_bridge(in_low = -0.0001 in_high = 0.0001)
|
||||
athresh_comparator [%vd threshold control] [over_threshold] comparator
|
||||
atrigger_comparator [%vd trigger_ref trigger] [under_trigger] comparator
|
||||
|
||||
* A tiny Verilog module supplies the flip-flop.
|
||||
* The model is supplied by the outer circuit file.
|
||||
|
||||
averilog [ under_trigger over_threshold reset ] [ output qbar ] vlog_ff
|
||||
|
||||
* The discharge transistor and its base resistor.
|
||||
|
||||
rbase qbar discharge_base 10k
|
||||
qdischarge discharge discharge_base ground npn_transistor
|
||||
.model npn_transistor npn
|
||||
|
||||
.ends ; Ends subcircuit NE555
|
||||
|
||||
|
||||
* The usual 555 oscillator with threshold connected to discharge.
|
||||
|
||||
.param vcc=12
|
||||
|
||||
X555 trigger_threshold trigger_threshold reset control output discharge vcc 0 ne555
|
||||
|
||||
r1 vcc discharge 10k
|
||||
r2 discharge trigger_threshold 10k
|
||||
Ct trigger_threshold 0 1uF ic=0
|
||||
|
||||
* A resistive load forces analog output.
|
||||
|
||||
rload output 0 1k
|
||||
|
||||
* A voltage source for power.
|
||||
|
||||
Vcc vcc 0 {vcc}
|
||||
|
||||
* Pulse the Reset signal low for 2uS each 51mS
|
||||
|
||||
Vpulse reset 0 PULSE {vcc} 0.2 0 1u 1u 2u 51m
|
||||
|
||||
.control
|
||||
tran 10u 200m uic
|
||||
plot trigger_threshold output x555.under_trigger-3 x555.over_threshold-1.5
|
||||
.endc
|
||||
|
|
@ -0,0 +1,26 @@
|
|||
// Very simple logic for a 555 timer simulation
|
||||
|
||||
`timescale 1us/100ns
|
||||
|
||||
module VL555(Trigger, Threshold, Reset, Q, Qbar);
|
||||
input wire Trigger, Threshold, Reset; // Reset is active low.
|
||||
output reg Q;
|
||||
output wire Qbar;
|
||||
|
||||
wire ireset, go;
|
||||
|
||||
assign Qbar = !Q;
|
||||
|
||||
// The datasheet implies that Trigger overrides Threshold.
|
||||
|
||||
assign go = Trigger & Reset;
|
||||
assign ireset = (Threshold & !Trigger) | !Reset;
|
||||
|
||||
initial begin
|
||||
Q = 0;
|
||||
end
|
||||
|
||||
always @(posedge(go), posedge(ireset)) begin
|
||||
Q = go;
|
||||
end
|
||||
endmodule
|
||||
|
|
@ -1,10 +1,32 @@
|
|||
The circuit adc.cir in this directory illustrates the use of the d_cosim
|
||||
XSPICE code model as a container for a Verilog simulation. Before the
|
||||
simulation can be run, the Verilog code must be compiled by Verilator
|
||||
using the command:
|
||||
The circuits in this directory illustrate the use of the d_cosim
|
||||
XSPICE code model as a container for a Verilog simulation, using the
|
||||
Verilator compiler. The example circuits are:
|
||||
|
||||
ngspice vlnggen adc.v
|
||||
555.cir: The probably familiar NE555 oscillator provides a minimal example
|
||||
of combined simulation with SPICE and Verilog. The digital part of the IC,
|
||||
a simple SR flip-flop, is expressed in Verilog.
|
||||
|
||||
That should create a shared library file, adc.so (or adc.DLL on Windows)
|
||||
delay.v: A very simple example of using delays in Verilog to generate
|
||||
waveform outputs.
|
||||
|
||||
pwm.c: Verilog delays controlling a pulse-width modulated output generate
|
||||
an approximate sine wave.
|
||||
|
||||
adc.cir: Slightly more complex Verilog describes the controlling part
|
||||
of a switched-capacitor ADC.
|
||||
|
||||
Before a simulation can be run, the associated Verilog code must be compiled
|
||||
by Verilator using a command script that is included with ngspice:
|
||||
|
||||
ngspice vlnggen 555.v
|
||||
|
||||
That should create a shared library file, 555.so (or 555.DLL on Windows)
|
||||
that will be loaded by the d_cosim code model. The compiled Verilog code that
|
||||
it contains will be executed during simulation.
|
||||
it contains will be executed during simulation. Similar compilations
|
||||
are needed to prepare the other examples, but for Verilog with delays the
|
||||
command looks like:
|
||||
|
||||
ngspice vlnggen -- --timing delay.v
|
||||
|
||||
(The "--" prevents "--timing" from being treated as a ngspice option, so it is
|
||||
passed on to Verilator.)
|
||||
|
|
|
|||
|
|
@ -1,103 +1,10 @@
|
|||
Simulation of a switched-capacitor SAR ADC with Verilator and d_cosim
|
||||
|
||||
.subckt sar_adc input vref start valid d5 d4 d3 d2 d1 d0 clk
|
||||
* Model line for the digital control implemented by Verilator.
|
||||
|
||||
* A transmission gate connects the input to the capacitor set.
|
||||
.model dut d_cosim simulation="./adc"
|
||||
|
||||
xsample input iin sample vref tgate
|
||||
rin iin test_v 1k
|
||||
* The bulk of the circuit is in a shared file.
|
||||
|
||||
* Capacitors and controlling inverters
|
||||
|
||||
xb5 test_v vref d5 ccap c=1p
|
||||
xb4 test_v vref d4 ccap c={1p / 2}
|
||||
xb3 test_v vref d3 ccap c={1p / 4}
|
||||
xb2 test_v vref d2 ccap c={1p / 8}
|
||||
xb1 test_v vref d1 ccap c={1p / 16}
|
||||
xb0 test_v vref d0 ccap c={1p / 32}
|
||||
clast test_v 0 {1p / 32}
|
||||
|
||||
* An XSPICE ADC bridge functions as a comparator.
|
||||
|
||||
acomp [%vd(test_v vref)] [comp] comparator
|
||||
.model comparator adc_bridge in_low=0 in_high=0
|
||||
|
||||
* The digital portion of the circuit is specified in compiled Verilog.
|
||||
* Outputs inverted to cancel the inverter in subcircuit ccap,
|
||||
* and produce the correct numerical output value.
|
||||
|
||||
adut [ Clk Comp Start] [Sample Valid ~d5 ~d4 ~d3 ~d2 ~d1 ~d0] null dut
|
||||
.model dut d_cosim simulation="./adc.so"
|
||||
.ends // SUBCKT sar_adc
|
||||
|
||||
* Some MOS transistors complete the circuit.
|
||||
* Models from https://homepages.rpi.edu/~sawyes/AIMSPICE_TutorialManual.pdf
|
||||
|
||||
.model p1 pmos
|
||||
+ level=2 vto=-0.5 kp=8.5e-6 gamma=0.4 phi=0.65 lambda=0.05 xj=0.5e-6
|
||||
.model n1 nmos
|
||||
+ level=2 vto=0.5 kp=24e-6 gamma=0.15 phi=0.65 lambda=0.015 xj=0.5e-6
|
||||
|
||||
* Use those for an inverter.
|
||||
|
||||
.subckt ainv in out vdd
|
||||
mn out in 0 0 n1
|
||||
mp out in vdd vdd p1
|
||||
.ends
|
||||
|
||||
* A transmission gate modelled by a switch.
|
||||
|
||||
.subckt mos_tgate a b ctl vdd
|
||||
mn a ctl b b n1
|
||||
xinv ctl ictl vdd ainv
|
||||
mp b ictl a a p1
|
||||
.ends
|
||||
|
||||
.subckt tgate a b ctl vdd
|
||||
switch a b ctl 0 tg
|
||||
.model tg sw vt=1.5 ron=2k
|
||||
.ends
|
||||
|
||||
* The per-bit subcircuit in the adc
|
||||
|
||||
.subckt ccap in vcc ctl c=10p
|
||||
xinv ctl tail vcc ainv
|
||||
cb in tail {c}
|
||||
.ends
|
||||
|
||||
**** End of the ADC and its subcircuits. Begin test circuit ****
|
||||
|
||||
.param vcc=3.3
|
||||
vcc vcc 0 {vcc}
|
||||
|
||||
* Digital clock signal
|
||||
|
||||
aclock 0 clk clock
|
||||
.model clock d_osc cntl_array=[-1 1] freq_array=[1Meg 1Meg]
|
||||
|
||||
* A simple DAC so that the result may be compared to the input.
|
||||
|
||||
r5 d5 sum 2
|
||||
r4 d4 sum 4
|
||||
r3 d3 sum 8
|
||||
r2 d2 sum 16
|
||||
r1 d1 sum 32
|
||||
r0 d0 sum 64
|
||||
|
||||
vamm sum 0 0
|
||||
|
||||
* Pulse the Start signal high for 1.3uS each 10uS
|
||||
|
||||
Vpulse Start 0 PULSE 0 {vcc} 0.2u 10n 10n 1.3u 10u
|
||||
Vtest input 0 PULSE 0 3 0 200u 200u 1u 401u
|
||||
|
||||
* The ADC for testing
|
||||
|
||||
xtest input vcc start valid d5 d4 d3 d2 d1 d0 clk sar_adc
|
||||
|
||||
|
||||
.control
|
||||
tran 100n 250u
|
||||
plot input xtest.test_v vamm#branch clk/2 start/3 xtest.sample/3 valid
|
||||
.endc
|
||||
.include adc.shared
|
||||
.end
|
||||
|
|
|
|||
|
|
@ -0,0 +1,107 @@
|
|||
* This file is not intended to be used directly, but by adc.cir.
|
||||
* That allows it to be shared by different implemnetations.
|
||||
|
||||
* Simulation of a switched-capacitor SAR ADC with Verilator and d_cosim
|
||||
|
||||
.subckt sar_adc input vref start valid d5 d4 d3 d2 d1 d0 clk
|
||||
|
||||
* A transmission gate connects the input to the capacitor set.
|
||||
|
||||
xsample input iin sample vref tgate
|
||||
rin iin test_v 1k
|
||||
|
||||
* Capacitors and controlling inverters
|
||||
|
||||
xb5 test_v vref d5 ccap c=1p
|
||||
xb4 test_v vref d4 ccap c={1p / 2}
|
||||
xb3 test_v vref d3 ccap c={1p / 4}
|
||||
xb2 test_v vref d2 ccap c={1p / 8}
|
||||
xb1 test_v vref d1 ccap c={1p / 16}
|
||||
xb0 test_v vref d0 ccap c={1p / 32}
|
||||
clast test_v 0 {1p / 32}
|
||||
|
||||
* An XSPICE ADC bridge functions as a comparator.
|
||||
|
||||
acomp [%vd(test_v vref)] [comp] comparator
|
||||
.model comparator adc_bridge in_low=0 in_high=0
|
||||
|
||||
* The digital portion of the circuit is specified in compiled Verilog.
|
||||
* Outputs inverted to cancel the inverter in subcircuit ccap,
|
||||
* and produce the correct numerical output value. The model definition
|
||||
* is supplied by the calling circuit file.
|
||||
|
||||
adut [ Clk Comp Start] [Sample Valid ~d5 ~d4 ~d3 ~d2 ~d1 ~d0] dut
|
||||
.ends // SUBCKT sar_adc
|
||||
|
||||
* Some MOS transistors complete the circuit.
|
||||
* Models from https://homepages.rpi.edu/~sawyes/AIMSPICE_TutorialManual.pdf
|
||||
|
||||
.model p1 pmos
|
||||
+ level=2 vto=-0.5 kp=8.5e-6 gamma=0.4 phi=0.65 lambda=0.05 xj=0.5e-6
|
||||
.model n1 nmos
|
||||
+ level=2 vto=0.5 kp=24e-6 gamma=0.15 phi=0.65 lambda=0.015 xj=0.5e-6
|
||||
|
||||
* Use those for an inverter.
|
||||
|
||||
.subckt ainv in out vdd
|
||||
mn out in 0 0 n1
|
||||
mp out in vdd vdd p1
|
||||
.ends
|
||||
|
||||
* A transmission gate modelled by a switch.
|
||||
|
||||
.subckt mos_tgate a b ctl vdd
|
||||
mn a ctl b b n1
|
||||
xinv ctl ictl vdd ainv
|
||||
mp b ictl a a p1
|
||||
.ends
|
||||
|
||||
.subckt tgate a b ctl vdd
|
||||
switch a b ctl 0 tg
|
||||
.model tg sw vt=1.5 ron=2k
|
||||
.ends
|
||||
|
||||
* The per-bit subcircuit in the adc
|
||||
|
||||
.subckt ccap in vcc ctl c=10p
|
||||
xinv ctl tail vcc ainv
|
||||
cb in tail {c}
|
||||
.ends
|
||||
|
||||
**** End of the ADC and its subcircuits. Begin test circuit ****
|
||||
|
||||
|
||||
.param vcc=3.3
|
||||
vcc vcc 0 {vcc}
|
||||
|
||||
* Digital clock signal
|
||||
|
||||
aclock 0 clk clock
|
||||
.model clock d_osc cntl_array=[-1 1] freq_array=[1Meg 1Meg]
|
||||
|
||||
* A simple DAC so that the result may be compared to the input.
|
||||
|
||||
r5 d5 sum 2
|
||||
r4 d4 sum 4
|
||||
r3 d3 sum 8
|
||||
r2 d2 sum 16
|
||||
r1 d1 sum 32
|
||||
r0 d0 sum 64
|
||||
|
||||
vamm sum 0 0
|
||||
|
||||
* Pulse the Start signal high for 1.3uS each 10uS
|
||||
|
||||
Vpulse Start 0 PULSE 0 {vcc} 0.2u 10n 10n 1.3u 10u
|
||||
Vtest input 0 PULSE 0 3 0 200u 200u 1u 401u
|
||||
|
||||
* The ADC for testing
|
||||
|
||||
xtest input vcc start valid d5 d4 d3 d2 d1 d0 clk sar_adc
|
||||
|
||||
|
||||
.control
|
||||
tran 100n 250u
|
||||
plot input xtest.test_v vamm#branch clk/2 start/3 xtest.sample/3 valid
|
||||
.endc
|
||||
.end
|
||||
|
|
@ -1,5 +1,7 @@
|
|||
// Digital control for a successive approximation ADC with switched capacitors.
|
||||
|
||||
`timescale 100ns/100ns
|
||||
|
||||
module adc(Clk, Comp, Start, Sample, Done, Result);
|
||||
input wire Clk, Comp, Start;
|
||||
output reg Sample, Done;
|
||||
|
|
@ -22,14 +24,12 @@ module adc(Clk, Comp, Start, Sample, Done, Result);
|
|||
if (Running) begin
|
||||
if (Sample) begin
|
||||
Sample <= 0;
|
||||
SR[Bits - 1] = 1;
|
||||
Result[Bits - 1] = 1;
|
||||
SR[Bits - 1] <= 1;
|
||||
Result[Bits - 1] <= 1;
|
||||
end else if (SR != 0) begin
|
||||
if (Comp)
|
||||
Result &= ~SR;
|
||||
SR >>= 1;
|
||||
Result |= SR;
|
||||
if (SR == 0) begin
|
||||
Result <= (Comp ? (Result & ~SR) : Result) | (SR >> 1);
|
||||
SR <= SR >> 1;
|
||||
if (SR == 1) begin
|
||||
Running <= 0;
|
||||
Done <= 1;
|
||||
end
|
||||
|
|
@ -38,8 +38,8 @@ module adc(Clk, Comp, Start, Sample, Done, Result);
|
|||
Running <= 1;
|
||||
Sample <= 1;
|
||||
Done <= 0;
|
||||
SR = 0;
|
||||
Result = 0;
|
||||
SR <= 0;
|
||||
Result <= 0;
|
||||
end
|
||||
end
|
||||
endmodule
|
||||
|
|
|
|||
|
|
@ -0,0 +1,11 @@
|
|||
* Waveform generation by Verilog delays
|
||||
*
|
||||
|
||||
adut null [ d4 d3 d2 d1 d0 ] ring
|
||||
.model ring d_cosim simulation="./delay"
|
||||
|
||||
.control
|
||||
tran 20u 100u
|
||||
plot d4 d3 d2 d1 d0 digitop
|
||||
.endc
|
||||
.end
|
||||
|
|
@ -0,0 +1,14 @@
|
|||
`timescale 1us/100ns
|
||||
|
||||
module delay(out);
|
||||
output reg [4:0] out;
|
||||
reg t;
|
||||
|
||||
initial out = 0;
|
||||
always begin
|
||||
#1;
|
||||
t = out[4];
|
||||
out <<= 1;
|
||||
out[0] = ~t;
|
||||
end
|
||||
endmodule; // delay
|
||||
|
|
@ -0,0 +1,12 @@
|
|||
* Waveform generation by PWM in Verilog
|
||||
|
||||
adut null [ out ] pwm_sin
|
||||
.model pwm_sin d_cosim simulation="./pwm"
|
||||
|
||||
r1 out smooth 100k
|
||||
c1 smooth 0 1u
|
||||
.control
|
||||
tran 1m 2
|
||||
plot out-3.3 smooth
|
||||
.endc
|
||||
.end
|
||||
|
|
@ -0,0 +1,34 @@
|
|||
`timescale 1us/100ns
|
||||
|
||||
//`include "constants.vams"
|
||||
`define M_TWO_PI 6.28318530717958647652
|
||||
|
||||
module pwm(out);
|
||||
output reg out;
|
||||
parameter Cycles = 1000, Samples = 1000;
|
||||
integer i, j, width;
|
||||
real sine;
|
||||
|
||||
initial begin
|
||||
i = 0;
|
||||
j = 0;
|
||||
width = Cycles / 2;
|
||||
out = 0;
|
||||
end
|
||||
|
||||
always begin
|
||||
#1;
|
||||
++i;
|
||||
if (i == width)
|
||||
out = 0;
|
||||
if (i == Cycles) begin
|
||||
i = 0;
|
||||
++j;
|
||||
if (j == Samples)
|
||||
j = 0;
|
||||
sine = $sin(j * `M_TWO_PI / Samples);
|
||||
width = $rtoi(Samples * (1.0 + sine) / 2.0);
|
||||
out = (width == 0) ? 0 : 1;
|
||||
end
|
||||
end
|
||||
endmodule // pwm
|
||||
|
|
@ -30,7 +30,7 @@ void com_ghelp(wordlist *wl)
|
|||
"ngspice manual in PDF format at\n"
|
||||
" " BASE_HELP_URL "/ngspice-manual.pdf\n"
|
||||
"or in HTML format at\n"
|
||||
" " BASE_HELP_URL "/ngspice-html-manual/manual.html\n\n");
|
||||
" " BASE_HELP_URL "/ngspice-html-manual/manual.xhtml\n\n");
|
||||
return;
|
||||
|
||||
#else
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/* ngspice file inpc_probe.c
|
||||
Copyright Holger Vogt 2021
|
||||
Copyright Holger Vogt 2021-2024
|
||||
License: BSD 3-clause
|
||||
*/
|
||||
|
||||
|
|
|
|||
|
|
@ -1288,7 +1288,7 @@ static struct inp_read_t inp_read(FILE* fp, int call_depth, const char* dir_name
|
|||
add_to_sourcepath(sourcelineinfo, NULL);
|
||||
}
|
||||
|
||||
wl_append_word(&sourceinfo, &sourceinfo, sourcelineinfo);
|
||||
sourceinfo = wl_cons(sourcelineinfo, sourceinfo);
|
||||
|
||||
/* First read in all lines & put them in the struct cc */
|
||||
for (;;) {
|
||||
|
|
@ -9504,7 +9504,7 @@ int add_to_sourcepath(const char* filepath, const char* path)
|
|||
|
||||
/* if filepath, remove file entry */
|
||||
if (path)
|
||||
fpath = path;
|
||||
fpath = copy(path);
|
||||
else
|
||||
fpath = ngdirname(filepath);
|
||||
|
||||
|
|
@ -9531,5 +9531,6 @@ int add_to_sourcepath(const char* filepath, const char* path)
|
|||
wl_free(wl);
|
||||
}
|
||||
|
||||
tfree(fpath);
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -196,7 +196,7 @@ com_version(wordlist *wl)
|
|||
|
||||
"** The U. C. Berkeley CAD Group\n"
|
||||
"** Copyright 1985-1994, Regents of the University of California.\n"
|
||||
"** Copyright 2001-2023, The ngspice team.\n"
|
||||
"** Copyright 2001-2024, The ngspice team.\n"
|
||||
"** %s\n",
|
||||
ft_sim->simulator, ft_sim->version, ft_sim->description, Spice_Manual);
|
||||
if (*Spice_Notice != '\0')
|
||||
|
|
@ -240,7 +240,7 @@ com_version(wordlist *wl)
|
|||
|
||||
"** The U. C. Berkeley CAD Group\n"
|
||||
"** Copyright 1985-1994, Regents of the University of California.\n"
|
||||
"** Copyright 2001-2023, The ngspice team.\n"
|
||||
"** Copyright 2001-2024, The ngspice team.\n"
|
||||
"** %s\n",
|
||||
ft_sim->simulator, ft_sim->version, ft_sim->description, Spice_Manual);
|
||||
if (*Spice_Notice != '\0')
|
||||
|
|
|
|||
|
|
@ -606,7 +606,8 @@ wordlist_l *wll_cons(
|
|||
|
||||
if (opt & OPT_WLL_COPY_ALL) {
|
||||
char *p_dst = w->wl.wl_word = TMALLOC(char, n_elem_word_alloc);
|
||||
(void) memcpy(p_dst, p_word, n_char_word);
|
||||
if(p_word)
|
||||
(void) memcpy(p_dst, p_word, n_char_word);
|
||||
p_dst += n_char_word;
|
||||
*p_dst = '\0';
|
||||
}
|
||||
|
|
|
|||
|
|
@ -965,6 +965,7 @@ static void killplot(struct plot *pl)
|
|||
/* delete the hash table entry for this plot */
|
||||
if (pl->pl_lookup_table) {
|
||||
nghash_free(pl->pl_lookup_table, NULL, NULL);
|
||||
pl->pl_lookup_table = NULL;
|
||||
}
|
||||
txfree(pl->pl_title);
|
||||
txfree(pl->pl_name);
|
||||
|
|
@ -998,6 +999,7 @@ destroy_const_plot(void)
|
|||
/* delete the hash table entry for the const plot */
|
||||
if (pl->pl_lookup_table) {
|
||||
nghash_free(pl->pl_lookup_table, NULL, NULL);
|
||||
pl->pl_lookup_table = NULL;
|
||||
}
|
||||
wl_free(pl->pl_commands);
|
||||
if (pl->pl_ccom) /* va: also tfree (memory leak) */
|
||||
|
|
|
|||
|
|
@ -1996,11 +1996,8 @@ devmodtranslate(struct card *s, char *subname, wordlist * const orig_modnames)
|
|||
s->line = copy(bxx_buffer(&buffer));
|
||||
break;
|
||||
|
||||
/* 2 or 3 (temp) terminals for diode d, 2 or more for OSDI devices */
|
||||
/* 2 or 3 (temp) terminals for diode d */
|
||||
case 'd':
|
||||
#ifdef OSDI
|
||||
case 'n':
|
||||
#endif
|
||||
name = gettok(&t); /* get refdes */
|
||||
bxx_printf(&buffer, "%s ", name);
|
||||
tfree(name);
|
||||
|
|
@ -2039,8 +2036,48 @@ devmodtranslate(struct card *s, char *subname, wordlist * const orig_modnames)
|
|||
s->line = copy(bxx_buffer(&buffer));
|
||||
break;
|
||||
|
||||
#ifdef OSDI
|
||||
/* 1 or more terinals for OSDI devices*/
|
||||
case 'n':
|
||||
name = gettok(&t); /* get refdes */
|
||||
bxx_printf(&buffer, "%s ", name);
|
||||
tfree(name);
|
||||
name = gettok_node(&t); /* get first attached netname */
|
||||
bxx_printf(&buffer, "%s ", name);
|
||||
tfree(name);
|
||||
name = gettok_node(&t); /* this can be either a model name or a node name. */
|
||||
if (name == NULL) {
|
||||
name = copy(""); /* allow 'tfree' */
|
||||
}
|
||||
else {
|
||||
for (;;) {
|
||||
wlsub = wl_find(name, orig_modnames);
|
||||
if (wlsub) {
|
||||
break;
|
||||
}
|
||||
else {
|
||||
bxx_printf(&buffer, "%s ", name);
|
||||
tfree(name);
|
||||
name = gettok(&t);
|
||||
if (name == NULL) { /* No token anymore - leave */
|
||||
name = copy(""); /* allow 'tfree' */
|
||||
break;
|
||||
}
|
||||
}
|
||||
} /* while */
|
||||
}
|
||||
|
||||
translate_mod_name(&buffer, name, subname, orig_modnames);
|
||||
|
||||
tfree(name);
|
||||
bxx_putc(&buffer, ' ');
|
||||
bxx_put_cstring(&buffer, t);
|
||||
tfree(s->line);
|
||||
s->line = copy(bxx_buffer(&buffer));
|
||||
break;
|
||||
#endif
|
||||
/* 3 terminal devices */
|
||||
case 'u': /* urc transmissionline */
|
||||
/* 3 terminal devices */
|
||||
case 'w': /* current controlled switch */
|
||||
case 'j': /* jfet */
|
||||
case 'z': /* hfet, mesa */
|
||||
|
|
|
|||
|
|
@ -43,7 +43,7 @@ Author: 1986 Wayne A. Christopher, U. C. Berkeley CAD Group
|
|||
bool out_moremode = FALSE;
|
||||
bool out_isatty = TRUE;
|
||||
|
||||
#ifndef TCL_MODULE
|
||||
#if !defined (TCL_MODULE) && !defined (SHARED_MODULE)
|
||||
|
||||
#ifdef HAVE_TERMCAP
|
||||
static char *motion_chars;
|
||||
|
|
|
|||
|
|
@ -1,4 +1,6 @@
|
|||
/* Header file for the shim code between d_cosim and a co-simulator. */
|
||||
/* Header file for the shim code between XSPICE and a co-simulator
|
||||
* attached by the d_cosim code model.
|
||||
*/
|
||||
|
||||
#if __cplusplus
|
||||
extern "C" {
|
||||
|
|
@ -12,7 +14,7 @@ extern "C" {
|
|||
* so step() must be called after input.
|
||||
*/
|
||||
|
||||
typedef enum {Normal, After_input} Cosim_method;
|
||||
typedef enum {Normal, After_input, Both} Cosim_method;
|
||||
|
||||
/* Structure used by Cosim_setup() to pass and return
|
||||
* co-simulation interface information.
|
||||
|
|
@ -26,7 +28,8 @@ struct co_info {
|
|||
unsigned int inout_count;
|
||||
|
||||
/* The co-simulator may specify a function to be called just before
|
||||
* it is unloaded at the end of a simulation run.
|
||||
* it is unloaded at the end of a simulation run. It should not free
|
||||
* this structure.
|
||||
*/
|
||||
|
||||
void (*cleanup)(struct co_info *);
|
||||
|
|
@ -59,8 +62,21 @@ struct co_info {
|
|||
|
||||
void (*out_fn)(struct co_info *, unsigned int, Digital_t *);
|
||||
void *handle; // Co-simulator's private handle
|
||||
double vtime; // Time in the co-simulation.
|
||||
volatile double vtime; // Time in the co-simulation.
|
||||
Cosim_method method; // May be set in Cosim_setup;
|
||||
|
||||
/* Arguments for the co-simulator shim and the simulation itself
|
||||
* are taken from parameters in the .model card.
|
||||
*/
|
||||
|
||||
unsigned int lib_argc;
|
||||
unsigned int sim_argc;
|
||||
const char * const * const lib_argv;
|
||||
const char * const * const sim_argv;
|
||||
|
||||
/* Utility function for access to dynamic libraries. */
|
||||
|
||||
void *(*dlopen_fn)(const char *fn);
|
||||
};
|
||||
|
||||
extern void Cosim_setup(struct co_info *pinfo); // This must exist.
|
||||
|
|
|
|||
|
|
@ -96,6 +96,10 @@ Locking and unlocking the realloc of output vectors during simulation. May be se
|
|||
during reading output vectors in the primary thread, while the simulation in the
|
||||
background thread is moving on.
|
||||
|
||||
**
|
||||
int ngSpice_Reset(void)
|
||||
Reset ngspice as far as possible
|
||||
|
||||
**
|
||||
Additional basics:
|
||||
No memory mallocing and freeing across the interface:
|
||||
|
|
@ -111,7 +115,7 @@ are of type bool if sharedspice.h is used externally.
|
|||
*/
|
||||
|
||||
#ifndef NGSPICE_PACKAGE_VERSION
|
||||
#define NGSPICE_PACKAGE_VERSION "42+"
|
||||
#define NGSPICE_PACKAGE_VERSION "43+"
|
||||
#endif
|
||||
/* we have NG_BOOL instead of BOOL */
|
||||
#ifndef HAS_NG_BOOL
|
||||
|
|
|
|||
|
|
@ -40,7 +40,7 @@ ft_interpolate(double *data, double *ndata, double *oscale, int olen,
|
|||
double *nscale, int nlen, int degree)
|
||||
{
|
||||
double *result, *scratch, *xdata, *ydata, diff;
|
||||
int sign, lastone, i, l, middle, tdegree;
|
||||
int sign = 1, lastone, i, l, middle, tdegree;
|
||||
|
||||
if ((olen < 2) || (nlen < 2)) {
|
||||
fprintf(cp_err, "Error: lengths too small to interpolate.\n");
|
||||
|
|
|
|||
|
|
@ -78,7 +78,7 @@ char *dup_string(const char *str, size_t n_char)
|
|||
char *p = TMALLOC(char, n_char + 1);
|
||||
|
||||
if (p != NULL) {
|
||||
(void) memcpy(p, str, n_char + 1);
|
||||
(void) memcpy(p, str, n_char);
|
||||
p[n_char] = '\0';
|
||||
}
|
||||
return p;
|
||||
|
|
|
|||
|
|
@ -27,7 +27,7 @@ void osdi_log(void *handle_, char *msg, uint32_t lvl) {
|
|||
dst = stderr;
|
||||
break;
|
||||
default:
|
||||
fprintf(stderr, "OSDI(unkown) %s", handle->name);
|
||||
fprintf(stderr, "OSDI(unknown) %s", handle->name);
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -411,7 +411,7 @@ extern OsdiObjectFile load_object_file(const char *input) {
|
|||
IS_LIM_FUN("fetlim", 1, osdi_fetlim)
|
||||
IS_LIM_FUN("limitlog", 1, osdi_limitlog)
|
||||
if (expected_args == -1) {
|
||||
printf("warning(osdi): unkown $limit function \"%s\"", lim_table[i].name);
|
||||
printf("warning(osdi): unknown $limit function \"%s\"", lim_table[i].name);
|
||||
} else {
|
||||
printf("warning(osdi): unexpected number of arguments %i (expected %i) "
|
||||
"for \"%s\", ignoring...",
|
||||
|
|
|
|||
|
|
@ -162,10 +162,10 @@ static int init_matrix(SMPmatrix *matrix, const OsdiDescriptor *descr,
|
|||
|
||||
for (uint32_t i = 0; i < descr->num_jacobian_entries; i++) {
|
||||
uint32_t equation = descr->jacobian_entries[i].nodes.node_1;
|
||||
uint32_t unkown = descr->jacobian_entries[i].nodes.node_2;
|
||||
uint32_t unknown = descr->jacobian_entries[i].nodes.node_2;
|
||||
equation = node_mapping[equation];
|
||||
unkown = node_mapping[unkown];
|
||||
double *ptr = SMPmakeElt(matrix, (int)equation, (int)unkown);
|
||||
unknown = node_mapping[unknown];
|
||||
double *ptr = SMPmakeElt(matrix, (int)equation, (int)unknown);
|
||||
|
||||
if (ptr == NULL) {
|
||||
return (E_NOMEM);
|
||||
|
|
@ -424,10 +424,10 @@ static int init_matrix_klu(SMPmatrix *matrix, const OsdiDescriptor *descr,
|
|||
|
||||
for (uint32_t i = 0; i < descr->num_jacobian_entries; i++) {
|
||||
uint32_t equation = descr->jacobian_entries[i].nodes.node_1;
|
||||
uint32_t unkown = descr->jacobian_entries[i].nodes.node_2;
|
||||
uint32_t unknown = descr->jacobian_entries[i].nodes.node_2;
|
||||
equation = node_mapping[equation];
|
||||
unkown = node_mapping[unkown];
|
||||
if (equation != 0 && unkown != 0) {
|
||||
unknown = node_mapping[unknown];
|
||||
if (equation != 0 && unknown != 0) {
|
||||
tmp.COO = jacobian_ptr_resist[i];
|
||||
tmp.CSC = NULL;
|
||||
tmp.CSC_Complex = NULL;
|
||||
|
|
@ -461,10 +461,10 @@ static int update_matrix_klu(const OsdiDescriptor *descr, void *inst,
|
|||
|
||||
for (uint32_t i = 0; i < descr->num_jacobian_entries; i++) {
|
||||
uint32_t equation = descr->jacobian_entries[i].nodes.node_1;
|
||||
uint32_t unkown = descr->jacobian_entries[i].nodes.node_2;
|
||||
uint32_t unknown = descr->jacobian_entries[i].nodes.node_2;
|
||||
equation = node_mapping[equation];
|
||||
unkown = node_mapping[unkown];
|
||||
if (equation != 0 && unkown != 0) {
|
||||
unknown = node_mapping[unknown];
|
||||
if (equation != 0 && unknown != 0) {
|
||||
jacobian_ptr_resist[i] = inst_matrix_ptrs[2 * i + complex];
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -352,6 +352,22 @@ static char* outstorage(char*, bool);
|
|||
static void printsend(void);
|
||||
#endif
|
||||
|
||||
extern wordlist* sourceinfo;
|
||||
|
||||
static int totalreset(void);
|
||||
extern void rem_controls(void);
|
||||
extern void destroy_wallace(void);
|
||||
extern void sh_delete_myvec(void);
|
||||
extern IFsimulator SIMinfo;
|
||||
extern void spice_destroy_devices(void); /* FIXME need a better place */
|
||||
|
||||
extern void destroy_const_plot(void);
|
||||
extern void com_destroy(wordlist* wl);
|
||||
extern void com_unalias(wordlist* wl);
|
||||
extern void com_undefine(wordlist* wl);
|
||||
extern void com_remcirc(wordlist* wl);
|
||||
extern void unset_all(void);
|
||||
|
||||
#include "ngspice/sharedspice.h"
|
||||
|
||||
static SendChar* pfcn;
|
||||
|
|
@ -1083,6 +1099,10 @@ sh_delete_myvec(void)
|
|||
IMPEXP
|
||||
int ngSpice_Command(char* comexec)
|
||||
{
|
||||
if (!is_initialized) {
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* delete existing command memory */
|
||||
if (comexec == NULL) {
|
||||
cp_resetcontrol(FALSE);
|
||||
|
|
@ -1367,6 +1387,15 @@ int ngSpice_UnlockRealloc(void)
|
|||
return 1;
|
||||
}
|
||||
|
||||
/* Reset ngspice as far as possible */
|
||||
IMPEXP
|
||||
int ngSpice_Reset(void)
|
||||
{
|
||||
if (!is_initialized)
|
||||
return 1;
|
||||
fprintf(stdout, "Note: Resetting ngspice\n\n");
|
||||
return totalreset();
|
||||
}
|
||||
|
||||
/* add the preliminary breakpoints to the list.
|
||||
called from dctran.c */
|
||||
|
|
@ -2034,12 +2063,12 @@ ATTRIBUTE_NORETURN void shared_exit(int status)
|
|||
hand this information over to caller */
|
||||
if (status >= 1000) {
|
||||
coquit = TRUE;
|
||||
fprintf(stdout, "\nNote: 'quit' asks for detaching ngspice.dll.\n");
|
||||
fprintf(stdout, "\nNote: 'quit' asks for resetting or detaching ngspice.dll.\n");
|
||||
status -= 1000;
|
||||
}
|
||||
else {
|
||||
coquit = FALSE;
|
||||
fprintf(stderr, "Error: ngspice.dll cannot recover and awaits to be detached\n");
|
||||
fprintf(stderr, "Error: ngspice.dll cannot recover and awaits to be reset or detached\n");
|
||||
}
|
||||
#ifndef low_latency
|
||||
// set flag to stop the printsend thread
|
||||
|
|
@ -2402,3 +2431,100 @@ void shared_send_dict(int index, int no_of_nodes, char* name, char*type)
|
|||
sendinitevt(index, no_of_nodes, name, type, ng_ident, euserptr);
|
||||
}
|
||||
#endif
|
||||
|
||||
static int totalreset(void)
|
||||
{
|
||||
|
||||
is_initialized = FALSE;
|
||||
|
||||
// if we are in a worker thread, we exit it here
|
||||
// detaching then has to be done explicitely by the caller
|
||||
if (fl_running && !fl_exited) {
|
||||
fl_exited = TRUE;
|
||||
bgtr(fl_exited, ng_ident, userptr);
|
||||
// finish and exit the worker thread
|
||||
#ifdef HAVE_LIBPTHREAD
|
||||
pthread_exit(NULL);
|
||||
#elif defined _MSC_VER || defined __MINGW32__
|
||||
_endthreadex(1);
|
||||
#endif
|
||||
}
|
||||
|
||||
/* start to clean up the mess */
|
||||
|
||||
noprintfwanted = FALSE;
|
||||
nostatuswanted = FALSE;
|
||||
nodatawanted = FALSE;
|
||||
nodatainitwanted = FALSE;
|
||||
nobgtrwanted = FALSE;
|
||||
wantvdat = FALSE;
|
||||
wantidat = FALSE;
|
||||
wantsync = FALSE;
|
||||
immediate = FALSE;
|
||||
coquit = FALSE;
|
||||
|
||||
wordlist all = { "all", NULL, NULL };
|
||||
wordlist star = { "*", NULL, NULL };
|
||||
|
||||
tfree(Infile_Path);
|
||||
wl_free(sourceinfo);
|
||||
sourceinfo = NULL;
|
||||
|
||||
com_destroy(&all);
|
||||
com_unalias(&star);
|
||||
com_undefine(&star);
|
||||
|
||||
cp_remvar("history");
|
||||
cp_remvar("noglob");
|
||||
cp_remvar("brief");
|
||||
cp_remvar("sourcepath");
|
||||
cp_remvar("program");
|
||||
cp_remvar("prompt");
|
||||
|
||||
destroy_wallace();
|
||||
|
||||
rem_controls();
|
||||
|
||||
while (ft_curckt) {
|
||||
com_remcirc(NULL);
|
||||
}
|
||||
|
||||
cp_destroy_keywords();
|
||||
destroy_ivars();
|
||||
|
||||
tfree(errMsg);
|
||||
|
||||
destroy_const_plot();
|
||||
spice_destroy_devices();
|
||||
unset_all();
|
||||
cp_resetcontrol(FALSE);
|
||||
sh_delete_myvec();
|
||||
|
||||
#ifdef THREADS
|
||||
/* Destroy the mutexes */
|
||||
#ifdef HAVE_LIBPTHREAD
|
||||
pthread_mutex_destroy(&triggerMutex);
|
||||
pthread_mutex_destroy(&allocMutex);
|
||||
pthread_mutex_destroy(&fputsMutex);
|
||||
pthread_mutex_destroy(&vecreallocMutex);
|
||||
cont_condition = FALSE;
|
||||
#else
|
||||
#ifdef SRW
|
||||
/* Do we need to remove the SWR locks? */
|
||||
// InitializeSRWLock(&triggerMutex);
|
||||
// InitializeSRWLock(&allocMutex);
|
||||
// InitializeSRWLock(&fputsMutex);
|
||||
// InitializeSRWLock(&vecreallocMutex);
|
||||
#else
|
||||
DeleteCriticalSection(&triggerMutex);
|
||||
DeleteCriticalSection(&allocMutex);
|
||||
DeleteCriticalSection(&fputsMutex);
|
||||
DeleteCriticalSection(&vecreallocMutex);
|
||||
#endif
|
||||
#endif
|
||||
// Id of primary thread
|
||||
main_id = 0;
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -3150,41 +3150,41 @@ void BSIM3LoadRhsMat(GENmodel *inModel, CKTcircuit *ckt)
|
|||
(*(ckt->CKTrhs + here->BSIM3qNode) += here->BSIM3rhsQ);
|
||||
|
||||
/* Update A for Ax = b */
|
||||
(*(here->BSIM3DdPtr) += here->BSIM3DdPt);
|
||||
(*(here->BSIM3GgPtr) += here->BSIM3GgPt);
|
||||
(*(here->BSIM3SsPtr) += here->BSIM3SsPt);
|
||||
(*(here->BSIM3BbPtr) += here->BSIM3BbPt);
|
||||
(*(here->BSIM3DPdpPtr) += here->BSIM3DPdpPt);
|
||||
(*(here->BSIM3SPspPtr) += here->BSIM3SPspPt);
|
||||
(*(here->BSIM3DdpPtr) -= here->BSIM3DdpPt);
|
||||
(*(here->BSIM3GbPtr) -= here->BSIM3GbPt);
|
||||
(*(here->BSIM3GdpPtr) += here->BSIM3GdpPt);
|
||||
(*(here->BSIM3GspPtr) += here->BSIM3GspPt);
|
||||
(*(here->BSIM3SspPtr) -= here->BSIM3SspPt);
|
||||
(*(here->BSIM3BgPtr) += here->BSIM3BgPt);
|
||||
(*(here->BSIM3BdpPtr) += here->BSIM3BdpPt);
|
||||
(*(here->BSIM3BspPtr) += here->BSIM3BspPt);
|
||||
(*(here->BSIM3DPdPtr) -= here->BSIM3DPdPt);
|
||||
(*(here->BSIM3DPgPtr) += here->BSIM3DPgPt);
|
||||
(*(here->BSIM3DPbPtr) -= here->BSIM3DPbPt);
|
||||
(*(here->BSIM3DPspPtr) -= here->BSIM3DPspPt);
|
||||
(*(here->BSIM3SPgPtr) += here->BSIM3SPgPt);
|
||||
(*(here->BSIM3SPsPtr) -= here->BSIM3SPsPt);
|
||||
(*(here->BSIM3SPbPtr) -= here->BSIM3SPbPt);
|
||||
(*(here->BSIM3SPdpPtr) -= here->BSIM3SPdpPt);
|
||||
(*(here->BSIM3DdPtr) += here->BSIM3DdPt);
|
||||
(*(here->BSIM3GgPtr) += here->BSIM3GgPt);
|
||||
(*(here->BSIM3SsPtr) += here->BSIM3SsPt);
|
||||
(*(here->BSIM3BbPtr) += here->BSIM3BbPt);
|
||||
(*(here->BSIM3DPdpPtr) += here->BSIM3DPdpPt);
|
||||
(*(here->BSIM3SPspPtr) += here->BSIM3SPspPt);
|
||||
(*(here->BSIM3DdpPtr) -= here->BSIM3DdpPt);
|
||||
(*(here->BSIM3GbPtr) -= here->BSIM3GbPt);
|
||||
(*(here->BSIM3GdpPtr) += here->BSIM3GdpPt);
|
||||
(*(here->BSIM3GspPtr) += here->BSIM3GspPt);
|
||||
(*(here->BSIM3SspPtr) -= here->BSIM3SspPt);
|
||||
(*(here->BSIM3BgPtr) += here->BSIM3BgPt);
|
||||
(*(here->BSIM3BdpPtr) += here->BSIM3BdpPt);
|
||||
(*(here->BSIM3BspPtr) += here->BSIM3BspPt);
|
||||
(*(here->BSIM3DPdPtr) -= here->BSIM3DPdPt);
|
||||
(*(here->BSIM3DPgPtr) += here->BSIM3DPgPt);
|
||||
(*(here->BSIM3DPbPtr) -= here->BSIM3DPbPt);
|
||||
(*(here->BSIM3DPspPtr) -= here->BSIM3DPspPt);
|
||||
(*(here->BSIM3SPgPtr) += here->BSIM3SPgPt);
|
||||
(*(here->BSIM3SPsPtr) -= here->BSIM3SPsPt);
|
||||
(*(here->BSIM3SPbPtr) -= here->BSIM3SPbPt);
|
||||
(*(here->BSIM3SPdpPtr) -= here->BSIM3SPdpPt);
|
||||
|
||||
if (here->BSIM3nqsMod)
|
||||
{ *(here->BSIM3QqPtr) += here->BSIM3QqPt;
|
||||
if (here->BSIM3nqsMod)
|
||||
{ *(here->BSIM3QqPtr) += here->BSIM3QqPt;
|
||||
|
||||
*(here->BSIM3DPqPtr) += here->BSIM3DPqPt;
|
||||
*(here->BSIM3SPqPtr) += here->BSIM3SPqPt;
|
||||
*(here->BSIM3GqPtr) -= here->BSIM3GqPt;
|
||||
*(here->BSIM3DPqPtr) += here->BSIM3DPqPt;
|
||||
*(here->BSIM3SPqPtr) += here->BSIM3SPqPt;
|
||||
*(here->BSIM3GqPtr) -= here->BSIM3GqPt;
|
||||
|
||||
*(here->BSIM3QgPtr) += here->BSIM3QgPt;
|
||||
*(here->BSIM3QdpPtr) += here->BSIM3QdpPt;
|
||||
*(here->BSIM3QspPtr) += here->BSIM3QspPt;
|
||||
*(here->BSIM3QbPtr) += here->BSIM3QbPt;
|
||||
}
|
||||
*(here->BSIM3QgPtr) += here->BSIM3QgPt;
|
||||
*(here->BSIM3QdpPtr) += here->BSIM3QdpPt;
|
||||
*(here->BSIM3QspPtr) += here->BSIM3QspPt;
|
||||
*(here->BSIM3QbPtr) += here->BSIM3QbPt;
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1732,7 +1732,7 @@ B4SOIinstance **InstArray;
|
|||
if (!model->B4SOIpfbjtiiGiven)
|
||||
model->B4SOIpfbjtii = 0.0;
|
||||
/*4.1 Iii model*/
|
||||
if (!model->B4SOIpebjtiiGiven)
|
||||
if (!model->B4SOIpebjtiiGiven)
|
||||
model->B4SOIpebjtii = 0.0;
|
||||
if (!model->B4SOIpcbjtiiGiven)
|
||||
model->B4SOIpcbjtii = 0.0;
|
||||
|
|
@ -1775,7 +1775,7 @@ B4SOIinstance **InstArray;
|
|||
if (!model->B4SOIpfgidlGiven)
|
||||
model->B4SOIpfgidl = 0.0;
|
||||
|
||||
if (!model->B4SOIpagislGiven)
|
||||
if (!model->B4SOIpagislGiven)
|
||||
model->B4SOIpagisl = 0.0;
|
||||
if (!model->B4SOIpbgislGiven)
|
||||
model->B4SOIpbgisl = 0.0;
|
||||
|
|
|
|||
|
|
@ -33,7 +33,7 @@ void DIOtempUpdate(DIOmodel *inModel, DIOinstance *here, double Temp, CKTcircuit
|
|||
double egfet1,arg1,fact1,pbfact1,pbo,gmaold,pboSW,gmaSWold;
|
||||
double fact2,pbfact,arg,egfet,gmanew,gmaSWnew;
|
||||
double arg1_dT, arg2, arg2_dT;
|
||||
double lnTRatio, egfet_dT, arg0, vte_dT, vts_dT, vtt_dT, vtr_dT;
|
||||
double lnTRatio, egfet_dT = 0.0, arg0, vte_dT, vts_dT, vtt_dT, vtr_dT;
|
||||
|
||||
vt = CONSTKoverQ * Temp;
|
||||
vte = model->DIOemissionCoeff * vt;
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/**********
|
||||
License : 3-clause BSD
|
||||
Spice3 Implementation: 2019-2020 Dietmar Warning, Markus Müller, Mario Krattenmacher
|
||||
Model Author : 1990 Michael Schröter TU Dresden
|
||||
Model Author : (Copyright 1993-2024) Michael Schroter
|
||||
**********/
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/**********
|
||||
License : 3-clause BSD
|
||||
Spice3 Implementation: 2019-2020 Dietmar Warning, Markus Müller, Mario Krattenmacher
|
||||
Model Author : 1990 Michael Schröter TU Dresden
|
||||
Model Author : (Copyright 1993-2024) Michael Schroter
|
||||
**********/
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/**********
|
||||
License : 3-clause BSD
|
||||
Spice3 Implementation: 2019-2020 Dietmar Warning, Markus Müller, Mario Krattenmacher
|
||||
Model Author : 1990 Michael Schröter TU Dresden
|
||||
Model Author : (Copyright 1993-2024) Michael Schroter
|
||||
**********/
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/**********
|
||||
License : 3-clause BSD
|
||||
Spice3 Implementation: 2019-2020 Dietmar Warning, Markus Müller, Mario Krattenmacher
|
||||
Model Author : 1990 Michael Schröter TU Dresden
|
||||
Model Author : (Copyright 1993-2024) Michael Schroter
|
||||
**********/
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/**********
|
||||
License : 3-clause BSD
|
||||
Spice3 Implementation: 2019-2020 Dietmar Warning, Markus Müller, Mario Krattenmacher
|
||||
Model Author : 1990 Michael Schröter TU Dresden
|
||||
Model Author : (Copyright 1993-2024) Michael Schroter
|
||||
**********/
|
||||
|
||||
#ifndef HICUM
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/**********
|
||||
License : 3-clause BSD
|
||||
Spice3 Implementation: 2019-2020 Dietmar Warning, Markus Müller, Mario Krattenmacher
|
||||
Model Author : 1990 Michael Schröter TU Dresden
|
||||
Model Author : (Copyright 1993-2024) Michael Schroter
|
||||
**********/
|
||||
#ifndef __HICUMEXT_H
|
||||
#define __HICUMEXT_H
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/**********
|
||||
License : 3-clause BSD
|
||||
Spice3 Implementation: 2019-2020 Dietmar Warning, Markus Müller, Mario Krattenmacher
|
||||
Model Author : 1990 Michael Schröter TU Dresden
|
||||
Model Author : (Copyright 1993-2024) Michael Schroter
|
||||
**********/
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/**********
|
||||
License : 3-clause BSD
|
||||
Spice3 Implementation: 2019-2020 Dietmar Warning, Markus Müller, Mario Krattenmacher
|
||||
Model Author : 1990 Michael Schröter TU Dresden
|
||||
Model Author : (Copyright 1993-2024) Michael Schroter
|
||||
**********/
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/**********
|
||||
License : 3-clause BSD
|
||||
Spice3 Implementation: 2019-2020 Dietmar Warning, Markus Müller, Mario Krattenmacher
|
||||
Model Author : 1990 Michael Schröter TU Dresden
|
||||
Model Author : (Copyright 1993-2024) Michael Schroter
|
||||
**********/
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/**********
|
||||
License : 3-clause BSD
|
||||
Spice3 Implementation: 2019-2020 Dietmar Warning, Markus Müller, Mario Krattenmacher
|
||||
Model Author : 1990 Michael Schröter TU Dresden
|
||||
Model Author : (Copyright 1993-2024) Michael Schroter
|
||||
**********/
|
||||
#ifndef DEV_HICUM
|
||||
#define DEV_HICUM
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/**********
|
||||
License : 3-clause BSD
|
||||
Spice3 Implementation: 2019-2020 Dietmar Warning, Markus Müller, Mario Krattenmacher
|
||||
Model Author : 1990 Michael Schröter TU Dresden
|
||||
Model Author : (Copyright 1993-2024) Michael Schroter
|
||||
**********/
|
||||
|
||||
#include "ngspice/ngspice.h"
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/**********
|
||||
License : 3-clause BSD
|
||||
Spice3 Implementation: 2019-2020 Dietmar Warning, Markus Müller, Mario Krattenmacher
|
||||
Model Author : 1990 Michael Schröter TU Dresden
|
||||
Model Author : (Copyright 1993-2024) Michael Schroter
|
||||
**********/
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/**********
|
||||
License : 3-clause BSD
|
||||
Spice3 Implementation: 2019-2020 Dietmar Warning, Markus Müller, Mario Krattenmacher
|
||||
Model Author : 1990 Michael Schröter TU Dresden
|
||||
Model Author : (Copyright 1993-2024) Michael Schroter
|
||||
**********/
|
||||
|
||||
#include "ngspice/ngspice.h"
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/**********
|
||||
License : 3-clause BSD
|
||||
Spice3 Implementation: 2019-2020 Dietmar Warning, Markus Müller, Mario Krattenmacher
|
||||
Model Author : 1990 Michael Schröter TU Dresden
|
||||
Model Author : (Copyright 1993-2024) Michael Schroter
|
||||
**********/
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/**********
|
||||
License : 3-clause BSD
|
||||
Spice3 Implementation: 2019-2020 Dietmar Warning, Markus Müller, Mario Krattenmacher
|
||||
Model Author : 1990 Michael Schröter TU Dresden
|
||||
Model Author : (Copyright 1993-2024) Michael Schroter
|
||||
**********/
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/**********
|
||||
License : 3-clause BSD
|
||||
Spice3 Implementation: 2019-2020 Dietmar Warning, Markus Müller, Mario Krattenmacher
|
||||
Model Author : 1990 Michael Schröter TU Dresden
|
||||
Model Author : (Copyright 1993-2024) Michael Schroter
|
||||
**********/
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/**********
|
||||
License : 3-clause BSD
|
||||
Spice3 Implementation: 2019-2020 Dietmar Warning, Markus Müller, Mario Krattenmacher
|
||||
Model Author : 1990 Michael Schröter TU Dresden
|
||||
Model Author : (Copyright 1993-2024) Michael Schroter
|
||||
**********/
|
||||
|
||||
#include "ngspice/ngspice.h"
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/**********
|
||||
License : 3-clause BSD
|
||||
Spice3 Implementation: 2019-2020 Dietmar Warning, Markus Müller, Mario Krattenmacher
|
||||
Model Author : 1990 Michael Schröter TU Dresden
|
||||
Model Author : (Copyright 1993-2024) Michael Schroter
|
||||
**********/
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/**********
|
||||
License : 3-clause BSD
|
||||
Spice3 Implementation: 2019-2020 Dietmar Warning, Markus Müller, Mario Krattenmacher
|
||||
Model Author : 1990 Michael Schröter TU Dresden
|
||||
Model Author : (Copyright 1993-2024) Michael Schroter
|
||||
**********/
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/**********
|
||||
License : 3-clause BSD
|
||||
Spice3 Implementation: 2019-2020 Dietmar Warning, Markus Müller, Mario Krattenmacher
|
||||
Model Author : 1990 Michael Schröter TU Dresden
|
||||
Model Author : (Copyright 1993-2024) Michael Schroter
|
||||
**********/
|
||||
#ifndef hicumL2_H
|
||||
#define hicumL2_H
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/**********
|
||||
License : 3-clause BSD
|
||||
Spice3 Implementation: 2019-2020 Dietmar Warning, Markus Müller, Mario Krattenmacher
|
||||
Model Author : 1990 Michael Schröter TU Dresden
|
||||
Model Author : (Copyright 1993-2024) Michael Schroter
|
||||
**********/
|
||||
|
||||
#include <cmath>
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/**********
|
||||
License : 3-clause BSD
|
||||
Spice3 Implementation: 2019-2020 Dietmar Warning, Markus Müller, Mario Krattenmacher
|
||||
Model Author : 1990 Michael Schröter TU Dresden
|
||||
Model Author : (Copyright 1993-2024) Michael Schroter
|
||||
**********/
|
||||
#ifndef hicumL2_temp
|
||||
#define hicumL2_temp
|
||||
|
|
|
|||
|
|
@ -3189,7 +3189,7 @@ while( START_OF_SCE_LOOP ) { /* Begin: 1st SCE LOOP */
|
|||
* - Psa : Analytical solution of
|
||||
* Cox( Vgp - Psa ) = cnst0 * Qacc
|
||||
* where Qacc is the 3-degree series of (fdep)^{1/2}.
|
||||
* The unkown is transformed to Chi=beta(Ps0-Vbs).
|
||||
* The unknown is transformed to Chi=beta(Ps0-Vbs).
|
||||
* - Ps0_min : |Ps0_min| when Vbs=0.
|
||||
*-----------------*/
|
||||
|
||||
|
|
|
|||
|
|
@ -2137,7 +2137,7 @@ int HSMHVevaluate
|
|||
* - Psa : Analytical solution of
|
||||
* Cox( Vgp - Psa ) = cnst0 * Qacc
|
||||
* where Qacc is the 3-degree series of (fdep)^{1/2}.
|
||||
* The unkown is transformed to Chi=beta(Ps0-Vbs).
|
||||
* The unknown is transformed to Chi=beta(Ps0-Vbs).
|
||||
* - Ps0_min : |Ps0_min| when Vbs=0.
|
||||
*-----------------*/
|
||||
Ps0_min = here->HSMHV_eg - Pb2 ;
|
||||
|
|
|
|||
|
|
@ -2067,7 +2067,7 @@ int HSMHV2evaluate
|
|||
* - Psa : Analytical solution of
|
||||
* Cox( Vgp - Psa ) = cnst0 * Qacc
|
||||
* where Qacc is the 3-degree series of (fdep)^{1/2}.
|
||||
* The unkown is transformed to Chi=beta(Ps0-Vbs).
|
||||
* The unknown is transformed to Chi=beta(Ps0-Vbs).
|
||||
* - Ps0_min : |Ps0_min| when Vbs=0.
|
||||
*-----------------*/
|
||||
/* Ps0_min: approx. solution of Poisson equation at Vgs_min */
|
||||
|
|
|
|||
|
|
@ -12,6 +12,8 @@ Modified: Apr 2000 - Paolo Nenzi
|
|||
#include "ngspice/missing_math.h"
|
||||
#include "ngspice/fteext.h"
|
||||
|
||||
#define RESMIN 1e-6
|
||||
|
||||
int
|
||||
RESparam(int param, IFvalue *value, GENinstance *inst, IFvalue *select)
|
||||
{
|
||||
|
|
@ -37,7 +39,15 @@ RESparam(int param, IFvalue *value, GENinstance *inst, IFvalue *select)
|
|||
break;
|
||||
case RES_RESIST:
|
||||
/* 0 valued resistor causes ngspice to hang -- can't solve for initial voltage */
|
||||
if ( AlmostEqualUlps( value->rValue, 0, 3 ) ) value->rValue = 0.001; /* 0.001 should be sufficiently small */
|
||||
// if ( AlmostEqualUlps( value->rValue, 0, 3 ) ) value->rValue = 0.001; /* 0.001 should be sufficiently small */
|
||||
if (value->rValue >= 0 && value->rValue < RESMIN) {
|
||||
fprintf(stderr, "Warning: Value of resistor %s is too small, set to %e\n", here->gen.GENname, RESMIN);
|
||||
value->rValue = RESMIN;
|
||||
}
|
||||
else if (value->rValue < 0 && value->rValue > -RESMIN) {
|
||||
fprintf(stderr, "Warning: Value of resistor %s is too small, set to %e\n", here->gen.GENname, -RESMIN);
|
||||
value->rValue = -RESMIN;
|
||||
}
|
||||
here->RESresist = value->rValue;
|
||||
here->RESresGiven = TRUE;
|
||||
break;
|
||||
|
|
|
|||
|
|
@ -32,6 +32,17 @@ VBICacLoad(GENmodel *inModel, CKTcircuit *ckt)
|
|||
XQbcx_Vbcx, XQbep_Vbep, XQbep_Vbci,
|
||||
XQbcp_Vbcp, XQbeo_Vbe, XQbco_Vbc;
|
||||
|
||||
double Ibe_Vrth, Ibex_Vrth, Itzf_Vrth=0.0, Itzr_Vrth, Ibc_Vrth, Ibep_Vrth,
|
||||
Ircx_Vrth, Irci_Vrth, Irbx_Vrth, Irbi_Vrth, Ire_Vrth, Irbp_Vrth,
|
||||
Ibcp_Vrth, Iccp_Vrth, Irs_Vrth, Irth_Vrth, Ith_Vrth,
|
||||
Ith_Vbei, Ith_Vbci, Ith_Vcei, Ith_Vbex, Ith_Vbep, Ith_Vbcp, Ith_Vcep,
|
||||
Ith_Vrci, Ith_Vbcx, Ith_Vrbi, Ith_Vrbp, Ith_Vrcx, Ith_Vrbx, Ith_Vre, Ith_Vrs;
|
||||
double XQcth_Vrth, XQbe_Vrth, XQbex_Vrth, XQbc_Vrth, XQbcx_Vrth, XQbep_Vrth, XQbcp_Vrth;
|
||||
|
||||
//NQS
|
||||
double Itxf_Vrxf, Ibc_Vrxf, Ith_Vrxf, Ixzf_Vrth, Ixxf_Vrxf, XQcxf_Vcxf;
|
||||
double Ixzf_Vbei, Ixzf_Vbci, Xl;
|
||||
|
||||
/* loop through all the models */
|
||||
for( ; model != NULL; model = VBICnextModel(model)) {
|
||||
|
||||
|
|
@ -83,17 +94,20 @@ c Stamp element: Ibex
|
|||
*(here->VBICbaseBXEmitEIPtr) += -Ibex_Vbex;
|
||||
*(here->VBICemitEIBaseBXPtr) += -Ibex_Vbex;
|
||||
*(here->VBICemitEIEmitEIPtr) += Ibex_Vbex;
|
||||
|
||||
if (!here->VBIC_excessPhase) {
|
||||
/*
|
||||
c Stamp element: Itzf
|
||||
*/
|
||||
*(here->VBICcollCIBaseBIPtr) += Itzf_Vbei;
|
||||
*(here->VBICcollCIEmitEIPtr) += -Itzf_Vbei;
|
||||
*(here->VBICcollCIBaseBIPtr) += Itzf_Vbci;
|
||||
*(here->VBICcollCICollCIPtr) += -Itzf_Vbci;
|
||||
*(here->VBICemitEIBaseBIPtr) += -Itzf_Vbei;
|
||||
*(here->VBICemitEIEmitEIPtr) += Itzf_Vbei;
|
||||
*(here->VBICemitEIBaseBIPtr) += -Itzf_Vbci;
|
||||
*(here->VBICemitEICollCIPtr) += Itzf_Vbci;
|
||||
*(here->VBICcollCIBaseBIPtr) += Itzf_Vbei;
|
||||
*(here->VBICcollCIEmitEIPtr) += -Itzf_Vbei;
|
||||
*(here->VBICcollCIBaseBIPtr) += Itzf_Vbci;
|
||||
*(here->VBICcollCICollCIPtr) += -Itzf_Vbci;
|
||||
*(here->VBICemitEIBaseBIPtr) += -Itzf_Vbei;
|
||||
*(here->VBICemitEIEmitEIPtr) += Itzf_Vbei;
|
||||
*(here->VBICemitEIBaseBIPtr) += -Itzf_Vbci;
|
||||
*(here->VBICemitEICollCIPtr) += Itzf_Vbci;
|
||||
}
|
||||
/*
|
||||
c Stamp element: Itzr
|
||||
*/
|
||||
|
|
@ -218,6 +232,200 @@ c Stamp element: Rs
|
|||
*(here->VBICsubsSISubsSIPtr) += Irs_Vrs;
|
||||
*(here->VBICsubsSISubsPtr) += -Irs_Vrs;
|
||||
*(here->VBICsubsSubsSIPtr) += -Irs_Vrs;
|
||||
|
||||
if (here->VBIC_selfheat) {
|
||||
|
||||
Ibe_Vrth = here->VBICibe_Vrth;
|
||||
Ibex_Vrth = here->VBICibex_Vrth;
|
||||
if (!here->VBIC_excessPhase)
|
||||
Itzf_Vrth = here->VBICitzf_vrth;
|
||||
Itzr_Vrth = here->VBICitzr_Vrth;
|
||||
Ibc_Vrth = here->VBICibc_Vrth;
|
||||
Ibep_Vrth = here->VBICibep_Vrth;
|
||||
Ircx_Vrth = here->VBICircx_Vrth;
|
||||
Irci_Vrth = here->VBICirci_Vrth;
|
||||
Irbx_Vrth = here->VBICirbx_Vrth;
|
||||
Irbi_Vrth = here->VBICirbi_Vrth;
|
||||
Ire_Vrth = here->VBICire_Vrth;
|
||||
Irbp_Vrth = here->VBICirbp_Vrth;
|
||||
Ibcp_Vrth = here->VBICibcp_Vrth;
|
||||
Iccp_Vrth = here->VBICiccp_Vrth;
|
||||
Irs_Vrth = here->VBICirs_Vrth;
|
||||
Irth_Vrth = here->VBICirth_Vrth;
|
||||
Ith_Vrth = here->VBICith_Vrth;
|
||||
Ith_Vbei = here->VBICith_Vbei;
|
||||
Ith_Vbci = here->VBICith_Vbci;
|
||||
Ith_Vcei = here->VBICith_Vcei;
|
||||
Ith_Vbex = here->VBICith_Vbex;
|
||||
Ith_Vbep = here->VBICith_Vbep;
|
||||
Ith_Vbcp = here->VBICith_Vbcp;
|
||||
Ith_Vcep = here->VBICith_Vcep;
|
||||
Ith_Vrci = here->VBICith_Vrci;
|
||||
Ith_Vbcx = here->VBICith_Vbcx;
|
||||
Ith_Vrbi = here->VBICith_Vrbi;
|
||||
Ith_Vrbp = here->VBICith_Vrbp;
|
||||
Ith_Vrcx = here->VBICith_Vrcx;
|
||||
Ith_Vrbx = here->VBICith_Vrbx;
|
||||
Ith_Vre = here->VBICith_Vre;
|
||||
Ith_Vrs = here->VBICith_Vrs;
|
||||
|
||||
/*
|
||||
c Stamp element: Ibe
|
||||
*/
|
||||
*(here->VBICbaseBItempPtr) += Ibe_Vrth;
|
||||
*(here->VBICemitEItempPtr) += -Ibe_Vrth;
|
||||
/*
|
||||
c Stamp element: Ibex
|
||||
*/
|
||||
*(here->VBICbaseBXtempPtr) += Ibex_Vrth;
|
||||
*(here->VBICemitEItempPtr) += -Ibex_Vrth;
|
||||
|
||||
if (!here->VBIC_excessPhase) {
|
||||
/*
|
||||
c Stamp element: Itzf
|
||||
*/
|
||||
*(here->VBICcollCItempPtr) += Itzf_Vrth;
|
||||
*(here->VBICemitEItempPtr) += -Itzf_Vrth;
|
||||
}
|
||||
/*
|
||||
c Stamp element: Itzr
|
||||
*/
|
||||
*(here->VBICemitEItempPtr) += Itzr_Vrth;
|
||||
*(here->VBICcollCItempPtr) += -Itzr_Vrth;
|
||||
/*
|
||||
c Stamp element: Ibc
|
||||
*/
|
||||
*(here->VBICbaseBItempPtr) += Ibc_Vrth;
|
||||
*(here->VBICcollCItempPtr) += -Ibc_Vrth;
|
||||
/*
|
||||
c Stamp element: Ibep
|
||||
*/
|
||||
*(here->VBICbaseBXtempPtr) += Ibep_Vrth;
|
||||
*(here->VBICbaseBPtempPtr) += -Ibep_Vrth;
|
||||
/*
|
||||
c Stamp element: Rcx
|
||||
*/
|
||||
*(here->VBICcollTempPtr) += Ircx_Vrth;
|
||||
*(here->VBICcollCXtempPtr) += -Ircx_Vrth;
|
||||
/*
|
||||
c Stamp element: Irci
|
||||
*/
|
||||
*(here->VBICcollCXtempPtr) += Irci_Vrth;
|
||||
*(here->VBICcollCItempPtr) += -Irci_Vrth;
|
||||
/*
|
||||
c Stamp element: Rbx
|
||||
*/
|
||||
*(here->VBICbaseTempPtr) += Irbx_Vrth;
|
||||
*(here->VBICbaseBXtempPtr) += -Irbx_Vrth;
|
||||
/*
|
||||
c Stamp element: Irbi
|
||||
*/
|
||||
*(here->VBICbaseBXtempPtr) += Irbi_Vrth;
|
||||
*(here->VBICbaseBItempPtr) += -Irbi_Vrth;
|
||||
/*
|
||||
c Stamp element: Re
|
||||
*/
|
||||
*(here->VBICemitTempPtr) += Ire_Vrth;
|
||||
*(here->VBICemitEItempPtr) += -Ire_Vrth;
|
||||
/*
|
||||
c Stamp element: Irbp
|
||||
*/
|
||||
*(here->VBICbaseBPtempPtr) += Irbp_Vrth;
|
||||
*(here->VBICcollCXtempPtr) += -Irbp_Vrth;
|
||||
/*
|
||||
c Stamp element: Ibcp
|
||||
*/
|
||||
*(here->VBICsubsSItempPtr) += Ibcp_Vrth;
|
||||
*(here->VBICbaseBPtempPtr) += -Ibcp_Vrth;
|
||||
/*
|
||||
c Stamp element: Iccp
|
||||
*/
|
||||
*(here->VBICbaseBXtempPtr) += Iccp_Vrth;
|
||||
*(here->VBICsubsSItempPtr) += -Iccp_Vrth;
|
||||
/*
|
||||
c Stamp element: Rs
|
||||
*/
|
||||
*(here->VBICsubsTempPtr) += Irs_Vrth;
|
||||
*(here->VBICsubsSItempPtr) += -Irs_Vrth;
|
||||
/*
|
||||
c Stamp element: Rth
|
||||
*/
|
||||
*(here->VBICtempTempPtr) += Irth_Vrth;
|
||||
/*
|
||||
c Stamp element: Ith
|
||||
*/
|
||||
*(here->VBICtempTempPtr) += -Ith_Vrth;
|
||||
|
||||
*(here->VBICtempBaseBIPtr) += -Ith_Vbei;
|
||||
*(here->VBICtempEmitEIPtr) += +Ith_Vbei;
|
||||
*(here->VBICtempBaseBIPtr) += -Ith_Vbci;
|
||||
*(here->VBICtempCollCIPtr) += +Ith_Vbci;
|
||||
*(here->VBICtempCollCIPtr) += -Ith_Vcei;
|
||||
*(here->VBICtempEmitEIPtr) += +Ith_Vcei;
|
||||
*(here->VBICtempBaseBXPtr) += -Ith_Vbex;
|
||||
*(here->VBICtempEmitEIPtr) += +Ith_Vbex;
|
||||
*(here->VBICtempBaseBXPtr) += -Ith_Vbep;
|
||||
*(here->VBICtempBaseBPPtr) += +Ith_Vbep;
|
||||
*(here->VBICtempSubsPtr) += -Ith_Vbcp;
|
||||
*(here->VBICtempBaseBPPtr) += +Ith_Vbcp;
|
||||
*(here->VBICtempBaseBXPtr) += -Ith_Vcep;
|
||||
*(here->VBICtempSubsPtr) += +Ith_Vcep;
|
||||
*(here->VBICtempCollCXPtr) += -Ith_Vrci;
|
||||
*(here->VBICtempCollCIPtr) += +Ith_Vrci;
|
||||
*(here->VBICtempBaseBIPtr) += -Ith_Vbcx;
|
||||
*(here->VBICtempCollCXPtr) += +Ith_Vbcx;
|
||||
*(here->VBICtempBaseBXPtr) += -Ith_Vrbi;
|
||||
*(here->VBICtempBaseBIPtr) += +Ith_Vrbi;
|
||||
*(here->VBICtempBaseBPPtr) += -Ith_Vrbp;
|
||||
*(here->VBICtempCollCXPtr) += +Ith_Vrbp;
|
||||
*(here->VBICtempCollPtr) += -Ith_Vrcx;
|
||||
*(here->VBICtempCollCXPtr) += +Ith_Vrcx;
|
||||
*(here->VBICtempBasePtr) += -Ith_Vrbx;
|
||||
*(here->VBICtempBaseBXPtr) += +Ith_Vrbx;
|
||||
*(here->VBICtempEmitPtr) += -Ith_Vre;
|
||||
*(here->VBICtempEmitEIPtr) += +Ith_Vre;
|
||||
*(here->VBICtempSubsPtr) += -Ith_Vrs;
|
||||
*(here->VBICtempSubsSIPtr) += +Ith_Vrs;
|
||||
if (here->VBIC_excessPhase) {
|
||||
Ith_Vrxf = *(ckt->CKTstate0 + here->VBICith_Vrxf);
|
||||
*(here->VBICtempXf2Ptr) += +Ith_Vrxf;
|
||||
}
|
||||
}
|
||||
|
||||
if (here->VBIC_excessPhase) {
|
||||
Itxf_Vrxf = *(ckt->CKTstate0 + here->VBICitxf_Vrxf);
|
||||
Ibc_Vrxf = *(ckt->CKTstate0 + here->VBICibc_Vrxf);
|
||||
Ixzf_Vbei = *(ckt->CKTstate0 + here->VBICixzf_Vbei);
|
||||
Ixzf_Vbci = *(ckt->CKTstate0 + here->VBICixzf_Vbci);
|
||||
Ixxf_Vrxf = *(ckt->CKTstate0 + here->VBICixxf_Vrxf);
|
||||
/*
|
||||
c Stamp element: Itxf
|
||||
*/
|
||||
*(here->VBICcollCIXf2Ptr) += Itxf_Vrxf;
|
||||
*(here->VBICemitEIXf2Ptr) += -Itxf_Vrxf;
|
||||
/*
|
||||
c Stamp element: Ibc
|
||||
*/
|
||||
*(here->VBICbaseBIXf2Ptr) += Ibc_Vrxf;
|
||||
*(here->VBICcollCIXf2Ptr) += -Ibc_Vrxf;
|
||||
/*
|
||||
c Stamp element: Ixzf, Branch: xf1-ground
|
||||
*/
|
||||
*(here->VBICxf1BaseBIPtr) += +Ixzf_Vbei;
|
||||
*(here->VBICxf1EmitEIPtr) += -Ixzf_Vbei;
|
||||
*(here->VBICxf1BaseBIPtr) += +Ixzf_Vbci;
|
||||
*(here->VBICxf1CollCIPtr) += -Ixzf_Vbci;
|
||||
if (here->VBIC_selfheat) {
|
||||
Ixzf_Vrth = *(ckt->CKTstate0 + here->VBICixzf_Vrth);
|
||||
*(here->VBICxf1TempPtr) += Ixzf_Vrth;
|
||||
}
|
||||
/*
|
||||
c Stamp element: Ixxf, Branch: xf2-ground
|
||||
*/
|
||||
*(here->VBICxf2Xf2Ptr) += +Ixxf_Vrxf;
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
c The complex part
|
||||
*/
|
||||
|
|
@ -296,6 +504,48 @@ c Stamp element: Qbco
|
|||
*(here->VBICbaseCollPtr + 1) += -XQbco_Vbc;
|
||||
*(here->VBICcollBasePtr + 1) += -XQbco_Vbc;
|
||||
|
||||
if (here->VBIC_selfheat) {
|
||||
XQcth_Vrth = here->VBICcapcth * ckt->CKTomega;
|
||||
XQbe_Vrth = here->VBICcapqbeth * ckt->CKTomega;
|
||||
XQbex_Vrth = here->VBICcapqbexth * ckt->CKTomega;
|
||||
XQbc_Vrth = here->VBICcapqbcth * ckt->CKTomega;
|
||||
XQbcx_Vrth = here->VBICcapqbcxth * ckt->CKTomega;
|
||||
XQbep_Vrth = here->VBICcapqbepth * ckt->CKTomega;
|
||||
XQbcp_Vrth = here->VBICcapqbcpth * ckt->CKTomega;
|
||||
|
||||
*(here->VBICtempTempPtr + 1) += XQcth_Vrth;
|
||||
|
||||
*(here->VBICbaseBItempPtr + 1) += XQbe_Vrth;
|
||||
*(here->VBICemitEItempPtr + 1) += -XQbe_Vrth;
|
||||
*(here->VBICbaseBXtempPtr + 1) += XQbex_Vrth;
|
||||
*(here->VBICemitEItempPtr + 1) += -XQbex_Vrth;
|
||||
*(here->VBICbaseBItempPtr + 1) += XQbc_Vrth;
|
||||
*(here->VBICcollCItempPtr + 1) += -XQbc_Vrth;
|
||||
*(here->VBICbaseBItempPtr + 1) += XQbcx_Vrth;
|
||||
*(here->VBICcollCXtempPtr + 1) += -XQbcx_Vrth;
|
||||
*(here->VBICbaseBXtempPtr + 1) += XQbep_Vrth;
|
||||
*(here->VBICbaseBPtempPtr + 1) += -XQbep_Vrth;
|
||||
*(here->VBICsubsSItempPtr + 1) += XQbcp_Vrth;
|
||||
*(here->VBICbaseBPtempPtr + 1) += -XQbcp_Vrth;
|
||||
}
|
||||
if (here->VBIC_excessPhase) {
|
||||
/*
|
||||
c Stamp element: Qcxf
|
||||
*/
|
||||
XQcxf_Vcxf = here->VBICcapQcxf * ckt->CKTomega;
|
||||
*(here->VBICxf1Xf1Ptr + 1) += XQcxf_Vcxf;
|
||||
/*
|
||||
c Stamp element: L = TD/3
|
||||
*/
|
||||
Xl = here->VBICindInduct * ckt->CKTomega;
|
||||
|
||||
*(here->VBICxf1IbrPtr) += 1;
|
||||
*(here->VBICxf2IbrPtr) -= 1;
|
||||
*(here->VBICibrXf1Ptr) += 1;
|
||||
*(here->VBICibrXf2Ptr) -= 1;
|
||||
*(here->VBICibrIbrPtr + 1) -= Xl;
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -75,9 +75,14 @@ VBICask(CKTcircuit *ckt, GENinstance *instPtr, int which, IFvalue *value, IFvalu
|
|||
value->rValue = *(ckt->CKTstate0 + here->VBICvbci);
|
||||
return(OK);
|
||||
case VBIC_QUEST_CC:
|
||||
value->rValue = *(ckt->CKTstate0 + here->VBICitzf) -
|
||||
*(ckt->CKTstate0 + here->VBICitzr) -
|
||||
*(ckt->CKTstate0 + here->VBICibc);
|
||||
if (!here->VBIC_excessPhase)
|
||||
value->rValue = *(ckt->CKTstate0 + here->VBICitzf) -
|
||||
*(ckt->CKTstate0 + here->VBICitzr) -
|
||||
*(ckt->CKTstate0 + here->VBICibc);
|
||||
else
|
||||
value->rValue = *(ckt->CKTstate0 + here->VBICitxf) -
|
||||
*(ckt->CKTstate0 + here->VBICitzr) -
|
||||
*(ckt->CKTstate0 + here->VBICibc);
|
||||
value->rValue *= VBICmodPtr(here)->VBICtype;
|
||||
return(OK);
|
||||
case VBIC_QUEST_CB:
|
||||
|
|
@ -89,10 +94,16 @@ VBICask(CKTcircuit *ckt, GENinstance *instPtr, int which, IFvalue *value, IFvalu
|
|||
value->rValue *= VBICmodPtr(here)->VBICtype;
|
||||
return(OK);
|
||||
case VBIC_QUEST_CE:
|
||||
value->rValue = - *(ckt->CKTstate0 + here->VBICibe) -
|
||||
*(ckt->CKTstate0 + here->VBICibex) -
|
||||
*(ckt->CKTstate0 + here->VBICitzf) +
|
||||
*(ckt->CKTstate0 + here->VBICitzr);
|
||||
if (!here->VBIC_excessPhase)
|
||||
value->rValue = - *(ckt->CKTstate0 + here->VBICibe) -
|
||||
*(ckt->CKTstate0 + here->VBICibex) -
|
||||
*(ckt->CKTstate0 + here->VBICitzf) +
|
||||
*(ckt->CKTstate0 + here->VBICitzr);
|
||||
else
|
||||
value->rValue = - *(ckt->CKTstate0 + here->VBICibe) -
|
||||
*(ckt->CKTstate0 + here->VBICibex) -
|
||||
*(ckt->CKTstate0 + here->VBICitxf) +
|
||||
*(ckt->CKTstate0 + here->VBICitzr);
|
||||
value->rValue *= VBICmodPtr(here)->VBICtype;
|
||||
return(OK);
|
||||
case VBIC_QUEST_CS:
|
||||
|
|
@ -105,21 +116,38 @@ VBICask(CKTcircuit *ckt, GENinstance *instPtr, int which, IFvalue *value, IFvalu
|
|||
VBICask(ckt, instPtr, VBIC_QUEST_CB, &IB, select);
|
||||
VBICask(ckt, instPtr, VBIC_QUEST_CE, &IE, select);
|
||||
VBICask(ckt, instPtr, VBIC_QUEST_CS, &IS, select);
|
||||
value->rValue = fabs(*(ckt->CKTstate0 + here->VBICibe) * *(ckt->CKTstate0 + here->VBICvbei)) +
|
||||
fabs(*(ckt->CKTstate0 + here->VBICibc) * *(ckt->CKTstate0 + here->VBICvbci)) +
|
||||
fabs(*(ckt->CKTstate0 + here->VBICitzf) - *(ckt->CKTstate0 + here->VBICitzr))
|
||||
* fabs(*(ckt->CKTstate0 + here->VBICvbei) - *(ckt->CKTstate0 + here->VBICvbci)) +
|
||||
fabs(*(ckt->CKTstate0 + here->VBICibex) * *(ckt->CKTstate0 + here->VBICvbex)) +
|
||||
fabs(*(ckt->CKTstate0 + here->VBICibep) * *(ckt->CKTstate0 + here->VBICvbep)) +
|
||||
fabs(*(ckt->CKTstate0 + here->VBICibcp) * *(ckt->CKTstate0 + here->VBICvbcp)) +
|
||||
fabs(*(ckt->CKTstate0 + here->VBICiccp))
|
||||
* fabs(*(ckt->CKTstate0 + here->VBICvbep) - *(ckt->CKTstate0 + here->VBICvbcp)) +
|
||||
fabs(IC.rValue * IC.rValue * here->VBICtextCollResist) +
|
||||
fabs(IC.rValue * *(ckt->CKTstate0 + here->VBICvrci)) +
|
||||
fabs(IB.rValue * IB.rValue * here->VBICtextBaseResist) +
|
||||
fabs(IB.rValue * *(ckt->CKTstate0 + here->VBICvrbi)) +
|
||||
fabs(IE.rValue * IE.rValue * here->VBICtemitterResist) +
|
||||
fabs(IS.rValue * *(ckt->CKTstate0 + here->VBICvrbp));
|
||||
if (!here->VBIC_excessPhase)
|
||||
value->rValue = fabs(*(ckt->CKTstate0 + here->VBICibe) * *(ckt->CKTstate0 + here->VBICvbei)) +
|
||||
fabs(*(ckt->CKTstate0 + here->VBICibc) * *(ckt->CKTstate0 + here->VBICvbci)) +
|
||||
fabs(*(ckt->CKTstate0 + here->VBICitzf) - *(ckt->CKTstate0 + here->VBICitzr))
|
||||
* fabs(*(ckt->CKTstate0 + here->VBICvbei) - *(ckt->CKTstate0 + here->VBICvbci)) +
|
||||
fabs(*(ckt->CKTstate0 + here->VBICibex) * *(ckt->CKTstate0 + here->VBICvbex)) +
|
||||
fabs(*(ckt->CKTstate0 + here->VBICibep) * *(ckt->CKTstate0 + here->VBICvbep)) +
|
||||
fabs(*(ckt->CKTstate0 + here->VBICibcp) * *(ckt->CKTstate0 + here->VBICvbcp)) +
|
||||
fabs(*(ckt->CKTstate0 + here->VBICiccp))
|
||||
* fabs(*(ckt->CKTstate0 + here->VBICvbep) - *(ckt->CKTstate0 + here->VBICvbcp)) +
|
||||
fabs(IC.rValue * IC.rValue * here->VBICtextCollResist) +
|
||||
fabs(IC.rValue * *(ckt->CKTstate0 + here->VBICvrci)) +
|
||||
fabs(IB.rValue * IB.rValue * here->VBICtextBaseResist) +
|
||||
fabs(IB.rValue * *(ckt->CKTstate0 + here->VBICvrbi)) +
|
||||
fabs(IE.rValue * IE.rValue * here->VBICtemitterResist) +
|
||||
fabs(IS.rValue * *(ckt->CKTstate0 + here->VBICvrbp));
|
||||
else
|
||||
value->rValue = fabs(*(ckt->CKTstate0 + here->VBICibe) * *(ckt->CKTstate0 + here->VBICvbei)) +
|
||||
fabs(*(ckt->CKTstate0 + here->VBICibc) * *(ckt->CKTstate0 + here->VBICvbci)) +
|
||||
fabs(*(ckt->CKTstate0 + here->VBICitxf) - *(ckt->CKTstate0 + here->VBICitzr))
|
||||
* fabs(*(ckt->CKTstate0 + here->VBICvbei) - *(ckt->CKTstate0 + here->VBICvbci)) +
|
||||
fabs(*(ckt->CKTstate0 + here->VBICibex) * *(ckt->CKTstate0 + here->VBICvbex)) +
|
||||
fabs(*(ckt->CKTstate0 + here->VBICibep) * *(ckt->CKTstate0 + here->VBICvbep)) +
|
||||
fabs(*(ckt->CKTstate0 + here->VBICibcp) * *(ckt->CKTstate0 + here->VBICvbcp)) +
|
||||
fabs(*(ckt->CKTstate0 + here->VBICiccp))
|
||||
* fabs(*(ckt->CKTstate0 + here->VBICvbep) - *(ckt->CKTstate0 + here->VBICvbcp)) +
|
||||
fabs(IC.rValue * IC.rValue * here->VBICtextCollResist) +
|
||||
fabs(IC.rValue * *(ckt->CKTstate0 + here->VBICvrci)) +
|
||||
fabs(IB.rValue * IB.rValue * here->VBICtextBaseResist) +
|
||||
fabs(IB.rValue * *(ckt->CKTstate0 + here->VBICvrbi)) +
|
||||
fabs(IE.rValue * IE.rValue * here->VBICtemitterResist) +
|
||||
fabs(IS.rValue * *(ckt->CKTstate0 + here->VBICvrbp));
|
||||
return(OK);
|
||||
case VBIC_QUEST_GM:
|
||||
value->rValue = *(ckt->CKTstate0 + here->VBICitzf_Vbei);
|
||||
|
|
|
|||
|
|
@ -36,6 +36,7 @@ VBICbindCSC (GENmodel *inModel, CKTcircuit *ckt)
|
|||
CREATE_KLU_BINDING_TABLE(VBICemitEIEmitEIPtr, VBICemitEIEmitEIBinding, VBICemitEINode, VBICemitEINode);
|
||||
CREATE_KLU_BINDING_TABLE(VBICbaseBPBaseBPPtr, VBICbaseBPBaseBPBinding, VBICbaseBPNode, VBICbaseBPNode);
|
||||
CREATE_KLU_BINDING_TABLE(VBICsubsSISubsSIPtr, VBICsubsSISubsSIBinding, VBICsubsSINode, VBICsubsSINode);
|
||||
|
||||
CREATE_KLU_BINDING_TABLE(VBICbaseEmitPtr, VBICbaseEmitBinding, VBICbaseNode, VBICemitNode);
|
||||
CREATE_KLU_BINDING_TABLE(VBICemitBasePtr, VBICemitBaseBinding, VBICemitNode, VBICbaseNode);
|
||||
CREATE_KLU_BINDING_TABLE(VBICbaseCollPtr, VBICbaseCollBinding, VBICbaseNode, VBICcollNode);
|
||||
|
|
@ -56,6 +57,7 @@ VBICbindCSC (GENmodel *inModel, CKTcircuit *ckt)
|
|||
CREATE_KLU_BINDING_TABLE(VBICbaseBXSubsSIPtr, VBICbaseBXSubsSIBinding, VBICbaseBXNode, VBICsubsSINode);
|
||||
CREATE_KLU_BINDING_TABLE(VBICbaseBIEmitEIPtr, VBICbaseBIEmitEIBinding, VBICbaseBINode, VBICemitEINode);
|
||||
CREATE_KLU_BINDING_TABLE(VBICbaseBPSubsSIPtr, VBICbaseBPSubsSIBinding, VBICbaseBPNode, VBICsubsSINode);
|
||||
|
||||
CREATE_KLU_BINDING_TABLE(VBICcollCXCollPtr, VBICcollCXCollBinding, VBICcollCXNode, VBICcollNode);
|
||||
CREATE_KLU_BINDING_TABLE(VBICbaseBXBasePtr, VBICbaseBXBaseBinding, VBICbaseBXNode, VBICbaseNode);
|
||||
CREATE_KLU_BINDING_TABLE(VBICemitEIEmitPtr, VBICemitEIEmitBinding, VBICemitEINode, VBICemitNode);
|
||||
|
|
@ -101,7 +103,30 @@ VBICbindCSC (GENmodel *inModel, CKTcircuit *ckt)
|
|||
CREATE_KLU_BINDING_TABLE(VBICtempSubsPtr, VBICtempSubsBinding, VBICtempNode, VBICsubsNode);
|
||||
CREATE_KLU_BINDING_TABLE(VBICtempSubsSIPtr, VBICtempSubsSIBinding, VBICtempNode, VBICsubsSINode);
|
||||
CREATE_KLU_BINDING_TABLE(VBICtempTempPtr, VBICtempTempBinding, VBICtempNode, VBICtempNode);
|
||||
if (here->VBIC_excessPhase) {
|
||||
CREATE_KLU_BINDING_TABLE(VBICtempXf2Ptr, VBICtempXf2Binding, VBICtempNode, VBICxf2Node);
|
||||
CREATE_KLU_BINDING_TABLE(VBICxf1TempPtr, VBICxf1TempBinding, VBICxf1Node ,VBICtempNode);
|
||||
}
|
||||
}
|
||||
|
||||
if (here->VBIC_excessPhase) {
|
||||
CREATE_KLU_BINDING_TABLE(VBICxf1Xf1Ptr , VBICxf1Xf1Binding , VBICxf1Node , VBICxf1Node);
|
||||
CREATE_KLU_BINDING_TABLE(VBICxf1Xf2Ptr , VBICxf1Xf2Binding , VBICxf1Node , VBICxf2Node);
|
||||
CREATE_KLU_BINDING_TABLE(VBICxf1CollCIPtr, VBICxf1CollCIBinding, VBICxf1Node , VBICcollCINode);
|
||||
CREATE_KLU_BINDING_TABLE(VBICxf1BaseBIPtr, VBICxf1BaseBIBinding, VBICxf1Node , VBICbaseBINode);
|
||||
CREATE_KLU_BINDING_TABLE(VBICxf1EmitEIPtr, VBICxf1EmitEIBinding, VBICxf1Node , VBICemitEINode);
|
||||
CREATE_KLU_BINDING_TABLE(VBICxf2Xf2Ptr , VBICxf2Xf2Binding , VBICxf2Node , VBICxf2Node);
|
||||
CREATE_KLU_BINDING_TABLE(VBICxf2Xf1Ptr , VBICxf2Xf1Binding , VBICxf2Node , VBICxf1Node);
|
||||
CREATE_KLU_BINDING_TABLE(VBICcollCIXf2Ptr, VBICcollCIXf2Binding, VBICcollCINode, VBICxf2Node);
|
||||
CREATE_KLU_BINDING_TABLE(VBICbaseBIXf2Ptr, VBICbaseBIXf2Binding, VBICbaseBINode, VBICxf2Node);
|
||||
CREATE_KLU_BINDING_TABLE(VBICemitEIXf2Ptr, VBICemitEIXf2Binding, VBICemitEINode, VBICxf2Node);
|
||||
CREATE_KLU_BINDING_TABLE(VBICxf1IbrPtr , VBICxf1IbrBinding , VBICxf1Node , VBICbrEq);
|
||||
CREATE_KLU_BINDING_TABLE(VBICxf2IbrPtr , VBICxf2IbrBinding , VBICxf2Node , VBICbrEq);
|
||||
CREATE_KLU_BINDING_TABLE(VBICibrXf2Ptr , VBICibrXf2Binding , VBICbrEq , VBICxf2Node);
|
||||
CREATE_KLU_BINDING_TABLE(VBICibrXf1Ptr , VBICibrXf1Binding , VBICbrEq , VBICxf1Node);
|
||||
CREATE_KLU_BINDING_TABLE(VBICibrIbrPtr , VBICibrIbrBinding , VBICbrEq , VBICbrEq);
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -60,6 +60,9 @@ typedef struct sVBICinstance {
|
|||
int VBICemitEINode; /* number of internal emitter node of vbic */
|
||||
int VBICbaseBPNode; /* number of internal base node of vbic */
|
||||
int VBICsubsSINode; /* number of internal substrate node */
|
||||
int VBICxf1Node; /* number of internal excess phase 1 node itf */
|
||||
int VBICxf2Node; /* number of internal excess phase 2 node itf */
|
||||
int VBICbrEq; /* number of the branch equation added for current */
|
||||
|
||||
double VBICarea; /* area factor for the vbic */
|
||||
double VBICicVBE; /* initial condition voltage B-E*/
|
||||
|
|
@ -125,6 +128,10 @@ typedef struct sVBICinstance {
|
|||
* (emitter prime,emitter prime) */
|
||||
double *VBICsubsSISubsSIPtr; /* pointer to sparse matrix at
|
||||
* (substrate prime, substrate prime) */
|
||||
double *VBICemitEIXfPtr; /* pointer to sparse matrix at
|
||||
* (emitter prime,xf) */
|
||||
double *VBICbaseBIXfPtr; /* pointer to sparse matrix at
|
||||
* (base prime,xf) */
|
||||
|
||||
double *VBICbaseEmitPtr; /* pointer to sparse matrix at
|
||||
* (base,emit) */
|
||||
|
|
@ -233,6 +240,28 @@ typedef struct sVBICinstance {
|
|||
double *VBICtempSubsSIPtr;
|
||||
double *VBICtempTempPtr;
|
||||
|
||||
/* excess phase */
|
||||
double *VBICtempXf2Ptr;
|
||||
double *VBICxf1TempPtr;
|
||||
|
||||
double *VBICxf1Xf1Ptr;
|
||||
double *VBICxf1Xf2Ptr;
|
||||
double *VBICxf1CollCIPtr;
|
||||
double *VBICxf1BaseBIPtr;
|
||||
double *VBICxf1EmitEIPtr;
|
||||
|
||||
double *VBICxf2Xf2Ptr;
|
||||
double *VBICxf2Xf1Ptr;
|
||||
double *VBICcollCIXf2Ptr;
|
||||
double *VBICbaseBIXf2Ptr;
|
||||
double *VBICemitEIXf2Ptr;
|
||||
|
||||
double *VBICxf1IbrPtr;
|
||||
double *VBICxf2IbrPtr;
|
||||
double *VBICibrXf1Ptr;
|
||||
double *VBICibrXf2Ptr;
|
||||
double *VBICibrIbrPtr;
|
||||
|
||||
unsigned VBICareaGiven :1; /* flag to indicate area was specified */
|
||||
unsigned VBICoff :1; /* 'off' flag for vbic */
|
||||
unsigned VBICicVBEGiven :1; /* flag to indicate VBE init. cond. given */
|
||||
|
|
@ -249,7 +278,52 @@ typedef struct sVBICinstance {
|
|||
double VBICcapbcp;
|
||||
double VBICcapcth;
|
||||
|
||||
int VBIC_selfheat; /* self-heating enabled */
|
||||
double VBICcapqbeth;
|
||||
double VBICcapqbexth;
|
||||
double VBICcapqbcth;
|
||||
double VBICcapqbcxth;
|
||||
double VBICcapqbepth;
|
||||
double VBICcapqbcpth;
|
||||
|
||||
double VBICibe_Vrth;
|
||||
double VBICibex_Vrth;
|
||||
double VBICitzf_vrth;
|
||||
double VBICitzr_Vrth;
|
||||
double VBICibc_Vrth;
|
||||
double VBICibep_Vrth;
|
||||
double VBICircx_Vrth;
|
||||
double VBICirci_Vrth;
|
||||
double VBICirbx_Vrth;
|
||||
double VBICirbi_Vrth;
|
||||
double VBICire_Vrth;
|
||||
double VBICirbp_Vrth;
|
||||
double VBICibcp_Vrth;
|
||||
double VBICiccp_Vrth;
|
||||
double VBICirs_Vrth;
|
||||
double VBICirth_Vrth;
|
||||
double VBICith_Vrth;
|
||||
|
||||
double VBICith_Vbei;
|
||||
double VBICith_Vbci;
|
||||
double VBICith_Vcei;
|
||||
double VBICith_Vbex;
|
||||
double VBICith_Vbep;
|
||||
double VBICith_Vbcp;
|
||||
double VBICith_Vcep;
|
||||
double VBICith_Vrci;
|
||||
double VBICith_Vbcx;
|
||||
double VBICith_Vrbi;
|
||||
double VBICith_Vrbp;
|
||||
double VBICith_Vrcx;
|
||||
double VBICith_Vrbx;
|
||||
double VBICith_Vre;
|
||||
double VBICith_Vrs;
|
||||
|
||||
double VBICindInduct;
|
||||
double VBICcapQcxf;
|
||||
|
||||
int VBIC_selfheat; /* self-heating enabled */
|
||||
int VBIC_excessPhase; /* excess phase enabled */
|
||||
|
||||
#ifndef NONOISE
|
||||
double VBICnVar[NSTATVARS][VBICNSRCS];
|
||||
|
|
@ -270,6 +344,7 @@ typedef struct sVBICinstance {
|
|||
BindElement *VBICemitEIEmitEIBinding ;
|
||||
BindElement *VBICbaseBPBaseBPBinding ;
|
||||
BindElement *VBICsubsSISubsSIBinding ;
|
||||
|
||||
BindElement *VBICbaseEmitBinding ;
|
||||
BindElement *VBICemitBaseBinding ;
|
||||
BindElement *VBICbaseCollBinding ;
|
||||
|
|
@ -290,6 +365,7 @@ typedef struct sVBICinstance {
|
|||
BindElement *VBICbaseBXSubsSIBinding ;
|
||||
BindElement *VBICbaseBIEmitEIBinding ;
|
||||
BindElement *VBICbaseBPSubsSIBinding ;
|
||||
|
||||
BindElement *VBICcollCXCollBinding ;
|
||||
BindElement *VBICbaseBXBaseBinding ;
|
||||
BindElement *VBICemitEIEmitBinding ;
|
||||
|
|
@ -310,6 +386,7 @@ typedef struct sVBICinstance {
|
|||
BindElement *VBICsubsSICollCIBinding ;
|
||||
BindElement *VBICsubsSIBaseBIBinding ;
|
||||
BindElement *VBICsubsSIBaseBPBinding ;
|
||||
|
||||
BindElement *VBICcollTempBinding ;
|
||||
BindElement *VBICbaseTempBinding ;
|
||||
BindElement *VBICemitTempBinding ;
|
||||
|
|
@ -333,107 +410,148 @@ typedef struct sVBICinstance {
|
|||
BindElement *VBICtempSubsBinding ;
|
||||
BindElement *VBICtempSubsSIBinding ;
|
||||
BindElement *VBICtempTempBinding ;
|
||||
|
||||
BindElement *VBICtempXf2Binding ;
|
||||
BindElement *VBICxf1TempBinding ;
|
||||
|
||||
BindElement *VBICxf1Xf1Binding ;
|
||||
BindElement *VBICxf1Xf2Binding ;
|
||||
BindElement *VBICxf1CollCIBinding ;
|
||||
BindElement *VBICxf1BaseBIBinding ;
|
||||
BindElement *VBICxf1EmitEIBinding ;
|
||||
BindElement *VBICxf2Xf2Binding ;
|
||||
BindElement *VBICxf2Xf1Binding ;
|
||||
BindElement *VBICcollCIXf2Binding ;
|
||||
BindElement *VBICbaseBIXf2Binding ;
|
||||
BindElement *VBICemitEIXf2Binding ;
|
||||
BindElement *VBICxf1IbrBinding ;
|
||||
BindElement *VBICxf2IbrBinding ;
|
||||
BindElement *VBICibrXf2Binding ;
|
||||
BindElement *VBICibrXf1Binding ;
|
||||
BindElement *VBICibrIbrBinding ;
|
||||
#endif
|
||||
|
||||
} VBICinstance ;
|
||||
|
||||
/* entries in the state vector for vbic: */
|
||||
|
||||
#define VBICvbei VBICstate
|
||||
#define VBICvbex VBICstate+1
|
||||
#define VBICvbci VBICstate+2
|
||||
#define VBICvbcx VBICstate+3
|
||||
#define VBICvbep VBICstate+4
|
||||
#define VBICvrci VBICstate+5
|
||||
#define VBICvrbi VBICstate+6
|
||||
#define VBICvrbp VBICstate+7
|
||||
#define VBICvbcp VBICstate+8
|
||||
#define VBICvbei VBICstate
|
||||
#define VBICvbex VBICstate+1
|
||||
#define VBICvbci VBICstate+2
|
||||
#define VBICvbcx VBICstate+3
|
||||
#define VBICvbep VBICstate+4
|
||||
#define VBICvrci VBICstate+5
|
||||
#define VBICvrbi VBICstate+6
|
||||
#define VBICvrbp VBICstate+7
|
||||
#define VBICvbcp VBICstate+8
|
||||
|
||||
#define VBICibe VBICstate+9
|
||||
#define VBICibe_Vbei VBICstate+10
|
||||
#define VBICibe VBICstate+9
|
||||
#define VBICibe_Vbei VBICstate+10
|
||||
|
||||
#define VBICibex VBICstate+11
|
||||
#define VBICibex VBICstate+11
|
||||
#define VBICibex_Vbex VBICstate+12
|
||||
|
||||
#define VBICitzf VBICstate+13
|
||||
#define VBICitzf VBICstate+13
|
||||
#define VBICitzf_Vbei VBICstate+14
|
||||
#define VBICitzf_Vbci VBICstate+15
|
||||
#define VBICitzf_Vrth VBICstate+16
|
||||
|
||||
#define VBICitzr VBICstate+16
|
||||
#define VBICitzr_Vbci VBICstate+17
|
||||
#define VBICitzr_Vbei VBICstate+18
|
||||
#define VBICitzr VBICstate+17
|
||||
#define VBICitzr_Vbci VBICstate+18
|
||||
#define VBICitzr_Vbei VBICstate+19
|
||||
|
||||
#define VBICibc VBICstate+19
|
||||
#define VBICibc_Vbci VBICstate+20
|
||||
#define VBICibc_Vbei VBICstate+21
|
||||
#define VBICibc VBICstate+20
|
||||
#define VBICibc_Vbci VBICstate+21
|
||||
#define VBICibc_Vbei VBICstate+22
|
||||
|
||||
#define VBICibep VBICstate+22
|
||||
#define VBICibep_Vbep VBICstate+23
|
||||
#define VBICibep VBICstate+23
|
||||
#define VBICibep_Vbep VBICstate+24
|
||||
|
||||
#define VBICirci VBICstate+24
|
||||
#define VBICirci_Vrci VBICstate+25
|
||||
#define VBICirci_Vbci VBICstate+26
|
||||
#define VBICirci_Vbcx VBICstate+27
|
||||
#define VBICirci VBICstate+25
|
||||
#define VBICirci_Vrci VBICstate+26
|
||||
#define VBICirci_Vbci VBICstate+27
|
||||
#define VBICirci_Vbcx VBICstate+28
|
||||
|
||||
#define VBICirbi VBICstate+28
|
||||
#define VBICirbi_Vrbi VBICstate+29
|
||||
#define VBICirbi_Vbei VBICstate+30
|
||||
#define VBICirbi_Vbci VBICstate+31
|
||||
#define VBICirbi VBICstate+29
|
||||
#define VBICirbi_Vrbi VBICstate+30
|
||||
#define VBICirbi_Vbei VBICstate+31
|
||||
#define VBICirbi_Vbci VBICstate+32
|
||||
|
||||
#define VBICirbp VBICstate+32
|
||||
#define VBICirbp_Vrbp VBICstate+33
|
||||
#define VBICirbp_Vbep VBICstate+34
|
||||
#define VBICirbp_Vbci VBICstate+35
|
||||
#define VBICirbp VBICstate+33
|
||||
#define VBICirbp_Vrbp VBICstate+34
|
||||
#define VBICirbp_Vbep VBICstate+35
|
||||
#define VBICirbp_Vbci VBICstate+36
|
||||
|
||||
|
||||
#define VBICqbe VBICstate+36
|
||||
#define VBICcqbe VBICstate+37
|
||||
#define VBICcqbeci VBICstate+38
|
||||
#define VBICqbe VBICstate+37
|
||||
#define VBICcqbe VBICstate+38
|
||||
#define VBICcqbeci VBICstate+39
|
||||
|
||||
#define VBICqbex VBICstate+39
|
||||
#define VBICcqbex VBICstate+40
|
||||
#define VBICqbex VBICstate+40
|
||||
#define VBICcqbex VBICstate+41
|
||||
|
||||
#define VBICqbc VBICstate+41
|
||||
#define VBICcqbc VBICstate+42
|
||||
#define VBICqbc VBICstate+42
|
||||
#define VBICcqbc VBICstate+43
|
||||
|
||||
#define VBICqbcx VBICstate+43
|
||||
#define VBICcqbcx VBICstate+44
|
||||
#define VBICqbcx VBICstate+44
|
||||
#define VBICcqbcx VBICstate+45
|
||||
|
||||
#define VBICqbep VBICstate+45
|
||||
#define VBICcqbep VBICstate+46
|
||||
#define VBICcqbepci VBICstate+47
|
||||
#define VBICqbep VBICstate+46
|
||||
#define VBICcqbep VBICstate+47
|
||||
#define VBICcqbepci VBICstate+48
|
||||
|
||||
#define VBICqbeo VBICstate+48
|
||||
#define VBICcqbeo VBICstate+49
|
||||
#define VBICgqbeo VBICstate+50
|
||||
#define VBICqbeo VBICstate+49
|
||||
#define VBICcqbeo VBICstate+50
|
||||
#define VBICgqbeo VBICstate+51
|
||||
|
||||
#define VBICqbco VBICstate+51
|
||||
#define VBICcqbco VBICstate+52
|
||||
#define VBICgqbco VBICstate+53
|
||||
#define VBICqbco VBICstate+52
|
||||
#define VBICcqbco VBICstate+53
|
||||
#define VBICgqbco VBICstate+54
|
||||
|
||||
#define VBICibcp VBICstate+54
|
||||
#define VBICibcp_Vbcp VBICstate+55
|
||||
#define VBICibcp VBICstate+55
|
||||
#define VBICibcp_Vbcp VBICstate+56
|
||||
|
||||
#define VBICiccp VBICstate+56
|
||||
#define VBICiccp_Vbep VBICstate+57
|
||||
#define VBICiccp_Vbci VBICstate+58
|
||||
#define VBICiccp_Vbcp VBICstate+59
|
||||
#define VBICiccp VBICstate+57
|
||||
#define VBICiccp_Vbep VBICstate+58
|
||||
#define VBICiccp_Vbci VBICstate+59
|
||||
#define VBICiccp_Vbcp VBICstate+60
|
||||
|
||||
#define VBICqbcp VBICstate+60
|
||||
#define VBICcqbcp VBICstate+61
|
||||
#define VBICqbcp VBICstate+61
|
||||
#define VBICcqbcp VBICstate+62
|
||||
|
||||
#define VBICircx_Vrcx VBICstate+62
|
||||
#define VBICirbx_Vrbx VBICstate+63
|
||||
#define VBICirs_Vrs VBICstate+64
|
||||
#define VBICire_Vre VBICstate+65
|
||||
#define VBICircx_Vrcx VBICstate+63
|
||||
#define VBICirbx_Vrbx VBICstate+64
|
||||
#define VBICirs_Vrs VBICstate+65
|
||||
#define VBICire_Vre VBICstate+66
|
||||
|
||||
#define VBICqcth VBICstate+66 /* thermal capacitor charge */
|
||||
#define VBICcqcth VBICstate+67 /* thermal capacitor current */
|
||||
#define VBICqcth VBICstate+67 /* thermal capacitor charge */
|
||||
#define VBICcqcth VBICstate+68 /* thermal capacitor current */
|
||||
|
||||
#define VBICvrth VBICstate+68
|
||||
#define VBICicth_Vrth VBICstate+69
|
||||
#define VBICvrth VBICstate+69
|
||||
#define VBICicth_Vrth VBICstate+70
|
||||
|
||||
#define VBICnumStates 70
|
||||
#define VBICqcxf VBICstate+71
|
||||
#define VBICcqcxf VBICstate+72
|
||||
#define VBICgqcxf VBICstate+73
|
||||
|
||||
#define VBICibc_Vrxf VBICstate+74
|
||||
|
||||
#define VBICixzf VBICstate+75
|
||||
#define VBICixzf_Vbei VBICstate+76
|
||||
#define VBICixzf_Vbci VBICstate+77
|
||||
#define VBICixzf_Vrth VBICstate+78
|
||||
|
||||
#define VBICixxf VBICstate+79
|
||||
#define VBICixxf_Vrxf VBICstate+80
|
||||
|
||||
#define VBICitxf VBICstate+81
|
||||
#define VBICitxf_Vrxf VBICstate+82
|
||||
#define VBICith_Vrxf VBICstate+83
|
||||
|
||||
#define VBICindFlux VBICstate+84
|
||||
#define VBICindVolt VBICstate+85
|
||||
|
||||
#define VBICnumStates 86
|
||||
|
||||
/* per model data */
|
||||
typedef struct sVBICmodel { /* model structure for a vbic */
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -127,11 +127,16 @@ VBICnoise (int mode, int operation, GENmodel *genmodel, CKTcircuit *ckt, Ndata *
|
|||
ckt,THERMNOISE,inst->VBICsubsSINode,inst->VBICsubsNode,
|
||||
*(ckt->CKTstate0 + inst->VBICirs_Vrs), dtemp);
|
||||
|
||||
|
||||
NevalSrc(&noizDens[VBICICNOIZ],&lnNdens[VBICICNOIZ],
|
||||
ckt,SHOTNOISE,inst->VBICcollCINode, inst->VBICemitEINode,
|
||||
*(ckt->CKTstate0 + inst->VBICitzf));
|
||||
|
||||
if (!inst->VBIC_excessPhase) {
|
||||
NevalSrc(&noizDens[VBICICNOIZ],&lnNdens[VBICICNOIZ],
|
||||
ckt,SHOTNOISE,inst->VBICcollCINode, inst->VBICemitEINode,
|
||||
*(ckt->CKTstate0 + inst->VBICitzf));
|
||||
}
|
||||
if (inst->VBIC_excessPhase) {
|
||||
NevalSrc(&noizDens[VBICICNOIZ],&lnNdens[VBICICNOIZ],
|
||||
ckt,SHOTNOISE,inst->VBICcollCINode, inst->VBICemitEINode,
|
||||
*(ckt->CKTstate0 + inst->VBICitxf));
|
||||
}
|
||||
NevalSrc(&noizDens[VBICIBNOIZ],&lnNdens[VBICIBNOIZ],
|
||||
ckt,SHOTNOISE,inst->VBICbaseBINode, inst->VBICemitEINode,
|
||||
*(ckt->CKTstate0 + inst->VBICibe));
|
||||
|
|
|
|||
|
|
@ -30,7 +30,18 @@ VBICpzLoad(GENmodel *inModel, CKTcircuit *ckt, SPcomplex *s)
|
|||
,Ibcp_Vbcp,Iccp_Vbep,Irs_Vrs,Iccp_Vbci,Iccp_Vbcp;
|
||||
double XQbe_Vbei, XQbe_Vbci, XQbex_Vbex, XQbc_Vbci,
|
||||
XQbcx_Vbcx, XQbep_Vbep, XQbep_Vbci,
|
||||
XQbcp_Vbcp;
|
||||
XQbcp_Vbcp, XQbeo_Vbe, XQbco_Vbc;
|
||||
|
||||
double Ibe_Vrth, Ibex_Vrth, Itzf_Vrth=0.0, Itzr_Vrth, Ibc_Vrth, Ibep_Vrth,
|
||||
Ircx_Vrth, Irci_Vrth, Irbx_Vrth, Irbi_Vrth, Ire_Vrth, Irbp_Vrth,
|
||||
Ibcp_Vrth, Iccp_Vrth, Irs_Vrth, Irth_Vrth, Ith_Vrth,
|
||||
Ith_Vbei, Ith_Vbci, Ith_Vcei, Ith_Vbex, Ith_Vbep, Ith_Vbcp, Ith_Vcep,
|
||||
Ith_Vrci, Ith_Vbcx, Ith_Vrbi, Ith_Vrbp, Ith_Vrcx, Ith_Vrbx, Ith_Vre, Ith_Vrs;
|
||||
double XQcth_Vrth, XQbe_Vrth, XQbex_Vrth, XQbc_Vrth, XQbcx_Vrth, XQbep_Vrth, XQbcp_Vrth;
|
||||
|
||||
//NQS
|
||||
double Itxf_Vrxf, Ibc_Vrxf, Ith_Vrxf, Ixzf_Vrth, Ixxf_Vrxf, XQcxf_Vcxf;
|
||||
double Ixzf_Vbei, Ixzf_Vbci, Xl;
|
||||
|
||||
/* loop through all the models */
|
||||
for( ; model != NULL; model = VBICnextModel(model)) {
|
||||
|
|
@ -83,17 +94,20 @@ c Stamp element: Ibex
|
|||
*(here->VBICbaseBXEmitEIPtr) += -Ibex_Vbex;
|
||||
*(here->VBICemitEIBaseBXPtr) += -Ibex_Vbex;
|
||||
*(here->VBICemitEIEmitEIPtr) += Ibex_Vbex;
|
||||
|
||||
if (!here->VBIC_excessPhase) {
|
||||
/*
|
||||
c Stamp element: Itzf
|
||||
*/
|
||||
*(here->VBICcollCIBaseBIPtr) += Itzf_Vbei;
|
||||
*(here->VBICcollCIEmitEIPtr) += -Itzf_Vbei;
|
||||
*(here->VBICcollCIBaseBIPtr) += Itzf_Vbci;
|
||||
*(here->VBICcollCICollCIPtr) += -Itzf_Vbci;
|
||||
*(here->VBICemitEIBaseBIPtr) += -Itzf_Vbei;
|
||||
*(here->VBICemitEIEmitEIPtr) += Itzf_Vbei;
|
||||
*(here->VBICemitEIBaseBIPtr) += -Itzf_Vbci;
|
||||
*(here->VBICemitEICollCIPtr) += Itzf_Vbci;
|
||||
*(here->VBICcollCIBaseBIPtr) += Itzf_Vbei;
|
||||
*(here->VBICcollCIEmitEIPtr) += -Itzf_Vbei;
|
||||
*(here->VBICcollCIBaseBIPtr) += Itzf_Vbci;
|
||||
*(here->VBICcollCICollCIPtr) += -Itzf_Vbci;
|
||||
*(here->VBICemitEIBaseBIPtr) += -Itzf_Vbei;
|
||||
*(here->VBICemitEIEmitEIPtr) += Itzf_Vbei;
|
||||
*(here->VBICemitEIBaseBIPtr) += -Itzf_Vbci;
|
||||
*(here->VBICemitEICollCIPtr) += Itzf_Vbci;
|
||||
}
|
||||
/*
|
||||
c Stamp element: Itzr
|
||||
*/
|
||||
|
|
@ -126,10 +140,10 @@ c Stamp element: Ibep
|
|||
/*
|
||||
c Stamp element: Ircx
|
||||
*/
|
||||
*(here->VBICcollCollPtr) += Ircx_Vrcx;
|
||||
*(here->VBICcollCollPtr) += Ircx_Vrcx;
|
||||
*(here->VBICcollCXCollCXPtr) += Ircx_Vrcx;
|
||||
*(here->VBICcollCXCollPtr) += -Ircx_Vrcx;
|
||||
*(here->VBICcollCollCXPtr) += -Ircx_Vrcx;
|
||||
*(here->VBICcollCXCollPtr) += -Ircx_Vrcx;
|
||||
*(here->VBICcollCollCXPtr) += -Ircx_Vrcx;
|
||||
/*
|
||||
c Stamp element: Irci
|
||||
*/
|
||||
|
|
@ -148,10 +162,10 @@ c Stamp element: Irci
|
|||
/*
|
||||
c Stamp element: Irbx
|
||||
*/
|
||||
*(here->VBICbaseBasePtr) += Irbx_Vrbx;
|
||||
*(here->VBICbaseBasePtr) += Irbx_Vrbx;
|
||||
*(here->VBICbaseBXBaseBXPtr) += Irbx_Vrbx;
|
||||
*(here->VBICbaseBXBasePtr) += -Irbx_Vrbx;
|
||||
*(here->VBICbaseBaseBXPtr) += -Irbx_Vrbx;
|
||||
*(here->VBICbaseBXBasePtr) += -Irbx_Vrbx;
|
||||
*(here->VBICbaseBaseBXPtr) += -Irbx_Vrbx;
|
||||
/*
|
||||
c Stamp element: Irbi
|
||||
*/
|
||||
|
|
@ -170,10 +184,10 @@ c Stamp element: Irbi
|
|||
/*
|
||||
c Stamp element: Ire
|
||||
*/
|
||||
*(here->VBICemitEmitPtr) += Ire_Vre;
|
||||
*(here->VBICemitEmitPtr) += Ire_Vre;
|
||||
*(here->VBICemitEIEmitEIPtr) += Ire_Vre;
|
||||
*(here->VBICemitEIEmitPtr) += -Ire_Vre;
|
||||
*(here->VBICemitEmitEIPtr) += -Ire_Vre;
|
||||
*(here->VBICemitEIEmitPtr) += -Ire_Vre;
|
||||
*(here->VBICemitEmitEIPtr) += -Ire_Vre;
|
||||
/*
|
||||
c Stamp element: Irbp
|
||||
*/
|
||||
|
|
@ -214,10 +228,204 @@ c Stamp element: Iccp
|
|||
/*
|
||||
c Stamp element: Irs
|
||||
*/
|
||||
*(here->VBICsubsSubsPtr) += Irs_Vrs;
|
||||
*(here->VBICsubsSubsPtr) += Irs_Vrs;
|
||||
*(here->VBICsubsSISubsSIPtr) += Irs_Vrs;
|
||||
*(here->VBICsubsSISubsPtr) += -Irs_Vrs;
|
||||
*(here->VBICsubsSubsSIPtr) += -Irs_Vrs;
|
||||
*(here->VBICsubsSISubsPtr) += -Irs_Vrs;
|
||||
*(here->VBICsubsSubsSIPtr) += -Irs_Vrs;
|
||||
|
||||
if (here->VBIC_selfheat) {
|
||||
|
||||
Ibe_Vrth = here->VBICibe_Vrth;
|
||||
Ibex_Vrth = here->VBICibex_Vrth;
|
||||
if (!here->VBIC_excessPhase)
|
||||
Itzf_Vrth = here->VBICitzf_vrth;
|
||||
Itzr_Vrth = here->VBICitzr_Vrth;
|
||||
Ibc_Vrth = here->VBICibc_Vrth;
|
||||
Ibep_Vrth = here->VBICibep_Vrth;
|
||||
Ircx_Vrth = here->VBICircx_Vrth;
|
||||
Irci_Vrth = here->VBICirci_Vrth;
|
||||
Irbx_Vrth = here->VBICirbx_Vrth;
|
||||
Irbi_Vrth = here->VBICirbi_Vrth;
|
||||
Ire_Vrth = here->VBICire_Vrth;
|
||||
Irbp_Vrth = here->VBICirbp_Vrth;
|
||||
Ibcp_Vrth = here->VBICibcp_Vrth;
|
||||
Iccp_Vrth = here->VBICiccp_Vrth;
|
||||
Irs_Vrth = here->VBICirs_Vrth;
|
||||
Irth_Vrth = here->VBICirth_Vrth;
|
||||
Ith_Vrth = here->VBICith_Vrth;
|
||||
Ith_Vbei = here->VBICith_Vbei;
|
||||
Ith_Vbci = here->VBICith_Vbci;
|
||||
Ith_Vcei = here->VBICith_Vcei;
|
||||
Ith_Vbex = here->VBICith_Vbex;
|
||||
Ith_Vbep = here->VBICith_Vbep;
|
||||
Ith_Vbcp = here->VBICith_Vbcp;
|
||||
Ith_Vcep = here->VBICith_Vcep;
|
||||
Ith_Vrci = here->VBICith_Vrci;
|
||||
Ith_Vbcx = here->VBICith_Vbcx;
|
||||
Ith_Vrbi = here->VBICith_Vrbi;
|
||||
Ith_Vrbp = here->VBICith_Vrbp;
|
||||
Ith_Vrcx = here->VBICith_Vrcx;
|
||||
Ith_Vrbx = here->VBICith_Vrbx;
|
||||
Ith_Vre = here->VBICith_Vre;
|
||||
Ith_Vrs = here->VBICith_Vrs;
|
||||
|
||||
/*
|
||||
c Stamp element: Ibe
|
||||
*/
|
||||
*(here->VBICbaseBItempPtr) += Ibe_Vrth;
|
||||
*(here->VBICemitEItempPtr) += -Ibe_Vrth;
|
||||
/*
|
||||
c Stamp element: Ibex
|
||||
*/
|
||||
*(here->VBICbaseBXtempPtr) += Ibex_Vrth;
|
||||
*(here->VBICemitEItempPtr) += -Ibex_Vrth;
|
||||
|
||||
if (!here->VBIC_excessPhase) {
|
||||
/*
|
||||
c Stamp element: Itzf
|
||||
*/
|
||||
*(here->VBICcollCItempPtr) += Itzf_Vrth;
|
||||
*(here->VBICemitEItempPtr) += -Itzf_Vrth;
|
||||
}
|
||||
/*
|
||||
c Stamp element: Itzr
|
||||
*/
|
||||
*(here->VBICemitEItempPtr) += Itzr_Vrth;
|
||||
*(here->VBICcollCItempPtr) += -Itzr_Vrth;
|
||||
/*
|
||||
c Stamp element: Ibc
|
||||
*/
|
||||
*(here->VBICbaseBItempPtr) += Ibc_Vrth;
|
||||
*(here->VBICcollCItempPtr) += -Ibc_Vrth;
|
||||
/*
|
||||
c Stamp element: Ibep
|
||||
*/
|
||||
*(here->VBICbaseBXtempPtr) += Ibep_Vrth;
|
||||
*(here->VBICbaseBPtempPtr) += -Ibep_Vrth;
|
||||
/*
|
||||
c Stamp element: Rcx
|
||||
*/
|
||||
*(here->VBICcollTempPtr) += Ircx_Vrth;
|
||||
*(here->VBICcollCXtempPtr) += -Ircx_Vrth;
|
||||
/*
|
||||
c Stamp element: Irci
|
||||
*/
|
||||
*(here->VBICcollCXtempPtr) += Irci_Vrth;
|
||||
*(here->VBICcollCItempPtr) += -Irci_Vrth;
|
||||
/*
|
||||
c Stamp element: Rbx
|
||||
*/
|
||||
*(here->VBICbaseTempPtr) += Irbx_Vrth;
|
||||
*(here->VBICbaseBXtempPtr) += -Irbx_Vrth;
|
||||
/*
|
||||
c Stamp element: Irbi
|
||||
*/
|
||||
*(here->VBICbaseBXtempPtr) += Irbi_Vrth;
|
||||
*(here->VBICbaseBItempPtr) += -Irbi_Vrth;
|
||||
/*
|
||||
c Stamp element: Re
|
||||
*/
|
||||
*(here->VBICemitTempPtr) += Ire_Vrth;
|
||||
*(here->VBICemitEItempPtr) += -Ire_Vrth;
|
||||
/*
|
||||
c Stamp element: Irbp
|
||||
*/
|
||||
*(here->VBICbaseBPtempPtr) += Irbp_Vrth;
|
||||
*(here->VBICcollCXtempPtr) += -Irbp_Vrth;
|
||||
/*
|
||||
c Stamp element: Ibcp
|
||||
*/
|
||||
*(here->VBICsubsSItempPtr) += Ibcp_Vrth;
|
||||
*(here->VBICbaseBPtempPtr) += -Ibcp_Vrth;
|
||||
/*
|
||||
c Stamp element: Iccp
|
||||
*/
|
||||
*(here->VBICbaseBXtempPtr) += Iccp_Vrth;
|
||||
*(here->VBICsubsSItempPtr) += -Iccp_Vrth;
|
||||
/*
|
||||
c Stamp element: Rs
|
||||
*/
|
||||
*(here->VBICsubsTempPtr) += Irs_Vrth;
|
||||
*(here->VBICsubsSItempPtr) += -Irs_Vrth;
|
||||
/*
|
||||
c Stamp element: Rth
|
||||
*/
|
||||
*(here->VBICtempTempPtr) += Irth_Vrth;
|
||||
/*
|
||||
c Stamp element: Ith
|
||||
*/
|
||||
*(here->VBICtempTempPtr) += -Ith_Vrth;
|
||||
|
||||
*(here->VBICtempBaseBIPtr) += -Ith_Vbei;
|
||||
*(here->VBICtempEmitEIPtr) += +Ith_Vbei;
|
||||
*(here->VBICtempBaseBIPtr) += -Ith_Vbci;
|
||||
*(here->VBICtempCollCIPtr) += +Ith_Vbci;
|
||||
*(here->VBICtempCollCIPtr) += -Ith_Vcei;
|
||||
*(here->VBICtempEmitEIPtr) += +Ith_Vcei;
|
||||
*(here->VBICtempBaseBXPtr) += -Ith_Vbex;
|
||||
*(here->VBICtempEmitEIPtr) += +Ith_Vbex;
|
||||
*(here->VBICtempBaseBXPtr) += -Ith_Vbep;
|
||||
*(here->VBICtempBaseBPPtr) += +Ith_Vbep;
|
||||
*(here->VBICtempSubsPtr) += -Ith_Vbcp;
|
||||
*(here->VBICtempBaseBPPtr) += +Ith_Vbcp;
|
||||
*(here->VBICtempBaseBXPtr) += -Ith_Vcep;
|
||||
*(here->VBICtempSubsPtr) += +Ith_Vcep;
|
||||
*(here->VBICtempCollCXPtr) += -Ith_Vrci;
|
||||
*(here->VBICtempCollCIPtr) += +Ith_Vrci;
|
||||
*(here->VBICtempBaseBIPtr) += -Ith_Vbcx;
|
||||
*(here->VBICtempCollCXPtr) += +Ith_Vbcx;
|
||||
*(here->VBICtempBaseBXPtr) += -Ith_Vrbi;
|
||||
*(here->VBICtempBaseBIPtr) += +Ith_Vrbi;
|
||||
*(here->VBICtempBaseBPPtr) += -Ith_Vrbp;
|
||||
*(here->VBICtempCollCXPtr) += +Ith_Vrbp;
|
||||
*(here->VBICtempCollPtr) += -Ith_Vrcx;
|
||||
*(here->VBICtempCollCXPtr) += +Ith_Vrcx;
|
||||
*(here->VBICtempBasePtr) += -Ith_Vrbx;
|
||||
*(here->VBICtempBaseBXPtr) += +Ith_Vrbx;
|
||||
*(here->VBICtempEmitPtr) += -Ith_Vre;
|
||||
*(here->VBICtempEmitEIPtr) += +Ith_Vre;
|
||||
*(here->VBICtempSubsPtr) += -Ith_Vrs;
|
||||
*(here->VBICtempSubsSIPtr) += +Ith_Vrs;
|
||||
if (here->VBIC_excessPhase) {
|
||||
Ith_Vrxf = *(ckt->CKTstate0 + here->VBICith_Vrxf);
|
||||
*(here->VBICtempXf2Ptr) += +Ith_Vrxf;
|
||||
}
|
||||
}
|
||||
|
||||
if (here->VBIC_excessPhase) {
|
||||
Itxf_Vrxf = *(ckt->CKTstate0 + here->VBICitxf_Vrxf);
|
||||
Ibc_Vrxf = *(ckt->CKTstate0 + here->VBICibc_Vrxf);
|
||||
Ixzf_Vbei = *(ckt->CKTstate0 + here->VBICixzf_Vbei);
|
||||
Ixzf_Vbci = *(ckt->CKTstate0 + here->VBICixzf_Vbci);
|
||||
Ixxf_Vrxf = *(ckt->CKTstate0 + here->VBICixxf_Vrxf);
|
||||
/*
|
||||
c Stamp element: Itxf
|
||||
*/
|
||||
*(here->VBICcollCIXf2Ptr) += Itxf_Vrxf;
|
||||
*(here->VBICemitEIXf2Ptr) += -Itxf_Vrxf;
|
||||
/*
|
||||
c Stamp element: Ibc
|
||||
*/
|
||||
*(here->VBICbaseBIXf2Ptr) += Ibc_Vrxf;
|
||||
*(here->VBICcollCIXf2Ptr) += -Ibc_Vrxf;
|
||||
/*
|
||||
c Stamp element: Ixzf, Branch: xf1-ground
|
||||
*/
|
||||
*(here->VBICxf1BaseBIPtr) += +Ixzf_Vbei;
|
||||
*(here->VBICxf1EmitEIPtr) += -Ixzf_Vbei;
|
||||
*(here->VBICxf1BaseBIPtr) += +Ixzf_Vbci;
|
||||
*(here->VBICxf1CollCIPtr) += -Ixzf_Vbci;
|
||||
if (here->VBIC_selfheat) {
|
||||
Ixzf_Vrth = *(ckt->CKTstate0 + here->VBICixzf_Vrth);
|
||||
*(here->VBICxf1TempPtr) += Ixzf_Vrth;
|
||||
}
|
||||
/*
|
||||
c Stamp element: Ixxf, Branch: xf2-ground
|
||||
*/
|
||||
*(here->VBICxf2Xf2Ptr) += +Ixxf_Vrxf;
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
c The complex part
|
||||
*/
|
||||
|
|
@ -229,6 +437,8 @@ c The complex part
|
|||
XQbep_Vbep = *(ckt->CKTstate0 + here->VBICcqbep);
|
||||
XQbep_Vbci = *(ckt->CKTstate0 + here->VBICcqbepci);
|
||||
XQbcp_Vbcp = *(ckt->CKTstate0 + here->VBICcqbcp);
|
||||
XQbeo_Vbe = *(ckt->CKTstate0 + here->VBICcqbeo);
|
||||
XQbco_Vbc = *(ckt->CKTstate0 + here->VBICcqbco);
|
||||
/*
|
||||
c Stamp element: Qbe
|
||||
*/
|
||||
|
|
@ -312,6 +522,87 @@ c Stamp element: Qbcp
|
|||
*(here->VBICbaseBPBaseBPPtr) += XQbcp_Vbcp * (s->real);
|
||||
*(here->VBICbaseBPBaseBPPtr + 1) += XQbcp_Vbcp * (s->imag);
|
||||
|
||||
/*
|
||||
c Stamp element: Qbeo
|
||||
*/
|
||||
*(here->VBICbaseBasePtr ) += XQbeo_Vbe * (s->real);
|
||||
*(here->VBICbaseBasePtr + 1) += XQbeo_Vbe * (s->imag);
|
||||
*(here->VBICemitEmitPtr ) += XQbeo_Vbe * (s->real);
|
||||
*(here->VBICemitEmitPtr + 1) += XQbeo_Vbe * (s->imag);
|
||||
*(here->VBICbaseEmitPtr ) += -XQbeo_Vbe * (s->real);
|
||||
*(here->VBICbaseEmitPtr + 1) += -XQbeo_Vbe * (s->imag);
|
||||
*(here->VBICemitBasePtr ) += -XQbeo_Vbe * (s->real);
|
||||
*(here->VBICemitBasePtr + 1) += -XQbeo_Vbe * (s->imag);
|
||||
/*
|
||||
c Stamp element: Qbco
|
||||
*/
|
||||
*(here->VBICbaseBasePtr ) += XQbco_Vbc * (s->real);
|
||||
*(here->VBICbaseBasePtr + 1) += XQbco_Vbc * (s->imag);
|
||||
*(here->VBICcollCollPtr ) += XQbco_Vbc * (s->real);
|
||||
*(here->VBICcollCollPtr + 1) += XQbco_Vbc * (s->imag);
|
||||
*(here->VBICbaseCollPtr ) += -XQbco_Vbc * (s->real);
|
||||
*(here->VBICbaseCollPtr + 1) += -XQbco_Vbc * (s->imag);
|
||||
*(here->VBICcollBasePtr ) += -XQbco_Vbc * (s->real);
|
||||
*(here->VBICcollBasePtr + 1) += -XQbco_Vbc * (s->imag);
|
||||
|
||||
if (here->VBIC_selfheat) {
|
||||
XQcth_Vrth = here->VBICcapcth;
|
||||
XQbe_Vrth = here->VBICcapqbeth;
|
||||
XQbex_Vrth = here->VBICcapqbexth;
|
||||
XQbc_Vrth = here->VBICcapqbcth;
|
||||
XQbcx_Vrth = here->VBICcapqbcxth;
|
||||
XQbep_Vrth = here->VBICcapqbepth;
|
||||
XQbcp_Vrth = here->VBICcapqbcpth;
|
||||
|
||||
*(here->VBICtempTempPtr ) += XQcth_Vrth * (s->real);
|
||||
*(here->VBICtempTempPtr + 1) += XQcth_Vrth * (s->imag);
|
||||
|
||||
*(here->VBICbaseBItempPtr ) += XQbe_Vrth * (s->real);
|
||||
*(here->VBICbaseBItempPtr + 1) += XQbe_Vrth * (s->imag);
|
||||
*(here->VBICemitEItempPtr ) += -XQbe_Vrth * (s->real);
|
||||
*(here->VBICemitEItempPtr + 1) += -XQbe_Vrth * (s->imag);
|
||||
*(here->VBICbaseBXtempPtr ) += XQbex_Vrth * (s->real);
|
||||
*(here->VBICbaseBXtempPtr + 1) += XQbex_Vrth * (s->imag);
|
||||
*(here->VBICemitEItempPtr ) += -XQbex_Vrth * (s->real);
|
||||
*(here->VBICemitEItempPtr + 1) += -XQbex_Vrth * (s->imag);
|
||||
*(here->VBICbaseBItempPtr ) += XQbc_Vrth * (s->real);
|
||||
*(here->VBICbaseBItempPtr + 1) += XQbc_Vrth * (s->imag);
|
||||
*(here->VBICcollCItempPtr ) += -XQbc_Vrth * (s->real);
|
||||
*(here->VBICcollCItempPtr + 1) += -XQbc_Vrth * (s->imag);
|
||||
*(here->VBICbaseBItempPtr ) += XQbcx_Vrth * (s->real);
|
||||
*(here->VBICbaseBItempPtr + 1) += XQbcx_Vrth * (s->imag);
|
||||
*(here->VBICcollCXtempPtr ) += -XQbcx_Vrth * (s->real);
|
||||
*(here->VBICcollCXtempPtr + 1) += -XQbcx_Vrth * (s->imag);
|
||||
*(here->VBICbaseBXtempPtr ) += XQbep_Vrth * (s->real);
|
||||
*(here->VBICbaseBXtempPtr + 1) += XQbep_Vrth * (s->imag);
|
||||
*(here->VBICbaseBPtempPtr ) += -XQbep_Vrth * (s->real);
|
||||
*(here->VBICbaseBPtempPtr + 1) += -XQbep_Vrth * (s->imag);
|
||||
*(here->VBICsubsSItempPtr ) += XQbcp_Vrth * (s->real);
|
||||
*(here->VBICsubsSItempPtr + 1) += XQbcp_Vrth * (s->imag);
|
||||
*(here->VBICbaseBPtempPtr ) += -XQbcp_Vrth * (s->real);
|
||||
*(here->VBICbaseBPtempPtr + 1) += -XQbcp_Vrth * (s->imag);
|
||||
|
||||
}
|
||||
if (here->VBIC_excessPhase) {
|
||||
/*
|
||||
c Stamp element: Qcxf
|
||||
*/
|
||||
XQcxf_Vcxf = here->VBICcapQcxf;
|
||||
*(here->VBICxf1Xf1Ptr ) += XQcxf_Vcxf * s->real;
|
||||
*(here->VBICxf1Xf1Ptr + 1) += XQcxf_Vcxf * s->imag;
|
||||
/*
|
||||
c Stamp element: L = TD/3
|
||||
*/
|
||||
Xl = here->VBICindInduct;
|
||||
|
||||
*(here->VBICxf1IbrPtr) += 1;
|
||||
*(here->VBICxf2IbrPtr) -= 1;
|
||||
*(here->VBICibrXf1Ptr) += 1;
|
||||
*(here->VBICibrXf2Ptr) -= 1;
|
||||
*(here->VBICibrIbrPtr ) -= Xl * s->real;
|
||||
*(here->VBICibrIbrPtr + 1) -= Xl * s->imag;
|
||||
|
||||
}
|
||||
}
|
||||
}
|
||||
return(OK);
|
||||
|
|
|
|||
|
|
@ -482,6 +482,12 @@ VBICsetup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *states)
|
|||
if((model->VBICthermalResistGiven) && (model->VBICthermalCapacitance < 1e-12))
|
||||
model->VBICthermalCapacitance = 1e-12;
|
||||
|
||||
if((model->VBICdelayTimeFGiven) && (model->VBICdelayTimeF > 0.0)) {
|
||||
here->VBICindInduct = model->VBICdelayTimeF / 3.0 / here->VBICm;
|
||||
here->VBIC_excessPhase = 1;
|
||||
} else {
|
||||
here->VBIC_excessPhase = 0;
|
||||
}
|
||||
|
||||
if(here->VBICcollCINode == 0) {
|
||||
error = CKTmkVolt(ckt, &tmp, here->VBICname, "collCI");
|
||||
|
|
@ -501,6 +507,27 @@ VBICsetup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *states)
|
|||
here->VBICbaseBINode = tmp->number;
|
||||
}
|
||||
|
||||
if (here->VBIC_excessPhase) {
|
||||
if(here->VBICxf1Node == 0) {
|
||||
error = CKTmkVolt(ckt, &tmp, here->VBICname, "xf1");
|
||||
if(error) return(error);
|
||||
here->VBICxf1Node = tmp->number;
|
||||
}
|
||||
if(here->VBICxf2Node == 0) {
|
||||
error = CKTmkVolt(ckt, &tmp, here->VBICname, "xf2");
|
||||
if(error) return(error);
|
||||
here->VBICxf2Node = tmp->number;
|
||||
}
|
||||
if(here->VBICbrEq == 0) {
|
||||
error = CKTmkCur(ckt,&tmp,here->VBICname,"branch");
|
||||
if(error) return(error);
|
||||
here->VBICbrEq = tmp->number;
|
||||
}
|
||||
} else {
|
||||
here->VBICxf1Node = 0;
|
||||
here->VBICxf2Node = 0;
|
||||
}
|
||||
|
||||
/* macro to make elements with built in test for out of memory */
|
||||
#define TSTALLOC(ptr,first,second) \
|
||||
do { if((here->ptr = SMPmakeElt(matrix, here->first, here->second)) == NULL){\
|
||||
|
|
@ -584,6 +611,28 @@ do { if((here->ptr = SMPmakeElt(matrix, here->first, here->second)) == NULL){\
|
|||
TSTALLOC(VBICtempSubsPtr,VBICtempNode,VBICsubsNode);
|
||||
TSTALLOC(VBICtempSubsSIPtr,VBICtempNode,VBICsubsSINode);
|
||||
TSTALLOC(VBICtempTempPtr,VBICtempNode,VBICtempNode);
|
||||
if (here->VBIC_excessPhase) {
|
||||
TSTALLOC(VBICtempXf2Ptr, VBICtempNode, VBICxf2Node);
|
||||
TSTALLOC(VBICxf1TempPtr, VBICxf1Node ,VBICtempNode);
|
||||
}
|
||||
}
|
||||
|
||||
if (here->VBIC_excessPhase) {
|
||||
TSTALLOC(VBICxf1Xf1Ptr , VBICxf1Node , VBICxf1Node);
|
||||
TSTALLOC(VBICxf1Xf2Ptr , VBICxf1Node , VBICxf2Node);
|
||||
TSTALLOC(VBICxf1CollCIPtr, VBICxf1Node , VBICcollCINode);
|
||||
TSTALLOC(VBICxf1BaseBIPtr, VBICxf1Node , VBICbaseBINode);
|
||||
TSTALLOC(VBICxf1EmitEIPtr, VBICxf1Node , VBICemitEINode);
|
||||
TSTALLOC(VBICxf2Xf2Ptr , VBICxf2Node , VBICxf2Node);
|
||||
TSTALLOC(VBICxf2Xf1Ptr , VBICxf2Node , VBICxf1Node);
|
||||
TSTALLOC(VBICcollCIXf2Ptr, VBICcollCINode, VBICxf2Node);
|
||||
TSTALLOC(VBICbaseBIXf2Ptr, VBICbaseBINode, VBICxf2Node);
|
||||
TSTALLOC(VBICemitEIXf2Ptr, VBICemitEINode, VBICxf2Node);
|
||||
TSTALLOC(VBICxf1IbrPtr, VBICxf1Node, VBICbrEq);
|
||||
TSTALLOC(VBICxf2IbrPtr, VBICxf2Node, VBICbrEq);
|
||||
TSTALLOC(VBICibrXf2Ptr, VBICbrEq, VBICxf2Node);
|
||||
TSTALLOC(VBICibrXf1Ptr, VBICbrEq, VBICxf1Node);
|
||||
TSTALLOC(VBICibrIbrPtr, VBICbrEq, VBICbrEq);
|
||||
}
|
||||
|
||||
}
|
||||
|
|
@ -636,6 +685,20 @@ VBICunsetup(
|
|||
&& here->VBICcollCXNode != here->VBICcollNode)
|
||||
CKTdltNNum(ckt, here->VBICcollCXNode);
|
||||
here->VBICcollCXNode = 0;
|
||||
|
||||
if (here->VBIC_excessPhase) {
|
||||
if(here->VBICxf1Node > 0)
|
||||
CKTdltNNum(ckt, here->VBICxf1Node);
|
||||
here->VBICxf1Node = 0;
|
||||
|
||||
if(here->VBICxf2Node > 0)
|
||||
CKTdltNNum(ckt, here->VBICxf2Node);
|
||||
here->VBICxf2Node = 0;
|
||||
|
||||
if (here->VBICbrEq > 0)
|
||||
CKTdltNNum(ckt, here->VBICbrEq);
|
||||
here->VBICbrEq = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
return OK;
|
||||
|
|
|
|||
|
|
@ -46,7 +46,8 @@ void INP2N(CKTcircuit *ckt, INPtables *tab, struct card *current) {
|
|||
char *token;
|
||||
INPgetNetTok(&line, &token, 1);
|
||||
|
||||
if (i >= 2) {
|
||||
/* We have single terminal Verilog-A modules */
|
||||
if (i >= 1) {
|
||||
txfree(INPgetMod(ckt, token, &thismodel, tab));
|
||||
|
||||
/* /1* check if using model binning -- pass in line since need 'l' and 'w' *1/ */
|
||||
|
|
|
|||
|
|
@ -753,7 +753,7 @@ static INPparseNode *PTdifferentiate(INPparseNode * p, int varnum)
|
|||
break;
|
||||
|
||||
default:
|
||||
fprintf(stderr, "Internal error: bad node type %d\n", p->type);
|
||||
fprintf(stderr, "Error: bad node type %d\n", p->type);
|
||||
newp = NULL;
|
||||
break;
|
||||
}
|
||||
|
|
@ -778,6 +778,10 @@ static INPparseNode *mkb(int type, INPparseNode * left,
|
|||
INPparseNode *p;
|
||||
int i;
|
||||
|
||||
if (!right || !left) {
|
||||
return (NULL);
|
||||
}
|
||||
|
||||
if ((right->type == PT_CONSTANT) && (left->type == PT_CONSTANT)) {
|
||||
double value;
|
||||
switch (type) {
|
||||
|
|
@ -890,6 +894,9 @@ static INPparseNode *mkf(int type, INPparseNode * arg)
|
|||
INPparseNode *p;
|
||||
int i;
|
||||
|
||||
if (!arg)
|
||||
return NULL;
|
||||
|
||||
for (i = 0; i < NUM_FUNCS; i++)
|
||||
if (funcs[i].number == type)
|
||||
break;
|
||||
|
|
|
|||
|
|
@ -8,17 +8,8 @@ EXTRA_DIST = README examples icm xspice.c .gitignore \
|
|||
## libs. It is currently compiled manually, last.
|
||||
##SUBDIRS = mif cm enh evt ipc idn icm
|
||||
|
||||
SUBDIRS = mif cm enh evt ipc idn cmpp icm
|
||||
SUBDIRS = mif cm enh evt ipc idn cmpp icm verilog
|
||||
|
||||
initdatadir = $(pkgdatadir)/scripts
|
||||
initdata_DATA = verilog/vlnggen
|
||||
|
||||
initdata1dir = $(pkgdatadir)/scripts/src
|
||||
initdata1_DATA = verilog/verilator_shim.cpp verilog/verilator_main.cpp
|
||||
|
||||
initdata2dir = $(pkgdatadir)/scripts/src/ngspice
|
||||
initdata2_DATA = ../include/ngspice/cosim.h ../include/ngspice/miftypes.h \
|
||||
../include/ngspice/cmtypes.h
|
||||
dist-hook:
|
||||
rm -f "$(distdir)/icm/makedefs"
|
||||
rm -f "$(distdir)/icm/GNUmakefile"
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue