Relaxed ABSTOL and pushed GMIN to make c7552 circuit convergence

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Francesco Lannutti 2017-09-14 00:43:29 +02:00 committed by rlar
parent 79c6875e3c
commit 10a7add46a
1 changed files with 1 additions and 1 deletions

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@ -3,7 +3,7 @@
* by Jingye Xu @ VLSI group, Dept of ECE, UIC
.INCLUDE ../../technology/45nm_HP.pm
.OPTIONS GMIN=1e-012 ABSTOL=1e-18 ACCT
.OPTIONS GMIN=1e-015 ABSTOL=1e-13 ACCT
* the voltage souces:
Vdd vdd gnd DC 1.8