reactivate convergence check
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@ -456,7 +456,7 @@ HICUMload(GENmodel *inModel, CKTcircuit *ckt)
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double ceq, geq=0.0;
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double volatile rhs_current;
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int icheck=1;
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int ichk1, ichk2, ichk3, ichk4, ichk5, ichk6, ichk7, ichk8;
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int ichk1, ichk2, ichk3, ichk4, ichk5;
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int error;
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double Vbe, Vcic, Vbbp, Veie, Vsis, Vbpe;
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@ -1830,7 +1830,7 @@ HICUMload(GENmodel *inModel, CKTcircuit *ckt)
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/*
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* limit nonlinear branch voltages
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*/
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ichk1 = 1, ichk2 = 1, ichk3 = 1, ichk4 = 1, ichk5 = 1, ichk6=1, ichk7=1, ichk8=0;
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ichk1 = 1, ichk2 = 1, ichk3 = 1, ichk4 = 1, ichk5 = 0;
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Vbiei = DEVpnjlim(Vbiei,*(ckt->CKTstate0 + here->HICUMvbiei),here->HICUMvt.rpart,
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here->HICUMtVcrit,&icheck);
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Vbici = DEVpnjlim(Vbici,*(ckt->CKTstate0 + here->HICUMvbici),here->HICUMvt.rpart,
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@ -1842,11 +1842,11 @@ HICUMload(GENmodel *inModel, CKTcircuit *ckt)
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Vsici = DEVpnjlim(Vsici,*(ckt->CKTstate0 + here->HICUMvsici),here->HICUMvt.rpart,
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here->HICUMtVcrit,&ichk4);
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if (selfheat) {
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ichk8 = 1;
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ichk5 = 1;
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Vrth = HICUMlimitlog(Vrth,
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*(ckt->CKTstate0 + here->HICUMvrth),100,&ichk8);
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*(ckt->CKTstate0 + here->HICUMvrth),100,&ichk5);
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}
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if ((ichk1 == 1) || (ichk2 == 1) || (ichk3 == 1) || (ichk4 == 1) || (ichk5 == 1)|| (ichk6 == 1)|| (ichk7 == 1)|| (ichk8 == 1)) icheck=1;
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if ((ichk1 == 1) || (ichk2 == 1) || (ichk3 == 1) || (ichk4 == 1) || (ichk5 == 1)) icheck=1;
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}
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/*
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* determine dc current and derivatives
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@ -3153,12 +3153,12 @@ HICUMload(GENmodel *inModel, CKTcircuit *ckt)
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/*
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* check convergence
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*/
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// if ( (!(ckt->CKTmode & MODEINITFIX))||(!(here->HICUMoff))) {
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// if (icheck == 1) {
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// ckt->CKTnoncon++;
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// ckt->CKTtroubleElt = (GENinstance *) here;
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// }
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// }
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if ( (!(ckt->CKTmode & MODEINITFIX))||(!(here->HICUMoff))) {
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if (icheck == 1) {
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ckt->CKTnoncon++;
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ckt->CKTtroubleElt = (GENinstance *) here;
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}
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}
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/*
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* charge storage for electrostatic caps
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