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devices/bsim3v32: whitespace cleanup

This commit is contained in:
dwarning 2013-05-11 22:17:03 +02:00 committed by rlar
parent 6801f77cc1
commit 0aee9a07c4
20 changed files with 4180 additions and 4181 deletions
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106
src/spicelib/devices/bsim3v32/b3v32.c
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@ -73,15 +73,15 @@ IOP( "tox", BSIM3v32_MOD_TOX, IF_REAL, "Gate oxide thickness in meters"),
IOP( "toxm", BSIM3v32_MOD_TOXM, IF_REAL, "Gate oxide thickness used in extraction"), IOP( "toxm", BSIM3v32_MOD_TOXM, IF_REAL, "Gate oxide thickness used in extraction"),
IOP( "cdsc", BSIM3v32_MOD_CDSC, IF_REAL, "Drain/Source and channel coupling capacitance"), IOP( "cdsc", BSIM3v32_MOD_CDSC, IF_REAL, "Drain/Source and channel coupling capacitance"),
IOP( "cdscb", BSIM3v32_MOD_CDSCB, IF_REAL, "Body-bias dependence of cdsc"), IOP( "cdscb", BSIM3v32_MOD_CDSCB, IF_REAL, "Body-bias dependence of cdsc"),
IOP( "cdscd", BSIM3v32_MOD_CDSCD, IF_REAL, "Drain-bias dependence of cdsc"), IOP( "cdscd", BSIM3v32_MOD_CDSCD, IF_REAL, "Drain-bias dependence of cdsc"),
IOP( "cit", BSIM3v32_MOD_CIT, IF_REAL, "Interface state capacitance"), IOP( "cit", BSIM3v32_MOD_CIT, IF_REAL, "Interface state capacitance"),
IOP( "nfactor", BSIM3v32_MOD_NFACTOR, IF_REAL, "Subthreshold swing Coefficient"), IOP( "nfactor", BSIM3v32_MOD_NFACTOR, IF_REAL, "Subthreshold swing Coefficient"),
IOP( "xj", BSIM3v32_MOD_XJ, IF_REAL, "Junction depth in meters"), IOP( "xj", BSIM3v32_MOD_XJ, IF_REAL, "Junction depth in meters"),
IOP( "vsat", BSIM3v32_MOD_VSAT, IF_REAL, "Saturation velocity at tnom"), IOP( "vsat", BSIM3v32_MOD_VSAT, IF_REAL, "Saturation velocity at tnom"),
IOP( "at", BSIM3v32_MOD_AT, IF_REAL, "Temperature coefficient of vsat"), IOP( "at", BSIM3v32_MOD_AT, IF_REAL, "Temperature coefficient of vsat"),
IOP( "a0", BSIM3v32_MOD_A0, IF_REAL, "Non-uniform depletion width effect coefficient."), IOP( "a0", BSIM3v32_MOD_A0, IF_REAL, "Non-uniform depletion width effect coefficient."),
IOP( "ags", BSIM3v32_MOD_AGS, IF_REAL, "Gate bias coefficient of Abulk."), IOP( "ags", BSIM3v32_MOD_AGS, IF_REAL, "Gate bias coefficient of Abulk."),
IOP( "a1", BSIM3v32_MOD_A1, IF_REAL, "Non-saturation effect coefficient"), IOP( "a1", BSIM3v32_MOD_A1, IF_REAL, "Non-saturation effect coefficient"),
IOP( "a2", BSIM3v32_MOD_A2, IF_REAL, "Non-saturation effect coefficient"), IOP( "a2", BSIM3v32_MOD_A2, IF_REAL, "Non-saturation effect coefficient"),
IOP( "keta", BSIM3v32_MOD_KETA, IF_REAL, "Body-bias coefficient of non-uniform depletion width effect."), IOP( "keta", BSIM3v32_MOD_KETA, IF_REAL, "Body-bias coefficient of non-uniform depletion width effect."),
@ -130,21 +130,21 @@ IOP( "xpart", BSIM3v32_MOD_XPART, IF_REAL, "Channel charge partitioning"),
IOP( "elm", BSIM3v32_MOD_ELM, IF_REAL, "Non-quasi-static Elmore Constant Parameter"), IOP( "elm", BSIM3v32_MOD_ELM, IF_REAL, "Non-quasi-static Elmore Constant Parameter"),
IOP( "delta", BSIM3v32_MOD_DELTA, IF_REAL, "Effective Vds parameter"), IOP( "delta", BSIM3v32_MOD_DELTA, IF_REAL, "Effective Vds parameter"),
IOP( "rsh", BSIM3v32_MOD_RSH, IF_REAL, "Source-drain sheet resistance"), IOP( "rsh", BSIM3v32_MOD_RSH, IF_REAL, "Source-drain sheet resistance"),
IOP( "rdsw", BSIM3v32_MOD_RDSW, IF_REAL, "Source-drain resistance per width"), IOP( "rdsw", BSIM3v32_MOD_RDSW, IF_REAL, "Source-drain resistance per width"),
IOP( "prwg", BSIM3v32_MOD_PRWG, IF_REAL, "Gate-bias effect on parasitic resistance "), IOP( "prwg", BSIM3v32_MOD_PRWG, IF_REAL, "Gate-bias effect on parasitic resistance "),
IOP( "prwb", BSIM3v32_MOD_PRWB, IF_REAL, "Body-effect on parasitic resistance "), IOP( "prwb", BSIM3v32_MOD_PRWB, IF_REAL, "Body-effect on parasitic resistance "),
IOP( "prt", BSIM3v32_MOD_PRT, IF_REAL, "Temperature coefficient of parasitic resistance "), IOP( "prt", BSIM3v32_MOD_PRT, IF_REAL, "Temperature coefficient of parasitic resistance "),
IOP( "eta0", BSIM3v32_MOD_ETA0, IF_REAL, "Subthreshold region DIBL coefficient"), IOP( "eta0", BSIM3v32_MOD_ETA0, IF_REAL, "Subthreshold region DIBL coefficient"),
IOP( "etab", BSIM3v32_MOD_ETAB, IF_REAL, "Subthreshold region DIBL coefficient"), IOP( "etab", BSIM3v32_MOD_ETAB, IF_REAL, "Subthreshold region DIBL coefficient"),
IOP( "pclm", BSIM3v32_MOD_PCLM, IF_REAL, "Channel length modulation Coefficient"), IOP( "pclm", BSIM3v32_MOD_PCLM, IF_REAL, "Channel length modulation Coefficient"),
IOP( "pdiblc1", BSIM3v32_MOD_PDIBL1, IF_REAL, "Drain-induced barrier lowering coefficient"), IOP( "pdiblc1", BSIM3v32_MOD_PDIBL1, IF_REAL, "Drain-induced barrier lowering coefficient"),
IOP( "pdiblc2", BSIM3v32_MOD_PDIBL2, IF_REAL, "Drain-induced barrier lowering coefficient"), IOP( "pdiblc2", BSIM3v32_MOD_PDIBL2, IF_REAL, "Drain-induced barrier lowering coefficient"),
IOP( "pdiblcb", BSIM3v32_MOD_PDIBLB, IF_REAL, "Body-effect on drain-induced barrier lowering"), IOP( "pdiblcb", BSIM3v32_MOD_PDIBLB, IF_REAL, "Body-effect on drain-induced barrier lowering"),
IOP( "pscbe1", BSIM3v32_MOD_PSCBE1, IF_REAL, "Substrate current body-effect coefficient"), IOP( "pscbe1", BSIM3v32_MOD_PSCBE1, IF_REAL, "Substrate current body-effect coefficient"),
IOP( "pscbe2", BSIM3v32_MOD_PSCBE2, IF_REAL, "Substrate current body-effect coefficient"), IOP( "pscbe2", BSIM3v32_MOD_PSCBE2, IF_REAL, "Substrate current body-effect coefficient"),
IOP( "pvag", BSIM3v32_MOD_PVAG, IF_REAL, "Gate dependence of output resistance parameter"), IOP( "pvag", BSIM3v32_MOD_PVAG, IF_REAL, "Gate dependence of output resistance parameter"),
IOP( "js", BSIM3v32_MOD_JS, IF_REAL, "Source/drain junction reverse saturation current density"), IOP( "js", BSIM3v32_MOD_JS, IF_REAL, "Source/drain junction reverse saturation current density"),
IOP( "jsw", BSIM3v32_MOD_JSW, IF_REAL, "Sidewall junction reverse saturation current density"), IOP( "jsw", BSIM3v32_MOD_JSW, IF_REAL, "Sidewall junction reverse saturation current density"),
IOP( "pb", BSIM3v32_MOD_PB, IF_REAL, "Source/drain junction built-in potential"), IOP( "pb", BSIM3v32_MOD_PB, IF_REAL, "Source/drain junction built-in potential"),
@ -234,8 +234,8 @@ IOP( "lnfactor", BSIM3v32_MOD_LNFACTOR, IF_REAL, "Length dependence of nfactor")
IOP( "lxj", BSIM3v32_MOD_LXJ, IF_REAL, "Length dependence of xj"), IOP( "lxj", BSIM3v32_MOD_LXJ, IF_REAL, "Length dependence of xj"),
IOP( "lvsat", BSIM3v32_MOD_LVSAT, IF_REAL, "Length dependence of vsat"), IOP( "lvsat", BSIM3v32_MOD_LVSAT, IF_REAL, "Length dependence of vsat"),
IOP( "lat", BSIM3v32_MOD_LAT, IF_REAL, "Length dependence of at"), IOP( "lat", BSIM3v32_MOD_LAT, IF_REAL, "Length dependence of at"),
IOP( "la0", BSIM3v32_MOD_LA0, IF_REAL, "Length dependence of a0"), IOP( "la0", BSIM3v32_MOD_LA0, IF_REAL, "Length dependence of a0"),
IOP( "lags", BSIM3v32_MOD_LAGS, IF_REAL, "Length dependence of ags"), IOP( "lags", BSIM3v32_MOD_LAGS, IF_REAL, "Length dependence of ags"),
IOP( "la1", BSIM3v32_MOD_LA1, IF_REAL, "Length dependence of a1"), IOP( "la1", BSIM3v32_MOD_LA1, IF_REAL, "Length dependence of a1"),
IOP( "la2", BSIM3v32_MOD_LA2, IF_REAL, "Length dependence of a2"), IOP( "la2", BSIM3v32_MOD_LA2, IF_REAL, "Length dependence of a2"),
IOP( "lketa", BSIM3v32_MOD_LKETA, IF_REAL, "Length dependence of keta"), IOP( "lketa", BSIM3v32_MOD_LKETA, IF_REAL, "Length dependence of keta"),
@ -277,21 +277,21 @@ IOP( "lute", BSIM3v32_MOD_LUTE, IF_REAL, "Length dependence of ute"),
IOP( "lvoff", BSIM3v32_MOD_LVOFF, IF_REAL, "Length dependence of voff"), IOP( "lvoff", BSIM3v32_MOD_LVOFF, IF_REAL, "Length dependence of voff"),
IOP( "lelm", BSIM3v32_MOD_LELM, IF_REAL, "Length dependence of elm"), IOP( "lelm", BSIM3v32_MOD_LELM, IF_REAL, "Length dependence of elm"),
IOP( "ldelta", BSIM3v32_MOD_LDELTA, IF_REAL, "Length dependence of delta"), IOP( "ldelta", BSIM3v32_MOD_LDELTA, IF_REAL, "Length dependence of delta"),
IOP( "lrdsw", BSIM3v32_MOD_LRDSW, IF_REAL, "Length dependence of rdsw "), IOP( "lrdsw", BSIM3v32_MOD_LRDSW, IF_REAL, "Length dependence of rdsw "),
IOP( "lprwg", BSIM3v32_MOD_LPRWG, IF_REAL, "Length dependence of prwg "), IOP( "lprwg", BSIM3v32_MOD_LPRWG, IF_REAL, "Length dependence of prwg "),
IOP( "lprwb", BSIM3v32_MOD_LPRWB, IF_REAL, "Length dependence of prwb "), IOP( "lprwb", BSIM3v32_MOD_LPRWB, IF_REAL, "Length dependence of prwb "),
IOP( "lprt", BSIM3v32_MOD_LPRT, IF_REAL, "Length dependence of prt "), IOP( "lprt", BSIM3v32_MOD_LPRT, IF_REAL, "Length dependence of prt "),
IOP( "leta0", BSIM3v32_MOD_LETA0, IF_REAL, "Length dependence of eta0"), IOP( "leta0", BSIM3v32_MOD_LETA0, IF_REAL, "Length dependence of eta0"),
IOP( "letab", BSIM3v32_MOD_LETAB, IF_REAL, "Length dependence of etab"), IOP( "letab", BSIM3v32_MOD_LETAB, IF_REAL, "Length dependence of etab"),
IOP( "lpclm", BSIM3v32_MOD_LPCLM, IF_REAL, "Length dependence of pclm"), IOP( "lpclm", BSIM3v32_MOD_LPCLM, IF_REAL, "Length dependence of pclm"),
IOP( "lpdiblc1", BSIM3v32_MOD_LPDIBL1, IF_REAL, "Length dependence of pdiblc1"), IOP( "lpdiblc1", BSIM3v32_MOD_LPDIBL1, IF_REAL, "Length dependence of pdiblc1"),
IOP( "lpdiblc2", BSIM3v32_MOD_LPDIBL2, IF_REAL, "Length dependence of pdiblc2"), IOP( "lpdiblc2", BSIM3v32_MOD_LPDIBL2, IF_REAL, "Length dependence of pdiblc2"),
IOP( "lpdiblcb", BSIM3v32_MOD_LPDIBLB, IF_REAL, "Length dependence of pdiblcb"), IOP( "lpdiblcb", BSIM3v32_MOD_LPDIBLB, IF_REAL, "Length dependence of pdiblcb"),
IOP( "lpscbe1", BSIM3v32_MOD_LPSCBE1, IF_REAL, "Length dependence of pscbe1"), IOP( "lpscbe1", BSIM3v32_MOD_LPSCBE1, IF_REAL, "Length dependence of pscbe1"),
IOP( "lpscbe2", BSIM3v32_MOD_LPSCBE2, IF_REAL, "Length dependence of pscbe2"), IOP( "lpscbe2", BSIM3v32_MOD_LPSCBE2, IF_REAL, "Length dependence of pscbe2"),
IOP( "lpvag", BSIM3v32_MOD_LPVAG, IF_REAL, "Length dependence of pvag"), IOP( "lpvag", BSIM3v32_MOD_LPVAG, IF_REAL, "Length dependence of pvag"),
IOP( "lwr", BSIM3v32_MOD_LWR, IF_REAL, "Length dependence of wr"), IOP( "lwr", BSIM3v32_MOD_LWR, IF_REAL, "Length dependence of wr"),
IOP( "ldwg", BSIM3v32_MOD_LDWG, IF_REAL, "Length dependence of dwg"), IOP( "ldwg", BSIM3v32_MOD_LDWG, IF_REAL, "Length dependence of dwg"),
IOP( "ldwb", BSIM3v32_MOD_LDWB, IF_REAL, "Length dependence of dwb"), IOP( "ldwb", BSIM3v32_MOD_LDWB, IF_REAL, "Length dependence of dwb"),
@ -313,15 +313,15 @@ IOP( "lmoin", BSIM3v32_MOD_LMOIN, IF_REAL, "Length dependence of moin"),
IOP( "lnoff", BSIM3v32_MOD_LNOFF, IF_REAL, "Length dependence of noff"), IOP( "lnoff", BSIM3v32_MOD_LNOFF, IF_REAL, "Length dependence of noff"),
IOP( "lvoffcv", BSIM3v32_MOD_LVOFFCV, IF_REAL, "Length dependence of voffcv"), IOP( "lvoffcv", BSIM3v32_MOD_LVOFFCV, IF_REAL, "Length dependence of voffcv"),
IOP( "wcdsc", BSIM3v32_MOD_WCDSC, IF_REAL, "Width dependence of cdsc"), IOP( "wcdsc", BSIM3v32_MOD_WCDSC, IF_REAL, "Width dependence of cdsc"),
IOP( "wcdscb", BSIM3v32_MOD_WCDSCB, IF_REAL, "Width dependence of cdscb"), IOP( "wcdscb", BSIM3v32_MOD_WCDSCB, IF_REAL, "Width dependence of cdscb"),
IOP( "wcdscd", BSIM3v32_MOD_WCDSCD, IF_REAL, "Width dependence of cdscd"), IOP( "wcdscd", BSIM3v32_MOD_WCDSCD, IF_REAL, "Width dependence of cdscd"),
IOP( "wcit", BSIM3v32_MOD_WCIT, IF_REAL, "Width dependence of cit"), IOP( "wcit", BSIM3v32_MOD_WCIT, IF_REAL, "Width dependence of cit"),
IOP( "wnfactor", BSIM3v32_MOD_WNFACTOR, IF_REAL, "Width dependence of nfactor"), IOP( "wnfactor", BSIM3v32_MOD_WNFACTOR, IF_REAL, "Width dependence of nfactor"),
IOP( "wxj", BSIM3v32_MOD_WXJ, IF_REAL, "Width dependence of xj"), IOP( "wxj", BSIM3v32_MOD_WXJ, IF_REAL, "Width dependence of xj"),
IOP( "wvsat", BSIM3v32_MOD_WVSAT, IF_REAL, "Width dependence of vsat"), IOP( "wvsat", BSIM3v32_MOD_WVSAT, IF_REAL, "Width dependence of vsat"),
IOP( "wat", BSIM3v32_MOD_WAT, IF_REAL, "Width dependence of at"), IOP( "wat", BSIM3v32_MOD_WAT, IF_REAL, "Width dependence of at"),
IOP( "wa0", BSIM3v32_MOD_WA0, IF_REAL, "Width dependence of a0"), IOP( "wa0", BSIM3v32_MOD_WA0, IF_REAL, "Width dependence of a0"),
IOP( "wags", BSIM3v32_MOD_WAGS, IF_REAL, "Width dependence of ags"), IOP( "wags", BSIM3v32_MOD_WAGS, IF_REAL, "Width dependence of ags"),
IOP( "wa1", BSIM3v32_MOD_WA1, IF_REAL, "Width dependence of a1"), IOP( "wa1", BSIM3v32_MOD_WA1, IF_REAL, "Width dependence of a1"),
IOP( "wa2", BSIM3v32_MOD_WA2, IF_REAL, "Width dependence of a2"), IOP( "wa2", BSIM3v32_MOD_WA2, IF_REAL, "Width dependence of a2"),
IOP( "wketa", BSIM3v32_MOD_WKETA, IF_REAL, "Width dependence of keta"), IOP( "wketa", BSIM3v32_MOD_WKETA, IF_REAL, "Width dependence of keta"),
@ -369,15 +369,15 @@ IOP( "wprwg", BSIM3v32_MOD_WPRWG, IF_REAL, "Width dependence of prwg "),
IOP( "wprwb", BSIM3v32_MOD_WPRWB, IF_REAL, "Width dependence of prwb "), IOP( "wprwb", BSIM3v32_MOD_WPRWB, IF_REAL, "Width dependence of prwb "),
IOP( "wprt", BSIM3v32_MOD_WPRT, IF_REAL, "Width dependence of prt"), IOP( "wprt", BSIM3v32_MOD_WPRT, IF_REAL, "Width dependence of prt"),
IOP( "weta0", BSIM3v32_MOD_WETA0, IF_REAL, "Width dependence of eta0"), IOP( "weta0", BSIM3v32_MOD_WETA0, IF_REAL, "Width dependence of eta0"),
IOP( "wetab", BSIM3v32_MOD_WETAB, IF_REAL, "Width dependence of etab"), IOP( "wetab", BSIM3v32_MOD_WETAB, IF_REAL, "Width dependence of etab"),
IOP( "wpclm", BSIM3v32_MOD_WPCLM, IF_REAL, "Width dependence of pclm"), IOP( "wpclm", BSIM3v32_MOD_WPCLM, IF_REAL, "Width dependence of pclm"),
IOP( "wpdiblc1", BSIM3v32_MOD_WPDIBL1, IF_REAL, "Width dependence of pdiblc1"), IOP( "wpdiblc1", BSIM3v32_MOD_WPDIBL1, IF_REAL, "Width dependence of pdiblc1"),
IOP( "wpdiblc2", BSIM3v32_MOD_WPDIBL2, IF_REAL, "Width dependence of pdiblc2"), IOP( "wpdiblc2", BSIM3v32_MOD_WPDIBL2, IF_REAL, "Width dependence of pdiblc2"),
IOP( "wpdiblcb", BSIM3v32_MOD_WPDIBLB, IF_REAL, "Width dependence of pdiblcb"), IOP( "wpdiblcb", BSIM3v32_MOD_WPDIBLB, IF_REAL, "Width dependence of pdiblcb"),
IOP( "wpscbe1", BSIM3v32_MOD_WPSCBE1, IF_REAL, "Width dependence of pscbe1"), IOP( "wpscbe1", BSIM3v32_MOD_WPSCBE1, IF_REAL, "Width dependence of pscbe1"),
IOP( "wpscbe2", BSIM3v32_MOD_WPSCBE2, IF_REAL, "Width dependence of pscbe2"), IOP( "wpscbe2", BSIM3v32_MOD_WPSCBE2, IF_REAL, "Width dependence of pscbe2"),
IOP( "wpvag", BSIM3v32_MOD_WPVAG, IF_REAL, "Width dependence of pvag"), IOP( "wpvag", BSIM3v32_MOD_WPVAG, IF_REAL, "Width dependence of pvag"),
IOP( "wwr", BSIM3v32_MOD_WWR, IF_REAL, "Width dependence of wr"), IOP( "wwr", BSIM3v32_MOD_WWR, IF_REAL, "Width dependence of wr"),
IOP( "wdwg", BSIM3v32_MOD_WDWG, IF_REAL, "Width dependence of dwg"), IOP( "wdwg", BSIM3v32_MOD_WDWG, IF_REAL, "Width dependence of dwg"),
IOP( "wdwb", BSIM3v32_MOD_WDWB, IF_REAL, "Width dependence of dwb"), IOP( "wdwb", BSIM3v32_MOD_WDWB, IF_REAL, "Width dependence of dwb"),
@ -400,14 +400,14 @@ IOP( "wnoff", BSIM3v32_MOD_WNOFF, IF_REAL, "Width dependence of noff"),
IOP( "wvoffcv", BSIM3v32_MOD_WVOFFCV, IF_REAL, "Width dependence of voffcv"), IOP( "wvoffcv", BSIM3v32_MOD_WVOFFCV, IF_REAL, "Width dependence of voffcv"),
IOP( "pcdsc", BSIM3v32_MOD_PCDSC, IF_REAL, "Cross-term dependence of cdsc"), IOP( "pcdsc", BSIM3v32_MOD_PCDSC, IF_REAL, "Cross-term dependence of cdsc"),
IOP( "pcdscb", BSIM3v32_MOD_PCDSCB, IF_REAL, "Cross-term dependence of cdscb"), IOP( "pcdscb", BSIM3v32_MOD_PCDSCB, IF_REAL, "Cross-term dependence of cdscb"),
IOP( "pcdscd", BSIM3v32_MOD_PCDSCD, IF_REAL, "Cross-term dependence of cdscd"), IOP( "pcdscd", BSIM3v32_MOD_PCDSCD, IF_REAL, "Cross-term dependence of cdscd"),
IOP( "pcit", BSIM3v32_MOD_PCIT, IF_REAL, "Cross-term dependence of cit"), IOP( "pcit", BSIM3v32_MOD_PCIT, IF_REAL, "Cross-term dependence of cit"),
IOP( "pnfactor", BSIM3v32_MOD_PNFACTOR, IF_REAL, "Cross-term dependence of nfactor"), IOP( "pnfactor", BSIM3v32_MOD_PNFACTOR, IF_REAL, "Cross-term dependence of nfactor"),
IOP( "pxj", BSIM3v32_MOD_PXJ, IF_REAL, "Cross-term dependence of xj"), IOP( "pxj", BSIM3v32_MOD_PXJ, IF_REAL, "Cross-term dependence of xj"),
IOP( "pvsat", BSIM3v32_MOD_PVSAT, IF_REAL, "Cross-term dependence of vsat"), IOP( "pvsat", BSIM3v32_MOD_PVSAT, IF_REAL, "Cross-term dependence of vsat"),
IOP( "pat", BSIM3v32_MOD_PAT, IF_REAL, "Cross-term dependence of at"), IOP( "pat", BSIM3v32_MOD_PAT, IF_REAL, "Cross-term dependence of at"),
IOP( "pa0", BSIM3v32_MOD_PA0, IF_REAL, "Cross-term dependence of a0"), IOP( "pa0", BSIM3v32_MOD_PA0, IF_REAL, "Cross-term dependence of a0"),
IOP( "pags", BSIM3v32_MOD_PAGS, IF_REAL, "Cross-term dependence of ags"), IOP( "pags", BSIM3v32_MOD_PAGS, IF_REAL, "Cross-term dependence of ags"),
IOP( "pa1", BSIM3v32_MOD_PA1, IF_REAL, "Cross-term dependence of a1"), IOP( "pa1", BSIM3v32_MOD_PA1, IF_REAL, "Cross-term dependence of a1"),
IOP( "pa2", BSIM3v32_MOD_PA2, IF_REAL, "Cross-term dependence of a2"), IOP( "pa2", BSIM3v32_MOD_PA2, IF_REAL, "Cross-term dependence of a2"),
@ -450,10 +450,10 @@ IOP( "pute", BSIM3v32_MOD_PUTE, IF_REAL, "Cross-term dependence of ute"),
IOP( "pvoff", BSIM3v32_MOD_PVOFF, IF_REAL, "Cross-term dependence of voff"), IOP( "pvoff", BSIM3v32_MOD_PVOFF, IF_REAL, "Cross-term dependence of voff"),
IOP( "pelm", BSIM3v32_MOD_PELM, IF_REAL, "Cross-term dependence of elm"), IOP( "pelm", BSIM3v32_MOD_PELM, IF_REAL, "Cross-term dependence of elm"),
IOP( "pdelta", BSIM3v32_MOD_PDELTA, IF_REAL, "Cross-term dependence of delta"), IOP( "pdelta", BSIM3v32_MOD_PDELTA, IF_REAL, "Cross-term dependence of delta"),
IOP( "prdsw", BSIM3v32_MOD_PRDSW, IF_REAL, "Cross-term dependence of rdsw "), IOP( "prdsw", BSIM3v32_MOD_PRDSW, IF_REAL, "Cross-term dependence of rdsw "),
IOP( "pprwg", BSIM3v32_MOD_PPRWG, IF_REAL, "Cross-term dependence of prwg "), IOP( "pprwg", BSIM3v32_MOD_PPRWG, IF_REAL, "Cross-term dependence of prwg "),
IOP( "pprwb", BSIM3v32_MOD_PPRWB, IF_REAL, "Cross-term dependence of prwb "), IOP( "pprwb", BSIM3v32_MOD_PPRWB, IF_REAL, "Cross-term dependence of prwb "),
IOP( "pprt", BSIM3v32_MOD_PPRT, IF_REAL, "Cross-term dependence of prt "), IOP( "pprt", BSIM3v32_MOD_PPRT, IF_REAL, "Cross-term dependence of prt "),
IOP( "peta0", BSIM3v32_MOD_PETA0, IF_REAL, "Cross-term dependence of eta0"), IOP( "peta0", BSIM3v32_MOD_PETA0, IF_REAL, "Cross-term dependence of eta0"),
@ -464,7 +464,7 @@ IOP( "ppdiblc2", BSIM3v32_MOD_PPDIBL2, IF_REAL, "Cross-term dependence of pdiblc
IOP( "ppdiblcb", BSIM3v32_MOD_PPDIBLB, IF_REAL, "Cross-term dependence of pdiblcb"), IOP( "ppdiblcb", BSIM3v32_MOD_PPDIBLB, IF_REAL, "Cross-term dependence of pdiblcb"),
IOP( "ppscbe1", BSIM3v32_MOD_PPSCBE1, IF_REAL, "Cross-term dependence of pscbe1"), IOP( "ppscbe1", BSIM3v32_MOD_PPSCBE1, IF_REAL, "Cross-term dependence of pscbe1"),
IOP( "ppscbe2", BSIM3v32_MOD_PPSCBE2, IF_REAL, "Cross-term dependence of pscbe2"), IOP( "ppscbe2", BSIM3v32_MOD_PPSCBE2, IF_REAL, "Cross-term dependence of pscbe2"),
IOP( "ppvag", BSIM3v32_MOD_PPVAG, IF_REAL, "Cross-term dependence of pvag"), IOP( "ppvag", BSIM3v32_MOD_PPVAG, IF_REAL, "Cross-term dependence of pvag"),
IOP( "pwr", BSIM3v32_MOD_PWR, IF_REAL, "Cross-term dependence of wr"), IOP( "pwr", BSIM3v32_MOD_PWR, IF_REAL, "Cross-term dependence of wr"),
IOP( "pdwg", BSIM3v32_MOD_PDWG, IF_REAL, "Cross-term dependence of dwg"), IOP( "pdwg", BSIM3v32_MOD_PDWG, IF_REAL, "Cross-term dependence of dwg"),
IOP( "pdwb", BSIM3v32_MOD_PDWB, IF_REAL, "Cross-term dependence of dwb"), IOP( "pdwb", BSIM3v32_MOD_PDWB, IF_REAL, "Cross-term dependence of dwb"),
@ -506,11 +506,11 @@ char *BSIM3v32names[] = {
"Charge" "Charge"
}; };
int BSIM3v32nSize = NUMELEMS(BSIM3v32names); int BSIM3v32nSize = NUMELEMS(BSIM3v32names);
int BSIM3v32pTSize = NUMELEMS(BSIM3v32pTable); int BSIM3v32pTSize = NUMELEMS(BSIM3v32pTable);
int BSIM3v32mPTSize = NUMELEMS(BSIM3v32mPTable); int BSIM3v32mPTSize = NUMELEMS(BSIM3v32mPTable);
int BSIM3v32iSize = sizeof(BSIM3v32instance); int BSIM3v32iSize = sizeof(BSIM3v32instance);
int BSIM3v32mSize = sizeof(BSIM3v32model); int BSIM3v32mSize = sizeof(BSIM3v32model);

388
src/spicelib/devices/bsim3v32/b3v32acld.c
View File

@ -36,12 +36,12 @@ double ScalingFactor = 1.0e-9;
double m; double m;
omega = ckt->CKTomega; omega = ckt->CKTomega;
for (; model != NULL; model = model->BSIM3v32nextModel) for (; model != NULL; model = model->BSIM3v32nextModel)
{ for (here = model->BSIM3v32instances; here!= NULL; { for (here = model->BSIM3v32instances; here!= NULL;
here = here->BSIM3v32nextInstance) here = here->BSIM3v32nextInstance)
{ {
if (here->BSIM3v32mode >= 0) if (here->BSIM3v32mode >= 0)
{ Gm = here->BSIM3v32gm; { Gm = here->BSIM3v32gm;
Gmbs = here->BSIM3v32gmbs; Gmbs = here->BSIM3v32gmbs;
FwdSum = Gm + Gmbs; FwdSum = Gm + Gmbs;
RevSum = 0.0; RevSum = 0.0;
@ -59,7 +59,7 @@ double m;
gbspb = 0.0; gbspb = 0.0;
gbspsp = 0.0; gbspsp = 0.0;
if (here->BSIM3v32nqsMod == 0) if (here->BSIM3v32nqsMod == 0)
{ cggb = here->BSIM3v32cggb; { cggb = here->BSIM3v32cggb;
cgsb = here->BSIM3v32cgsb; cgsb = here->BSIM3v32cgsb;
cgdb = here->BSIM3v32cgdb; cgdb = here->BSIM3v32cgdb;
@ -73,70 +73,70 @@ double m;
cddb = here->BSIM3v32cddb; cddb = here->BSIM3v32cddb;
xgtg = xgtd = xgts = xgtb = 0.0; xgtg = xgtd = xgts = xgtb = 0.0;
sxpart = 0.6; sxpart = 0.6;
dxpart = 0.4; dxpart = 0.4;
ddxpart_dVd = ddxpart_dVg = ddxpart_dVb ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
= ddxpart_dVs = 0.0; = ddxpart_dVs = 0.0;
dsxpart_dVd = dsxpart_dVg = dsxpart_dVb dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
= dsxpart_dVs = 0.0; = dsxpart_dVs = 0.0;
} }
else else
{ cggb = cgdb = cgsb = 0.0; { cggb = cgdb = cgsb = 0.0;
cbgb = cbdb = cbsb = 0.0; cbgb = cbdb = cbsb = 0.0;
cdgb = cddb = cdsb = 0.0; cdgb = cddb = cdsb = 0.0;
xgtg = here->BSIM3v32gtg; xgtg = here->BSIM3v32gtg;
xgtd = here->BSIM3v32gtd; xgtd = here->BSIM3v32gtd;
xgts = here->BSIM3v32gts; xgts = here->BSIM3v32gts;
xgtb = here->BSIM3v32gtb; xgtb = here->BSIM3v32gtb;
xcqgb = here->BSIM3v32cqgb * omega; xcqgb = here->BSIM3v32cqgb * omega;
xcqdb = here->BSIM3v32cqdb * omega; xcqdb = here->BSIM3v32cqdb * omega;
xcqsb = here->BSIM3v32cqsb * omega; xcqsb = here->BSIM3v32cqsb * omega;
xcqbb = here->BSIM3v32cqbb * omega; xcqbb = here->BSIM3v32cqbb * omega;
CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV
* here->pParam->BSIM3v32leffCV; * here->pParam->BSIM3v32leffCV;
qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk); qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk);
if (fabs(qcheq) <= 1.0e-5 * CoxWL) if (fabs(qcheq) <= 1.0e-5 * CoxWL)
{ if (model->BSIM3v32xpart < 0.5) { if (model->BSIM3v32xpart < 0.5)
{ dxpart = 0.4; { dxpart = 0.4;
} }
else if (model->BSIM3v32xpart > 0.5) else if (model->BSIM3v32xpart > 0.5)
{ dxpart = 0.0; { dxpart = 0.0;
} }
else else
{ dxpart = 0.5; { dxpart = 0.5;
} }
ddxpart_dVd = ddxpart_dVg = ddxpart_dVb ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
= ddxpart_dVs = 0.0; = ddxpart_dVs = 0.0;
} }
else else
{ dxpart = here->BSIM3v32qdrn / qcheq; { dxpart = here->BSIM3v32qdrn / qcheq;
Cdd = here->BSIM3v32cddb; Cdd = here->BSIM3v32cddb;
Csd = -(here->BSIM3v32cgdb + here->BSIM3v32cddb Csd = -(here->BSIM3v32cgdb + here->BSIM3v32cddb
+ here->BSIM3v32cbdb); + here->BSIM3v32cbdb);
ddxpart_dVd = (Cdd - dxpart * (Cdd + Csd)) / qcheq; ddxpart_dVd = (Cdd - dxpart * (Cdd + Csd)) / qcheq;
Cdg = here->BSIM3v32cdgb; Cdg = here->BSIM3v32cdgb;
Csg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb Csg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb
+ here->BSIM3v32cbgb); + here->BSIM3v32cbgb);
ddxpart_dVg = (Cdg - dxpart * (Cdg + Csg)) / qcheq; ddxpart_dVg = (Cdg - dxpart * (Cdg + Csg)) / qcheq;
Cds = here->BSIM3v32cdsb; Cds = here->BSIM3v32cdsb;
Css = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb Css = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb
+ here->BSIM3v32cbsb); + here->BSIM3v32cbsb);
ddxpart_dVs = (Cds - dxpart * (Cds + Css)) / qcheq; ddxpart_dVs = (Cds - dxpart * (Cds + Css)) / qcheq;
ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg
+ ddxpart_dVs); + ddxpart_dVs);
} }
sxpart = 1.0 - dxpart; sxpart = 1.0 - dxpart;
dsxpart_dVd = -ddxpart_dVd; dsxpart_dVd = -ddxpart_dVd;
dsxpart_dVg = -ddxpart_dVg; dsxpart_dVg = -ddxpart_dVg;
dsxpart_dVs = -ddxpart_dVs; dsxpart_dVs = -ddxpart_dVs;
dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs); dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs);
} }
} }
else else
{ Gm = -here->BSIM3v32gm; { Gm = -here->BSIM3v32gm;
Gmbs = -here->BSIM3v32gmbs; Gmbs = -here->BSIM3v32gmbs;
@ -156,7 +156,7 @@ double m;
gbspb = here->BSIM3v32gbbs; gbspb = here->BSIM3v32gbbs;
gbspdp = -(gbspg + gbspsp + gbspb); gbspdp = -(gbspg + gbspsp + gbspb);
if (here->BSIM3v32nqsMod == 0) if (here->BSIM3v32nqsMod == 0)
{ cggb = here->BSIM3v32cggb; { cggb = here->BSIM3v32cggb;
cgsb = here->BSIM3v32cgdb; cgsb = here->BSIM3v32cgdb;
cgdb = here->BSIM3v32cgsb; cgdb = here->BSIM3v32cgsb;
@ -170,19 +170,19 @@ double m;
cddb = -(here->BSIM3v32cdsb + cgdb + cbdb); cddb = -(here->BSIM3v32cdsb + cgdb + cbdb);
xgtg = xgtd = xgts = xgtb = 0.0; xgtg = xgtd = xgts = xgtb = 0.0;
sxpart = 0.4; sxpart = 0.4;
dxpart = 0.6; dxpart = 0.6;
ddxpart_dVd = ddxpart_dVg = ddxpart_dVb ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
= ddxpart_dVs = 0.0; = ddxpart_dVs = 0.0;
dsxpart_dVd = dsxpart_dVg = dsxpart_dVb dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
= dsxpart_dVs = 0.0; = dsxpart_dVs = 0.0;
} }
else else
{ cggb = cgdb = cgsb = 0.0; { cggb = cgdb = cgsb = 0.0;
cbgb = cbdb = cbsb = 0.0; cbgb = cbdb = cbsb = 0.0;
cdgb = cddb = cdsb = 0.0; cdgb = cddb = cdsb = 0.0;
xgtg = here->BSIM3v32gtg; xgtg = here->BSIM3v32gtg;
xgtd = here->BSIM3v32gts; xgtd = here->BSIM3v32gts;
xgts = here->BSIM3v32gtd; xgts = here->BSIM3v32gtd;
xgtb = here->BSIM3v32gtb; xgtb = here->BSIM3v32gtb;
@ -192,50 +192,50 @@ double m;
xcqsb = here->BSIM3v32cqdb * omega; xcqsb = here->BSIM3v32cqdb * omega;
xcqbb = here->BSIM3v32cqbb * omega; xcqbb = here->BSIM3v32cqbb * omega;
CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV
* here->pParam->BSIM3v32leffCV; * here->pParam->BSIM3v32leffCV;
qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk); qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk);
if (fabs(qcheq) <= 1.0e-5 * CoxWL) if (fabs(qcheq) <= 1.0e-5 * CoxWL)
{ if (model->BSIM3v32xpart < 0.5) { if (model->BSIM3v32xpart < 0.5)
{ sxpart = 0.4; { sxpart = 0.4;
} }
else if (model->BSIM3v32xpart > 0.5) else if (model->BSIM3v32xpart > 0.5)
{ sxpart = 0.0; { sxpart = 0.0;
} }
else else
{ sxpart = 0.5; { sxpart = 0.5;
} }
dsxpart_dVd = dsxpart_dVg = dsxpart_dVb dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
= dsxpart_dVs = 0.0; = dsxpart_dVs = 0.0;
} }
else else
{ sxpart = here->BSIM3v32qdrn / qcheq; { sxpart = here->BSIM3v32qdrn / qcheq;
Css = here->BSIM3v32cddb; Css = here->BSIM3v32cddb;
Cds = -(here->BSIM3v32cgdb + here->BSIM3v32cddb Cds = -(here->BSIM3v32cgdb + here->BSIM3v32cddb
+ here->BSIM3v32cbdb); + here->BSIM3v32cbdb);
dsxpart_dVs = (Css - sxpart * (Css + Cds)) / qcheq; dsxpart_dVs = (Css - sxpart * (Css + Cds)) / qcheq;
Csg = here->BSIM3v32cdgb; Csg = here->BSIM3v32cdgb;
Cdg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb Cdg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb
+ here->BSIM3v32cbgb); + here->BSIM3v32cbgb);
dsxpart_dVg = (Csg - sxpart * (Csg + Cdg)) / qcheq; dsxpart_dVg = (Csg - sxpart * (Csg + Cdg)) / qcheq;
Csd = here->BSIM3v32cdsb; Csd = here->BSIM3v32cdsb;
Cdd = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb Cdd = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb
+ here->BSIM3v32cbsb); + here->BSIM3v32cbsb);
dsxpart_dVd = (Csd - sxpart * (Csd + Cdd)) / qcheq; dsxpart_dVd = (Csd - sxpart * (Csd + Cdd)) / qcheq;
dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg
+ dsxpart_dVs); + dsxpart_dVs);
} }
dxpart = 1.0 - sxpart; dxpart = 1.0 - sxpart;
ddxpart_dVd = -dsxpart_dVd; ddxpart_dVd = -dsxpart_dVd;
ddxpart_dVg = -dsxpart_dVg; ddxpart_dVg = -dsxpart_dVg;
ddxpart_dVs = -dsxpart_dVs; ddxpart_dVs = -dsxpart_dVs;
ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs); ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs);
} }
} }
T1 = *(ckt->CKTstate0 + here->BSIM3v32qdef) * here->BSIM3v32gtau; T1 = *(ckt->CKTstate0 + here->BSIM3v32qdef) * here->BSIM3v32gtau;
gdpr = here->BSIM3v32drainConductance; gdpr = here->BSIM3v32drainConductance;
gspr = here->BSIM3v32sourceConductance; gspr = here->BSIM3v32sourceConductance;
gds = here->BSIM3v32gds; gds = here->BSIM3v32gds;
@ -244,9 +244,9 @@ double m;
capbd = here->BSIM3v32capbd; capbd = here->BSIM3v32capbd;
capbs = here->BSIM3v32capbs; capbs = here->BSIM3v32capbs;
GSoverlapCap = here->BSIM3v32cgso; GSoverlapCap = here->BSIM3v32cgso;
GDoverlapCap = here->BSIM3v32cgdo; GDoverlapCap = here->BSIM3v32cgdo;
GBoverlapCap = here->pParam->BSIM3v32cgbo; GBoverlapCap = here->pParam->BSIM3v32cgbo;
xcdgb = (cdgb - GDoverlapCap) * omega; xcdgb = (cdgb - GDoverlapCap) * omega;
xcddb = (cddb + capbd + GDoverlapCap) * omega; xcddb = (cddb + capbd + GDoverlapCap) * omega;
@ -255,106 +255,106 @@ double m;
xcsdb = -(cgdb + cbdb + cddb) * omega; xcsdb = -(cgdb + cbdb + cddb) * omega;
xcssb = (capbs + GSoverlapCap - (cgsb + cbsb + cdsb)) * omega; xcssb = (capbs + GSoverlapCap - (cgsb + cbsb + cdsb)) * omega;
xcggb = (cggb + GDoverlapCap + GSoverlapCap + GBoverlapCap) xcggb = (cggb + GDoverlapCap + GSoverlapCap + GBoverlapCap)
* omega; * omega;
xcgdb = (cgdb - GDoverlapCap ) * omega; xcgdb = (cgdb - GDoverlapCap ) * omega;
xcgsb = (cgsb - GSoverlapCap) * omega; xcgsb = (cgsb - GSoverlapCap) * omega;
xcbgb = (cbgb - GBoverlapCap) * omega; xcbgb = (cbgb - GBoverlapCap) * omega;
xcbdb = (cbdb - capbd ) * omega; xcbdb = (cbdb - capbd ) * omega;
xcbsb = (cbsb - capbs ) * omega; xcbsb = (cbsb - capbs ) * omega;
m = here->BSIM3v32m; m = here->BSIM3v32m;
*(here->BSIM3v32GgPtr + 1) += m * xcggb; *(here->BSIM3v32GgPtr + 1) += m * xcggb;
*(here->BSIM3v32BbPtr + 1) -= *(here->BSIM3v32BbPtr + 1) -=
m * (xcbgb + xcbdb + xcbsb); m * (xcbgb + xcbdb + xcbsb);
*(here->BSIM3v32DPdpPtr + 1) += m * xcddb; *(here->BSIM3v32DPdpPtr + 1) += m * xcddb;
*(here->BSIM3v32SPspPtr + 1) += m * xcssb; *(here->BSIM3v32SPspPtr + 1) += m * xcssb;
*(here->BSIM3v32GbPtr + 1) -= *(here->BSIM3v32GbPtr + 1) -=
m * (xcggb + xcgdb + xcgsb); m * (xcggb + xcgdb + xcgsb);
*(here->BSIM3v32GdpPtr + 1) += m * xcgdb; *(here->BSIM3v32GdpPtr + 1) += m * xcgdb;
*(here->BSIM3v32GspPtr + 1) += m * xcgsb; *(here->BSIM3v32GspPtr + 1) += m * xcgsb;
*(here->BSIM3v32BgPtr + 1) += m * xcbgb; *(here->BSIM3v32BgPtr + 1) += m * xcbgb;
*(here->BSIM3v32BdpPtr + 1) += m * xcbdb; *(here->BSIM3v32BdpPtr + 1) += m * xcbdb;
*(here->BSIM3v32BspPtr + 1) += m * xcbsb; *(here->BSIM3v32BspPtr + 1) += m * xcbsb;
*(here->BSIM3v32DPgPtr + 1) += m * xcdgb; *(here->BSIM3v32DPgPtr + 1) += m * xcdgb;
*(here->BSIM3v32DPbPtr + 1) -= *(here->BSIM3v32DPbPtr + 1) -=
m * (xcdgb + xcddb + xcdsb); m * (xcdgb + xcddb + xcdsb);
*(here->BSIM3v32DPspPtr + 1) += m * xcdsb; *(here->BSIM3v32DPspPtr + 1) += m * xcdsb;
*(here->BSIM3v32SPgPtr + 1) += m * xcsgb; *(here->BSIM3v32SPgPtr + 1) += m * xcsgb;
*(here->BSIM3v32SPbPtr + 1) -= *(here->BSIM3v32SPbPtr + 1) -=
m * (xcsgb + xcsdb + xcssb); m * (xcsgb + xcsdb + xcssb);
*(here->BSIM3v32SPdpPtr + 1) += m * xcsdb; *(here->BSIM3v32SPdpPtr + 1) += m * xcsdb;
*(here->BSIM3v32DdPtr) += m * gdpr; *(here->BSIM3v32DdPtr) += m * gdpr;
*(here->BSIM3v32SsPtr) += m * gspr; *(here->BSIM3v32SsPtr) += m * gspr;
*(here->BSIM3v32BbPtr) += *(here->BSIM3v32BbPtr) +=
m * (gbd + gbs - here->BSIM3v32gbbs); m * (gbd + gbs - here->BSIM3v32gbbs);
*(here->BSIM3v32DPdpPtr) += *(here->BSIM3v32DPdpPtr) +=
m * (gdpr + gds + gbd + RevSum + m * (gdpr + gds + gbd + RevSum +
dxpart * xgtd + T1 * ddxpart_dVd + dxpart * xgtd + T1 * ddxpart_dVd +
gbdpdp); gbdpdp);
*(here->BSIM3v32SPspPtr) += *(here->BSIM3v32SPspPtr) +=
m * (gspr + gds + gbs + FwdSum + m * (gspr + gds + gbs + FwdSum +
sxpart * xgts + T1 * dsxpart_dVs + sxpart * xgts + T1 * dsxpart_dVs +
gbspsp); gbspsp);
*(here->BSIM3v32DdpPtr) -= m * gdpr; *(here->BSIM3v32DdpPtr) -= m * gdpr;
*(here->BSIM3v32SspPtr) -= m * gspr; *(here->BSIM3v32SspPtr) -= m * gspr;
*(here->BSIM3v32BgPtr) -= m * here->BSIM3v32gbgs; *(here->BSIM3v32BgPtr) -= m * here->BSIM3v32gbgs;
*(here->BSIM3v32BdpPtr) -= m * (gbd - gbbdp); *(here->BSIM3v32BdpPtr) -= m * (gbd - gbbdp);
*(here->BSIM3v32BspPtr) -= m * (gbs - gbbsp); *(here->BSIM3v32BspPtr) -= m * (gbs - gbbsp);
*(here->BSIM3v32DPdPtr) -= m * gdpr; *(here->BSIM3v32DPdPtr) -= m * gdpr;
*(here->BSIM3v32DPgPtr) += *(here->BSIM3v32DPgPtr) +=
m * (Gm + dxpart * xgtg + T1 * ddxpart_dVg + m * (Gm + dxpart * xgtg + T1 * ddxpart_dVg +
gbdpg); gbdpg);
*(here->BSIM3v32DPbPtr) -= *(here->BSIM3v32DPbPtr) -=
m * (gbd - Gmbs - dxpart * xgtb - m * (gbd - Gmbs - dxpart * xgtb -
T1 * ddxpart_dVb - gbdpb); T1 * ddxpart_dVb - gbdpb);
*(here->BSIM3v32DPspPtr) -= *(here->BSIM3v32DPspPtr) -=
m * (gds + FwdSum - dxpart * xgts - m * (gds + FwdSum - dxpart * xgts -
T1 * ddxpart_dVs - gbdpsp); T1 * ddxpart_dVs - gbdpsp);
*(here->BSIM3v32SPgPtr) -= *(here->BSIM3v32SPgPtr) -=
m * (Gm - sxpart * xgtg - T1 * dsxpart_dVg - m * (Gm - sxpart * xgtg - T1 * dsxpart_dVg -
gbspg); gbspg);
*(here->BSIM3v32SPsPtr) -= m * gspr; *(here->BSIM3v32SPsPtr) -= m * gspr;
*(here->BSIM3v32SPbPtr) -= *(here->BSIM3v32SPbPtr) -=
m * (gbs + Gmbs - sxpart * xgtb - m * (gbs + Gmbs - sxpart * xgtb -
T1 * dsxpart_dVb - gbspb); T1 * dsxpart_dVb - gbspb);
*(here->BSIM3v32SPdpPtr) -= *(here->BSIM3v32SPdpPtr) -=
m * (gds + RevSum - sxpart * xgtd - m * (gds + RevSum - sxpart * xgtd -
T1 * dsxpart_dVd - gbspdp); T1 * dsxpart_dVd - gbspdp);
*(here->BSIM3v32GgPtr) -= m * xgtg; *(here->BSIM3v32GgPtr) -= m * xgtg;
*(here->BSIM3v32GbPtr) -= m * xgtb; *(here->BSIM3v32GbPtr) -= m * xgtb;
*(here->BSIM3v32GdpPtr) -= m * xgtd; *(here->BSIM3v32GdpPtr) -= m * xgtd;
*(here->BSIM3v32GspPtr) -= m * xgts; *(here->BSIM3v32GspPtr) -= m * xgts;
if (here->BSIM3v32nqsMod) if (here->BSIM3v32nqsMod)
{ {
*(here->BSIM3v32QqPtr + 1) += *(here->BSIM3v32QqPtr + 1) +=
m * omega * ScalingFactor; m * omega * ScalingFactor;
*(here->BSIM3v32QgPtr + 1) -= m * xcqgb; *(here->BSIM3v32QgPtr + 1) -= m * xcqgb;
*(here->BSIM3v32QdpPtr + 1) -= m * xcqdb; *(here->BSIM3v32QdpPtr + 1) -= m * xcqdb;
*(here->BSIM3v32QspPtr + 1) -= m * xcqsb; *(here->BSIM3v32QspPtr + 1) -= m * xcqsb;
*(here->BSIM3v32QbPtr + 1) -= m * xcqbb; *(here->BSIM3v32QbPtr + 1) -= m * xcqbb;
*(here->BSIM3v32QqPtr) += m * here->BSIM3v32gtau; *(here->BSIM3v32QqPtr) += m * here->BSIM3v32gtau;
*(here->BSIM3v32DPqPtr) += *(here->BSIM3v32DPqPtr) +=
m * (dxpart * here->BSIM3v32gtau); m * (dxpart * here->BSIM3v32gtau);
*(here->BSIM3v32SPqPtr) += *(here->BSIM3v32SPqPtr) +=
m * (sxpart * here->BSIM3v32gtau); m * (sxpart * here->BSIM3v32gtau);
*(here->BSIM3v32GqPtr) -= m * here->BSIM3v32gtau; *(here->BSIM3v32GqPtr) -= m * here->BSIM3v32gtau;
*(here->BSIM3v32QgPtr) += m * xgtg; *(here->BSIM3v32QgPtr) += m * xgtg;
*(here->BSIM3v32QdpPtr) += m * xgtd; *(here->BSIM3v32QdpPtr) += m * xgtd;
*(here->BSIM3v32QspPtr) += m * xgts; *(here->BSIM3v32QspPtr) += m * xgts;
*(here->BSIM3v32QbPtr) += m * xgtb; *(here->BSIM3v32QbPtr) += m * xgtb;
} }
} }
} }
return(OK); return(OK);
} }

114
src/spicelib/devices/bsim3v32/b3v32ask.c
View File

@ -19,22 +19,22 @@
int int
BSIM3v32ask (CKTcircuit *ckt, GENinstance *inst, int which, IFvalue *value, BSIM3v32ask (CKTcircuit *ckt, GENinstance *inst, int which, IFvalue *value,
IFvalue *select) IFvalue *select)
{ {
BSIM3v32instance *here = (BSIM3v32instance*)inst; BSIM3v32instance *here = (BSIM3v32instance*)inst;
NG_IGNORE(select); NG_IGNORE(select);
switch(which) switch(which)
{ case BSIM3v32_L: { case BSIM3v32_L:
value->rValue = here->BSIM3v32l; value->rValue = here->BSIM3v32l;
return(OK); return(OK);
case BSIM3v32_W: case BSIM3v32_W:
value->rValue = here->BSIM3v32w; value->rValue = here->BSIM3v32w;
return(OK); return(OK);
case BSIM3v32_M: case BSIM3v32_M:
value->rValue = here->BSIM3v32m; value->rValue = here->BSIM3v32m;
return (OK); return (OK);
case BSIM3v32_AS: case BSIM3v32_AS:
value->rValue = here->BSIM3v32sourceArea; value->rValue = here->BSIM3v32sourceArea;
return(OK); return(OK);
@ -94,11 +94,11 @@ BSIM3v32instance *here = (BSIM3v32instance*)inst;
return(OK); return(OK);
case BSIM3v32_SOURCECONDUCT: case BSIM3v32_SOURCECONDUCT:
value->rValue = here->BSIM3v32sourceConductance; value->rValue = here->BSIM3v32sourceConductance;
value->rValue *= here->BSIM3v32m; value->rValue *= here->BSIM3v32m;
return(OK); return(OK);
case BSIM3v32_DRAINCONDUCT: case BSIM3v32_DRAINCONDUCT:
value->rValue = here->BSIM3v32drainConductance; value->rValue = here->BSIM3v32drainConductance;
value->rValue *= here->BSIM3v32m; value->rValue *= here->BSIM3v32m;
return(OK); return(OK);
case BSIM3v32_VBD: case BSIM3v32_VBD:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32vbd); value->rValue = *(ckt->CKTstate0 + here->BSIM3v32vbd);
@ -113,118 +113,118 @@ BSIM3v32instance *here = (BSIM3v32instance*)inst;
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32vds); value->rValue = *(ckt->CKTstate0 + here->BSIM3v32vds);
return(OK); return(OK);
case BSIM3v32_CD: case BSIM3v32_CD:
value->rValue = here->BSIM3v32cd; value->rValue = here->BSIM3v32cd;
value->rValue *= here->BSIM3v32m; value->rValue *= here->BSIM3v32m;
return(OK); return(OK);
case BSIM3v32_CBS: case BSIM3v32_CBS:
value->rValue = here->BSIM3v32cbs; value->rValue = here->BSIM3v32cbs;
value->rValue *= here->BSIM3v32m; value->rValue *= here->BSIM3v32m;
return(OK); return(OK);
case BSIM3v32_CBD: case BSIM3v32_CBD:
value->rValue = here->BSIM3v32cbd; value->rValue = here->BSIM3v32cbd;
value->rValue *= here->BSIM3v32m; value->rValue *= here->BSIM3v32m;
return(OK); return(OK);
case BSIM3v32_GM: case BSIM3v32_GM:
value->rValue = here->BSIM3v32gm; value->rValue = here->BSIM3v32gm;
value->rValue *= here->BSIM3v32m; value->rValue *= here->BSIM3v32m;
return(OK); return(OK);
case BSIM3v32_GDS: case BSIM3v32_GDS:
value->rValue = here->BSIM3v32gds; value->rValue = here->BSIM3v32gds;
value->rValue *= here->BSIM3v32m; value->rValue *= here->BSIM3v32m;
return(OK); return(OK);
case BSIM3v32_GMBS: case BSIM3v32_GMBS:
value->rValue = here->BSIM3v32gmbs; value->rValue = here->BSIM3v32gmbs;
value->rValue *= here->BSIM3v32m; value->rValue *= here->BSIM3v32m;
return(OK); return(OK);
case BSIM3v32_GBD: case BSIM3v32_GBD:
value->rValue = here->BSIM3v32gbd; value->rValue = here->BSIM3v32gbd;
value->rValue *= here->BSIM3v32m; value->rValue *= here->BSIM3v32m;
return(OK); return(OK);
case BSIM3v32_GBS: case BSIM3v32_GBS:
value->rValue = here->BSIM3v32gbs; value->rValue = here->BSIM3v32gbs;
value->rValue *= here->BSIM3v32m; value->rValue *= here->BSIM3v32m;
return(OK); return(OK);
case BSIM3v32_QB: case BSIM3v32_QB:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qb); value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qb);
value->rValue *= here->BSIM3v32m; value->rValue *= here->BSIM3v32m;
return(OK); return(OK);
case BSIM3v32_CQB: case BSIM3v32_CQB:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32cqb); value->rValue = *(ckt->CKTstate0 + here->BSIM3v32cqb);
value->rValue *= here->BSIM3v32m; value->rValue *= here->BSIM3v32m;
return(OK); return(OK);
case BSIM3v32_QG: case BSIM3v32_QG:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qg); value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qg);
value->rValue *= here->BSIM3v32m; value->rValue *= here->BSIM3v32m;
return(OK); return(OK);
case BSIM3v32_CQG: case BSIM3v32_CQG:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32cqg); value->rValue = *(ckt->CKTstate0 + here->BSIM3v32cqg);
value->rValue *= here->BSIM3v32m; value->rValue *= here->BSIM3v32m;
return(OK); return(OK);
case BSIM3v32_QD: case BSIM3v32_QD:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qd); value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qd);
value->rValue *= here->BSIM3v32m; value->rValue *= here->BSIM3v32m;
return(OK); return(OK);
case BSIM3v32_CQD: case BSIM3v32_CQD:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32cqd); value->rValue = *(ckt->CKTstate0 + here->BSIM3v32cqd);
value->rValue *= here->BSIM3v32m; value->rValue *= here->BSIM3v32m;
return(OK); return(OK);
case BSIM3v32_CGG: case BSIM3v32_CGG:
value->rValue = here->BSIM3v32cggb; value->rValue = here->BSIM3v32cggb;
value->rValue *= here->BSIM3v32m; value->rValue *= here->BSIM3v32m;
return(OK); return(OK);
case BSIM3v32_CGD: case BSIM3v32_CGD:
value->rValue = here->BSIM3v32cgdb; value->rValue = here->BSIM3v32cgdb;
value->rValue *= here->BSIM3v32m; value->rValue *= here->BSIM3v32m;
return(OK); return(OK);
case BSIM3v32_CGS: case BSIM3v32_CGS:
value->rValue = here->BSIM3v32cgsb; value->rValue = here->BSIM3v32cgsb;
value->rValue *= here->BSIM3v32m; value->rValue *= here->BSIM3v32m;
return(OK); return(OK);
case BSIM3v32_CDG: case BSIM3v32_CDG:
value->rValue = here->BSIM3v32cdgb; value->rValue = here->BSIM3v32cdgb;
value->rValue *= here->BSIM3v32m; value->rValue *= here->BSIM3v32m;
return(OK); return(OK);
case BSIM3v32_CDD: case BSIM3v32_CDD:
value->rValue = here->BSIM3v32cddb; value->rValue = here->BSIM3v32cddb;
value->rValue *= here->BSIM3v32m; value->rValue *= here->BSIM3v32m;
return(OK); return(OK);
case BSIM3v32_CDS: case BSIM3v32_CDS:
value->rValue = here->BSIM3v32cdsb; value->rValue = here->BSIM3v32cdsb;
value->rValue *= here->BSIM3v32m; value->rValue *= here->BSIM3v32m;
return(OK); return(OK);
case BSIM3v32_CBG: case BSIM3v32_CBG:
value->rValue = here->BSIM3v32cbgb; value->rValue = here->BSIM3v32cbgb;
value->rValue *= here->BSIM3v32m; value->rValue *= here->BSIM3v32m;
return(OK); return(OK);
case BSIM3v32_CBDB: case BSIM3v32_CBDB:
value->rValue = here->BSIM3v32cbdb; value->rValue = here->BSIM3v32cbdb;
value->rValue *= here->BSIM3v32m; value->rValue *= here->BSIM3v32m;
return(OK); return(OK);
case BSIM3v32_CBSB: case BSIM3v32_CBSB:
value->rValue = here->BSIM3v32cbsb; value->rValue = here->BSIM3v32cbsb;
value->rValue *= here->BSIM3v32m; value->rValue *= here->BSIM3v32m;
return(OK); return(OK);
case BSIM3v32_CAPBD: case BSIM3v32_CAPBD:
value->rValue = here->BSIM3v32capbd; value->rValue = here->BSIM3v32capbd;
value->rValue *= here->BSIM3v32m; value->rValue *= here->BSIM3v32m;
return(OK); return(OK);
case BSIM3v32_CAPBS: case BSIM3v32_CAPBS:
value->rValue = here->BSIM3v32capbs; value->rValue = here->BSIM3v32capbs;
value->rValue *= here->BSIM3v32m; value->rValue *= here->BSIM3v32m;
return(OK); return(OK);
case BSIM3v32_VON: case BSIM3v32_VON:
value->rValue = here->BSIM3v32von; value->rValue = here->BSIM3v32von;
return(OK); return(OK);
case BSIM3v32_VDSAT: case BSIM3v32_VDSAT:
value->rValue = here->BSIM3v32vdsat; value->rValue = here->BSIM3v32vdsat;
return(OK); return(OK);
case BSIM3v32_QBS: case BSIM3v32_QBS:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qbs); value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qbs);
value->rValue *= here->BSIM3v32m; value->rValue *= here->BSIM3v32m;
return(OK); return(OK);
case BSIM3v32_QBD: case BSIM3v32_QBD:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qbd); value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qbd);
value->rValue *= here->BSIM3v32m; value->rValue *= here->BSIM3v32m;
return(OK); return(OK);
default: default:
return(E_BADPARM); return(E_BADPARM);

738
src/spicelib/devices/bsim3v32/b3v32check.c
View File

@ -31,416 +31,416 @@ FILE *fplog;
if ((fplog = fopen("b3v32check.log", "w")) != NULL) if ((fplog = fopen("b3v32check.log", "w")) != NULL)
{ pParam = here->pParam; { pParam = here->pParam;
fprintf (fplog, fprintf (fplog,
"BSIM3 Model (Supports: v3.2, v3.2.2, v3.2.3, v3.2.4)\n"); "BSIM3 Model (Supports: v3.2, v3.2.2, v3.2.3, v3.2.4)\n");
fprintf (fplog, "Parameter Checking.\n"); fprintf (fplog, "Parameter Checking.\n");
fprintf (fplog, "Model = %s\n", model->BSIM3v32modName); fprintf (fplog, "Model = %s\n", model->BSIM3v32modName);
fprintf (fplog, "W = %g, L = %g, M = %g\n", here->BSIM3v32w, fprintf (fplog, "W = %g, L = %g, M = %g\n", here->BSIM3v32w,
here->BSIM3v32l, here->BSIM3v32m); here->BSIM3v32l, here->BSIM3v32m);
if ((strcmp(model->BSIM3v32version, "3.2.4")) && (strcmp(model->BSIM3v32version, "3.24")) if ((strcmp(model->BSIM3v32version, "3.2.4")) && (strcmp(model->BSIM3v32version, "3.24"))
&& (strcmp(model->BSIM3v32version, "3.2.3")) && (strcmp(model->BSIM3v32version, "3.23")) && (strcmp(model->BSIM3v32version, "3.2.3")) && (strcmp(model->BSIM3v32version, "3.23"))
&& (strcmp(model->BSIM3v32version, "3.2.2")) && (strcmp(model->BSIM3v32version, "3.22")) && (strcmp(model->BSIM3v32version, "3.2.2")) && (strcmp(model->BSIM3v32version, "3.22"))
&& (strcmp(model->BSIM3v32version, "3.2")) && (strcmp(model->BSIM3v32version, "3.20"))) && (strcmp(model->BSIM3v32version, "3.2")) && (strcmp(model->BSIM3v32version, "3.20")))
{ {
fprintf (fplog, fprintf (fplog,
"Warning: This model supports BSIM3v3.2, BSIM3v3.2.2, BSIM3v3.2.3, BSIM3v3.2.4\n"); "Warning: This model supports BSIM3v3.2, BSIM3v3.2.2, BSIM3v3.2.3, BSIM3v3.2.4\n");
fprintf (fplog, fprintf (fplog,
"You specified a wrong version number. Working now with BSIM3v3.2.4.\n"); "You specified a wrong version number. Working now with BSIM3v3.2.4.\n");
printf ("Warning: This model supports BSIM3v3.2, BSIM3v3.2.2, BSIM3v3.2.3, BSIM3v3.2.4\n"); printf ("Warning: This model supports BSIM3v3.2, BSIM3v3.2.2, BSIM3v3.2.3, BSIM3v3.2.4\n");
printf ("You specified a wrong version number. Working now with BSIM3v3.2.4.\n"); printf ("You specified a wrong version number. Working now with BSIM3v3.2.4.\n");
} }
if (pParam->BSIM3v32nlx < -pParam->BSIM3v32leff) if (pParam->BSIM3v32nlx < -pParam->BSIM3v32leff)
{ fprintf(fplog, "Fatal: Nlx = %g is less than -Leff.\n", { fprintf(fplog, "Fatal: Nlx = %g is less than -Leff.\n",
pParam->BSIM3v32nlx); pParam->BSIM3v32nlx);
printf("Fatal: Nlx = %g is less than -Leff.\n", printf("Fatal: Nlx = %g is less than -Leff.\n",
pParam->BSIM3v32nlx); pParam->BSIM3v32nlx);
Fatal_Flag = 1; Fatal_Flag = 1;
} }
if (model->BSIM3v32tox <= 0.0) if (model->BSIM3v32tox <= 0.0)
{ fprintf(fplog, "Fatal: Tox = %g is not positive.\n", { fprintf(fplog, "Fatal: Tox = %g is not positive.\n",
model->BSIM3v32tox); model->BSIM3v32tox);
printf("Fatal: Tox = %g is not positive.\n", model->BSIM3v32tox); printf("Fatal: Tox = %g is not positive.\n", model->BSIM3v32tox);
Fatal_Flag = 1; Fatal_Flag = 1;
} }
if (model->BSIM3v32toxm <= 0.0) if (model->BSIM3v32toxm <= 0.0)
{ fprintf(fplog, "Fatal: Toxm = %g is not positive.\n", { fprintf(fplog, "Fatal: Toxm = %g is not positive.\n",
model->BSIM3v32toxm); model->BSIM3v32toxm);
printf("Fatal: Toxm = %g is not positive.\n", model->BSIM3v32toxm); printf("Fatal: Toxm = %g is not positive.\n", model->BSIM3v32toxm);
Fatal_Flag = 1; Fatal_Flag = 1;
} }
if (pParam->BSIM3v32npeak <= 0.0) if (pParam->BSIM3v32npeak <= 0.0)
{ fprintf(fplog, "Fatal: Nch = %g is not positive.\n", { fprintf(fplog, "Fatal: Nch = %g is not positive.\n",
pParam->BSIM3v32npeak); pParam->BSIM3v32npeak);
printf("Fatal: Nch = %g is not positive.\n", printf("Fatal: Nch = %g is not positive.\n",
pParam->BSIM3v32npeak); pParam->BSIM3v32npeak);
Fatal_Flag = 1; Fatal_Flag = 1;
} }
if (pParam->BSIM3v32nsub <= 0.0) if (pParam->BSIM3v32nsub <= 0.0)
{ fprintf(fplog, "Fatal: Nsub = %g is not positive.\n", { fprintf(fplog, "Fatal: Nsub = %g is not positive.\n",
pParam->BSIM3v32nsub); pParam->BSIM3v32nsub);
printf("Fatal: Nsub = %g is not positive.\n", printf("Fatal: Nsub = %g is not positive.\n",
pParam->BSIM3v32nsub); pParam->BSIM3v32nsub);
Fatal_Flag = 1; Fatal_Flag = 1;
} }
if (pParam->BSIM3v32ngate < 0.0) if (pParam->BSIM3v32ngate < 0.0)
{ fprintf(fplog, "Fatal: Ngate = %g is not positive.\n", { fprintf(fplog, "Fatal: Ngate = %g is not positive.\n",
pParam->BSIM3v32ngate); pParam->BSIM3v32ngate);
printf("Fatal: Ngate = %g Ngate is not positive.\n", printf("Fatal: Ngate = %g Ngate is not positive.\n",
pParam->BSIM3v32ngate); pParam->BSIM3v32ngate);
Fatal_Flag = 1; Fatal_Flag = 1;
} }
if (pParam->BSIM3v32ngate > 1.e25) if (pParam->BSIM3v32ngate > 1.e25)
{ fprintf(fplog, "Fatal: Ngate = %g is too high.\n", { fprintf(fplog, "Fatal: Ngate = %g is too high.\n",
pParam->BSIM3v32ngate); pParam->BSIM3v32ngate);
printf("Fatal: Ngate = %g Ngate is too high\n", printf("Fatal: Ngate = %g Ngate is too high\n",
pParam->BSIM3v32ngate); pParam->BSIM3v32ngate);
Fatal_Flag = 1; Fatal_Flag = 1;
} }
if (pParam->BSIM3v32xj <= 0.0) if (pParam->BSIM3v32xj <= 0.0)
{ fprintf(fplog, "Fatal: Xj = %g is not positive.\n", { fprintf(fplog, "Fatal: Xj = %g is not positive.\n",
pParam->BSIM3v32xj); pParam->BSIM3v32xj);
printf("Fatal: Xj = %g is not positive.\n", pParam->BSIM3v32xj); printf("Fatal: Xj = %g is not positive.\n", pParam->BSIM3v32xj);
Fatal_Flag = 1; Fatal_Flag = 1;
} }
if (pParam->BSIM3v32dvt1 < 0.0) if (pParam->BSIM3v32dvt1 < 0.0)
{ fprintf(fplog, "Fatal: Dvt1 = %g is negative.\n", { fprintf(fplog, "Fatal: Dvt1 = %g is negative.\n",
pParam->BSIM3v32dvt1); pParam->BSIM3v32dvt1);
printf("Fatal: Dvt1 = %g is negative.\n", pParam->BSIM3v32dvt1); printf("Fatal: Dvt1 = %g is negative.\n", pParam->BSIM3v32dvt1);
Fatal_Flag = 1; Fatal_Flag = 1;
} }
if (pParam->BSIM3v32dvt1w < 0.0) if (pParam->BSIM3v32dvt1w < 0.0)
{ fprintf(fplog, "Fatal: Dvt1w = %g is negative.\n", { fprintf(fplog, "Fatal: Dvt1w = %g is negative.\n",
pParam->BSIM3v32dvt1w); pParam->BSIM3v32dvt1w);
printf("Fatal: Dvt1w = %g is negative.\n", pParam->BSIM3v32dvt1w); printf("Fatal: Dvt1w = %g is negative.\n", pParam->BSIM3v32dvt1w);
Fatal_Flag = 1; Fatal_Flag = 1;
} }
if (pParam->BSIM3v32w0 == -pParam->BSIM3v32weff) if (pParam->BSIM3v32w0 == -pParam->BSIM3v32weff)
{ fprintf(fplog, "Fatal: (W0 + Weff) = 0 causing divided-by-zero.\n"); { fprintf(fplog, "Fatal: (W0 + Weff) = 0 causing divided-by-zero.\n");
printf("Fatal: (W0 + Weff) = 0 causing divided-by-zero.\n"); printf("Fatal: (W0 + Weff) = 0 causing divided-by-zero.\n");
Fatal_Flag = 1; Fatal_Flag = 1;
} }
if (pParam->BSIM3v32dsub < 0.0) if (pParam->BSIM3v32dsub < 0.0)
{ fprintf(fplog, "Fatal: Dsub = %g is negative.\n", pParam->BSIM3v32dsub); { fprintf(fplog, "Fatal: Dsub = %g is negative.\n", pParam->BSIM3v32dsub);
printf("Fatal: Dsub = %g is negative.\n", pParam->BSIM3v32dsub); printf("Fatal: Dsub = %g is negative.\n", pParam->BSIM3v32dsub);
Fatal_Flag = 1; Fatal_Flag = 1;
} }
if (pParam->BSIM3v32b1 == -pParam->BSIM3v32weff) if (pParam->BSIM3v32b1 == -pParam->BSIM3v32weff)
{ fprintf(fplog, "Fatal: (B1 + Weff) = 0 causing divided-by-zero.\n"); { fprintf(fplog, "Fatal: (B1 + Weff) = 0 causing divided-by-zero.\n");
printf("Fatal: (B1 + Weff) = 0 causing divided-by-zero.\n"); printf("Fatal: (B1 + Weff) = 0 causing divided-by-zero.\n");
Fatal_Flag = 1; Fatal_Flag = 1;
} }
if (pParam->BSIM3v32u0temp <= 0.0) if (pParam->BSIM3v32u0temp <= 0.0)
{ fprintf(fplog, "Fatal: u0 at current temperature = %g is not positive.\n", pParam->BSIM3v32u0temp); { fprintf(fplog, "Fatal: u0 at current temperature = %g is not positive.\n", pParam->BSIM3v32u0temp);
printf("Fatal: u0 at current temperature = %g is not positive.\n", printf("Fatal: u0 at current temperature = %g is not positive.\n",
pParam->BSIM3v32u0temp); pParam->BSIM3v32u0temp);
Fatal_Flag = 1; Fatal_Flag = 1;
} }
/* Check delta parameter */ /* Check delta parameter */
if (pParam->BSIM3v32delta < 0.0) if (pParam->BSIM3v32delta < 0.0)
{ fprintf(fplog, "Fatal: Delta = %g is less than zero.\n", { fprintf(fplog, "Fatal: Delta = %g is less than zero.\n",
pParam->BSIM3v32delta); pParam->BSIM3v32delta);
printf("Fatal: Delta = %g is less than zero.\n", pParam->BSIM3v32delta); printf("Fatal: Delta = %g is less than zero.\n", pParam->BSIM3v32delta);
Fatal_Flag = 1; Fatal_Flag = 1;
} }
if (pParam->BSIM3v32vsattemp <= 0.0) if (pParam->BSIM3v32vsattemp <= 0.0)
{ fprintf(fplog, "Fatal: Vsat at current temperature = %g is not positive.\n", pParam->BSIM3v32vsattemp); { fprintf(fplog, "Fatal: Vsat at current temperature = %g is not positive.\n", pParam->BSIM3v32vsattemp);
printf("Fatal: Vsat at current temperature = %g is not positive.\n", printf("Fatal: Vsat at current temperature = %g is not positive.\n",
pParam->BSIM3v32vsattemp); pParam->BSIM3v32vsattemp);
Fatal_Flag = 1; Fatal_Flag = 1;
} }
/* Check Rout parameters */ /* Check Rout parameters */
if (pParam->BSIM3v32pclm <= 0.0) if (pParam->BSIM3v32pclm <= 0.0)
{ fprintf(fplog, "Fatal: Pclm = %g is not positive.\n", pParam->BSIM3v32pclm); { fprintf(fplog, "Fatal: Pclm = %g is not positive.\n", pParam->BSIM3v32pclm);
printf("Fatal: Pclm = %g is not positive.\n", pParam->BSIM3v32pclm); printf("Fatal: Pclm = %g is not positive.\n", pParam->BSIM3v32pclm);
Fatal_Flag = 1; Fatal_Flag = 1;
} }
if (pParam->BSIM3v32drout < 0.0) if (pParam->BSIM3v32drout < 0.0)
{ fprintf(fplog, "Fatal: Drout = %g is negative.\n", pParam->BSIM3v32drout); { fprintf(fplog, "Fatal: Drout = %g is negative.\n", pParam->BSIM3v32drout);
printf("Fatal: Drout = %g is negative.\n", pParam->BSIM3v32drout); printf("Fatal: Drout = %g is negative.\n", pParam->BSIM3v32drout);
Fatal_Flag = 1; Fatal_Flag = 1;
} }
if (pParam->BSIM3v32pscbe2 <= 0.0) if (pParam->BSIM3v32pscbe2 <= 0.0)
{ fprintf(fplog, "Warning: Pscbe2 = %g is not positive.\n", { fprintf(fplog, "Warning: Pscbe2 = %g is not positive.\n",
pParam->BSIM3v32pscbe2); pParam->BSIM3v32pscbe2);
printf("Warning: Pscbe2 = %g is not positive.\n", pParam->BSIM3v32pscbe2); printf("Warning: Pscbe2 = %g is not positive.\n", pParam->BSIM3v32pscbe2);
} }
/* acm model */ /* acm model */
if (model->BSIM3v32acmMod == 0) { if (model->BSIM3v32acmMod == 0) {
if (model->BSIM3v32unitLengthSidewallJctCap > 0.0 || if (model->BSIM3v32unitLengthSidewallJctCap > 0.0 ||
model->BSIM3v32unitLengthGateSidewallJctCap > 0.0) model->BSIM3v32unitLengthGateSidewallJctCap > 0.0)
{ {
if (here->BSIM3v32drainPerimeter < pParam->BSIM3v32weff) if (here->BSIM3v32drainPerimeter < pParam->BSIM3v32weff)
{ fprintf(fplog, "Warning: Pd = %g is less than W.\n", { fprintf(fplog, "Warning: Pd = %g is less than W.\n",
here->BSIM3v32drainPerimeter); here->BSIM3v32drainPerimeter);
printf("Warning: Pd = %g is less than W.\n", printf("Warning: Pd = %g is less than W.\n",
here->BSIM3v32drainPerimeter); here->BSIM3v32drainPerimeter);
} }
if (here->BSIM3v32sourcePerimeter < pParam->BSIM3v32weff) if (here->BSIM3v32sourcePerimeter < pParam->BSIM3v32weff)
{ fprintf(fplog, "Warning: Ps = %g is less than W.\n", { fprintf(fplog, "Warning: Ps = %g is less than W.\n",
here->BSIM3v32sourcePerimeter); here->BSIM3v32sourcePerimeter);
printf("Warning: Ps = %g is less than W.\n", printf("Warning: Ps = %g is less than W.\n",
here->BSIM3v32sourcePerimeter); here->BSIM3v32sourcePerimeter);
} }
} }
} }
if (pParam->BSIM3v32noff < 0.1) if (pParam->BSIM3v32noff < 0.1)
{ fprintf(fplog, "Warning: Noff = %g is too small.\n", { fprintf(fplog, "Warning: Noff = %g is too small.\n",
pParam->BSIM3v32noff); pParam->BSIM3v32noff);
printf("Warning: Noff = %g is too small.\n", pParam->BSIM3v32noff); printf("Warning: Noff = %g is too small.\n", pParam->BSIM3v32noff);
} }
if (pParam->BSIM3v32noff > 4.0) if (pParam->BSIM3v32noff > 4.0)
{ fprintf(fplog, "Warning: Noff = %g is too large.\n", { fprintf(fplog, "Warning: Noff = %g is too large.\n",
pParam->BSIM3v32noff); pParam->BSIM3v32noff);
printf("Warning: Noff = %g is too large.\n", pParam->BSIM3v32noff); printf("Warning: Noff = %g is too large.\n", pParam->BSIM3v32noff);
} }
if (pParam->BSIM3v32voffcv < -0.5) if (pParam->BSIM3v32voffcv < -0.5)
{ fprintf(fplog, "Warning: Voffcv = %g is too small.\n", { fprintf(fplog, "Warning: Voffcv = %g is too small.\n",
pParam->BSIM3v32voffcv); pParam->BSIM3v32voffcv);
printf("Warning: Voffcv = %g is too small.\n", pParam->BSIM3v32voffcv); printf("Warning: Voffcv = %g is too small.\n", pParam->BSIM3v32voffcv);
} }
if (pParam->BSIM3v32voffcv > 0.5) if (pParam->BSIM3v32voffcv > 0.5)
{ fprintf(fplog, "Warning: Voffcv = %g is too large.\n", { fprintf(fplog, "Warning: Voffcv = %g is too large.\n",
pParam->BSIM3v32voffcv); pParam->BSIM3v32voffcv);
printf("Warning: Voffcv = %g is too large.\n", pParam->BSIM3v32voffcv); printf("Warning: Voffcv = %g is too large.\n", pParam->BSIM3v32voffcv);
} }
if (model->BSIM3v32ijth < 0.0) if (model->BSIM3v32ijth < 0.0)
{ fprintf(fplog, "Fatal: Ijth = %g cannot be negative.\n", { fprintf(fplog, "Fatal: Ijth = %g cannot be negative.\n",
model->BSIM3v32ijth); model->BSIM3v32ijth);
printf("Fatal: Ijth = %g cannot be negative.\n", model->BSIM3v32ijth); printf("Fatal: Ijth = %g cannot be negative.\n", model->BSIM3v32ijth);
Fatal_Flag = 1; Fatal_Flag = 1;
} }
/* Check capacitance parameters */ /* Check capacitance parameters */
if (pParam->BSIM3v32clc < 0.0) if (pParam->BSIM3v32clc < 0.0)
{ fprintf(fplog, "Fatal: Clc = %g is negative.\n", pParam->BSIM3v32clc); { fprintf(fplog, "Fatal: Clc = %g is negative.\n", pParam->BSIM3v32clc);
printf("Fatal: Clc = %g is negative.\n", pParam->BSIM3v32clc); printf("Fatal: Clc = %g is negative.\n", pParam->BSIM3v32clc);
Fatal_Flag = 1; Fatal_Flag = 1;
} }
if (pParam->BSIM3v32moin < 5.0) if (pParam->BSIM3v32moin < 5.0)
{ fprintf(fplog, "Warning: Moin = %g is too small.\n", { fprintf(fplog, "Warning: Moin = %g is too small.\n",
pParam->BSIM3v32moin); pParam->BSIM3v32moin);
printf("Warning: Moin = %g is too small.\n", pParam->BSIM3v32moin); printf("Warning: Moin = %g is too small.\n", pParam->BSIM3v32moin);
} }
if (pParam->BSIM3v32moin > 25.0) if (pParam->BSIM3v32moin > 25.0)
{ fprintf(fplog, "Warning: Moin = %g is too large.\n", { fprintf(fplog, "Warning: Moin = %g is too large.\n",
pParam->BSIM3v32moin); pParam->BSIM3v32moin);
printf("Warning: Moin = %g is too large.\n", pParam->BSIM3v32moin); printf("Warning: Moin = %g is too large.\n", pParam->BSIM3v32moin);
} }
if(model->BSIM3v32capMod ==3) { if(model->BSIM3v32capMod ==3) {
if (pParam->BSIM3v32acde < 0.4) if (pParam->BSIM3v32acde < 0.4)
{ fprintf(fplog, "Warning: Acde = %g is too small.\n", { fprintf(fplog, "Warning: Acde = %g is too small.\n",
pParam->BSIM3v32acde); pParam->BSIM3v32acde);
printf("Warning: Acde = %g is too small.\n", pParam->BSIM3v32acde); printf("Warning: Acde = %g is too small.\n", pParam->BSIM3v32acde);
} }
if (pParam->BSIM3v32acde > 1.6) if (pParam->BSIM3v32acde > 1.6)
{ fprintf(fplog, "Warning: Acde = %g is too large.\n", { fprintf(fplog, "Warning: Acde = %g is too large.\n",
pParam->BSIM3v32acde); pParam->BSIM3v32acde);
printf("Warning: Acde = %g is too large.\n", pParam->BSIM3v32acde); printf("Warning: Acde = %g is too large.\n", pParam->BSIM3v32acde);
} }
} }
if (model->BSIM3v32paramChk ==1) if (model->BSIM3v32paramChk ==1)
{ {
/* Check L and W parameters */ /* Check L and W parameters */
if (pParam->BSIM3v32leff <= 5.0e-8) if (pParam->BSIM3v32leff <= 5.0e-8)
{ fprintf(fplog, "Warning: Leff = %g may be too small.\n", { fprintf(fplog, "Warning: Leff = %g may be too small.\n",
pParam->BSIM3v32leff); pParam->BSIM3v32leff);
printf("Warning: Leff = %g may be too small.\n", printf("Warning: Leff = %g may be too small.\n",
pParam->BSIM3v32leff); pParam->BSIM3v32leff);
} }
if (pParam->BSIM3v32leffCV <= 5.0e-8) if (pParam->BSIM3v32leffCV <= 5.0e-8)
{ fprintf(fplog, "Warning: Leff for CV = %g may be too small.\n", { fprintf(fplog, "Warning: Leff for CV = %g may be too small.\n",
pParam->BSIM3v32leffCV); pParam->BSIM3v32leffCV);
printf("Warning: Leff for CV = %g may be too small.\n", printf("Warning: Leff for CV = %g may be too small.\n",
pParam->BSIM3v32leffCV); pParam->BSIM3v32leffCV);
} }
if (pParam->BSIM3v32weff <= 1.0e-7) if (pParam->BSIM3v32weff <= 1.0e-7)
{ fprintf(fplog, "Warning: Weff = %g may be too small.\n", { fprintf(fplog, "Warning: Weff = %g may be too small.\n",
pParam->BSIM3v32weff); pParam->BSIM3v32weff);
printf("Warning: Weff = %g may be too small.\n", printf("Warning: Weff = %g may be too small.\n",
pParam->BSIM3v32weff); pParam->BSIM3v32weff);
} }
if (pParam->BSIM3v32weffCV <= 1.0e-7) if (pParam->BSIM3v32weffCV <= 1.0e-7)
{ fprintf(fplog, "Warning: Weff for CV = %g may be too small.\n", { fprintf(fplog, "Warning: Weff for CV = %g may be too small.\n",
pParam->BSIM3v32weffCV); pParam->BSIM3v32weffCV);
printf("Warning: Weff for CV = %g may be too small.\n", printf("Warning: Weff for CV = %g may be too small.\n",
pParam->BSIM3v32weffCV); pParam->BSIM3v32weffCV);
} }
/* Check threshold voltage parameters */ /* Check threshold voltage parameters */
if (pParam->BSIM3v32nlx < 0.0) if (pParam->BSIM3v32nlx < 0.0)
{ fprintf(fplog, "Warning: Nlx = %g is negative.\n", pParam->BSIM3v32nlx); { fprintf(fplog, "Warning: Nlx = %g is negative.\n", pParam->BSIM3v32nlx);
printf("Warning: Nlx = %g is negative.\n", pParam->BSIM3v32nlx); printf("Warning: Nlx = %g is negative.\n", pParam->BSIM3v32nlx);
} }
if (model->BSIM3v32tox < 1.0e-9) if (model->BSIM3v32tox < 1.0e-9)
{ fprintf(fplog, "Warning: Tox = %g is less than 10A.\n", { fprintf(fplog, "Warning: Tox = %g is less than 10A.\n",
model->BSIM3v32tox); model->BSIM3v32tox);
printf("Warning: Tox = %g is less than 10A.\n", model->BSIM3v32tox); printf("Warning: Tox = %g is less than 10A.\n", model->BSIM3v32tox);
} }
if (pParam->BSIM3v32npeak <= 1.0e15) if (pParam->BSIM3v32npeak <= 1.0e15)
{ fprintf(fplog, "Warning: Nch = %g may be too small.\n", { fprintf(fplog, "Warning: Nch = %g may be too small.\n",
pParam->BSIM3v32npeak); pParam->BSIM3v32npeak);
printf("Warning: Nch = %g may be too small.\n", printf("Warning: Nch = %g may be too small.\n",
pParam->BSIM3v32npeak); pParam->BSIM3v32npeak);
} }
else if (pParam->BSIM3v32npeak >= 1.0e21) else if (pParam->BSIM3v32npeak >= 1.0e21)
{ fprintf(fplog, "Warning: Nch = %g may be too large.\n", { fprintf(fplog, "Warning: Nch = %g may be too large.\n",
pParam->BSIM3v32npeak); pParam->BSIM3v32npeak);
printf("Warning: Nch = %g may be too large.\n", printf("Warning: Nch = %g may be too large.\n",
pParam->BSIM3v32npeak); pParam->BSIM3v32npeak);
} }
if (pParam->BSIM3v32nsub <= 1.0e14) if (pParam->BSIM3v32nsub <= 1.0e14)
{ fprintf(fplog, "Warning: Nsub = %g may be too small.\n", { fprintf(fplog, "Warning: Nsub = %g may be too small.\n",
pParam->BSIM3v32nsub); pParam->BSIM3v32nsub);
printf("Warning: Nsub = %g may be too small.\n", printf("Warning: Nsub = %g may be too small.\n",
pParam->BSIM3v32nsub); pParam->BSIM3v32nsub);
} }
else if (pParam->BSIM3v32nsub >= 1.0e21) else if (pParam->BSIM3v32nsub >= 1.0e21)
{ fprintf(fplog, "Warning: Nsub = %g may be too large.\n", { fprintf(fplog, "Warning: Nsub = %g may be too large.\n",
pParam->BSIM3v32nsub); pParam->BSIM3v32nsub);
printf("Warning: Nsub = %g may be too large.\n", printf("Warning: Nsub = %g may be too large.\n",
pParam->BSIM3v32nsub); pParam->BSIM3v32nsub);
} }
if ((pParam->BSIM3v32ngate > 0.0) && if ((pParam->BSIM3v32ngate > 0.0) &&
(pParam->BSIM3v32ngate <= 1.e18)) (pParam->BSIM3v32ngate <= 1.e18))
{ fprintf(fplog, "Warning: Ngate = %g is less than 1.E18cm^-3.\n", { fprintf(fplog, "Warning: Ngate = %g is less than 1.E18cm^-3.\n",
pParam->BSIM3v32ngate); pParam->BSIM3v32ngate);
printf("Warning: Ngate = %g is less than 1.E18cm^-3.\n", printf("Warning: Ngate = %g is less than 1.E18cm^-3.\n",
pParam->BSIM3v32ngate); pParam->BSIM3v32ngate);
} }
if (pParam->BSIM3v32dvt0 < 0.0) if (pParam->BSIM3v32dvt0 < 0.0)
{ fprintf(fplog, "Warning: Dvt0 = %g is negative.\n", { fprintf(fplog, "Warning: Dvt0 = %g is negative.\n",
pParam->BSIM3v32dvt0); pParam->BSIM3v32dvt0);
printf("Warning: Dvt0 = %g is negative.\n", pParam->BSIM3v32dvt0); printf("Warning: Dvt0 = %g is negative.\n", pParam->BSIM3v32dvt0);
} }
if (fabs(1.0e-6 / (pParam->BSIM3v32w0 + pParam->BSIM3v32weff)) > 10.0) if (fabs(1.0e-6 / (pParam->BSIM3v32w0 + pParam->BSIM3v32weff)) > 10.0)
{ fprintf(fplog, "Warning: (W0 + Weff) may be too small.\n"); { fprintf(fplog, "Warning: (W0 + Weff) may be too small.\n");
printf("Warning: (W0 + Weff) may be too small.\n"); printf("Warning: (W0 + Weff) may be too small.\n");
} }
/* Check subthreshold parameters */ /* Check subthreshold parameters */
if (pParam->BSIM3v32nfactor < 0.0) if (pParam->BSIM3v32nfactor < 0.0)
{ fprintf(fplog, "Warning: Nfactor = %g is negative.\n", { fprintf(fplog, "Warning: Nfactor = %g is negative.\n",
pParam->BSIM3v32nfactor); pParam->BSIM3v32nfactor);
printf("Warning: Nfactor = %g is negative.\n", pParam->BSIM3v32nfactor); printf("Warning: Nfactor = %g is negative.\n", pParam->BSIM3v32nfactor);
} }
if (pParam->BSIM3v32cdsc < 0.0) if (pParam->BSIM3v32cdsc < 0.0)
{ fprintf(fplog, "Warning: Cdsc = %g is negative.\n", { fprintf(fplog, "Warning: Cdsc = %g is negative.\n",
pParam->BSIM3v32cdsc); pParam->BSIM3v32cdsc);
printf("Warning: Cdsc = %g is negative.\n", pParam->BSIM3v32cdsc); printf("Warning: Cdsc = %g is negative.\n", pParam->BSIM3v32cdsc);
} }
if (pParam->BSIM3v32cdscd < 0.0) if (pParam->BSIM3v32cdscd < 0.0)
{ fprintf(fplog, "Warning: Cdscd = %g is negative.\n", { fprintf(fplog, "Warning: Cdscd = %g is negative.\n",
pParam->BSIM3v32cdscd); pParam->BSIM3v32cdscd);
printf("Warning: Cdscd = %g is negative.\n", pParam->BSIM3v32cdscd); printf("Warning: Cdscd = %g is negative.\n", pParam->BSIM3v32cdscd);
} }
/* Check DIBL parameters */ /* Check DIBL parameters */
if (pParam->BSIM3v32eta0 < 0.0) if (pParam->BSIM3v32eta0 < 0.0)
{ fprintf(fplog, "Warning: Eta0 = %g is negative.\n", { fprintf(fplog, "Warning: Eta0 = %g is negative.\n",
pParam->BSIM3v32eta0); pParam->BSIM3v32eta0);
printf("Warning: Eta0 = %g is negative.\n", pParam->BSIM3v32eta0); printf("Warning: Eta0 = %g is negative.\n", pParam->BSIM3v32eta0);
} }
/* Check Abulk parameters */ /* Check Abulk parameters */
if (fabs(1.0e-6 / (pParam->BSIM3v32b1 + pParam->BSIM3v32weff)) > 10.0) if (fabs(1.0e-6 / (pParam->BSIM3v32b1 + pParam->BSIM3v32weff)) > 10.0)
{ fprintf(fplog, "Warning: (B1 + Weff) may be too small.\n"); { fprintf(fplog, "Warning: (B1 + Weff) may be too small.\n");
printf("Warning: (B1 + Weff) may be too small.\n"); printf("Warning: (B1 + Weff) may be too small.\n");
} }
/* Check Saturation parameters */ /* Check Saturation parameters */
if (pParam->BSIM3v32a2 < 0.01) if (pParam->BSIM3v32a2 < 0.01)
{ fprintf(fplog, "Warning: A2 = %g is too small. Set to 0.01.\n", pParam->BSIM3v32a2); { fprintf(fplog, "Warning: A2 = %g is too small. Set to 0.01.\n", pParam->BSIM3v32a2);
printf("Warning: A2 = %g is too small. Set to 0.01.\n", printf("Warning: A2 = %g is too small. Set to 0.01.\n",
pParam->BSIM3v32a2); pParam->BSIM3v32a2);
pParam->BSIM3v32a2 = 0.01; pParam->BSIM3v32a2 = 0.01;
} }
else if (pParam->BSIM3v32a2 > 1.0) else if (pParam->BSIM3v32a2 > 1.0)
{ fprintf(fplog, "Warning: A2 = %g is larger than 1. A2 is set to 1 and A1 is set to 0.\n", { fprintf(fplog, "Warning: A2 = %g is larger than 1. A2 is set to 1 and A1 is set to 0.\n",
pParam->BSIM3v32a2); pParam->BSIM3v32a2);
printf("Warning: A2 = %g is larger than 1. A2 is set to 1 and A1 is set to 0.\n", printf("Warning: A2 = %g is larger than 1. A2 is set to 1 and A1 is set to 0.\n",
pParam->BSIM3v32a2); pParam->BSIM3v32a2);
pParam->BSIM3v32a2 = 1.0; pParam->BSIM3v32a2 = 1.0;
pParam->BSIM3v32a1 = 0.0; pParam->BSIM3v32a1 = 0.0;
} }
if (pParam->BSIM3v32rdsw < 0.0) if (pParam->BSIM3v32rdsw < 0.0)
{ fprintf(fplog, "Warning: Rdsw = %g is negative. Set to zero.\n", { fprintf(fplog, "Warning: Rdsw = %g is negative. Set to zero.\n",
pParam->BSIM3v32rdsw); pParam->BSIM3v32rdsw);
printf("Warning: Rdsw = %g is negative. Set to zero.\n", printf("Warning: Rdsw = %g is negative. Set to zero.\n",
pParam->BSIM3v32rdsw); pParam->BSIM3v32rdsw);
pParam->BSIM3v32rdsw = 0.0; pParam->BSIM3v32rdsw = 0.0;
pParam->BSIM3v32rds0 = 0.0; pParam->BSIM3v32rds0 = 0.0;
} }
else if ((pParam->BSIM3v32rds0 > 0.0) && (pParam->BSIM3v32rds0 < 0.001)) else if ((pParam->BSIM3v32rds0 > 0.0) && (pParam->BSIM3v32rds0 < 0.001))
{ fprintf(fplog, "Warning: Rds at current temperature = %g is less than 0.001 ohm. Set to zero.\n", { fprintf(fplog, "Warning: Rds at current temperature = %g is less than 0.001 ohm. Set to zero.\n",
pParam->BSIM3v32rds0); pParam->BSIM3v32rds0);
printf("Warning: Rds at current temperature = %g is less than 0.001 ohm. Set to zero.\n", printf("Warning: Rds at current temperature = %g is less than 0.001 ohm. Set to zero.\n",
pParam->BSIM3v32rds0); pParam->BSIM3v32rds0);
pParam->BSIM3v32rds0 = 0.0; pParam->BSIM3v32rds0 = 0.0;
} }
if (pParam->BSIM3v32vsattemp < 1.0e3) if (pParam->BSIM3v32vsattemp < 1.0e3)
{ fprintf(fplog, "Warning: Vsat at current temperature = %g may be too small.\n", pParam->BSIM3v32vsattemp); { fprintf(fplog, "Warning: Vsat at current temperature = %g may be too small.\n", pParam->BSIM3v32vsattemp);
printf("Warning: Vsat at current temperature = %g may be too small.\n", pParam->BSIM3v32vsattemp); printf("Warning: Vsat at current temperature = %g may be too small.\n", pParam->BSIM3v32vsattemp);
} }
if (pParam->BSIM3v32pdibl1 < 0.0) if (pParam->BSIM3v32pdibl1 < 0.0)
{ fprintf(fplog, "Warning: Pdibl1 = %g is negative.\n", { fprintf(fplog, "Warning: Pdibl1 = %g is negative.\n",
pParam->BSIM3v32pdibl1); pParam->BSIM3v32pdibl1);
printf("Warning: Pdibl1 = %g is negative.\n", pParam->BSIM3v32pdibl1); printf("Warning: Pdibl1 = %g is negative.\n", pParam->BSIM3v32pdibl1);
} }
if (pParam->BSIM3v32pdibl2 < 0.0) if (pParam->BSIM3v32pdibl2 < 0.0)
{ fprintf(fplog, "Warning: Pdibl2 = %g is negative.\n", { fprintf(fplog, "Warning: Pdibl2 = %g is negative.\n",
pParam->BSIM3v32pdibl2); pParam->BSIM3v32pdibl2);
printf("Warning: Pdibl2 = %g is negative.\n", pParam->BSIM3v32pdibl2); printf("Warning: Pdibl2 = %g is negative.\n", pParam->BSIM3v32pdibl2);
} }
/* Check overlap capacitance parameters */ /* Check overlap capacitance parameters */
if (model->BSIM3v32cgdo < 0.0) if (model->BSIM3v32cgdo < 0.0)
{ fprintf(fplog, "Warning: cgdo = %g is negative. Set to zero.\n", model->BSIM3v32cgdo); { fprintf(fplog, "Warning: cgdo = %g is negative. Set to zero.\n", model->BSIM3v32cgdo);
printf("Warning: cgdo = %g is negative. Set to zero.\n", model->BSIM3v32cgdo); printf("Warning: cgdo = %g is negative. Set to zero.\n", model->BSIM3v32cgdo);
model->BSIM3v32cgdo = 0.0; model->BSIM3v32cgdo = 0.0;
} }
if (model->BSIM3v32cgso < 0.0) if (model->BSIM3v32cgso < 0.0)
{ fprintf(fplog, "Warning: cgso = %g is negative. Set to zero.\n", model->BSIM3v32cgso); { fprintf(fplog, "Warning: cgso = %g is negative. Set to zero.\n", model->BSIM3v32cgso);
printf("Warning: cgso = %g is negative. Set to zero.\n", model->BSIM3v32cgso); printf("Warning: cgso = %g is negative. Set to zero.\n", model->BSIM3v32cgso);
model->BSIM3v32cgso = 0.0; model->BSIM3v32cgso = 0.0;
} }
if (model->BSIM3v32cgbo < 0.0) if (model->BSIM3v32cgbo < 0.0)
{ fprintf(fplog, "Warning: cgbo = %g is negative. Set to zero.\n", model->BSIM3v32cgbo); { fprintf(fplog, "Warning: cgbo = %g is negative. Set to zero.\n", model->BSIM3v32cgbo);
printf("Warning: cgbo = %g is negative. Set to zero.\n", model->BSIM3v32cgbo); printf("Warning: cgbo = %g is negative. Set to zero.\n", model->BSIM3v32cgbo);
model->BSIM3v32cgbo = 0.0; model->BSIM3v32cgbo = 0.0;
} }
}/* loop for the parameter check for warning messages */ }/* loop for the parameter check for warning messages */
fclose(fplog); fclose(fplog);
} }
else else
{ fprintf(stderr, "Warning: Can't open log file. Parameter checking skipped.\n"); { fprintf(stderr, "Warning: Can't open log file. Parameter checking skipped.\n");

80
src/spicelib/devices/bsim3v32/b3v32cvtest.c
View File

@ -31,21 +31,21 @@ double cbd, cbhat, cbs, cd, cdhat, tol, vgd, vgdo, vgs;
for (; model != NULL; model = model->BSIM3v32nextModel) for (; model != NULL; model = model->BSIM3v32nextModel)
{ /* loop through all the instances of the model */ { /* loop through all the instances of the model */
for (here = model->BSIM3v32instances; here != NULL ; for (here = model->BSIM3v32instances; here != NULL ;
here=here->BSIM3v32nextInstance) here=here->BSIM3v32nextInstance)
{ {
vbs = model->BSIM3v32type vbs = model->BSIM3v32type
* (*(ckt->CKTrhsOld+here->BSIM3v32bNode) * (*(ckt->CKTrhsOld+here->BSIM3v32bNode)
- *(ckt->CKTrhsOld+here->BSIM3v32sNodePrime)); - *(ckt->CKTrhsOld+here->BSIM3v32sNodePrime));
vgs = model->BSIM3v32type vgs = model->BSIM3v32type
* (*(ckt->CKTrhsOld+here->BSIM3v32gNode) * (*(ckt->CKTrhsOld+here->BSIM3v32gNode)
- *(ckt->CKTrhsOld+here->BSIM3v32sNodePrime)); - *(ckt->CKTrhsOld+here->BSIM3v32sNodePrime));
vds = model->BSIM3v32type vds = model->BSIM3v32type
* (*(ckt->CKTrhsOld+here->BSIM3v32dNodePrime) * (*(ckt->CKTrhsOld+here->BSIM3v32dNodePrime)
- *(ckt->CKTrhsOld+here->BSIM3v32sNodePrime)); - *(ckt->CKTrhsOld+here->BSIM3v32sNodePrime));
vbd = vbs - vds; vbd = vbs - vds;
vgd = vgs - vds; vgd = vgs - vds;
vgdo = *(ckt->CKTstate0 + here->BSIM3v32vgs) vgdo = *(ckt->CKTstate0 + here->BSIM3v32vgs)
- *(ckt->CKTstate0 + here->BSIM3v32vds); - *(ckt->CKTstate0 + here->BSIM3v32vds);
delvbs = vbs - *(ckt->CKTstate0 + here->BSIM3v32vbs); delvbs = vbs - *(ckt->CKTstate0 + here->BSIM3v32vbs);
delvbd = vbd - *(ckt->CKTstate0 + here->BSIM3v32vbd); delvbd = vbd - *(ckt->CKTstate0 + here->BSIM3v32vbd);
delvgs = vgs - *(ckt->CKTstate0 + here->BSIM3v32vgs); delvgs = vgs - *(ckt->CKTstate0 + here->BSIM3v32vgs);
@ -54,47 +54,47 @@ double cbd, cbhat, cbs, cd, cdhat, tol, vgd, vgdo, vgs;
cd = here->BSIM3v32cd - here->BSIM3v32cbd; cd = here->BSIM3v32cd - here->BSIM3v32cbd;
if (here->BSIM3v32mode >= 0) if (here->BSIM3v32mode >= 0)
{ cd += here->BSIM3v32csub; { cd += here->BSIM3v32csub;
cdhat = cd - here->BSIM3v32gbd * delvbd cdhat = cd - here->BSIM3v32gbd * delvbd
+ (here->BSIM3v32gmbs + here->BSIM3v32gbbs) * delvbs + (here->BSIM3v32gmbs + here->BSIM3v32gbbs) * delvbs
+ (here->BSIM3v32gm + here->BSIM3v32gbgs) * delvgs + (here->BSIM3v32gm + here->BSIM3v32gbgs) * delvgs
+ (here->BSIM3v32gds + here->BSIM3v32gbds) * delvds; + (here->BSIM3v32gds + here->BSIM3v32gbds) * delvds;
} }
else else
{ cdhat = cd + (here->BSIM3v32gmbs - here->BSIM3v32gbd) * delvbd { cdhat = cd + (here->BSIM3v32gmbs - here->BSIM3v32gbd) * delvbd
+ here->BSIM3v32gm * delvgd - here->BSIM3v32gds * delvds; + here->BSIM3v32gm * delvgd - here->BSIM3v32gds * delvds;
} }
/* /*
* check convergence * check convergence
*/ */
if ((here->BSIM3v32off == 0) || (!(ckt->CKTmode & MODEINITFIX))) if ((here->BSIM3v32off == 0) || (!(ckt->CKTmode & MODEINITFIX)))
{ tol = ckt->CKTreltol * MAX(fabs(cdhat), fabs(cd)) { tol = ckt->CKTreltol * MAX(fabs(cdhat), fabs(cd))
+ ckt->CKTabstol; + ckt->CKTabstol;
if (fabs(cdhat - cd) >= tol) if (fabs(cdhat - cd) >= tol)
{ ckt->CKTnoncon++; { ckt->CKTnoncon++;
return(OK); return(OK);
} }
cbs = here->BSIM3v32cbs; cbs = here->BSIM3v32cbs;
cbd = here->BSIM3v32cbd; cbd = here->BSIM3v32cbd;
if (here->BSIM3v32mode >= 0) if (here->BSIM3v32mode >= 0)
{ cbhat = cbs + cbd - here->BSIM3v32csub { cbhat = cbs + cbd - here->BSIM3v32csub
+ here->BSIM3v32gbd * delvbd + here->BSIM3v32gbd * delvbd
+ (here->BSIM3v32gbs - here->BSIM3v32gbbs) * delvbs + (here->BSIM3v32gbs - here->BSIM3v32gbbs) * delvbs
- here->BSIM3v32gbgs * delvgs - here->BSIM3v32gbgs * delvgs
- here->BSIM3v32gbds * delvds; - here->BSIM3v32gbds * delvds;
} }
else else
{ cbhat = cbs + cbd - here->BSIM3v32csub { cbhat = cbs + cbd - here->BSIM3v32csub
+ here->BSIM3v32gbs * delvbs + here->BSIM3v32gbs * delvbs
+ (here->BSIM3v32gbd - here->BSIM3v32gbbs) * delvbd + (here->BSIM3v32gbd - here->BSIM3v32gbbs) * delvbd
- here->BSIM3v32gbgs * delvgd - here->BSIM3v32gbgs * delvgd
+ here->BSIM3v32gbds * delvds; + here->BSIM3v32gbds * delvds;
} }
tol = ckt->CKTreltol * MAX(fabs(cbhat), tol = ckt->CKTreltol * MAX(fabs(cbhat),
fabs(cbs + cbd - here->BSIM3v32csub)) + ckt->CKTabstol; fabs(cbs + cbd - here->BSIM3v32csub)) + ckt->CKTabstol;
if (fabs(cbhat - (cbs + cbd - here->BSIM3v32csub)) > tol) if (fabs(cbhat - (cbs + cbd - here->BSIM3v32csub)) > tol)
{ ckt->CKTnoncon++; { ckt->CKTnoncon++;
return(OK); return(OK);
} }
} }

8
src/spicelib/devices/bsim3v32/b3v32del.c
View File

@ -25,11 +25,11 @@ BSIM3v32model *model = (BSIM3v32model*)inModel;
BSIM3v32instance **prev = NULL; BSIM3v32instance **prev = NULL;
BSIM3v32instance *here; BSIM3v32instance *here;
for (; model ; model = model->BSIM3v32nextModel) for (; model ; model = model->BSIM3v32nextModel)
{ prev = &(model->BSIM3v32instances); { prev = &(model->BSIM3v32instances);
for (here = *prev; here ; here = *prev) for (here = *prev; here ; here = *prev)
{ if (here->BSIM3v32name == name || (fast && here==*fast)) { if (here->BSIM3v32name == name || (fast && here==*fast))
{ *prev= here->BSIM3v32nextInstance; { *prev= here->BSIM3v32nextInstance;
FREE(here); FREE(here);
return(OK); return(OK);
} }

2
src/spicelib/devices/bsim3v32/b3v32dest.c
View File

@ -23,7 +23,7 @@ BSIM3v32destroy (GENmodel **inModel)
BSIM3v32model *oldmod = NULL; BSIM3v32model *oldmod = NULL;
for (; mod ; mod = mod->BSIM3v32nextModel) { for (; mod ; mod = mod->BSIM3v32nextModel) {
/** added to get rid of link list pSizeDependParamKnot **/ /** added to get rid of link list pSizeDependParamKnot **/
struct bsim3v32SizeDependParam *pParam, *pParamOld=NULL; struct bsim3v32SizeDependParam *pParam, *pParamOld=NULL;
pParam = mod->pSizeDependParamKnot; pParam = mod->pSizeDependParamKnot;

22
src/spicelib/devices/bsim3v32/b3v32getic.c
View File

@ -21,20 +21,20 @@ BSIM3v32getic (GENmodel *inModel, CKTcircuit *ckt)
BSIM3v32model *model = (BSIM3v32model*)inModel; BSIM3v32model *model = (BSIM3v32model*)inModel;
BSIM3v32instance *here; BSIM3v32instance *here;
for (; model ; model = model->BSIM3v32nextModel) for (; model ; model = model->BSIM3v32nextModel)
{ for (here = model->BSIM3v32instances; here; here = here->BSIM3v32nextInstance) { for (here = model->BSIM3v32instances; here; here = here->BSIM3v32nextInstance)
{ {
if (!here->BSIM3v32icVBSGiven) if (!here->BSIM3v32icVBSGiven)
{ here->BSIM3v32icVBS = *(ckt->CKTrhs + here->BSIM3v32bNode) { here->BSIM3v32icVBS = *(ckt->CKTrhs + here->BSIM3v32bNode)
- *(ckt->CKTrhs + here->BSIM3v32sNode); - *(ckt->CKTrhs + here->BSIM3v32sNode);
} }
if (!here->BSIM3v32icVDSGiven) if (!here->BSIM3v32icVDSGiven)
{ here->BSIM3v32icVDS = *(ckt->CKTrhs + here->BSIM3v32dNode) { here->BSIM3v32icVDS = *(ckt->CKTrhs + here->BSIM3v32dNode)
- *(ckt->CKTrhs + here->BSIM3v32sNode); - *(ckt->CKTrhs + here->BSIM3v32sNode);
} }
if (!here->BSIM3v32icVGSGiven) if (!here->BSIM3v32icVGSGiven)
{ here->BSIM3v32icVGS = *(ckt->CKTrhs + here->BSIM3v32gNode) { here->BSIM3v32icVGS = *(ckt->CKTrhs + here->BSIM3v32gNode)
- *(ckt->CKTrhs + here->BSIM3v32sNode); - *(ckt->CKTrhs + here->BSIM3v32sNode);
} }
} }
} }

3066
src/spicelib/devices/bsim3v32/b3v32ld.c
View File

File diff suppressed because it is too large Load Diff

456
src/spicelib/devices/bsim3v32/b3v32mask.c
View File

@ -24,24 +24,24 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value)
NG_IGNORE(ckt); NG_IGNORE(ckt);
switch(which) switch(which)
{ case BSIM3v32_MOD_MOBMOD: { case BSIM3v32_MOD_MOBMOD:
value->iValue = model->BSIM3v32mobMod; value->iValue = model->BSIM3v32mobMod;
return(OK); return(OK);
case BSIM3v32_MOD_PARAMCHK: case BSIM3v32_MOD_PARAMCHK:
value->iValue = model->BSIM3v32paramChk; value->iValue = model->BSIM3v32paramChk;
return(OK); return(OK);
case BSIM3v32_MOD_BINUNIT: case BSIM3v32_MOD_BINUNIT:
value->iValue = model->BSIM3v32binUnit; value->iValue = model->BSIM3v32binUnit;
return(OK); return(OK);
case BSIM3v32_MOD_CAPMOD: case BSIM3v32_MOD_CAPMOD:
value->iValue = model->BSIM3v32capMod; value->iValue = model->BSIM3v32capMod;
return(OK); return(OK);
case BSIM3v32_MOD_NOIMOD: case BSIM3v32_MOD_NOIMOD:
value->iValue = model->BSIM3v32noiMod; value->iValue = model->BSIM3v32noiMod;
return(OK); return(OK);
case BSIM3v32_MOD_ACMMOD: case BSIM3v32_MOD_ACMMOD:
value->iValue = model->BSIM3v32acmMod; value->iValue = model->BSIM3v32acmMod;
return(OK); return(OK);
case BSIM3v32_MOD_VERSION : case BSIM3v32_MOD_VERSION :
value->sValue = model->BSIM3v32version; value->sValue = model->BSIM3v32version;
@ -94,7 +94,7 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value)
return(OK); return(OK);
case BSIM3v32_MOD_KETA: case BSIM3v32_MOD_KETA:
value->rValue = model->BSIM3v32keta; value->rValue = model->BSIM3v32keta;
return(OK); return(OK);
case BSIM3v32_MOD_NSUB: case BSIM3v32_MOD_NSUB:
value->rValue = model->BSIM3v32nsub; value->rValue = model->BSIM3v32nsub;
return(OK); return(OK);
@ -146,50 +146,50 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value)
case BSIM3v32_MOD_NLX: case BSIM3v32_MOD_NLX:
value->rValue = model->BSIM3v32nlx; value->rValue = model->BSIM3v32nlx;
return(OK); return(OK);
case BSIM3v32_MOD_DVT0 : case BSIM3v32_MOD_DVT0 :
value->rValue = model->BSIM3v32dvt0; value->rValue = model->BSIM3v32dvt0;
return(OK); return(OK);
case BSIM3v32_MOD_DVT1 : case BSIM3v32_MOD_DVT1 :
value->rValue = model->BSIM3v32dvt1; value->rValue = model->BSIM3v32dvt1;
return(OK); return(OK);
case BSIM3v32_MOD_DVT2 : case BSIM3v32_MOD_DVT2 :
value->rValue = model->BSIM3v32dvt2; value->rValue = model->BSIM3v32dvt2;
return(OK); return(OK);
case BSIM3v32_MOD_DVT0W : case BSIM3v32_MOD_DVT0W :
value->rValue = model->BSIM3v32dvt0w; value->rValue = model->BSIM3v32dvt0w;
return(OK); return(OK);
case BSIM3v32_MOD_DVT1W : case BSIM3v32_MOD_DVT1W :
value->rValue = model->BSIM3v32dvt1w; value->rValue = model->BSIM3v32dvt1w;
return(OK); return(OK);
case BSIM3v32_MOD_DVT2W : case BSIM3v32_MOD_DVT2W :
value->rValue = model->BSIM3v32dvt2w; value->rValue = model->BSIM3v32dvt2w;
return(OK); return(OK);
case BSIM3v32_MOD_DROUT : case BSIM3v32_MOD_DROUT :
value->rValue = model->BSIM3v32drout; value->rValue = model->BSIM3v32drout;
return(OK); return(OK);
case BSIM3v32_MOD_DSUB : case BSIM3v32_MOD_DSUB :
value->rValue = model->BSIM3v32dsub; value->rValue = model->BSIM3v32dsub;
return(OK); return(OK);
case BSIM3v32_MOD_VTH0: case BSIM3v32_MOD_VTH0:
value->rValue = model->BSIM3v32vth0; value->rValue = model->BSIM3v32vth0;
return(OK); return(OK);
case BSIM3v32_MOD_UA: case BSIM3v32_MOD_UA:
value->rValue = model->BSIM3v32ua; value->rValue = model->BSIM3v32ua;
return(OK); return(OK);
case BSIM3v32_MOD_UA1: case BSIM3v32_MOD_UA1:
value->rValue = model->BSIM3v32ua1; value->rValue = model->BSIM3v32ua1;
return(OK); return(OK);
case BSIM3v32_MOD_UB: case BSIM3v32_MOD_UB:
value->rValue = model->BSIM3v32ub; value->rValue = model->BSIM3v32ub;
return(OK); return(OK);
case BSIM3v32_MOD_UB1: case BSIM3v32_MOD_UB1:
value->rValue = model->BSIM3v32ub1; value->rValue = model->BSIM3v32ub1;
return(OK); return(OK);
case BSIM3v32_MOD_UC: case BSIM3v32_MOD_UC:
value->rValue = model->BSIM3v32uc; value->rValue = model->BSIM3v32uc;
return(OK); return(OK);
case BSIM3v32_MOD_UC1: case BSIM3v32_MOD_UC1:
value->rValue = model->BSIM3v32uc1; value->rValue = model->BSIM3v32uc1;
return(OK); return(OK);
case BSIM3v32_MOD_U0: case BSIM3v32_MOD_U0:
value->rValue = model->BSIM3v32u0; value->rValue = model->BSIM3v32u0;
@ -204,44 +204,44 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value)
value->rValue = model->BSIM3v32delta; value->rValue = model->BSIM3v32delta;
return(OK); return(OK);
case BSIM3v32_MOD_RDSW: case BSIM3v32_MOD_RDSW:
value->rValue = model->BSIM3v32rdsw; value->rValue = model->BSIM3v32rdsw;
return(OK); return(OK);
case BSIM3v32_MOD_PRWG: case BSIM3v32_MOD_PRWG:
value->rValue = model->BSIM3v32prwg; value->rValue = model->BSIM3v32prwg;
return(OK); return(OK);
case BSIM3v32_MOD_PRWB: case BSIM3v32_MOD_PRWB:
value->rValue = model->BSIM3v32prwb; value->rValue = model->BSIM3v32prwb;
return(OK); return(OK);
case BSIM3v32_MOD_PRT: case BSIM3v32_MOD_PRT:
value->rValue = model->BSIM3v32prt; value->rValue = model->BSIM3v32prt;
return(OK); return(OK);
case BSIM3v32_MOD_ETA0: case BSIM3v32_MOD_ETA0:
value->rValue = model->BSIM3v32eta0; value->rValue = model->BSIM3v32eta0;
return(OK); return(OK);
case BSIM3v32_MOD_ETAB: case BSIM3v32_MOD_ETAB:
value->rValue = model->BSIM3v32etab; value->rValue = model->BSIM3v32etab;
return(OK); return(OK);
case BSIM3v32_MOD_PCLM: case BSIM3v32_MOD_PCLM:
value->rValue = model->BSIM3v32pclm; value->rValue = model->BSIM3v32pclm;
return(OK); return(OK);
case BSIM3v32_MOD_PDIBL1: case BSIM3v32_MOD_PDIBL1:
value->rValue = model->BSIM3v32pdibl1; value->rValue = model->BSIM3v32pdibl1;
return(OK); return(OK);
case BSIM3v32_MOD_PDIBL2: case BSIM3v32_MOD_PDIBL2:
value->rValue = model->BSIM3v32pdibl2; value->rValue = model->BSIM3v32pdibl2;
return(OK); return(OK);
case BSIM3v32_MOD_PDIBLB: case BSIM3v32_MOD_PDIBLB:
value->rValue = model->BSIM3v32pdiblb; value->rValue = model->BSIM3v32pdiblb;
return(OK); return(OK);
case BSIM3v32_MOD_PSCBE1: case BSIM3v32_MOD_PSCBE1:
value->rValue = model->BSIM3v32pscbe1; value->rValue = model->BSIM3v32pscbe1;
return(OK); return(OK);
case BSIM3v32_MOD_PSCBE2: case BSIM3v32_MOD_PSCBE2:
value->rValue = model->BSIM3v32pscbe2; value->rValue = model->BSIM3v32pscbe2;
return(OK); return(OK);
case BSIM3v32_MOD_PVAG: case BSIM3v32_MOD_PVAG:
value->rValue = model->BSIM3v32pvag; value->rValue = model->BSIM3v32pvag;
return(OK); return(OK);
case BSIM3v32_MOD_WR: case BSIM3v32_MOD_WR:
value->rValue = model->BSIM3v32wr; value->rValue = model->BSIM3v32wr;
return(OK); return(OK);
@ -301,7 +301,7 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value)
value->rValue = model->BSIM3v32dlc; value->rValue = model->BSIM3v32dlc;
return(OK); return(OK);
case BSIM3v32_MOD_VFBCV: case BSIM3v32_MOD_VFBCV:
value->rValue = model->BSIM3v32vfbcv; value->rValue = model->BSIM3v32vfbcv;
return(OK); return(OK);
case BSIM3v32_MOD_ACDE: case BSIM3v32_MOD_ACDE:
value->rValue = model->BSIM3v32acde; value->rValue = model->BSIM3v32acde;
@ -334,30 +334,30 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value)
value->rValue = model->BSIM3v32tpbswg; value->rValue = model->BSIM3v32tpbswg;
return(OK); return(OK);
/* acm model */ /* acm model */
case BSIM3v32_MOD_HDIF: case BSIM3v32_MOD_HDIF:
value->rValue = model->BSIM3v32hdif; value->rValue = model->BSIM3v32hdif;
return(OK); return(OK);
case BSIM3v32_MOD_LDIF: case BSIM3v32_MOD_LDIF:
value->rValue = model->BSIM3v32ldif; value->rValue = model->BSIM3v32ldif;
return(OK); return(OK);
case BSIM3v32_MOD_LD: case BSIM3v32_MOD_LD:
value->rValue = model->BSIM3v32ld; value->rValue = model->BSIM3v32ld;
return(OK); return(OK);
case BSIM3v32_MOD_RD: case BSIM3v32_MOD_RD:
value->rValue = model->BSIM3v32rd; value->rValue = model->BSIM3v32rd;
return(OK); return(OK);
case BSIM3v32_MOD_RS: case BSIM3v32_MOD_RS:
value->rValue = model->BSIM3v32rs; value->rValue = model->BSIM3v32rs;
return(OK); return(OK);
case BSIM3v32_MOD_RDC: case BSIM3v32_MOD_RDC:
value->rValue = model->BSIM3v32rdc; value->rValue = model->BSIM3v32rdc;
return(OK); return(OK);
case BSIM3v32_MOD_RSC: case BSIM3v32_MOD_RSC:
value->rValue = model->BSIM3v32rsc; value->rValue = model->BSIM3v32rsc;
return(OK); return(OK);
/* Length dependence */ /* Length dependence */
case BSIM3v32_MOD_LCDSC : case BSIM3v32_MOD_LCDSC :
value->rValue = model->BSIM3v32lcdsc; value->rValue = model->BSIM3v32lcdsc;
return(OK); return(OK);
@ -396,7 +396,7 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value)
return(OK); return(OK);
case BSIM3v32_MOD_LKETA: case BSIM3v32_MOD_LKETA:
value->rValue = model->BSIM3v32lketa; value->rValue = model->BSIM3v32lketa;
return(OK); return(OK);
case BSIM3v32_MOD_LNSUB: case BSIM3v32_MOD_LNSUB:
value->rValue = model->BSIM3v32lnsub; value->rValue = model->BSIM3v32lnsub;
return(OK); return(OK);
@ -448,50 +448,50 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value)
case BSIM3v32_MOD_LNLX: case BSIM3v32_MOD_LNLX:
value->rValue = model->BSIM3v32lnlx; value->rValue = model->BSIM3v32lnlx;
return(OK); return(OK);
case BSIM3v32_MOD_LDVT0: case BSIM3v32_MOD_LDVT0:
value->rValue = model->BSIM3v32ldvt0; value->rValue = model->BSIM3v32ldvt0;
return(OK); return(OK);
case BSIM3v32_MOD_LDVT1 : case BSIM3v32_MOD_LDVT1 :
value->rValue = model->BSIM3v32ldvt1; value->rValue = model->BSIM3v32ldvt1;
return(OK); return(OK);
case BSIM3v32_MOD_LDVT2 : case BSIM3v32_MOD_LDVT2 :
value->rValue = model->BSIM3v32ldvt2; value->rValue = model->BSIM3v32ldvt2;
return(OK); return(OK);
case BSIM3v32_MOD_LDVT0W : case BSIM3v32_MOD_LDVT0W :
value->rValue = model->BSIM3v32ldvt0w; value->rValue = model->BSIM3v32ldvt0w;
return(OK); return(OK);
case BSIM3v32_MOD_LDVT1W : case BSIM3v32_MOD_LDVT1W :
value->rValue = model->BSIM3v32ldvt1w; value->rValue = model->BSIM3v32ldvt1w;
return(OK); return(OK);
case BSIM3v32_MOD_LDVT2W : case BSIM3v32_MOD_LDVT2W :
value->rValue = model->BSIM3v32ldvt2w; value->rValue = model->BSIM3v32ldvt2w;
return(OK); return(OK);
case BSIM3v32_MOD_LDROUT : case BSIM3v32_MOD_LDROUT :
value->rValue = model->BSIM3v32ldrout; value->rValue = model->BSIM3v32ldrout;
return(OK); return(OK);
case BSIM3v32_MOD_LDSUB : case BSIM3v32_MOD_LDSUB :
value->rValue = model->BSIM3v32ldsub; value->rValue = model->BSIM3v32ldsub;
return(OK); return(OK);
case BSIM3v32_MOD_LVTH0: case BSIM3v32_MOD_LVTH0:
value->rValue = model->BSIM3v32lvth0; value->rValue = model->BSIM3v32lvth0;
return(OK); return(OK);
case BSIM3v32_MOD_LUA: case BSIM3v32_MOD_LUA:
value->rValue = model->BSIM3v32lua; value->rValue = model->BSIM3v32lua;
return(OK); return(OK);
case BSIM3v32_MOD_LUA1: case BSIM3v32_MOD_LUA1:
value->rValue = model->BSIM3v32lua1; value->rValue = model->BSIM3v32lua1;
return(OK); return(OK);
case BSIM3v32_MOD_LUB: case BSIM3v32_MOD_LUB:
value->rValue = model->BSIM3v32lub; value->rValue = model->BSIM3v32lub;
return(OK); return(OK);
case BSIM3v32_MOD_LUB1: case BSIM3v32_MOD_LUB1:
value->rValue = model->BSIM3v32lub1; value->rValue = model->BSIM3v32lub1;
return(OK); return(OK);
case BSIM3v32_MOD_LUC: case BSIM3v32_MOD_LUC:
value->rValue = model->BSIM3v32luc; value->rValue = model->BSIM3v32luc;
return(OK); return(OK);
case BSIM3v32_MOD_LUC1: case BSIM3v32_MOD_LUC1:
value->rValue = model->BSIM3v32luc1; value->rValue = model->BSIM3v32luc1;
return(OK); return(OK);
case BSIM3v32_MOD_LU0: case BSIM3v32_MOD_LU0:
value->rValue = model->BSIM3v32lu0; value->rValue = model->BSIM3v32lu0;
@ -506,44 +506,44 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value)
value->rValue = model->BSIM3v32ldelta; value->rValue = model->BSIM3v32ldelta;
return(OK); return(OK);
case BSIM3v32_MOD_LRDSW: case BSIM3v32_MOD_LRDSW:
value->rValue = model->BSIM3v32lrdsw; value->rValue = model->BSIM3v32lrdsw;
return(OK); return(OK);
case BSIM3v32_MOD_LPRWB: case BSIM3v32_MOD_LPRWB:
value->rValue = model->BSIM3v32lprwb; value->rValue = model->BSIM3v32lprwb;
return(OK); return(OK);
case BSIM3v32_MOD_LPRWG: case BSIM3v32_MOD_LPRWG:
value->rValue = model->BSIM3v32lprwg; value->rValue = model->BSIM3v32lprwg;
return(OK); return(OK);
case BSIM3v32_MOD_LPRT: case BSIM3v32_MOD_LPRT:
value->rValue = model->BSIM3v32lprt; value->rValue = model->BSIM3v32lprt;
return(OK); return(OK);
case BSIM3v32_MOD_LETA0: case BSIM3v32_MOD_LETA0:
value->rValue = model->BSIM3v32leta0; value->rValue = model->BSIM3v32leta0;
return(OK); return(OK);
case BSIM3v32_MOD_LETAB: case BSIM3v32_MOD_LETAB:
value->rValue = model->BSIM3v32letab; value->rValue = model->BSIM3v32letab;
return(OK); return(OK);
case BSIM3v32_MOD_LPCLM: case BSIM3v32_MOD_LPCLM:
value->rValue = model->BSIM3v32lpclm; value->rValue = model->BSIM3v32lpclm;
return(OK); return(OK);
case BSIM3v32_MOD_LPDIBL1: case BSIM3v32_MOD_LPDIBL1:
value->rValue = model->BSIM3v32lpdibl1; value->rValue = model->BSIM3v32lpdibl1;
return(OK); return(OK);
case BSIM3v32_MOD_LPDIBL2: case BSIM3v32_MOD_LPDIBL2:
value->rValue = model->BSIM3v32lpdibl2; value->rValue = model->BSIM3v32lpdibl2;
return(OK); return(OK);
case BSIM3v32_MOD_LPDIBLB: case BSIM3v32_MOD_LPDIBLB:
value->rValue = model->BSIM3v32lpdiblb; value->rValue = model->BSIM3v32lpdiblb;
return(OK); return(OK);
case BSIM3v32_MOD_LPSCBE1: case BSIM3v32_MOD_LPSCBE1:
value->rValue = model->BSIM3v32lpscbe1; value->rValue = model->BSIM3v32lpscbe1;
return(OK); return(OK);
case BSIM3v32_MOD_LPSCBE2: case BSIM3v32_MOD_LPSCBE2:
value->rValue = model->BSIM3v32lpscbe2; value->rValue = model->BSIM3v32lpscbe2;
return(OK); return(OK);
case BSIM3v32_MOD_LPVAG: case BSIM3v32_MOD_LPVAG:
value->rValue = model->BSIM3v32lpvag; value->rValue = model->BSIM3v32lpvag;
return(OK); return(OK);
case BSIM3v32_MOD_LWR: case BSIM3v32_MOD_LWR:
value->rValue = model->BSIM3v32lwr; value->rValue = model->BSIM3v32lwr;
return(OK); return(OK);
@ -609,7 +609,7 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value)
value->rValue = model->BSIM3v32lvoffcv; value->rValue = model->BSIM3v32lvoffcv;
return(OK); return(OK);
/* Width dependence */ /* Width dependence */
case BSIM3v32_MOD_WCDSC : case BSIM3v32_MOD_WCDSC :
value->rValue = model->BSIM3v32wcdsc; value->rValue = model->BSIM3v32wcdsc;
return(OK); return(OK);
@ -648,7 +648,7 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value)
return(OK); return(OK);
case BSIM3v32_MOD_WKETA: case BSIM3v32_MOD_WKETA:
value->rValue = model->BSIM3v32wketa; value->rValue = model->BSIM3v32wketa;
return(OK); return(OK);
case BSIM3v32_MOD_WNSUB: case BSIM3v32_MOD_WNSUB:
value->rValue = model->BSIM3v32wnsub; value->rValue = model->BSIM3v32wnsub;
return(OK); return(OK);
@ -700,50 +700,50 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value)
case BSIM3v32_MOD_WNLX: case BSIM3v32_MOD_WNLX:
value->rValue = model->BSIM3v32wnlx; value->rValue = model->BSIM3v32wnlx;
return(OK); return(OK);
case BSIM3v32_MOD_WDVT0: case BSIM3v32_MOD_WDVT0:
value->rValue = model->BSIM3v32wdvt0; value->rValue = model->BSIM3v32wdvt0;
return(OK); return(OK);
case BSIM3v32_MOD_WDVT1 : case BSIM3v32_MOD_WDVT1 :
value->rValue = model->BSIM3v32wdvt1; value->rValue = model->BSIM3v32wdvt1;
return(OK); return(OK);
case BSIM3v32_MOD_WDVT2 : case BSIM3v32_MOD_WDVT2 :
value->rValue = model->BSIM3v32wdvt2; value->rValue = model->BSIM3v32wdvt2;
return(OK); return(OK);
case BSIM3v32_MOD_WDVT0W : case BSIM3v32_MOD_WDVT0W :
value->rValue = model->BSIM3v32wdvt0w; value->rValue = model->BSIM3v32wdvt0w;
return(OK); return(OK);
case BSIM3v32_MOD_WDVT1W : case BSIM3v32_MOD_WDVT1W :
value->rValue = model->BSIM3v32wdvt1w; value->rValue = model->BSIM3v32wdvt1w;
return(OK); return(OK);
case BSIM3v32_MOD_WDVT2W : case BSIM3v32_MOD_WDVT2W :
value->rValue = model->BSIM3v32wdvt2w; value->rValue = model->BSIM3v32wdvt2w;
return(OK); return(OK);
case BSIM3v32_MOD_WDROUT : case BSIM3v32_MOD_WDROUT :
value->rValue = model->BSIM3v32wdrout; value->rValue = model->BSIM3v32wdrout;
return(OK); return(OK);
case BSIM3v32_MOD_WDSUB : case BSIM3v32_MOD_WDSUB :
value->rValue = model->BSIM3v32wdsub; value->rValue = model->BSIM3v32wdsub;
return(OK); return(OK);
case BSIM3v32_MOD_WVTH0: case BSIM3v32_MOD_WVTH0:
value->rValue = model->BSIM3v32wvth0; value->rValue = model->BSIM3v32wvth0;
return(OK); return(OK);
case BSIM3v32_MOD_WUA: case BSIM3v32_MOD_WUA:
value->rValue = model->BSIM3v32wua; value->rValue = model->BSIM3v32wua;
return(OK); return(OK);
case BSIM3v32_MOD_WUA1: case BSIM3v32_MOD_WUA1:
value->rValue = model->BSIM3v32wua1; value->rValue = model->BSIM3v32wua1;
return(OK); return(OK);
case BSIM3v32_MOD_WUB: case BSIM3v32_MOD_WUB:
value->rValue = model->BSIM3v32wub; value->rValue = model->BSIM3v32wub;
return(OK); return(OK);
case BSIM3v32_MOD_WUB1: case BSIM3v32_MOD_WUB1:
value->rValue = model->BSIM3v32wub1; value->rValue = model->BSIM3v32wub1;
return(OK); return(OK);
case BSIM3v32_MOD_WUC: case BSIM3v32_MOD_WUC:
value->rValue = model->BSIM3v32wuc; value->rValue = model->BSIM3v32wuc;
return(OK); return(OK);
case BSIM3v32_MOD_WUC1: case BSIM3v32_MOD_WUC1:
value->rValue = model->BSIM3v32wuc1; value->rValue = model->BSIM3v32wuc1;
return(OK); return(OK);
case BSIM3v32_MOD_WU0: case BSIM3v32_MOD_WU0:
value->rValue = model->BSIM3v32wu0; value->rValue = model->BSIM3v32wu0;
@ -758,44 +758,44 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value)
value->rValue = model->BSIM3v32wdelta; value->rValue = model->BSIM3v32wdelta;
return(OK); return(OK);
case BSIM3v32_MOD_WRDSW: case BSIM3v32_MOD_WRDSW:
value->rValue = model->BSIM3v32wrdsw; value->rValue = model->BSIM3v32wrdsw;
return(OK); return(OK);
case BSIM3v32_MOD_WPRWB: case BSIM3v32_MOD_WPRWB:
value->rValue = model->BSIM3v32wprwb; value->rValue = model->BSIM3v32wprwb;
return(OK); return(OK);
case BSIM3v32_MOD_WPRWG: case BSIM3v32_MOD_WPRWG:
value->rValue = model->BSIM3v32wprwg; value->rValue = model->BSIM3v32wprwg;
return(OK); return(OK);
case BSIM3v32_MOD_WPRT: case BSIM3v32_MOD_WPRT:
value->rValue = model->BSIM3v32wprt; value->rValue = model->BSIM3v32wprt;
return(OK); return(OK);
case BSIM3v32_MOD_WETA0: case BSIM3v32_MOD_WETA0:
value->rValue = model->BSIM3v32weta0; value->rValue = model->BSIM3v32weta0;
return(OK); return(OK);
case BSIM3v32_MOD_WETAB: case BSIM3v32_MOD_WETAB:
value->rValue = model->BSIM3v32wetab; value->rValue = model->BSIM3v32wetab;
return(OK); return(OK);
case BSIM3v32_MOD_WPCLM: case BSIM3v32_MOD_WPCLM:
value->rValue = model->BSIM3v32wpclm; value->rValue = model->BSIM3v32wpclm;
return(OK); return(OK);
case BSIM3v32_MOD_WPDIBL1: case BSIM3v32_MOD_WPDIBL1:
value->rValue = model->BSIM3v32wpdibl1; value->rValue = model->BSIM3v32wpdibl1;
return(OK); return(OK);
case BSIM3v32_MOD_WPDIBL2: case BSIM3v32_MOD_WPDIBL2:
value->rValue = model->BSIM3v32wpdibl2; value->rValue = model->BSIM3v32wpdibl2;
return(OK); return(OK);
case BSIM3v32_MOD_WPDIBLB: case BSIM3v32_MOD_WPDIBLB:
value->rValue = model->BSIM3v32wpdiblb; value->rValue = model->BSIM3v32wpdiblb;
return(OK); return(OK);
case BSIM3v32_MOD_WPSCBE1: case BSIM3v32_MOD_WPSCBE1:
value->rValue = model->BSIM3v32wpscbe1; value->rValue = model->BSIM3v32wpscbe1;
return(OK); return(OK);
case BSIM3v32_MOD_WPSCBE2: case BSIM3v32_MOD_WPSCBE2:
value->rValue = model->BSIM3v32wpscbe2; value->rValue = model->BSIM3v32wpscbe2;
return(OK); return(OK);
case BSIM3v32_MOD_WPVAG: case BSIM3v32_MOD_WPVAG:
value->rValue = model->BSIM3v32wpvag; value->rValue = model->BSIM3v32wpvag;
return(OK); return(OK);
case BSIM3v32_MOD_WWR: case BSIM3v32_MOD_WWR:
value->rValue = model->BSIM3v32wwr; value->rValue = model->BSIM3v32wwr;
return(OK); return(OK);
@ -861,7 +861,7 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value)
value->rValue = model->BSIM3v32wvoffcv; value->rValue = model->BSIM3v32wvoffcv;
return(OK); return(OK);
/* Cross-term dependence */ /* Cross-term dependence */
case BSIM3v32_MOD_PCDSC : case BSIM3v32_MOD_PCDSC :
value->rValue = model->BSIM3v32pcdsc; value->rValue = model->BSIM3v32pcdsc;
return(OK); return(OK);
@ -900,7 +900,7 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value)
return(OK); return(OK);
case BSIM3v32_MOD_PKETA: case BSIM3v32_MOD_PKETA:
value->rValue = model->BSIM3v32pketa; value->rValue = model->BSIM3v32pketa;
return(OK); return(OK);
case BSIM3v32_MOD_PNSUB: case BSIM3v32_MOD_PNSUB:
value->rValue = model->BSIM3v32pnsub; value->rValue = model->BSIM3v32pnsub;
return(OK); return(OK);
@ -952,50 +952,50 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value)
case BSIM3v32_MOD_PNLX: case BSIM3v32_MOD_PNLX:
value->rValue = model->BSIM3v32pnlx; value->rValue = model->BSIM3v32pnlx;
return(OK); return(OK);
case BSIM3v32_MOD_PDVT0 : case BSIM3v32_MOD_PDVT0 :
value->rValue = model->BSIM3v32pdvt0; value->rValue = model->BSIM3v32pdvt0;
return(OK); return(OK);
case BSIM3v32_MOD_PDVT1 : case BSIM3v32_MOD_PDVT1 :
value->rValue = model->BSIM3v32pdvt1; value->rValue = model->BSIM3v32pdvt1;
return(OK); return(OK);
case BSIM3v32_MOD_PDVT2 : case BSIM3v32_MOD_PDVT2 :
value->rValue = model->BSIM3v32pdvt2; value->rValue = model->BSIM3v32pdvt2;
return(OK); return(OK);
case BSIM3v32_MOD_PDVT0W : case BSIM3v32_MOD_PDVT0W :
value->rValue = model->BSIM3v32pdvt0w; value->rValue = model->BSIM3v32pdvt0w;
return(OK); return(OK);
case BSIM3v32_MOD_PDVT1W : case BSIM3v32_MOD_PDVT1W :
value->rValue = model->BSIM3v32pdvt1w; value->rValue = model->BSIM3v32pdvt1w;
return(OK); return(OK);
case BSIM3v32_MOD_PDVT2W : case BSIM3v32_MOD_PDVT2W :
value->rValue = model->BSIM3v32pdvt2w; value->rValue = model->BSIM3v32pdvt2w;
return(OK); return(OK);
case BSIM3v32_MOD_PDROUT : case BSIM3v32_MOD_PDROUT :
value->rValue = model->BSIM3v32pdrout; value->rValue = model->BSIM3v32pdrout;
return(OK); return(OK);
case BSIM3v32_MOD_PDSUB : case BSIM3v32_MOD_PDSUB :
value->rValue = model->BSIM3v32pdsub; value->rValue = model->BSIM3v32pdsub;
return(OK); return(OK);
case BSIM3v32_MOD_PVTH0: case BSIM3v32_MOD_PVTH0:
value->rValue = model->BSIM3v32pvth0; value->rValue = model->BSIM3v32pvth0;
return(OK); return(OK);
case BSIM3v32_MOD_PUA: case BSIM3v32_MOD_PUA:
value->rValue = model->BSIM3v32pua; value->rValue = model->BSIM3v32pua;
return(OK); return(OK);
case BSIM3v32_MOD_PUA1: case BSIM3v32_MOD_PUA1:
value->rValue = model->BSIM3v32pua1; value->rValue = model->BSIM3v32pua1;
return(OK); return(OK);
case BSIM3v32_MOD_PUB: case BSIM3v32_MOD_PUB:
value->rValue = model->BSIM3v32pub; value->rValue = model->BSIM3v32pub;
return(OK); return(OK);
case BSIM3v32_MOD_PUB1: case BSIM3v32_MOD_PUB1:
value->rValue = model->BSIM3v32pub1; value->rValue = model->BSIM3v32pub1;
return(OK); return(OK);
case BSIM3v32_MOD_PUC: case BSIM3v32_MOD_PUC:
value->rValue = model->BSIM3v32puc; value->rValue = model->BSIM3v32puc;
return(OK); return(OK);
case BSIM3v32_MOD_PUC1: case BSIM3v32_MOD_PUC1:
value->rValue = model->BSIM3v32puc1; value->rValue = model->BSIM3v32puc1;
return(OK); return(OK);
case BSIM3v32_MOD_PU0: case BSIM3v32_MOD_PU0:
value->rValue = model->BSIM3v32pu0; value->rValue = model->BSIM3v32pu0;
@ -1010,44 +1010,44 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value)
value->rValue = model->BSIM3v32pdelta; value->rValue = model->BSIM3v32pdelta;
return(OK); return(OK);
case BSIM3v32_MOD_PRDSW: case BSIM3v32_MOD_PRDSW:
value->rValue = model->BSIM3v32prdsw; value->rValue = model->BSIM3v32prdsw;
return(OK); return(OK);
case BSIM3v32_MOD_PPRWB: case BSIM3v32_MOD_PPRWB:
value->rValue = model->BSIM3v32pprwb; value->rValue = model->BSIM3v32pprwb;
return(OK); return(OK);
case BSIM3v32_MOD_PPRWG: case BSIM3v32_MOD_PPRWG:
value->rValue = model->BSIM3v32pprwg; value->rValue = model->BSIM3v32pprwg;
return(OK); return(OK);
case BSIM3v32_MOD_PPRT: case BSIM3v32_MOD_PPRT:
value->rValue = model->BSIM3v32pprt; value->rValue = model->BSIM3v32pprt;
return(OK); return(OK);
case BSIM3v32_MOD_PETA0: case BSIM3v32_MOD_PETA0:
value->rValue = model->BSIM3v32peta0; value->rValue = model->BSIM3v32peta0;
return(OK); return(OK);
case BSIM3v32_MOD_PETAB: case BSIM3v32_MOD_PETAB:
value->rValue = model->BSIM3v32petab; value->rValue = model->BSIM3v32petab;
return(OK); return(OK);
case BSIM3v32_MOD_PPCLM: case BSIM3v32_MOD_PPCLM:
value->rValue = model->BSIM3v32ppclm; value->rValue = model->BSIM3v32ppclm;
return(OK); return(OK);
case BSIM3v32_MOD_PPDIBL1: case BSIM3v32_MOD_PPDIBL1:
value->rValue = model->BSIM3v32ppdibl1; value->rValue = model->BSIM3v32ppdibl1;
return(OK); return(OK);
case BSIM3v32_MOD_PPDIBL2: case BSIM3v32_MOD_PPDIBL2:
value->rValue = model->BSIM3v32ppdibl2; value->rValue = model->BSIM3v32ppdibl2;
return(OK); return(OK);
case BSIM3v32_MOD_PPDIBLB: case BSIM3v32_MOD_PPDIBLB:
value->rValue = model->BSIM3v32ppdiblb; value->rValue = model->BSIM3v32ppdiblb;
return(OK); return(OK);
case BSIM3v32_MOD_PPSCBE1: case BSIM3v32_MOD_PPSCBE1:
value->rValue = model->BSIM3v32ppscbe1; value->rValue = model->BSIM3v32ppscbe1;
return(OK); return(OK);
case BSIM3v32_MOD_PPSCBE2: case BSIM3v32_MOD_PPSCBE2:
value->rValue = model->BSIM3v32ppscbe2; value->rValue = model->BSIM3v32ppscbe2;
return(OK); return(OK);
case BSIM3v32_MOD_PPVAG: case BSIM3v32_MOD_PPVAG:
value->rValue = model->BSIM3v32ppvag; value->rValue = model->BSIM3v32ppvag;
return(OK); return(OK);
case BSIM3v32_MOD_PWR: case BSIM3v32_MOD_PWR:
value->rValue = model->BSIM3v32pwr; value->rValue = model->BSIM3v32pwr;
return(OK); return(OK);
@ -1114,64 +1114,64 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value)
return(OK); return(OK);
case BSIM3v32_MOD_TNOM : case BSIM3v32_MOD_TNOM :
value->rValue = model->BSIM3v32tnom; value->rValue = model->BSIM3v32tnom;
return(OK); return(OK);
case BSIM3v32_MOD_CGSO: case BSIM3v32_MOD_CGSO:
value->rValue = model->BSIM3v32cgso; value->rValue = model->BSIM3v32cgso;
return(OK); return(OK);
case BSIM3v32_MOD_CGDO: case BSIM3v32_MOD_CGDO:
value->rValue = model->BSIM3v32cgdo; value->rValue = model->BSIM3v32cgdo;
return(OK); return(OK);
case BSIM3v32_MOD_CGBO: case BSIM3v32_MOD_CGBO:
value->rValue = model->BSIM3v32cgbo; value->rValue = model->BSIM3v32cgbo;
return(OK); return(OK);
case BSIM3v32_MOD_XPART: case BSIM3v32_MOD_XPART:
value->rValue = model->BSIM3v32xpart; value->rValue = model->BSIM3v32xpart;
return(OK); return(OK);
case BSIM3v32_MOD_RSH: case BSIM3v32_MOD_RSH:
value->rValue = model->BSIM3v32sheetResistance; value->rValue = model->BSIM3v32sheetResistance;
return(OK); return(OK);
case BSIM3v32_MOD_JS: case BSIM3v32_MOD_JS:
value->rValue = model->BSIM3v32jctSatCurDensity; value->rValue = model->BSIM3v32jctSatCurDensity;
return(OK); return(OK);
case BSIM3v32_MOD_JSW: case BSIM3v32_MOD_JSW:
value->rValue = model->BSIM3v32jctSidewallSatCurDensity; value->rValue = model->BSIM3v32jctSidewallSatCurDensity;
return(OK); return(OK);
case BSIM3v32_MOD_PB: case BSIM3v32_MOD_PB:
value->rValue = model->BSIM3v32bulkJctPotential; value->rValue = model->BSIM3v32bulkJctPotential;
return(OK); return(OK);
case BSIM3v32_MOD_MJ: case BSIM3v32_MOD_MJ:
value->rValue = model->BSIM3v32bulkJctBotGradingCoeff; value->rValue = model->BSIM3v32bulkJctBotGradingCoeff;
return(OK); return(OK);
case BSIM3v32_MOD_PBSW: case BSIM3v32_MOD_PBSW:
value->rValue = model->BSIM3v32sidewallJctPotential; value->rValue = model->BSIM3v32sidewallJctPotential;
return(OK); return(OK);
case BSIM3v32_MOD_MJSW: case BSIM3v32_MOD_MJSW:
value->rValue = model->BSIM3v32bulkJctSideGradingCoeff; value->rValue = model->BSIM3v32bulkJctSideGradingCoeff;
return(OK); return(OK);
case BSIM3v32_MOD_CJ: case BSIM3v32_MOD_CJ:
value->rValue = model->BSIM3v32unitAreaJctCap; value->rValue = model->BSIM3v32unitAreaJctCap;
return(OK); return(OK);
case BSIM3v32_MOD_CJSW: case BSIM3v32_MOD_CJSW:
value->rValue = model->BSIM3v32unitLengthSidewallJctCap; value->rValue = model->BSIM3v32unitLengthSidewallJctCap;
return(OK); return(OK);
case BSIM3v32_MOD_PBSWG: case BSIM3v32_MOD_PBSWG:
value->rValue = model->BSIM3v32GatesidewallJctPotential; value->rValue = model->BSIM3v32GatesidewallJctPotential;
return(OK); return(OK);
case BSIM3v32_MOD_MJSWG: case BSIM3v32_MOD_MJSWG:
value->rValue = model->BSIM3v32bulkJctGateSideGradingCoeff; value->rValue = model->BSIM3v32bulkJctGateSideGradingCoeff;
return(OK); return(OK);
case BSIM3v32_MOD_CJSWG: case BSIM3v32_MOD_CJSWG:
value->rValue = model->BSIM3v32unitLengthGateSidewallJctCap; value->rValue = model->BSIM3v32unitLengthGateSidewallJctCap;
return(OK); return(OK);
case BSIM3v32_MOD_NJ: case BSIM3v32_MOD_NJ:
value->rValue = model->BSIM3v32jctEmissionCoeff; value->rValue = model->BSIM3v32jctEmissionCoeff;
return(OK); return(OK);
case BSIM3v32_MOD_XTI: case BSIM3v32_MOD_XTI:
value->rValue = model->BSIM3v32jctTempExponent; value->rValue = model->BSIM3v32jctTempExponent;
return(OK); return(OK);
case BSIM3v32_MOD_LINT: case BSIM3v32_MOD_LINT:
value->rValue = model->BSIM3v32Lint; value->rValue = model->BSIM3v32Lint;
return(OK); return(OK);
case BSIM3v32_MOD_LL: case BSIM3v32_MOD_LL:
value->rValue = model->BSIM3v32Ll; value->rValue = model->BSIM3v32Ll;
@ -1238,11 +1238,11 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value)
return(OK); return(OK);
case BSIM3v32_MOD_XL: case BSIM3v32_MOD_XL:
value->rValue = model->BSIM3v32xl; value->rValue = model->BSIM3v32xl;
return(OK); return(OK);
case BSIM3v32_MOD_XW: case BSIM3v32_MOD_XW:
value->rValue = model->BSIM3v32xw; value->rValue = model->BSIM3v32xw;
return(OK); return(OK);
case BSIM3v32_MOD_NOIA: case BSIM3v32_MOD_NOIA:
value->rValue = model->BSIM3v32oxideTrapDensityA; value->rValue = model->BSIM3v32oxideTrapDensityA;

9
src/spicelib/devices/bsim3v32/b3v32mdel.c
View File

@ -3,7 +3,7 @@
/********** /**********
* Copyright 2001 Regents of the University of California. All rights reserved. * Copyright 2001 Regents of the University of California. All rights reserved.
* File: b3mdel.c of BSIM3v3.2.4 * File: b3mdel.c of BSIM3v3.2.4
* Author: 1995 Min-Chie Jeng and Mansun Chan. * Author: 1995 Min-Chie Jeng and Mansun Chan.
* Author: 1997-1999 Weidong Liu. * Author: 1997-1999 Weidong Liu.
* Author: 2001 Xuemei Xi * Author: 2001 Xuemei Xi
* Modified by Paolo Nenzi 2002 * Modified by Paolo Nenzi 2002
@ -24,10 +24,10 @@ BSIM3v32instance *prev = NULL;
BSIM3v32model **oldmod; BSIM3v32model **oldmod;
oldmod = model; oldmod = model;
for (; *model ; model = &((*model)->BSIM3v32nextModel)) for (; *model ; model = &((*model)->BSIM3v32nextModel))
{ if ((*model)->BSIM3v32modName == modname || { if ((*model)->BSIM3v32modName == modname ||
(modfast && *model == modfast)) (modfast && *model == modfast))
goto delgot; goto delgot;
oldmod = model; oldmod = model;
} }
return(E_NOMOD); return(E_NOMOD);
@ -44,4 +44,3 @@ delgot:
} }

228
src/spicelib/devices/bsim3v32/b3v32mpar.c
View File

@ -3,7 +3,7 @@
/********** /**********
* Copyright 2001 Regents of the University of California. All rights reserved. * Copyright 2001 Regents of the University of California. All rights reserved.
* File: b3mpar.c of BSIM3v3.2.4 * File: b3mpar.c of BSIM3v3.2.4
* Author: 1995 Min-Chie Jeng and Mansun Chan. * Author: 1995 Min-Chie Jeng and Mansun Chan.
* Author: 1997-1999 Weidong Liu. * Author: 1997-1999 Weidong Liu.
* Author: 2001 Xuemei Xi * Author: 2001 Xuemei Xi
* Modified by Paolo Nenzi 2002 and Dietmar Warning 2003 * Modified by Paolo Nenzi 2002 and Dietmar Warning 2003
@ -92,12 +92,12 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod)
mod->BSIM3v32a0 = value->rValue; mod->BSIM3v32a0 = value->rValue;
mod->BSIM3v32a0Given = TRUE; mod->BSIM3v32a0Given = TRUE;
break; break;
case BSIM3v32_MOD_AGS: case BSIM3v32_MOD_AGS:
mod->BSIM3v32ags= value->rValue; mod->BSIM3v32ags= value->rValue;
mod->BSIM3v32agsGiven = TRUE; mod->BSIM3v32agsGiven = TRUE;
break; break;
case BSIM3v32_MOD_A1: case BSIM3v32_MOD_A1:
mod->BSIM3v32a1 = value->rValue; mod->BSIM3v32a1 = value->rValue;
mod->BSIM3v32a1Given = TRUE; mod->BSIM3v32a1Given = TRUE;
@ -113,7 +113,7 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod)
case BSIM3v32_MOD_KETA: case BSIM3v32_MOD_KETA:
mod->BSIM3v32keta = value->rValue; mod->BSIM3v32keta = value->rValue;
mod->BSIM3v32ketaGiven = TRUE; mod->BSIM3v32ketaGiven = TRUE;
break; break;
case BSIM3v32_MOD_NSUB: case BSIM3v32_MOD_NSUB:
mod->BSIM3v32nsub = value->rValue; mod->BSIM3v32nsub = value->rValue;
mod->BSIM3v32nsubGiven = TRUE; mod->BSIM3v32nsubGiven = TRUE;
@ -121,14 +121,14 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod)
case BSIM3v32_MOD_NPEAK: case BSIM3v32_MOD_NPEAK:
mod->BSIM3v32npeak = value->rValue; mod->BSIM3v32npeak = value->rValue;
mod->BSIM3v32npeakGiven = TRUE; mod->BSIM3v32npeakGiven = TRUE;
if (mod->BSIM3v32npeak > 1.0e20) if (mod->BSIM3v32npeak > 1.0e20)
mod->BSIM3v32npeak *= 1.0e-6; mod->BSIM3v32npeak *= 1.0e-6;
break; break;
case BSIM3v32_MOD_NGATE: case BSIM3v32_MOD_NGATE:
mod->BSIM3v32ngate = value->rValue; mod->BSIM3v32ngate = value->rValue;
mod->BSIM3v32ngateGiven = TRUE; mod->BSIM3v32ngateGiven = TRUE;
if (mod->BSIM3v32ngate > 1.0e23) if (mod->BSIM3v32ngate > 1.0e23)
mod->BSIM3v32ngate *= 1.0e-6; mod->BSIM3v32ngate *= 1.0e-6;
break; break;
case BSIM3v32_MOD_GAMMA1: case BSIM3v32_MOD_GAMMA1:
mod->BSIM3v32gamma1 = value->rValue; mod->BSIM3v32gamma1 = value->rValue;
@ -186,35 +186,35 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod)
mod->BSIM3v32w0 = value->rValue; mod->BSIM3v32w0 = value->rValue;
mod->BSIM3v32w0Given = TRUE; mod->BSIM3v32w0Given = TRUE;
break; break;
case BSIM3v32_MOD_DVT0: case BSIM3v32_MOD_DVT0:
mod->BSIM3v32dvt0 = value->rValue; mod->BSIM3v32dvt0 = value->rValue;
mod->BSIM3v32dvt0Given = TRUE; mod->BSIM3v32dvt0Given = TRUE;
break; break;
case BSIM3v32_MOD_DVT1: case BSIM3v32_MOD_DVT1:
mod->BSIM3v32dvt1 = value->rValue; mod->BSIM3v32dvt1 = value->rValue;
mod->BSIM3v32dvt1Given = TRUE; mod->BSIM3v32dvt1Given = TRUE;
break; break;
case BSIM3v32_MOD_DVT2: case BSIM3v32_MOD_DVT2:
mod->BSIM3v32dvt2 = value->rValue; mod->BSIM3v32dvt2 = value->rValue;
mod->BSIM3v32dvt2Given = TRUE; mod->BSIM3v32dvt2Given = TRUE;
break; break;
case BSIM3v32_MOD_DVT0W: case BSIM3v32_MOD_DVT0W:
mod->BSIM3v32dvt0w = value->rValue; mod->BSIM3v32dvt0w = value->rValue;
mod->BSIM3v32dvt0wGiven = TRUE; mod->BSIM3v32dvt0wGiven = TRUE;
break; break;
case BSIM3v32_MOD_DVT1W: case BSIM3v32_MOD_DVT1W:
mod->BSIM3v32dvt1w = value->rValue; mod->BSIM3v32dvt1w = value->rValue;
mod->BSIM3v32dvt1wGiven = TRUE; mod->BSIM3v32dvt1wGiven = TRUE;
break; break;
case BSIM3v32_MOD_DVT2W: case BSIM3v32_MOD_DVT2W:
mod->BSIM3v32dvt2w = value->rValue; mod->BSIM3v32dvt2w = value->rValue;
mod->BSIM3v32dvt2wGiven = TRUE; mod->BSIM3v32dvt2wGiven = TRUE;
break; break;
case BSIM3v32_MOD_DROUT: case BSIM3v32_MOD_DROUT:
mod->BSIM3v32drout = value->rValue; mod->BSIM3v32drout = value->rValue;
mod->BSIM3v32droutGiven = TRUE; mod->BSIM3v32droutGiven = TRUE;
break; break;
case BSIM3v32_MOD_DSUB: case BSIM3v32_MOD_DSUB:
mod->BSIM3v32dsub = value->rValue; mod->BSIM3v32dsub = value->rValue;
mod->BSIM3v32dsubGiven = TRUE; mod->BSIM3v32dsubGiven = TRUE;
break; break;
@ -265,55 +265,55 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod)
case BSIM3v32_MOD_RDSW: case BSIM3v32_MOD_RDSW:
mod->BSIM3v32rdsw = value->rValue; mod->BSIM3v32rdsw = value->rValue;
mod->BSIM3v32rdswGiven = TRUE; mod->BSIM3v32rdswGiven = TRUE;
break; break;
case BSIM3v32_MOD_PRWG: case BSIM3v32_MOD_PRWG:
mod->BSIM3v32prwg = value->rValue; mod->BSIM3v32prwg = value->rValue;
mod->BSIM3v32prwgGiven = TRUE; mod->BSIM3v32prwgGiven = TRUE;
break; break;
case BSIM3v32_MOD_PRWB: case BSIM3v32_MOD_PRWB:
mod->BSIM3v32prwb = value->rValue; mod->BSIM3v32prwb = value->rValue;
mod->BSIM3v32prwbGiven = TRUE; mod->BSIM3v32prwbGiven = TRUE;
break; break;
case BSIM3v32_MOD_PRT: case BSIM3v32_MOD_PRT:
mod->BSIM3v32prt = value->rValue; mod->BSIM3v32prt = value->rValue;
mod->BSIM3v32prtGiven = TRUE; mod->BSIM3v32prtGiven = TRUE;
break; break;
case BSIM3v32_MOD_ETA0: case BSIM3v32_MOD_ETA0:
mod->BSIM3v32eta0 = value->rValue; mod->BSIM3v32eta0 = value->rValue;
mod->BSIM3v32eta0Given = TRUE; mod->BSIM3v32eta0Given = TRUE;
break; break;
case BSIM3v32_MOD_ETAB: case BSIM3v32_MOD_ETAB:
mod->BSIM3v32etab = value->rValue; mod->BSIM3v32etab = value->rValue;
mod->BSIM3v32etabGiven = TRUE; mod->BSIM3v32etabGiven = TRUE;
break; break;
case BSIM3v32_MOD_PCLM: case BSIM3v32_MOD_PCLM:
mod->BSIM3v32pclm = value->rValue; mod->BSIM3v32pclm = value->rValue;
mod->BSIM3v32pclmGiven = TRUE; mod->BSIM3v32pclmGiven = TRUE;
break; break;
case BSIM3v32_MOD_PDIBL1: case BSIM3v32_MOD_PDIBL1:
mod->BSIM3v32pdibl1 = value->rValue; mod->BSIM3v32pdibl1 = value->rValue;
mod->BSIM3v32pdibl1Given = TRUE; mod->BSIM3v32pdibl1Given = TRUE;
break; break;
case BSIM3v32_MOD_PDIBL2: case BSIM3v32_MOD_PDIBL2:
mod->BSIM3v32pdibl2 = value->rValue; mod->BSIM3v32pdibl2 = value->rValue;
mod->BSIM3v32pdibl2Given = TRUE; mod->BSIM3v32pdibl2Given = TRUE;
break; break;
case BSIM3v32_MOD_PDIBLB: case BSIM3v32_MOD_PDIBLB:
mod->BSIM3v32pdiblb = value->rValue; mod->BSIM3v32pdiblb = value->rValue;
mod->BSIM3v32pdiblbGiven = TRUE; mod->BSIM3v32pdiblbGiven = TRUE;
break; break;
case BSIM3v32_MOD_PSCBE1: case BSIM3v32_MOD_PSCBE1:
mod->BSIM3v32pscbe1 = value->rValue; mod->BSIM3v32pscbe1 = value->rValue;
mod->BSIM3v32pscbe1Given = TRUE; mod->BSIM3v32pscbe1Given = TRUE;
break; break;
case BSIM3v32_MOD_PSCBE2: case BSIM3v32_MOD_PSCBE2:
mod->BSIM3v32pscbe2 = value->rValue; mod->BSIM3v32pscbe2 = value->rValue;
mod->BSIM3v32pscbe2Given = TRUE; mod->BSIM3v32pscbe2Given = TRUE;
break; break;
case BSIM3v32_MOD_PVAG: case BSIM3v32_MOD_PVAG:
mod->BSIM3v32pvag = value->rValue; mod->BSIM3v32pvag = value->rValue;
mod->BSIM3v32pvagGiven = TRUE; mod->BSIM3v32pvagGiven = TRUE;
break; break;
case BSIM3v32_MOD_WR : case BSIM3v32_MOD_WR :
mod->BSIM3v32wr = value->rValue; mod->BSIM3v32wr = value->rValue;
mod->BSIM3v32wrGiven = TRUE; mod->BSIM3v32wrGiven = TRUE;
@ -466,7 +466,7 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod)
mod->BSIM3v32rscGiven = TRUE; mod->BSIM3v32rscGiven = TRUE;
break; break;
/* Length dependence */ /* Length dependence */
case BSIM3v32_MOD_LCDSC : case BSIM3v32_MOD_LCDSC :
mod->BSIM3v32lcdsc = value->rValue; mod->BSIM3v32lcdsc = value->rValue;
mod->BSIM3v32lcdscGiven = TRUE; mod->BSIM3v32lcdscGiven = TRUE;
@ -497,8 +497,8 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod)
mod->BSIM3v32lvsat = value->rValue; mod->BSIM3v32lvsat = value->rValue;
mod->BSIM3v32lvsatGiven = TRUE; mod->BSIM3v32lvsatGiven = TRUE;
break; break;
case BSIM3v32_MOD_LA0: case BSIM3v32_MOD_LA0:
mod->BSIM3v32la0 = value->rValue; mod->BSIM3v32la0 = value->rValue;
mod->BSIM3v32la0Given = TRUE; mod->BSIM3v32la0Given = TRUE;
@ -522,7 +522,7 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod)
case BSIM3v32_MOD_LKETA: case BSIM3v32_MOD_LKETA:
mod->BSIM3v32lketa = value->rValue; mod->BSIM3v32lketa = value->rValue;
mod->BSIM3v32lketaGiven = TRUE; mod->BSIM3v32lketaGiven = TRUE;
break; break;
case BSIM3v32_MOD_LNSUB: case BSIM3v32_MOD_LNSUB:
mod->BSIM3v32lnsub = value->rValue; mod->BSIM3v32lnsub = value->rValue;
mod->BSIM3v32lnsubGiven = TRUE; mod->BSIM3v32lnsubGiven = TRUE;
@ -530,14 +530,14 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod)
case BSIM3v32_MOD_LNPEAK: case BSIM3v32_MOD_LNPEAK:
mod->BSIM3v32lnpeak = value->rValue; mod->BSIM3v32lnpeak = value->rValue;
mod->BSIM3v32lnpeakGiven = TRUE; mod->BSIM3v32lnpeakGiven = TRUE;
if (mod->BSIM3v32lnpeak > 1.0e20) if (mod->BSIM3v32lnpeak > 1.0e20)
mod->BSIM3v32lnpeak *= 1.0e-6; mod->BSIM3v32lnpeak *= 1.0e-6;
break; break;
case BSIM3v32_MOD_LNGATE: case BSIM3v32_MOD_LNGATE:
mod->BSIM3v32lngate = value->rValue; mod->BSIM3v32lngate = value->rValue;
mod->BSIM3v32lngateGiven = TRUE; mod->BSIM3v32lngateGiven = TRUE;
if (mod->BSIM3v32lngate > 1.0e23) if (mod->BSIM3v32lngate > 1.0e23)
mod->BSIM3v32lngate *= 1.0e-6; mod->BSIM3v32lngate *= 1.0e-6;
break; break;
case BSIM3v32_MOD_LGAMMA1: case BSIM3v32_MOD_LGAMMA1:
mod->BSIM3v32lgamma1 = value->rValue; mod->BSIM3v32lgamma1 = value->rValue;
@ -595,35 +595,35 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod)
mod->BSIM3v32lw0 = value->rValue; mod->BSIM3v32lw0 = value->rValue;
mod->BSIM3v32lw0Given = TRUE; mod->BSIM3v32lw0Given = TRUE;
break; break;
case BSIM3v32_MOD_LDVT0: case BSIM3v32_MOD_LDVT0:
mod->BSIM3v32ldvt0 = value->rValue; mod->BSIM3v32ldvt0 = value->rValue;
mod->BSIM3v32ldvt0Given = TRUE; mod->BSIM3v32ldvt0Given = TRUE;
break; break;
case BSIM3v32_MOD_LDVT1: case BSIM3v32_MOD_LDVT1:
mod->BSIM3v32ldvt1 = value->rValue; mod->BSIM3v32ldvt1 = value->rValue;
mod->BSIM3v32ldvt1Given = TRUE; mod->BSIM3v32ldvt1Given = TRUE;
break; break;
case BSIM3v32_MOD_LDVT2: case BSIM3v32_MOD_LDVT2:
mod->BSIM3v32ldvt2 = value->rValue; mod->BSIM3v32ldvt2 = value->rValue;
mod->BSIM3v32ldvt2Given = TRUE; mod->BSIM3v32ldvt2Given = TRUE;
break; break;
case BSIM3v32_MOD_LDVT0W: case BSIM3v32_MOD_LDVT0W:
mod->BSIM3v32ldvt0w = value->rValue; mod->BSIM3v32ldvt0w = value->rValue;
mod->BSIM3v32ldvt0wGiven = TRUE; mod->BSIM3v32ldvt0wGiven = TRUE;
break; break;
case BSIM3v32_MOD_LDVT1W: case BSIM3v32_MOD_LDVT1W:
mod->BSIM3v32ldvt1w = value->rValue; mod->BSIM3v32ldvt1w = value->rValue;
mod->BSIM3v32ldvt1wGiven = TRUE; mod->BSIM3v32ldvt1wGiven = TRUE;
break; break;
case BSIM3v32_MOD_LDVT2W: case BSIM3v32_MOD_LDVT2W:
mod->BSIM3v32ldvt2w = value->rValue; mod->BSIM3v32ldvt2w = value->rValue;
mod->BSIM3v32ldvt2wGiven = TRUE; mod->BSIM3v32ldvt2wGiven = TRUE;
break; break;
case BSIM3v32_MOD_LDROUT: case BSIM3v32_MOD_LDROUT:
mod->BSIM3v32ldrout = value->rValue; mod->BSIM3v32ldrout = value->rValue;
mod->BSIM3v32ldroutGiven = TRUE; mod->BSIM3v32ldroutGiven = TRUE;
break; break;
case BSIM3v32_MOD_LDSUB: case BSIM3v32_MOD_LDSUB:
mod->BSIM3v32ldsub = value->rValue; mod->BSIM3v32ldsub = value->rValue;
mod->BSIM3v32ldsubGiven = TRUE; mod->BSIM3v32ldsubGiven = TRUE;
break; break;
@ -674,55 +674,55 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod)
case BSIM3v32_MOD_LRDSW: case BSIM3v32_MOD_LRDSW:
mod->BSIM3v32lrdsw = value->rValue; mod->BSIM3v32lrdsw = value->rValue;
mod->BSIM3v32lrdswGiven = TRUE; mod->BSIM3v32lrdswGiven = TRUE;
break; break;
case BSIM3v32_MOD_LPRWB: case BSIM3v32_MOD_LPRWB:
mod->BSIM3v32lprwb = value->rValue; mod->BSIM3v32lprwb = value->rValue;
mod->BSIM3v32lprwbGiven = TRUE; mod->BSIM3v32lprwbGiven = TRUE;
break; break;
case BSIM3v32_MOD_LPRWG: case BSIM3v32_MOD_LPRWG:
mod->BSIM3v32lprwg = value->rValue; mod->BSIM3v32lprwg = value->rValue;
mod->BSIM3v32lprwgGiven = TRUE; mod->BSIM3v32lprwgGiven = TRUE;
break; break;
case BSIM3v32_MOD_LPRT: case BSIM3v32_MOD_LPRT:
mod->BSIM3v32lprt = value->rValue; mod->BSIM3v32lprt = value->rValue;
mod->BSIM3v32lprtGiven = TRUE; mod->BSIM3v32lprtGiven = TRUE;
break; break;
case BSIM3v32_MOD_LETA0: case BSIM3v32_MOD_LETA0:
mod->BSIM3v32leta0 = value->rValue; mod->BSIM3v32leta0 = value->rValue;
mod->BSIM3v32leta0Given = TRUE; mod->BSIM3v32leta0Given = TRUE;
break; break;
case BSIM3v32_MOD_LETAB: case BSIM3v32_MOD_LETAB:
mod->BSIM3v32letab = value->rValue; mod->BSIM3v32letab = value->rValue;
mod->BSIM3v32letabGiven = TRUE; mod->BSIM3v32letabGiven = TRUE;
break; break;
case BSIM3v32_MOD_LPCLM: case BSIM3v32_MOD_LPCLM:
mod->BSIM3v32lpclm = value->rValue; mod->BSIM3v32lpclm = value->rValue;
mod->BSIM3v32lpclmGiven = TRUE; mod->BSIM3v32lpclmGiven = TRUE;
break; break;
case BSIM3v32_MOD_LPDIBL1: case BSIM3v32_MOD_LPDIBL1:
mod->BSIM3v32lpdibl1 = value->rValue; mod->BSIM3v32lpdibl1 = value->rValue;
mod->BSIM3v32lpdibl1Given = TRUE; mod->BSIM3v32lpdibl1Given = TRUE;
break; break;
case BSIM3v32_MOD_LPDIBL2: case BSIM3v32_MOD_LPDIBL2:
mod->BSIM3v32lpdibl2 = value->rValue; mod->BSIM3v32lpdibl2 = value->rValue;
mod->BSIM3v32lpdibl2Given = TRUE; mod->BSIM3v32lpdibl2Given = TRUE;
break; break;
case BSIM3v32_MOD_LPDIBLB: case BSIM3v32_MOD_LPDIBLB:
mod->BSIM3v32lpdiblb = value->rValue; mod->BSIM3v32lpdiblb = value->rValue;
mod->BSIM3v32lpdiblbGiven = TRUE; mod->BSIM3v32lpdiblbGiven = TRUE;
break; break;
case BSIM3v32_MOD_LPSCBE1: case BSIM3v32_MOD_LPSCBE1:
mod->BSIM3v32lpscbe1 = value->rValue; mod->BSIM3v32lpscbe1 = value->rValue;
mod->BSIM3v32lpscbe1Given = TRUE; mod->BSIM3v32lpscbe1Given = TRUE;
break; break;
case BSIM3v32_MOD_LPSCBE2: case BSIM3v32_MOD_LPSCBE2:
mod->BSIM3v32lpscbe2 = value->rValue; mod->BSIM3v32lpscbe2 = value->rValue;
mod->BSIM3v32lpscbe2Given = TRUE; mod->BSIM3v32lpscbe2Given = TRUE;
break; break;
case BSIM3v32_MOD_LPVAG: case BSIM3v32_MOD_LPVAG:
mod->BSIM3v32lpvag = value->rValue; mod->BSIM3v32lpvag = value->rValue;
mod->BSIM3v32lpvagGiven = TRUE; mod->BSIM3v32lpvagGiven = TRUE;
break; break;
case BSIM3v32_MOD_LWR : case BSIM3v32_MOD_LWR :
mod->BSIM3v32lwr = value->rValue; mod->BSIM3v32lwr = value->rValue;
mod->BSIM3v32lwrGiven = TRUE; mod->BSIM3v32lwrGiven = TRUE;
@ -809,13 +809,13 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod)
mod->BSIM3v32lvoffcvGiven = TRUE; mod->BSIM3v32lvoffcvGiven = TRUE;
break; break;
/* Width dependence */ /* Width dependence */
case BSIM3v32_MOD_WCDSC : case BSIM3v32_MOD_WCDSC :
mod->BSIM3v32wcdsc = value->rValue; mod->BSIM3v32wcdsc = value->rValue;
mod->BSIM3v32wcdscGiven = TRUE; mod->BSIM3v32wcdscGiven = TRUE;
break; break;
case BSIM3v32_MOD_WCDSCB : case BSIM3v32_MOD_WCDSCB :
mod->BSIM3v32wcdscb = value->rValue; mod->BSIM3v32wcdscb = value->rValue;
mod->BSIM3v32wcdscbGiven = TRUE; mod->BSIM3v32wcdscbGiven = TRUE;
@ -865,7 +865,7 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod)
case BSIM3v32_MOD_WKETA: case BSIM3v32_MOD_WKETA:
mod->BSIM3v32wketa = value->rValue; mod->BSIM3v32wketa = value->rValue;
mod->BSIM3v32wketaGiven = TRUE; mod->BSIM3v32wketaGiven = TRUE;
break; break;
case BSIM3v32_MOD_WNSUB: case BSIM3v32_MOD_WNSUB:
mod->BSIM3v32wnsub = value->rValue; mod->BSIM3v32wnsub = value->rValue;
mod->BSIM3v32wnsubGiven = TRUE; mod->BSIM3v32wnsubGiven = TRUE;
@ -873,14 +873,14 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod)
case BSIM3v32_MOD_WNPEAK: case BSIM3v32_MOD_WNPEAK:
mod->BSIM3v32wnpeak = value->rValue; mod->BSIM3v32wnpeak = value->rValue;
mod->BSIM3v32wnpeakGiven = TRUE; mod->BSIM3v32wnpeakGiven = TRUE;
if (mod->BSIM3v32wnpeak > 1.0e20) if (mod->BSIM3v32wnpeak > 1.0e20)
mod->BSIM3v32wnpeak *= 1.0e-6; mod->BSIM3v32wnpeak *= 1.0e-6;
break; break;
case BSIM3v32_MOD_WNGATE: case BSIM3v32_MOD_WNGATE:
mod->BSIM3v32wngate = value->rValue; mod->BSIM3v32wngate = value->rValue;
mod->BSIM3v32wngateGiven = TRUE; mod->BSIM3v32wngateGiven = TRUE;
if (mod->BSIM3v32wngate > 1.0e23) if (mod->BSIM3v32wngate > 1.0e23)
mod->BSIM3v32wngate *= 1.0e-6; mod->BSIM3v32wngate *= 1.0e-6;
break; break;
case BSIM3v32_MOD_WGAMMA1: case BSIM3v32_MOD_WGAMMA1:
mod->BSIM3v32wgamma1 = value->rValue; mod->BSIM3v32wgamma1 = value->rValue;
@ -938,35 +938,35 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod)
mod->BSIM3v32ww0 = value->rValue; mod->BSIM3v32ww0 = value->rValue;
mod->BSIM3v32ww0Given = TRUE; mod->BSIM3v32ww0Given = TRUE;
break; break;
case BSIM3v32_MOD_WDVT0: case BSIM3v32_MOD_WDVT0:
mod->BSIM3v32wdvt0 = value->rValue; mod->BSIM3v32wdvt0 = value->rValue;
mod->BSIM3v32wdvt0Given = TRUE; mod->BSIM3v32wdvt0Given = TRUE;
break; break;
case BSIM3v32_MOD_WDVT1: case BSIM3v32_MOD_WDVT1:
mod->BSIM3v32wdvt1 = value->rValue; mod->BSIM3v32wdvt1 = value->rValue;
mod->BSIM3v32wdvt1Given = TRUE; mod->BSIM3v32wdvt1Given = TRUE;
break; break;
case BSIM3v32_MOD_WDVT2: case BSIM3v32_MOD_WDVT2:
mod->BSIM3v32wdvt2 = value->rValue; mod->BSIM3v32wdvt2 = value->rValue;
mod->BSIM3v32wdvt2Given = TRUE; mod->BSIM3v32wdvt2Given = TRUE;
break; break;
case BSIM3v32_MOD_WDVT0W: case BSIM3v32_MOD_WDVT0W:
mod->BSIM3v32wdvt0w = value->rValue; mod->BSIM3v32wdvt0w = value->rValue;
mod->BSIM3v32wdvt0wGiven = TRUE; mod->BSIM3v32wdvt0wGiven = TRUE;
break; break;
case BSIM3v32_MOD_WDVT1W: case BSIM3v32_MOD_WDVT1W:
mod->BSIM3v32wdvt1w = value->rValue; mod->BSIM3v32wdvt1w = value->rValue;
mod->BSIM3v32wdvt1wGiven = TRUE; mod->BSIM3v32wdvt1wGiven = TRUE;
break; break;
case BSIM3v32_MOD_WDVT2W: case BSIM3v32_MOD_WDVT2W:
mod->BSIM3v32wdvt2w = value->rValue; mod->BSIM3v32wdvt2w = value->rValue;
mod->BSIM3v32wdvt2wGiven = TRUE; mod->BSIM3v32wdvt2wGiven = TRUE;
break; break;
case BSIM3v32_MOD_WDROUT: case BSIM3v32_MOD_WDROUT:
mod->BSIM3v32wdrout = value->rValue; mod->BSIM3v32wdrout = value->rValue;
mod->BSIM3v32wdroutGiven = TRUE; mod->BSIM3v32wdroutGiven = TRUE;
break; break;
case BSIM3v32_MOD_WDSUB: case BSIM3v32_MOD_WDSUB:
mod->BSIM3v32wdsub = value->rValue; mod->BSIM3v32wdsub = value->rValue;
mod->BSIM3v32wdsubGiven = TRUE; mod->BSIM3v32wdsubGiven = TRUE;
break; break;
@ -1017,55 +1017,55 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod)
case BSIM3v32_MOD_WRDSW: case BSIM3v32_MOD_WRDSW:
mod->BSIM3v32wrdsw = value->rValue; mod->BSIM3v32wrdsw = value->rValue;
mod->BSIM3v32wrdswGiven = TRUE; mod->BSIM3v32wrdswGiven = TRUE;
break; break;
case BSIM3v32_MOD_WPRWB: case BSIM3v32_MOD_WPRWB:
mod->BSIM3v32wprwb = value->rValue; mod->BSIM3v32wprwb = value->rValue;
mod->BSIM3v32wprwbGiven = TRUE; mod->BSIM3v32wprwbGiven = TRUE;
break; break;
case BSIM3v32_MOD_WPRWG: case BSIM3v32_MOD_WPRWG:
mod->BSIM3v32wprwg = value->rValue; mod->BSIM3v32wprwg = value->rValue;
mod->BSIM3v32wprwgGiven = TRUE; mod->BSIM3v32wprwgGiven = TRUE;
break; break;
case BSIM3v32_MOD_WPRT: case BSIM3v32_MOD_WPRT:
mod->BSIM3v32wprt = value->rValue; mod->BSIM3v32wprt = value->rValue;
mod->BSIM3v32wprtGiven = TRUE; mod->BSIM3v32wprtGiven = TRUE;
break; break;
case BSIM3v32_MOD_WETA0: case BSIM3v32_MOD_WETA0:
mod->BSIM3v32weta0 = value->rValue; mod->BSIM3v32weta0 = value->rValue;
mod->BSIM3v32weta0Given = TRUE; mod->BSIM3v32weta0Given = TRUE;
break; break;
case BSIM3v32_MOD_WETAB: case BSIM3v32_MOD_WETAB:
mod->BSIM3v32wetab = value->rValue; mod->BSIM3v32wetab = value->rValue;
mod->BSIM3v32wetabGiven = TRUE; mod->BSIM3v32wetabGiven = TRUE;
break; break;
case BSIM3v32_MOD_WPCLM: case BSIM3v32_MOD_WPCLM:
mod->BSIM3v32wpclm = value->rValue; mod->BSIM3v32wpclm = value->rValue;
mod->BSIM3v32wpclmGiven = TRUE; mod->BSIM3v32wpclmGiven = TRUE;
break; break;
case BSIM3v32_MOD_WPDIBL1: case BSIM3v32_MOD_WPDIBL1:
mod->BSIM3v32wpdibl1 = value->rValue; mod->BSIM3v32wpdibl1 = value->rValue;
mod->BSIM3v32wpdibl1Given = TRUE; mod->BSIM3v32wpdibl1Given = TRUE;
break; break;
case BSIM3v32_MOD_WPDIBL2: case BSIM3v32_MOD_WPDIBL2:
mod->BSIM3v32wpdibl2 = value->rValue; mod->BSIM3v32wpdibl2 = value->rValue;
mod->BSIM3v32wpdibl2Given = TRUE; mod->BSIM3v32wpdibl2Given = TRUE;
break; break;
case BSIM3v32_MOD_WPDIBLB: case BSIM3v32_MOD_WPDIBLB:
mod->BSIM3v32wpdiblb = value->rValue; mod->BSIM3v32wpdiblb = value->rValue;
mod->BSIM3v32wpdiblbGiven = TRUE; mod->BSIM3v32wpdiblbGiven = TRUE;
break; break;
case BSIM3v32_MOD_WPSCBE1: case BSIM3v32_MOD_WPSCBE1:
mod->BSIM3v32wpscbe1 = value->rValue; mod->BSIM3v32wpscbe1 = value->rValue;
mod->BSIM3v32wpscbe1Given = TRUE; mod->BSIM3v32wpscbe1Given = TRUE;
break; break;
case BSIM3v32_MOD_WPSCBE2: case BSIM3v32_MOD_WPSCBE2:
mod->BSIM3v32wpscbe2 = value->rValue; mod->BSIM3v32wpscbe2 = value->rValue;
mod->BSIM3v32wpscbe2Given = TRUE; mod->BSIM3v32wpscbe2Given = TRUE;
break; break;
case BSIM3v32_MOD_WPVAG: case BSIM3v32_MOD_WPVAG:
mod->BSIM3v32wpvag = value->rValue; mod->BSIM3v32wpvag = value->rValue;
mod->BSIM3v32wpvagGiven = TRUE; mod->BSIM3v32wpvagGiven = TRUE;
break; break;
case BSIM3v32_MOD_WWR : case BSIM3v32_MOD_WWR :
mod->BSIM3v32wwr = value->rValue; mod->BSIM3v32wwr = value->rValue;
mod->BSIM3v32wwrGiven = TRUE; mod->BSIM3v32wwrGiven = TRUE;
@ -1152,7 +1152,7 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod)
mod->BSIM3v32wvoffcvGiven = TRUE; mod->BSIM3v32wvoffcvGiven = TRUE;
break; break;
/* Cross-term dependence */ /* Cross-term dependence */
case BSIM3v32_MOD_PCDSC : case BSIM3v32_MOD_PCDSC :
mod->BSIM3v32pcdsc = value->rValue; mod->BSIM3v32pcdsc = value->rValue;
mod->BSIM3v32pcdscGiven = TRUE; mod->BSIM3v32pcdscGiven = TRUE;
@ -1208,7 +1208,7 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod)
case BSIM3v32_MOD_PKETA: case BSIM3v32_MOD_PKETA:
mod->BSIM3v32pketa = value->rValue; mod->BSIM3v32pketa = value->rValue;
mod->BSIM3v32pketaGiven = TRUE; mod->BSIM3v32pketaGiven = TRUE;
break; break;
case BSIM3v32_MOD_PNSUB: case BSIM3v32_MOD_PNSUB:
mod->BSIM3v32pnsub = value->rValue; mod->BSIM3v32pnsub = value->rValue;
mod->BSIM3v32pnsubGiven = TRUE; mod->BSIM3v32pnsubGiven = TRUE;
@ -1216,14 +1216,14 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod)
case BSIM3v32_MOD_PNPEAK: case BSIM3v32_MOD_PNPEAK:
mod->BSIM3v32pnpeak = value->rValue; mod->BSIM3v32pnpeak = value->rValue;
mod->BSIM3v32pnpeakGiven = TRUE; mod->BSIM3v32pnpeakGiven = TRUE;
if (mod->BSIM3v32pnpeak > 1.0e20) if (mod->BSIM3v32pnpeak > 1.0e20)
mod->BSIM3v32pnpeak *= 1.0e-6; mod->BSIM3v32pnpeak *= 1.0e-6;
break; break;
case BSIM3v32_MOD_PNGATE: case BSIM3v32_MOD_PNGATE:
mod->BSIM3v32pngate = value->rValue; mod->BSIM3v32pngate = value->rValue;
mod->BSIM3v32pngateGiven = TRUE; mod->BSIM3v32pngateGiven = TRUE;
if (mod->BSIM3v32pngate > 1.0e23) if (mod->BSIM3v32pngate > 1.0e23)
mod->BSIM3v32pngate *= 1.0e-6; mod->BSIM3v32pngate *= 1.0e-6;
break; break;
case BSIM3v32_MOD_PGAMMA1: case BSIM3v32_MOD_PGAMMA1:
mod->BSIM3v32pgamma1 = value->rValue; mod->BSIM3v32pgamma1 = value->rValue;
@ -1281,35 +1281,35 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod)
mod->BSIM3v32pw0 = value->rValue; mod->BSIM3v32pw0 = value->rValue;
mod->BSIM3v32pw0Given = TRUE; mod->BSIM3v32pw0Given = TRUE;
break; break;
case BSIM3v32_MOD_PDVT0: case BSIM3v32_MOD_PDVT0:
mod->BSIM3v32pdvt0 = value->rValue; mod->BSIM3v32pdvt0 = value->rValue;
mod->BSIM3v32pdvt0Given = TRUE; mod->BSIM3v32pdvt0Given = TRUE;
break; break;
case BSIM3v32_MOD_PDVT1: case BSIM3v32_MOD_PDVT1:
mod->BSIM3v32pdvt1 = value->rValue; mod->BSIM3v32pdvt1 = value->rValue;
mod->BSIM3v32pdvt1Given = TRUE; mod->BSIM3v32pdvt1Given = TRUE;
break; break;
case BSIM3v32_MOD_PDVT2: case BSIM3v32_MOD_PDVT2:
mod->BSIM3v32pdvt2 = value->rValue; mod->BSIM3v32pdvt2 = value->rValue;
mod->BSIM3v32pdvt2Given = TRUE; mod->BSIM3v32pdvt2Given = TRUE;
break; break;
case BSIM3v32_MOD_PDVT0W: case BSIM3v32_MOD_PDVT0W:
mod->BSIM3v32pdvt0w = value->rValue; mod->BSIM3v32pdvt0w = value->rValue;
mod->BSIM3v32pdvt0wGiven = TRUE; mod->BSIM3v32pdvt0wGiven = TRUE;
break; break;
case BSIM3v32_MOD_PDVT1W: case BSIM3v32_MOD_PDVT1W:
mod->BSIM3v32pdvt1w = value->rValue; mod->BSIM3v32pdvt1w = value->rValue;
mod->BSIM3v32pdvt1wGiven = TRUE; mod->BSIM3v32pdvt1wGiven = TRUE;
break; break;
case BSIM3v32_MOD_PDVT2W: case BSIM3v32_MOD_PDVT2W:
mod->BSIM3v32pdvt2w = value->rValue; mod->BSIM3v32pdvt2w = value->rValue;
mod->BSIM3v32pdvt2wGiven = TRUE; mod->BSIM3v32pdvt2wGiven = TRUE;
break; break;
case BSIM3v32_MOD_PDROUT: case BSIM3v32_MOD_PDROUT:
mod->BSIM3v32pdrout = value->rValue; mod->BSIM3v32pdrout = value->rValue;
mod->BSIM3v32pdroutGiven = TRUE; mod->BSIM3v32pdroutGiven = TRUE;
break; break;
case BSIM3v32_MOD_PDSUB: case BSIM3v32_MOD_PDSUB:
mod->BSIM3v32pdsub = value->rValue; mod->BSIM3v32pdsub = value->rValue;
mod->BSIM3v32pdsubGiven = TRUE; mod->BSIM3v32pdsubGiven = TRUE;
break; break;
@ -1360,55 +1360,55 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod)
case BSIM3v32_MOD_PRDSW: case BSIM3v32_MOD_PRDSW:
mod->BSIM3v32prdsw = value->rValue; mod->BSIM3v32prdsw = value->rValue;
mod->BSIM3v32prdswGiven = TRUE; mod->BSIM3v32prdswGiven = TRUE;
break; break;
case BSIM3v32_MOD_PPRWB: case BSIM3v32_MOD_PPRWB:
mod->BSIM3v32pprwb = value->rValue; mod->BSIM3v32pprwb = value->rValue;
mod->BSIM3v32pprwbGiven = TRUE; mod->BSIM3v32pprwbGiven = TRUE;
break; break;
case BSIM3v32_MOD_PPRWG: case BSIM3v32_MOD_PPRWG:
mod->BSIM3v32pprwg = value->rValue; mod->BSIM3v32pprwg = value->rValue;
mod->BSIM3v32pprwgGiven = TRUE; mod->BSIM3v32pprwgGiven = TRUE;
break; break;
case BSIM3v32_MOD_PPRT: case BSIM3v32_MOD_PPRT:
mod->BSIM3v32pprt = value->rValue; mod->BSIM3v32pprt = value->rValue;
mod->BSIM3v32pprtGiven = TRUE; mod->BSIM3v32pprtGiven = TRUE;
break; break;
case BSIM3v32_MOD_PETA0: case BSIM3v32_MOD_PETA0:
mod->BSIM3v32peta0 = value->rValue; mod->BSIM3v32peta0 = value->rValue;
mod->BSIM3v32peta0Given = TRUE; mod->BSIM3v32peta0Given = TRUE;
break; break;
case BSIM3v32_MOD_PETAB: case BSIM3v32_MOD_PETAB:
mod->BSIM3v32petab = value->rValue; mod->BSIM3v32petab = value->rValue;
mod->BSIM3v32petabGiven = TRUE; mod->BSIM3v32petabGiven = TRUE;
break; break;
case BSIM3v32_MOD_PPCLM: case BSIM3v32_MOD_PPCLM:
mod->BSIM3v32ppclm = value->rValue; mod->BSIM3v32ppclm = value->rValue;
mod->BSIM3v32ppclmGiven = TRUE; mod->BSIM3v32ppclmGiven = TRUE;
break; break;
case BSIM3v32_MOD_PPDIBL1: case BSIM3v32_MOD_PPDIBL1:
mod->BSIM3v32ppdibl1 = value->rValue; mod->BSIM3v32ppdibl1 = value->rValue;
mod->BSIM3v32ppdibl1Given = TRUE; mod->BSIM3v32ppdibl1Given = TRUE;
break; break;
case BSIM3v32_MOD_PPDIBL2: case BSIM3v32_MOD_PPDIBL2:
mod->BSIM3v32ppdibl2 = value->rValue; mod->BSIM3v32ppdibl2 = value->rValue;
mod->BSIM3v32ppdibl2Given = TRUE; mod->BSIM3v32ppdibl2Given = TRUE;
break; break;
case BSIM3v32_MOD_PPDIBLB: case BSIM3v32_MOD_PPDIBLB:
mod->BSIM3v32ppdiblb = value->rValue; mod->BSIM3v32ppdiblb = value->rValue;
mod->BSIM3v32ppdiblbGiven = TRUE; mod->BSIM3v32ppdiblbGiven = TRUE;
break; break;
case BSIM3v32_MOD_PPSCBE1: case BSIM3v32_MOD_PPSCBE1:
mod->BSIM3v32ppscbe1 = value->rValue; mod->BSIM3v32ppscbe1 = value->rValue;
mod->BSIM3v32ppscbe1Given = TRUE; mod->BSIM3v32ppscbe1Given = TRUE;
break; break;
case BSIM3v32_MOD_PPSCBE2: case BSIM3v32_MOD_PPSCBE2:
mod->BSIM3v32ppscbe2 = value->rValue; mod->BSIM3v32ppscbe2 = value->rValue;
mod->BSIM3v32ppscbe2Given = TRUE; mod->BSIM3v32ppscbe2Given = TRUE;
break; break;
case BSIM3v32_MOD_PPVAG: case BSIM3v32_MOD_PPVAG:
mod->BSIM3v32ppvag = value->rValue; mod->BSIM3v32ppvag = value->rValue;
mod->BSIM3v32ppvagGiven = TRUE; mod->BSIM3v32ppvagGiven = TRUE;
break; break;
case BSIM3v32_MOD_PWR : case BSIM3v32_MOD_PWR :
mod->BSIM3v32pwr = value->rValue; mod->BSIM3v32pwr = value->rValue;
mod->BSIM3v32pwrGiven = TRUE; mod->BSIM3v32pwrGiven = TRUE;

542
src/spicelib/devices/bsim3v32/b3v32noi.c
View File

@ -45,7 +45,7 @@
*/ */
/* /*
* The StrongInversionNoiseEval function has been modified in * The StrongInversionNoiseEval function has been modified in
* the release 3.2.4 of BSIM3v32 model. To accomodate both the old * the release 3.2.4 of BSIM3v32 model. To accomodate both the old
* and the new code, I have renamed according to the following: * and the new code, I have renamed according to the following:
@ -63,7 +63,7 @@
static double static double
StrongInversionNoiseEvalNew(double Vds, BSIM3v32model *model, StrongInversionNoiseEvalNew(double Vds, BSIM3v32model *model,
BSIM3v32instance *here, double freq, double temp) BSIM3v32instance *here, double freq, double temp)
{ {
struct bsim3v32SizeDependParam *pParam; struct bsim3v32SizeDependParam *pParam;
double cd, esat, DelClm, EffFreq, N0, Nl; double cd, esat, DelClm, EffFreq, N0, Nl;
@ -72,10 +72,10 @@ double T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, Ssi;
pParam = here->pParam; pParam = here->pParam;
cd = fabs(here->BSIM3v32cd); cd = fabs(here->BSIM3v32cd);
esat = 2.0 * pParam->BSIM3v32vsattemp / here->BSIM3v32ueff; esat = 2.0 * pParam->BSIM3v32vsattemp / here->BSIM3v32ueff;
if(model->BSIM3v32em<=0.0) DelClm = 0.0; if(model->BSIM3v32em<=0.0) DelClm = 0.0;
else { else {
T0 = ((((Vds - here->BSIM3v32Vdseff) / pParam->BSIM3v32litl) T0 = ((((Vds - here->BSIM3v32Vdseff) / pParam->BSIM3v32litl)
+ model->BSIM3v32em) / esat); + model->BSIM3v32em) / esat);
DelClm = pParam->BSIM3v32litl * log (MAX(T0, N_MINLOG)); DelClm = pParam->BSIM3v32litl * log (MAX(T0, N_MINLOG));
} }
EffFreq = pow(freq, model->BSIM3v32ef); EffFreq = pow(freq, model->BSIM3v32ef);
@ -84,7 +84,7 @@ double T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, Ssi;
* pParam->BSIM3v32leff * pParam->BSIM3v32leff; * pParam->BSIM3v32leff * pParam->BSIM3v32leff;
N0 = model->BSIM3v32cox * here->BSIM3v32Vgsteff / CHARGE; N0 = model->BSIM3v32cox * here->BSIM3v32Vgsteff / CHARGE;
Nl = model->BSIM3v32cox * here->BSIM3v32Vgsteff Nl = model->BSIM3v32cox * here->BSIM3v32Vgsteff
* (1.0 - here->BSIM3v32AbovVgst2Vtm * here->BSIM3v32Vdseff) / CHARGE; * (1.0 - here->BSIM3v32AbovVgst2Vtm * here->BSIM3v32Vdseff) / CHARGE;
T3 = model->BSIM3v32oxideTrapDensityA T3 = model->BSIM3v32oxideTrapDensityA
* log(MAX(((N0 + 2.0e14) / (Nl + 2.0e14)), N_MINLOG)); * log(MAX(((N0 + 2.0e14) / (Nl + 2.0e14)), N_MINLOG));
@ -109,7 +109,7 @@ double T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, Ssi;
static double static double
StrongInversionNoiseEvalOld(double vgs, double vds, BSIM3v32model *model, StrongInversionNoiseEvalOld(double vgs, double vds, BSIM3v32model *model,
BSIM3v32instance *here, double freq, double temp) BSIM3v32instance *here, double freq, double temp)
{ {
struct bsim3v32SizeDependParam *pParam; struct bsim3v32SizeDependParam *pParam;
double cd, esat, DelClm, EffFreq, N0, Nl, Vgst; double cd, esat, DelClm, EffFreq, N0, Nl, Vgst;
@ -124,7 +124,7 @@ StrongInversionNoiseEvalOld(double vgs, double vds, BSIM3v32model *model,
{ {
esat = 2.0 * pParam->BSIM3v32vsattemp / here->BSIM3v32ueff; esat = 2.0 * pParam->BSIM3v32vsattemp / here->BSIM3v32ueff;
T0 = ((((vds - here->BSIM3v32vdsat) / pParam->BSIM3v32litl) + T0 = ((((vds - here->BSIM3v32vdsat) / pParam->BSIM3v32litl) +
model->BSIM3v32em) / esat); model->BSIM3v32em) / esat);
DelClm = pParam->BSIM3v32litl * log (MAX (T0, N_MINLOG)); DelClm = pParam->BSIM3v32litl * log (MAX (T0, N_MINLOG));
} }
else else
@ -132,13 +132,13 @@ StrongInversionNoiseEvalOld(double vgs, double vds, BSIM3v32model *model,
} }
else else
{ {
if (model->BSIM3v32em <= 0.0) /* flicker noise modified -JX */ if (model->BSIM3v32em <= 0.0) /* flicker noise modified -JX */
DelClm = 0.0; DelClm = 0.0;
else if (vds > here->BSIM3v32vdsat) else if (vds > here->BSIM3v32vdsat)
{ {
esat = 2.0 * pParam->BSIM3v32vsattemp / here->BSIM3v32ueff; esat = 2.0 * pParam->BSIM3v32vsattemp / here->BSIM3v32ueff;
T0 = ((((vds - here->BSIM3v32vdsat) / pParam->BSIM3v32litl) + T0 = ((((vds - here->BSIM3v32vdsat) / pParam->BSIM3v32litl) +
model->BSIM3v32em) / esat); model->BSIM3v32em) / esat);
DelClm = pParam->BSIM3v32litl * log (MAX (T0, N_MINLOG)); DelClm = pParam->BSIM3v32litl * log (MAX (T0, N_MINLOG));
} }
else else
@ -176,7 +176,7 @@ StrongInversionNoiseEvalOld(double vgs, double vds, BSIM3v32model *model,
int int
BSIM3v32noise (int mode, int operation, GENmodel *inModel, CKTcircuit *ckt, BSIM3v32noise (int mode, int operation, GENmodel *inModel, CKTcircuit *ckt,
Ndata *data, double *OnDens) Ndata *data, double *OnDens)
{ {
NOISEAN *job = (NOISEAN *) ckt->CKTcurJob; NOISEAN *job = (NOISEAN *) ckt->CKTcurJob;
@ -200,292 +200,292 @@ int i;
/* define the names of the noise sources */ /* define the names of the noise sources */
static char *BSIM3v32nNames[BSIM3v32NSRCS] = static char *BSIM3v32nNames[BSIM3v32NSRCS] =
{ /* Note that we have to keep the order */ { /* Note that we have to keep the order */
".rd", /* noise due to rd */ ".rd", /* noise due to rd */
/* consistent with the index definitions */ /* consistent with the index definitions */
".rs", /* noise due to rs */ ".rs", /* noise due to rs */
/* in BSIM3v32defs.h */ /* in BSIM3v32defs.h */
".id", /* noise due to id */ ".id", /* noise due to id */
".1overf", /* flicker (1/f) noise */ ".1overf", /* flicker (1/f) noise */
"" /* total transistor noise */ "" /* total transistor noise */
}; };
for (; model != NULL; model = model->BSIM3v32nextModel) for (; model != NULL; model = model->BSIM3v32nextModel)
{ for (here = model->BSIM3v32instances; here != NULL; { for (here = model->BSIM3v32instances; here != NULL;
here = here->BSIM3v32nextInstance) here = here->BSIM3v32nextInstance)
{ pParam = here->pParam; { pParam = here->pParam;
switch (operation) switch (operation)
{ case N_OPEN: { case N_OPEN:
/* see if we have to to produce a summary report */ /* see if we have to to produce a summary report */
/* if so, name all the noise generators */ /* if so, name all the noise generators */
if (job->NStpsSm != 0) if (job->NStpsSm != 0)
{ switch (mode) { switch (mode)
{ case N_DENS: { case N_DENS:
for (i = 0; i < BSIM3v32NSRCS; i++) for (i = 0; i < BSIM3v32NSRCS; i++)
{ (void) sprintf(name, "onoise.%s%s", { (void) sprintf(name, "onoise.%s%s",
here->BSIM3v32name, here->BSIM3v32name,
BSIM3v32nNames[i]); BSIM3v32nNames[i]);
data->namelist = TREALLOC(IFuid, data->namelist, data->numPlots + 1); data->namelist = TREALLOC(IFuid, data->namelist, data->numPlots + 1);
if (!data->namelist) if (!data->namelist)
return(E_NOMEM); return(E_NOMEM);
SPfrontEnd->IFnewUid (ckt, SPfrontEnd->IFnewUid (ckt,
&(data->namelist[data->numPlots++]), &(data->namelist[data->numPlots++]),
NULL, name, UID_OTHER, NULL, name, UID_OTHER,
NULL); NULL);
/* we've added one more plot */ /* we've added one more plot */
} }
break; break;
case INT_NOIZ: case INT_NOIZ:
for (i = 0; i < BSIM3v32NSRCS; i++) for (i = 0; i < BSIM3v32NSRCS; i++)
{ (void) sprintf(name, "onoise_total.%s%s", { (void) sprintf(name, "onoise_total.%s%s",
here->BSIM3v32name, here->BSIM3v32name,
BSIM3v32nNames[i]); BSIM3v32nNames[i]);
data->namelist = TREALLOC(IFuid, data->namelist, data->numPlots + 1); data->namelist = TREALLOC(IFuid, data->namelist, data->numPlots + 1);
if (!data->namelist) if (!data->namelist)
return(E_NOMEM); return(E_NOMEM);
SPfrontEnd->IFnewUid (ckt, SPfrontEnd->IFnewUid (ckt,
&(data->namelist[data->numPlots++]), &(data->namelist[data->numPlots++]),
NULL, name, UID_OTHER, NULL, name, UID_OTHER,
NULL); NULL);
/* we've added one more plot */ /* we've added one more plot */
(void) sprintf(name, "inoise_total.%s%s", (void) sprintf(name, "inoise_total.%s%s",
here->BSIM3v32name, here->BSIM3v32name,
BSIM3v32nNames[i]); BSIM3v32nNames[i]);
data->namelist = TREALLOC(IFuid, data->namelist, data->numPlots + 1); data->namelist = TREALLOC(IFuid, data->namelist, data->numPlots + 1);
if (!data->namelist) if (!data->namelist)
return(E_NOMEM); return(E_NOMEM);
SPfrontEnd->IFnewUid (ckt, SPfrontEnd->IFnewUid (ckt,
&(data->namelist[data->numPlots++]), &(data->namelist[data->numPlots++]),
NULL, name, UID_OTHER, NULL, name, UID_OTHER,
NULL); NULL);
/* we've added one more plot */ /* we've added one more plot */
} }
break; break;
} }
} }
break; break;
case N_CALC: case N_CALC:
m = here->BSIM3v32m; m = here->BSIM3v32m;
switch (mode) switch (mode)
{ case N_DENS: { case N_DENS:
NevalSrc(&noizDens[BSIM3v32RDNOIZ], NevalSrc(&noizDens[BSIM3v32RDNOIZ],
&lnNdens[BSIM3v32RDNOIZ], ckt, THERMNOISE, &lnNdens[BSIM3v32RDNOIZ], ckt, THERMNOISE,
here->BSIM3v32dNodePrime, here->BSIM3v32dNode, here->BSIM3v32dNodePrime, here->BSIM3v32dNode,
here->BSIM3v32drainConductance * m); here->BSIM3v32drainConductance * m);
NevalSrc(&noizDens[BSIM3v32RSNOIZ], NevalSrc(&noizDens[BSIM3v32RSNOIZ],
&lnNdens[BSIM3v32RSNOIZ], ckt, THERMNOISE, &lnNdens[BSIM3v32RSNOIZ], ckt, THERMNOISE,
here->BSIM3v32sNodePrime, here->BSIM3v32sNode, here->BSIM3v32sNodePrime, here->BSIM3v32sNode,
here->BSIM3v32sourceConductance * m); here->BSIM3v32sourceConductance * m);
switch( model->BSIM3v32noiMod ) switch( model->BSIM3v32noiMod )
{ case 1: { case 1:
case 3: case 3:
NevalSrc(&noizDens[BSIM3v32IDNOIZ], NevalSrc(&noizDens[BSIM3v32IDNOIZ],
&lnNdens[BSIM3v32IDNOIZ], ckt, &lnNdens[BSIM3v32IDNOIZ], ckt,
THERMNOISE, here->BSIM3v32dNodePrime, THERMNOISE, here->BSIM3v32dNodePrime,
here->BSIM3v32sNodePrime, here->BSIM3v32sNodePrime,
(2.0 / 3.0 * fabs(here->BSIM3v32gm (2.0 / 3.0 * fabs(here->BSIM3v32gm
+ here->BSIM3v32gds + here->BSIM3v32gds
+ here->BSIM3v32gmbs)) * m); + here->BSIM3v32gmbs)) * m);
break; break;
case 2: case 2:
case 4: case 4:
/* Added revision dependent code */ /* Added revision dependent code */
if (model->BSIM3v32intVersion == BSIM3v32V324) if (model->BSIM3v32intVersion == BSIM3v32V324)
{ {
NevalSrc(&noizDens[BSIM3v32IDNOIZ], NevalSrc(&noizDens[BSIM3v32IDNOIZ],
&lnNdens[BSIM3v32IDNOIZ], ckt, &lnNdens[BSIM3v32IDNOIZ], ckt,
THERMNOISE, here->BSIM3v32dNodePrime, THERMNOISE, here->BSIM3v32dNodePrime,
here->BSIM3v32sNodePrime, here->BSIM3v32sNodePrime,
(m * here->BSIM3v32ueff (m * here->BSIM3v32ueff
* fabs(here->BSIM3v32qinv) * fabs(here->BSIM3v32qinv)
/ (pParam->BSIM3v32leff * pParam->BSIM3v32leff / (pParam->BSIM3v32leff * pParam->BSIM3v32leff
+ here->BSIM3v32ueff * fabs(here->BSIM3v32qinv) + here->BSIM3v32ueff * fabs(here->BSIM3v32qinv)
* here->BSIM3v32rds))); /* bugfix */ * here->BSIM3v32rds))); /* bugfix */
} }
else else
{ /* for all versions lower then 3.2.4 */ { /* for all versions lower then 3.2.4 */
NevalSrc(&noizDens[BSIM3v32IDNOIZ], NevalSrc(&noizDens[BSIM3v32IDNOIZ],
&lnNdens[BSIM3v32IDNOIZ], ckt, &lnNdens[BSIM3v32IDNOIZ], ckt,
THERMNOISE, here->BSIM3v32dNodePrime, THERMNOISE, here->BSIM3v32dNodePrime,
here->BSIM3v32sNodePrime, here->BSIM3v32sNodePrime,
(m * here->BSIM3v32ueff (m * here->BSIM3v32ueff
* fabs(here->BSIM3v32qinv * fabs(here->BSIM3v32qinv
/ (pParam->BSIM3v32leff / (pParam->BSIM3v32leff
* pParam->BSIM3v32leff)))); * pParam->BSIM3v32leff))));
} }
break; break;
} }
NevalSrc(&noizDens[BSIM3v32FLNOIZ], NULL, NevalSrc(&noizDens[BSIM3v32FLNOIZ], NULL,
ckt, N_GAIN, here->BSIM3v32dNodePrime, ckt, N_GAIN, here->BSIM3v32dNodePrime,
here->BSIM3v32sNodePrime, (double) 0.0); here->BSIM3v32sNodePrime, (double) 0.0);
switch( model->BSIM3v32noiMod ) switch( model->BSIM3v32noiMod )
{ case 1: { case 1:
case 4: case 4:
noizDens[BSIM3v32FLNOIZ] *= m * model->BSIM3v32kf noizDens[BSIM3v32FLNOIZ] *= m * model->BSIM3v32kf
* exp(model->BSIM3v32af * exp(model->BSIM3v32af
* log(MAX(fabs(here->BSIM3v32cd), * log(MAX(fabs(here->BSIM3v32cd),
N_MINLOG))) N_MINLOG)))
/ (pow(data->freq, model->BSIM3v32ef) / (pow(data->freq, model->BSIM3v32ef)
* pParam->BSIM3v32leff * pParam->BSIM3v32leff
* pParam->BSIM3v32leff * pParam->BSIM3v32leff
* model->BSIM3v32cox); * model->BSIM3v32cox);
break; break;
case 2: case 2:
case 3: case 3:
vgs = *(ckt->CKTstates[0] + here->BSIM3v32vgs); vgs = *(ckt->CKTstates[0] + here->BSIM3v32vgs);
vds = *(ckt->CKTstates[0] + here->BSIM3v32vds); vds = *(ckt->CKTstates[0] + here->BSIM3v32vds);
if (vds < 0.0) if (vds < 0.0)
{ vds = -vds; { vds = -vds;
vgs = vgs + vds; vgs = vgs + vds;
} }
/* Added revision dependent code */ /* Added revision dependent code */
if (model->BSIM3v32intVersion == BSIM3v32V324) if (model->BSIM3v32intVersion == BSIM3v32V324)
{ {
Ssi = StrongInversionNoiseEvalNew(vds, model, Ssi = StrongInversionNoiseEvalNew(vds, model,
here, data->freq, ckt->CKTtemp); here, data->freq, ckt->CKTtemp);
T10 = model->BSIM3v32oxideTrapDensityA T10 = model->BSIM3v32oxideTrapDensityA
* 8.62e-5 * ckt->CKTtemp; * 8.62e-5 * ckt->CKTtemp;
T11 = pParam->BSIM3v32weff T11 = pParam->BSIM3v32weff
* pParam->BSIM3v32leff * pParam->BSIM3v32leff
* pow(data->freq, model->BSIM3v32ef) * pow(data->freq, model->BSIM3v32ef)
* 4.0e36; * 4.0e36;
Swi = T10 / T11 * here->BSIM3v32cd Swi = T10 / T11 * here->BSIM3v32cd
* here->BSIM3v32cd; * here->BSIM3v32cd;
T1 = Swi + Ssi; T1 = Swi + Ssi;
if (T1 > 0.0) if (T1 > 0.0)
noizDens[BSIM3v32FLNOIZ] *= m * (Ssi * Swi) / T1; noizDens[BSIM3v32FLNOIZ] *= m * (Ssi * Swi) / T1;
else else
noizDens[BSIM3v32FLNOIZ] *= 0.0; noizDens[BSIM3v32FLNOIZ] *= 0.0;
} }
else else
{ /* for all versions lower then 3.2.4 */ { /* for all versions lower then 3.2.4 */
if (vgs >= here->BSIM3v32von + 0.1) if (vgs >= here->BSIM3v32von + 0.1)
{ {
Ssi = StrongInversionNoiseEvalOld(vgs, vds, model, Ssi = StrongInversionNoiseEvalOld(vgs, vds, model,
here, data->freq, ckt->CKTtemp); here, data->freq, ckt->CKTtemp);
noizDens[BSIM3v32FLNOIZ] *= m * Ssi; noizDens[BSIM3v32FLNOIZ] *= m * Ssi;
} }
else else
{ {
pParam = here->pParam; pParam = here->pParam;
T10 = model->BSIM3v32oxideTrapDensityA T10 = model->BSIM3v32oxideTrapDensityA
* 8.62e-5 * ckt->CKTtemp; * 8.62e-5 * ckt->CKTtemp;
T11 = pParam->BSIM3v32weff T11 = pParam->BSIM3v32weff
* pParam-> BSIM3v32leff * pParam-> BSIM3v32leff
* pow (data->freq, model->BSIM3v32ef) * pow (data->freq, model->BSIM3v32ef)
* 4.0e36; * 4.0e36;
Swi = T10 / T11 * here->BSIM3v32cd * here->BSIM3v32cd; Swi = T10 / T11 * here->BSIM3v32cd * here->BSIM3v32cd;
Slimit = StrongInversionNoiseEvalOld( Slimit = StrongInversionNoiseEvalOld(
here->BSIM3v32von + 0.1, vds, model, here->BSIM3v32von + 0.1, vds, model,
here, data->freq, ckt->CKTtemp); here, data->freq, ckt->CKTtemp);
T1 = Swi + Slimit; T1 = Swi + Slimit;
if (T1 > 0.0) if (T1 > 0.0)
noizDens[BSIM3v32FLNOIZ] *= m * (Slimit * Swi) / T1; noizDens[BSIM3v32FLNOIZ] *= m * (Slimit * Swi) / T1;
else else
noizDens[BSIM3v32FLNOIZ] *= 0.0; noizDens[BSIM3v32FLNOIZ] *= 0.0;
} }
} }
break; break;
} }
lnNdens[BSIM3v32FLNOIZ] =
log(MAX(noizDens[BSIM3v32FLNOIZ], N_MINLOG));
noizDens[BSIM3v32TOTNOIZ] = noizDens[BSIM3v32RDNOIZ]
+ noizDens[BSIM3v32RSNOIZ]
+ noizDens[BSIM3v32IDNOIZ]
+ noizDens[BSIM3v32FLNOIZ];
lnNdens[BSIM3v32TOTNOIZ] =
log(MAX(noizDens[BSIM3v32TOTNOIZ], N_MINLOG));
*OnDens += noizDens[BSIM3v32TOTNOIZ]; lnNdens[BSIM3v32FLNOIZ] =
log(MAX(noizDens[BSIM3v32FLNOIZ], N_MINLOG));
if (data->delFreq == 0.0) noizDens[BSIM3v32TOTNOIZ] = noizDens[BSIM3v32RDNOIZ]
{ /* if we haven't done any previous + noizDens[BSIM3v32RSNOIZ]
integration, we need to initialize our + noizDens[BSIM3v32IDNOIZ]
"history" variables. + noizDens[BSIM3v32FLNOIZ];
*/ lnNdens[BSIM3v32TOTNOIZ] =
log(MAX(noizDens[BSIM3v32TOTNOIZ], N_MINLOG));
for (i = 0; i < BSIM3v32NSRCS; i++) *OnDens += noizDens[BSIM3v32TOTNOIZ];
{ here->BSIM3v32nVar[LNLSTDENS][i] =
lnNdens[i];
}
/* clear out our integration variables if (data->delFreq == 0.0)
if it's the first pass { /* if we haven't done any previous
*/ integration, we need to initialize our
if (data->freq == "history" variables.
job->NstartFreq) */
{ for (i = 0; i < BSIM3v32NSRCS; i++)
{ here->BSIM3v32nVar[OUTNOIZ][i] = 0.0; for (i = 0; i < BSIM3v32NSRCS; i++)
here->BSIM3v32nVar[INNOIZ][i] = 0.0; { here->BSIM3v32nVar[LNLSTDENS][i] =
} lnNdens[i];
} }
}
else /* clear out our integration variables
{ /* data->delFreq != 0.0, if it's the first pass
we have to integrate. */
*/ if (data->freq ==
for (i = 0; i < BSIM3v32NSRCS; i++) job->NstartFreq)
{ if (i != BSIM3v32TOTNOIZ) { for (i = 0; i < BSIM3v32NSRCS; i++)
{ tempOnoise = Nintegrate(noizDens[i], { here->BSIM3v32nVar[OUTNOIZ][i] = 0.0;
lnNdens[i], here->BSIM3v32nVar[INNOIZ][i] = 0.0;
here->BSIM3v32nVar[LNLSTDENS][i], }
data); }
tempInoise = Nintegrate(noizDens[i] }
* data->GainSqInv, lnNdens[i] else
+ data->lnGainInv, { /* data->delFreq != 0.0,
here->BSIM3v32nVar[LNLSTDENS][i] we have to integrate.
+ data->lnGainInv, data); */
here->BSIM3v32nVar[LNLSTDENS][i] = for (i = 0; i < BSIM3v32NSRCS; i++)
lnNdens[i]; { if (i != BSIM3v32TOTNOIZ)
data->outNoiz += tempOnoise; { tempOnoise = Nintegrate(noizDens[i],
data->inNoise += tempInoise; lnNdens[i],
if (job->NStpsSm != 0) here->BSIM3v32nVar[LNLSTDENS][i],
{ here->BSIM3v32nVar[OUTNOIZ][i] data);
+= tempOnoise; tempInoise = Nintegrate(noizDens[i]
here->BSIM3v32nVar[OUTNOIZ][BSIM3v32TOTNOIZ] * data->GainSqInv, lnNdens[i]
+= tempOnoise; + data->lnGainInv,
here->BSIM3v32nVar[INNOIZ][i] here->BSIM3v32nVar[LNLSTDENS][i]
+= tempInoise; + data->lnGainInv, data);
here->BSIM3v32nVar[INNOIZ][BSIM3v32TOTNOIZ] here->BSIM3v32nVar[LNLSTDENS][i] =
+= tempInoise; lnNdens[i];
data->outNoiz += tempOnoise;
data->inNoise += tempInoise;
if (job->NStpsSm != 0)
{ here->BSIM3v32nVar[OUTNOIZ][i]
+= tempOnoise;
here->BSIM3v32nVar[OUTNOIZ][BSIM3v32TOTNOIZ]
+= tempOnoise;
here->BSIM3v32nVar[INNOIZ][i]
+= tempInoise;
here->BSIM3v32nVar[INNOIZ][BSIM3v32TOTNOIZ]
+= tempInoise;
} }
} }
} }
} }
if (data->prtSummary) if (data->prtSummary)
{ for (i = 0; i < BSIM3v32NSRCS; i++) { for (i = 0; i < BSIM3v32NSRCS; i++)
{ /* print a summary report */ { /* print a summary report */
data->outpVector[data->outNumber++] data->outpVector[data->outNumber++]
= noizDens[i]; = noizDens[i];
} }
} }
break; break;
case INT_NOIZ: case INT_NOIZ:
/* already calculated, just output */ /* already calculated, just output */
if (job->NStpsSm != 0) if (job->NStpsSm != 0)
{ for (i = 0; i < BSIM3v32NSRCS; i++) { for (i = 0; i < BSIM3v32NSRCS; i++)
{ data->outpVector[data->outNumber++] { data->outpVector[data->outNumber++]
= here->BSIM3v32nVar[OUTNOIZ][i]; = here->BSIM3v32nVar[OUTNOIZ][i];
data->outpVector[data->outNumber++] data->outpVector[data->outNumber++]
= here->BSIM3v32nVar[INNOIZ][i]; = here->BSIM3v32nVar[INNOIZ][i];
} }
} }
break; break;
} }
break; break;
case N_CLOSE: case N_CLOSE:
/* do nothing, the main calling routine will close */ /* do nothing, the main calling routine will close */
return (OK); return (OK);
break; /* the plots */ break; /* the plots */
} /* switch (operation) */ } /* switch (operation) */
} /* for here */ } /* for here */
} /* for model */ } /* for model */
return(OK); return(OK);

2
src/spicelib/devices/bsim3v32/b3v32par.c
View File

@ -28,7 +28,7 @@ BSIM3v32param (int param, IFvalue *value, GENinstance *inst, IFvalue *select)
if (!cp_getvar("scale", CP_REAL, &scale)) if (!cp_getvar("scale", CP_REAL, &scale))
scale = 1; scale = 1;
switch(param) switch(param)
{ case BSIM3v32_W: { case BSIM3v32_W:
here->BSIM3v32w = value->rValue*scale; here->BSIM3v32w = value->rValue*scale;
here->BSIM3v32wGiven = TRUE; here->BSIM3v32wGiven = TRUE;

210
src/spicelib/devices/bsim3v32/b3v32pzld.c
View File

@ -3,7 +3,7 @@
/********** /**********
* Copyright 2001 Regents of the University of California. All rights reserved. * Copyright 2001 Regents of the University of California. All rights reserved.
* File: b3pzld.c of BSIM3v3.2.4 * File: b3pzld.c of BSIM3v3.2.4
* Author: 1995 Min-Chie Jeng and Mansun Chan. * Author: 1995 Min-Chie Jeng and Mansun Chan.
* Author: 1997-1999 Weidong Liu. * Author: 1997-1999 Weidong Liu.
* Author: 2001 Xuemei Xi * Author: 2001 Xuemei Xi
* Modified by Paolo Nenzi 2002 * Modified by Paolo Nenzi 2002
@ -36,11 +36,11 @@ double T1, CoxWL, qcheq, Cdg, Cdd, Cds, Csg, Csd, Css;
double ScalingFactor = 1.0e-9; double ScalingFactor = 1.0e-9;
double m; double m;
for (; model != NULL; model = model->BSIM3v32nextModel) for (; model != NULL; model = model->BSIM3v32nextModel)
{ for (here = model->BSIM3v32instances; here!= NULL; { for (here = model->BSIM3v32instances; here!= NULL;
here = here->BSIM3v32nextInstance) here = here->BSIM3v32nextInstance)
{ {
if (here->BSIM3v32mode >= 0) if (here->BSIM3v32mode >= 0)
{ Gm = here->BSIM3v32gm; { Gm = here->BSIM3v32gm;
Gmbs = here->BSIM3v32gmbs; Gmbs = here->BSIM3v32gmbs;
FwdSum = Gm + Gmbs; FwdSum = Gm + Gmbs;
@ -73,19 +73,19 @@ double m;
cddb = here->BSIM3v32cddb; cddb = here->BSIM3v32cddb;
xgtg = xgtd = xgts = xgtb = 0.0; xgtg = xgtd = xgts = xgtb = 0.0;
sxpart = 0.6; sxpart = 0.6;
dxpart = 0.4; dxpart = 0.4;
ddxpart_dVd = ddxpart_dVg = ddxpart_dVb ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
= ddxpart_dVs = 0.0; = ddxpart_dVs = 0.0;
dsxpart_dVd = dsxpart_dVg = dsxpart_dVb dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
= dsxpart_dVs = 0.0; = dsxpart_dVs = 0.0;
} }
else else
{ cggb = cgdb = cgsb = 0.0; { cggb = cgdb = cgsb = 0.0;
cbgb = cbdb = cbsb = 0.0; cbgb = cbdb = cbsb = 0.0;
cdgb = cddb = cdsb = 0.0; cdgb = cddb = cdsb = 0.0;
xgtg = here->BSIM3v32gtg; xgtg = here->BSIM3v32gtg;
xgtd = here->BSIM3v32gtd; xgtd = here->BSIM3v32gtd;
xgts = here->BSIM3v32gts; xgts = here->BSIM3v32gts;
xgtb = here->BSIM3v32gtb; xgtb = here->BSIM3v32gtb;
@ -95,46 +95,46 @@ double m;
xcqsb = here->BSIM3v32cqsb; xcqsb = here->BSIM3v32cqsb;
xcqbb = here->BSIM3v32cqbb; xcqbb = here->BSIM3v32cqbb;
CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV
* here->pParam->BSIM3v32leffCV; * here->pParam->BSIM3v32leffCV;
qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk); qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk);
if (fabs(qcheq) <= 1.0e-5 * CoxWL) if (fabs(qcheq) <= 1.0e-5 * CoxWL)
{ if (model->BSIM3v32xpart < 0.5) { if (model->BSIM3v32xpart < 0.5)
{ dxpart = 0.4; { dxpart = 0.4;
} }
else if (model->BSIM3v32xpart > 0.5) else if (model->BSIM3v32xpart > 0.5)
{ dxpart = 0.0; { dxpart = 0.0;
} }
else else
{ dxpart = 0.5; { dxpart = 0.5;
} }
ddxpart_dVd = ddxpart_dVg = ddxpart_dVb ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
= ddxpart_dVs = 0.0; = ddxpart_dVs = 0.0;
} }
else else
{ dxpart = here->BSIM3v32qdrn / qcheq; { dxpart = here->BSIM3v32qdrn / qcheq;
Cdd = here->BSIM3v32cddb; Cdd = here->BSIM3v32cddb;
Csd = -(here->BSIM3v32cgdb + here->BSIM3v32cddb Csd = -(here->BSIM3v32cgdb + here->BSIM3v32cddb
+ here->BSIM3v32cbdb); + here->BSIM3v32cbdb);
ddxpart_dVd = (Cdd - dxpart * (Cdd + Csd)) / qcheq; ddxpart_dVd = (Cdd - dxpart * (Cdd + Csd)) / qcheq;
Cdg = here->BSIM3v32cdgb; Cdg = here->BSIM3v32cdgb;
Csg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb Csg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb
+ here->BSIM3v32cbgb); + here->BSIM3v32cbgb);
ddxpart_dVg = (Cdg - dxpart * (Cdg + Csg)) / qcheq; ddxpart_dVg = (Cdg - dxpart * (Cdg + Csg)) / qcheq;
Cds = here->BSIM3v32cdsb; Cds = here->BSIM3v32cdsb;
Css = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb Css = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb
+ here->BSIM3v32cbsb); + here->BSIM3v32cbsb);
ddxpart_dVs = (Cds - dxpart * (Cds + Css)) / qcheq; ddxpart_dVs = (Cds - dxpart * (Cds + Css)) / qcheq;
ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg
+ ddxpart_dVs); + ddxpart_dVs);
} }
sxpart = 1.0 - dxpart; sxpart = 1.0 - dxpart;
dsxpart_dVd = -ddxpart_dVd; dsxpart_dVd = -ddxpart_dVd;
dsxpart_dVg = -ddxpart_dVg; dsxpart_dVg = -ddxpart_dVg;
dsxpart_dVs = -ddxpart_dVs; dsxpart_dVs = -ddxpart_dVs;
dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs); dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs);
} }
} }
else else
@ -156,7 +156,7 @@ double m;
gbspb = here->BSIM3v32gbbs; gbspb = here->BSIM3v32gbbs;
gbspdp = -(gbspg + gbspsp + gbspb); gbspdp = -(gbspg + gbspsp + gbspb);
if (here->BSIM3v32nqsMod == 0) if (here->BSIM3v32nqsMod == 0)
{ cggb = here->BSIM3v32cggb; { cggb = here->BSIM3v32cggb;
cgsb = here->BSIM3v32cgdb; cgsb = here->BSIM3v32cgdb;
cgdb = here->BSIM3v32cgsb; cgdb = here->BSIM3v32cgsb;
@ -170,19 +170,19 @@ double m;
cddb = -(here->BSIM3v32cdsb + cgdb + cbdb); cddb = -(here->BSIM3v32cdsb + cgdb + cbdb);
xgtg = xgtd = xgts = xgtb = 0.0; xgtg = xgtd = xgts = xgtb = 0.0;
sxpart = 0.4; sxpart = 0.4;
dxpart = 0.6; dxpart = 0.6;
ddxpart_dVd = ddxpart_dVg = ddxpart_dVb ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
= ddxpart_dVs = 0.0; = ddxpart_dVs = 0.0;
dsxpart_dVd = dsxpart_dVg = dsxpart_dVb dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
= dsxpart_dVs = 0.0; = dsxpart_dVs = 0.0;
} }
else else
{ cggb = cgdb = cgsb = 0.0; { cggb = cgdb = cgsb = 0.0;
cbgb = cbdb = cbsb = 0.0; cbgb = cbdb = cbsb = 0.0;
cdgb = cddb = cdsb = 0.0; cdgb = cddb = cdsb = 0.0;
xgtg = here->BSIM3v32gtg; xgtg = here->BSIM3v32gtg;
xgtd = here->BSIM3v32gts; xgtd = here->BSIM3v32gts;
xgts = here->BSIM3v32gtd; xgts = here->BSIM3v32gtd;
xgtb = here->BSIM3v32gtb; xgtb = here->BSIM3v32gtb;
@ -192,51 +192,51 @@ double m;
xcqsb = here->BSIM3v32cqdb; xcqsb = here->BSIM3v32cqdb;
xcqbb = here->BSIM3v32cqbb; xcqbb = here->BSIM3v32cqbb;
CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV
* here->pParam->BSIM3v32leffCV; * here->pParam->BSIM3v32leffCV;
qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk); qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk);
if (fabs(qcheq) <= 1.0e-5 * CoxWL) if (fabs(qcheq) <= 1.0e-5 * CoxWL)
{ if (model->BSIM3v32xpart < 0.5) { if (model->BSIM3v32xpart < 0.5)
{ sxpart = 0.4; { sxpart = 0.4;
} }
else if (model->BSIM3v32xpart > 0.5) else if (model->BSIM3v32xpart > 0.5)
{ sxpart = 0.0; { sxpart = 0.0;
} }
else else
{ sxpart = 0.5; { sxpart = 0.5;
} }
dsxpart_dVd = dsxpart_dVg = dsxpart_dVb dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
= dsxpart_dVs = 0.0; = dsxpart_dVs = 0.0;
} }
else else
{ sxpart = here->BSIM3v32qdrn / qcheq; { sxpart = here->BSIM3v32qdrn / qcheq;
Css = here->BSIM3v32cddb; Css = here->BSIM3v32cddb;
Cds = -(here->BSIM3v32cgdb + here->BSIM3v32cddb Cds = -(here->BSIM3v32cgdb + here->BSIM3v32cddb
+ here->BSIM3v32cbdb); + here->BSIM3v32cbdb);
dsxpart_dVs = (Css - sxpart * (Css + Cds)) / qcheq; dsxpart_dVs = (Css - sxpart * (Css + Cds)) / qcheq;
Csg = here->BSIM3v32cdgb; Csg = here->BSIM3v32cdgb;
Cdg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb Cdg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb
+ here->BSIM3v32cbgb); + here->BSIM3v32cbgb);
dsxpart_dVg = (Csg - sxpart * (Csg + Cdg)) / qcheq; dsxpart_dVg = (Csg - sxpart * (Csg + Cdg)) / qcheq;
Csd = here->BSIM3v32cdsb; Csd = here->BSIM3v32cdsb;
Cdd = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb Cdd = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb
+ here->BSIM3v32cbsb); + here->BSIM3v32cbsb);
dsxpart_dVd = (Csd - sxpart * (Csd + Cdd)) / qcheq; dsxpart_dVd = (Csd - sxpart * (Csd + Cdd)) / qcheq;
dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg
+ dsxpart_dVs); + dsxpart_dVs);
} }
dxpart = 1.0 - sxpart; dxpart = 1.0 - sxpart;
ddxpart_dVd = -dsxpart_dVd; ddxpart_dVd = -dsxpart_dVd;
ddxpart_dVg = -dsxpart_dVg; ddxpart_dVg = -dsxpart_dVg;
ddxpart_dVs = -dsxpart_dVs; ddxpart_dVs = -dsxpart_dVs;
ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs); ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs);
} }
} }
T1 = *(ckt->CKTstate0 + here->BSIM3v32qdef) * here->BSIM3v32gtau; T1 = *(ckt->CKTstate0 + here->BSIM3v32qdef) * here->BSIM3v32gtau;
gdpr = here->BSIM3v32drainConductance; gdpr = here->BSIM3v32drainConductance;
gspr = here->BSIM3v32sourceConductance; gspr = here->BSIM3v32sourceConductance;
gds = here->BSIM3v32gds; gds = here->BSIM3v32gds;
@ -245,9 +245,9 @@ double m;
capbd = here->BSIM3v32capbd; capbd = here->BSIM3v32capbd;
capbs = here->BSIM3v32capbs; capbs = here->BSIM3v32capbs;
GSoverlapCap = here->BSIM3v32cgso; GSoverlapCap = here->BSIM3v32cgso;
GDoverlapCap = here->BSIM3v32cgdo; GDoverlapCap = here->BSIM3v32cgdo;
GBoverlapCap = here->pParam->BSIM3v32cgbo; GBoverlapCap = here->pParam->BSIM3v32cgbo;
xcdgb = (cdgb - GDoverlapCap); xcdgb = (cdgb - GDoverlapCap);
xcddb = (cddb + capbd + GDoverlapCap); xcddb = (cddb + capbd + GDoverlapCap);
@ -256,7 +256,7 @@ double m;
xcsgb = -(cggb + cbgb + cdgb + GSoverlapCap); xcsgb = -(cggb + cbgb + cdgb + GSoverlapCap);
xcsdb = -(cgdb + cbdb + cddb); xcsdb = -(cgdb + cbdb + cddb);
xcssb = (capbs + GSoverlapCap - (cgsb + cbsb + cdsb)); xcssb = (capbs + GSoverlapCap - (cgsb + cbsb + cdsb));
xcsbb = -(xcsgb + xcsdb + xcssb); xcsbb = -(xcsgb + xcsdb + xcssb);
xcggb = (cggb + GDoverlapCap + GSoverlapCap + GBoverlapCap); xcggb = (cggb + GDoverlapCap + GSoverlapCap + GBoverlapCap);
xcgdb = (cgdb - GDoverlapCap); xcgdb = (cgdb - GDoverlapCap);
xcgsb = (cgsb - GSoverlapCap); xcgsb = (cgsb - GSoverlapCap);
@ -266,7 +266,7 @@ double m;
xcbsb = (cbsb - capbs); xcbsb = (cbsb - capbs);
xcbbb = -(xcbgb + xcbdb + xcbsb); xcbbb = -(xcbgb + xcbdb + xcbsb);
m = here->BSIM3v32m; m = here->BSIM3v32m;
*(here->BSIM3v32GgPtr ) += m * (xcggb * s->real); *(here->BSIM3v32GgPtr ) += m * (xcggb * s->real);
*(here->BSIM3v32GgPtr +1) += m * (xcggb * s->imag); *(here->BSIM3v32GgPtr +1) += m * (xcggb * s->imag);
@ -318,23 +318,23 @@ double m;
*(here->BSIM3v32BdpPtr) -= m * (gbd - gbbdp); *(here->BSIM3v32BdpPtr) -= m * (gbd - gbbdp);
*(here->BSIM3v32BspPtr) -= m * (gbs - gbbsp); *(here->BSIM3v32BspPtr) -= m * (gbs - gbbsp);
*(here->BSIM3v32DPgPtr) += Gm + dxpart * xgtg *(here->BSIM3v32DPgPtr) += Gm + dxpart * xgtg
+ T1 * ddxpart_dVg + gbdpg; + T1 * ddxpart_dVg + gbdpg;
*(here->BSIM3v32DPdpPtr) += gdpr + gds + gbd + RevSum *(here->BSIM3v32DPdpPtr) += gdpr + gds + gbd + RevSum
+ dxpart * xgtd + T1 * ddxpart_dVd + gbdpdp; + dxpart * xgtd + T1 * ddxpart_dVd + gbdpdp;
*(here->BSIM3v32DPspPtr) -= gds + FwdSum - dxpart * xgts *(here->BSIM3v32DPspPtr) -= gds + FwdSum - dxpart * xgts
- T1 * ddxpart_dVs - gbdpsp; - T1 * ddxpart_dVs - gbdpsp;
*(here->BSIM3v32DPbPtr) -= gbd - Gmbs - dxpart * xgtb *(here->BSIM3v32DPbPtr) -= gbd - Gmbs - dxpart * xgtb
- T1 * ddxpart_dVb - gbdpb; - T1 * ddxpart_dVb - gbdpb;
*(here->BSIM3v32SPgPtr) -= Gm - sxpart * xgtg *(here->BSIM3v32SPgPtr) -= Gm - sxpart * xgtg
- T1 * dsxpart_dVg - gbspg; - T1 * dsxpart_dVg - gbspg;
*(here->BSIM3v32SPspPtr) += gspr + gds + gbs + FwdSum *(here->BSIM3v32SPspPtr) += gspr + gds + gbs + FwdSum
+ sxpart * xgts + T1 * dsxpart_dVs + gbspsp; + sxpart * xgts + T1 * dsxpart_dVs + gbspsp;
*(here->BSIM3v32SPbPtr) -= gbs + Gmbs - sxpart * xgtb *(here->BSIM3v32SPbPtr) -= gbs + Gmbs - sxpart * xgtb
- T1 * dsxpart_dVb - gbspb; - T1 * dsxpart_dVb - gbspb;
*(here->BSIM3v32SPdpPtr) -= gds + RevSum - sxpart * xgtd *(here->BSIM3v32SPdpPtr) -= gds + RevSum - sxpart * xgtd
- T1 * dsxpart_dVd - gbspdp; - T1 * dsxpart_dVd - gbspdp;
*(here->BSIM3v32GgPtr) -= xgtg; *(here->BSIM3v32GgPtr) -= xgtg;
*(here->BSIM3v32GbPtr) -= xgtb; *(here->BSIM3v32GbPtr) -= xgtb;

1716
src/spicelib/devices/bsim3v32/b3v32temp.c
View File

File diff suppressed because it is too large Load Diff

8
src/spicelib/devices/bsim3v32/b3v32trunc.c
View File

@ -3,7 +3,7 @@
/********** /**********
* Copyright 2001 Regents of the University of California. All rights reserved. * Copyright 2001 Regents of the University of California. All rights reserved.
* File: b3trunc.c of BSIM3v3.2.4 * File: b3trunc.c of BSIM3v3.2.4
* Author: 1995 Min-Chie Jeng and Mansun Chan. * Author: 1995 Min-Chie Jeng and Mansun Chan.
* Author: 1997-1999 Weidong Liu. * Author: 1997-1999 Weidong Liu.
* Author: 2001 Xuemei Xi * Author: 2001 Xuemei Xi
* Modified by Poalo Nenzi 2002 * Modified by Poalo Nenzi 2002
@ -28,8 +28,8 @@ BSIM3v32instance *here;
for (; model != NULL; model = model->BSIM3v32nextModel) for (; model != NULL; model = model->BSIM3v32nextModel)
{ for (here = model->BSIM3v32instances; here != NULL; { for (here = model->BSIM3v32instances; here != NULL;
here = here->BSIM3v32nextInstance) here = here->BSIM3v32nextInstance)
{ {
#ifdef STEPDEBUG #ifdef STEPDEBUG
debugtemp = *timeStep; debugtemp = *timeStep;
#endif /* STEPDEBUG */ #endif /* STEPDEBUG */
@ -38,7 +38,7 @@ BSIM3v32instance *here;
CKTterr(here->BSIM3v32qd,ckt,timeStep); CKTterr(here->BSIM3v32qd,ckt,timeStep);
#ifdef STEPDEBUG #ifdef STEPDEBUG
if(debugtemp != *timeStep) if(debugtemp != *timeStep)
{ printf("device %s reduces step from %g to %g\n", { printf("device %s reduces step from %g to %g\n",
here->BSIM3v32name,debugtemp,*timeStep); here->BSIM3v32name,debugtemp,*timeStep);
} }
#endif /* STEPDEBUG */ #endif /* STEPDEBUG */

660
src/spicelib/devices/bsim3v32/bsim3v32def.h
View File

@ -14,7 +14,7 @@ File: bsim3v32def.h
#include "ngspice/gendefs.h" #include "ngspice/gendefs.h"
#include "ngspice/cktdefs.h" #include "ngspice/cktdefs.h"
#include "ngspice/complex.h" #include "ngspice/complex.h"
#include "ngspice/noisedef.h" #include "ngspice/noisedef.h"
typedef struct sBSIM3v32instance typedef struct sBSIM3v32instance
{ {
@ -32,7 +32,7 @@ typedef struct sBSIM3v32instance
/* MCJ */ /* MCJ */
double BSIM3v32ueff; double BSIM3v32ueff;
double BSIM3v32thetavth; double BSIM3v32thetavth;
double BSIM3v32von; double BSIM3v32von;
double BSIM3v32vdsat; double BSIM3v32vdsat;
double BSIM3v32cgdo; double BSIM3v32cgdo;
@ -44,7 +44,7 @@ typedef struct sBSIM3v32instance
double BSIM3v32l; double BSIM3v32l;
double BSIM3v32w; double BSIM3v32w;
double BSIM3v32m; double BSIM3v32m;
double BSIM3v32drainArea; double BSIM3v32drainArea;
double BSIM3v32sourceArea; double BSIM3v32sourceArea;
double BSIM3v32drainSquares; double BSIM3v32drainSquares;
@ -120,7 +120,7 @@ typedef struct sBSIM3v32instance
unsigned BSIM3v32lGiven :1; unsigned BSIM3v32lGiven :1;
unsigned BSIM3v32wGiven :1; unsigned BSIM3v32wGiven :1;
unsigned BSIM3v32mGiven :1; unsigned BSIM3v32mGiven :1;
unsigned BSIM3v32drainAreaGiven :1; unsigned BSIM3v32drainAreaGiven :1;
unsigned BSIM3v32sourceAreaGiven :1; unsigned BSIM3v32sourceAreaGiven :1;
unsigned BSIM3v32drainSquaresGiven :1; unsigned BSIM3v32drainSquaresGiven :1;
@ -217,29 +217,29 @@ struct bsim3v32SizeDependParam
double Width; double Width;
double Length; double Length;
double BSIM3v32cdsc; double BSIM3v32cdsc;
double BSIM3v32cdscb; double BSIM3v32cdscb;
double BSIM3v32cdscd; double BSIM3v32cdscd;
double BSIM3v32cit; double BSIM3v32cit;
double BSIM3v32nfactor; double BSIM3v32nfactor;
double BSIM3v32xj; double BSIM3v32xj;
double BSIM3v32vsat; double BSIM3v32vsat;
double BSIM3v32at; double BSIM3v32at;
double BSIM3v32a0; double BSIM3v32a0;
double BSIM3v32ags; double BSIM3v32ags;
double BSIM3v32a1; double BSIM3v32a1;
double BSIM3v32a2; double BSIM3v32a2;
double BSIM3v32keta; double BSIM3v32keta;
double BSIM3v32nsub; double BSIM3v32nsub;
double BSIM3v32npeak; double BSIM3v32npeak;
double BSIM3v32ngate; double BSIM3v32ngate;
double BSIM3v32gamma1; double BSIM3v32gamma1;
double BSIM3v32gamma2; double BSIM3v32gamma2;
double BSIM3v32vbx; double BSIM3v32vbx;
double BSIM3v32vbi; double BSIM3v32vbi;
double BSIM3v32vbm; double BSIM3v32vbm;
double BSIM3v32vbsc; double BSIM3v32vbsc;
double BSIM3v32xt; double BSIM3v32xt;
double BSIM3v32phi; double BSIM3v32phi;
double BSIM3v32litl; double BSIM3v32litl;
double BSIM3v32k1; double BSIM3v32k1;
@ -251,14 +251,14 @@ struct bsim3v32SizeDependParam
double BSIM3v32k3b; double BSIM3v32k3b;
double BSIM3v32w0; double BSIM3v32w0;
double BSIM3v32nlx; double BSIM3v32nlx;
double BSIM3v32dvt0; double BSIM3v32dvt0;
double BSIM3v32dvt1; double BSIM3v32dvt1;
double BSIM3v32dvt2; double BSIM3v32dvt2;
double BSIM3v32dvt0w; double BSIM3v32dvt0w;
double BSIM3v32dvt1w; double BSIM3v32dvt1w;
double BSIM3v32dvt2w; double BSIM3v32dvt2w;
double BSIM3v32drout; double BSIM3v32drout;
double BSIM3v32dsub; double BSIM3v32dsub;
double BSIM3v32vth0; double BSIM3v32vth0;
double BSIM3v32ua; double BSIM3v32ua;
double BSIM3v32ua1; double BSIM3v32ua1;
@ -271,20 +271,20 @@ struct bsim3v32SizeDependParam
double BSIM3v32voff; double BSIM3v32voff;
double BSIM3v32vfb; double BSIM3v32vfb;
double BSIM3v32delta; double BSIM3v32delta;
double BSIM3v32rdsw; double BSIM3v32rdsw;
double BSIM3v32rds0; double BSIM3v32rds0;
double BSIM3v32prwg; double BSIM3v32prwg;
double BSIM3v32prwb; double BSIM3v32prwb;
double BSIM3v32prt; double BSIM3v32prt;
double BSIM3v32eta0; double BSIM3v32eta0;
double BSIM3v32etab; double BSIM3v32etab;
double BSIM3v32pclm; double BSIM3v32pclm;
double BSIM3v32pdibl1; double BSIM3v32pdibl1;
double BSIM3v32pdibl2; double BSIM3v32pdibl2;
double BSIM3v32pdiblb; double BSIM3v32pdiblb;
double BSIM3v32pscbe1; double BSIM3v32pscbe1;
double BSIM3v32pscbe2; double BSIM3v32pscbe2;
double BSIM3v32pvag; double BSIM3v32pvag;
double BSIM3v32wr; double BSIM3v32wr;
double BSIM3v32dwg; double BSIM3v32dwg;
double BSIM3v32dwb; double BSIM3v32dwb;
@ -327,14 +327,14 @@ struct bsim3v32SizeDependParam
double BSIM3v32cgbo; double BSIM3v32cgbo;
double BSIM3v32tconst; double BSIM3v32tconst;
double BSIM3v32u0temp; double BSIM3v32u0temp;
double BSIM3v32vsattemp; double BSIM3v32vsattemp;
double BSIM3v32sqrtPhi; double BSIM3v32sqrtPhi;
double BSIM3v32phis3; double BSIM3v32phis3;
double BSIM3v32Xdep0; double BSIM3v32Xdep0;
double BSIM3v32sqrtXdep0; double BSIM3v32sqrtXdep0;
double BSIM3v32theta0vb0; double BSIM3v32theta0vb0;
double BSIM3v32thetaRout; double BSIM3v32thetaRout;
double BSIM3v32cof1; double BSIM3v32cof1;
double BSIM3v32cof2; double BSIM3v32cof2;
@ -350,12 +350,12 @@ struct bsim3v32SizeDependParam
}; };
typedef struct sBSIM3v32model typedef struct sBSIM3v32model
{ {
int BSIM3v32modType; int BSIM3v32modType;
struct sBSIM3v32model *BSIM3v32nextModel; struct sBSIM3v32model *BSIM3v32nextModel;
BSIM3v32instance *BSIM3v32instances; BSIM3v32instance *BSIM3v32instances;
IFuid BSIM3v32modName; IFuid BSIM3v32modName;
int BSIM3v32type; int BSIM3v32type;
int BSIM3v32mobMod; int BSIM3v32mobMod;
@ -364,39 +364,39 @@ typedef struct sBSIM3v32model
int BSIM3v32noiMod; int BSIM3v32noiMod;
int BSIM3v32binUnit; int BSIM3v32binUnit;
int BSIM3v32paramChk; int BSIM3v32paramChk;
char *BSIM3v32version; char *BSIM3v32version;
/* The following field is an integer coding /* The following field is an integer coding
* of BSIM3v32version. * of BSIM3v32version.
*/ */
int BSIM3v32intVersion; int BSIM3v32intVersion;
#define BSIM3v32V324 324 /* BSIM3v32 V3.2.4 */ #define BSIM3v32V324 324 /* BSIM3v32 V3.2.4 */
#define BSIM3v32V323 323 /* BSIM3v32 V3.2.3 */ #define BSIM3v32V323 323 /* BSIM3v32 V3.2.3 */
#define BSIM3v32V322 322 /* BSIM3v32 V3.2.2 */ #define BSIM3v32V322 322 /* BSIM3v32 V3.2.2 */
#define BSIM3v32V32 32 /* BSIM3v32 V3.2 */ #define BSIM3v32V32 32 /* BSIM3v32 V3.2 */
#define BSIM3v32V3OLD 0 /* Old model */ #define BSIM3v32V3OLD 0 /* Old model */
double BSIM3v32tox; double BSIM3v32tox;
double BSIM3v32toxm; double BSIM3v32toxm;
double BSIM3v32cdsc; double BSIM3v32cdsc;
double BSIM3v32cdscb; double BSIM3v32cdscb;
double BSIM3v32cdscd; double BSIM3v32cdscd;
double BSIM3v32cit; double BSIM3v32cit;
double BSIM3v32nfactor; double BSIM3v32nfactor;
double BSIM3v32xj; double BSIM3v32xj;
double BSIM3v32vsat; double BSIM3v32vsat;
double BSIM3v32at; double BSIM3v32at;
double BSIM3v32a0; double BSIM3v32a0;
double BSIM3v32ags; double BSIM3v32ags;
double BSIM3v32a1; double BSIM3v32a1;
double BSIM3v32a2; double BSIM3v32a2;
double BSIM3v32keta; double BSIM3v32keta;
double BSIM3v32nsub; double BSIM3v32nsub;
double BSIM3v32npeak; double BSIM3v32npeak;
double BSIM3v32ngate; double BSIM3v32ngate;
double BSIM3v32gamma1; double BSIM3v32gamma1;
double BSIM3v32gamma2; double BSIM3v32gamma2;
double BSIM3v32vbx; double BSIM3v32vbx;
double BSIM3v32vbm; double BSIM3v32vbm;
double BSIM3v32xt; double BSIM3v32xt;
double BSIM3v32k1; double BSIM3v32k1;
double BSIM3v32kt1; double BSIM3v32kt1;
double BSIM3v32kt1l; double BSIM3v32kt1l;
@ -406,14 +406,14 @@ typedef struct sBSIM3v32model
double BSIM3v32k3b; double BSIM3v32k3b;
double BSIM3v32w0; double BSIM3v32w0;
double BSIM3v32nlx; double BSIM3v32nlx;
double BSIM3v32dvt0; double BSIM3v32dvt0;
double BSIM3v32dvt1; double BSIM3v32dvt1;
double BSIM3v32dvt2; double BSIM3v32dvt2;
double BSIM3v32dvt0w; double BSIM3v32dvt0w;
double BSIM3v32dvt1w; double BSIM3v32dvt1w;
double BSIM3v32dvt2w; double BSIM3v32dvt2w;
double BSIM3v32drout; double BSIM3v32drout;
double BSIM3v32dsub; double BSIM3v32dsub;
double BSIM3v32vth0; double BSIM3v32vth0;
double BSIM3v32ua; double BSIM3v32ua;
double BSIM3v32ua1; double BSIM3v32ua1;
@ -425,19 +425,19 @@ typedef struct sBSIM3v32model
double BSIM3v32ute; double BSIM3v32ute;
double BSIM3v32voff; double BSIM3v32voff;
double BSIM3v32delta; double BSIM3v32delta;
double BSIM3v32rdsw; double BSIM3v32rdsw;
double BSIM3v32prwg; double BSIM3v32prwg;
double BSIM3v32prwb; double BSIM3v32prwb;
double BSIM3v32prt; double BSIM3v32prt;
double BSIM3v32eta0; double BSIM3v32eta0;
double BSIM3v32etab; double BSIM3v32etab;
double BSIM3v32pclm; double BSIM3v32pclm;
double BSIM3v32pdibl1; double BSIM3v32pdibl1;
double BSIM3v32pdibl2; double BSIM3v32pdibl2;
double BSIM3v32pdiblb; double BSIM3v32pdiblb;
double BSIM3v32pscbe1; double BSIM3v32pscbe1;
double BSIM3v32pscbe2; double BSIM3v32pscbe2;
double BSIM3v32pvag; double BSIM3v32pvag;
double BSIM3v32wr; double BSIM3v32wr;
double BSIM3v32dwg; double BSIM3v32dwg;
double BSIM3v32dwb; double BSIM3v32dwb;
@ -481,27 +481,27 @@ typedef struct sBSIM3v32model
double BSIM3v32rsc; double BSIM3v32rsc;
/* Length Dependence */ /* Length Dependence */
double BSIM3v32lcdsc; double BSIM3v32lcdsc;
double BSIM3v32lcdscb; double BSIM3v32lcdscb;
double BSIM3v32lcdscd; double BSIM3v32lcdscd;
double BSIM3v32lcit; double BSIM3v32lcit;
double BSIM3v32lnfactor; double BSIM3v32lnfactor;
double BSIM3v32lxj; double BSIM3v32lxj;
double BSIM3v32lvsat; double BSIM3v32lvsat;
double BSIM3v32lat; double BSIM3v32lat;
double BSIM3v32la0; double BSIM3v32la0;
double BSIM3v32lags; double BSIM3v32lags;
double BSIM3v32la1; double BSIM3v32la1;
double BSIM3v32la2; double BSIM3v32la2;
double BSIM3v32lketa; double BSIM3v32lketa;
double BSIM3v32lnsub; double BSIM3v32lnsub;
double BSIM3v32lnpeak; double BSIM3v32lnpeak;
double BSIM3v32lngate; double BSIM3v32lngate;
double BSIM3v32lgamma1; double BSIM3v32lgamma1;
double BSIM3v32lgamma2; double BSIM3v32lgamma2;
double BSIM3v32lvbx; double BSIM3v32lvbx;
double BSIM3v32lvbm; double BSIM3v32lvbm;
double BSIM3v32lxt; double BSIM3v32lxt;
double BSIM3v32lk1; double BSIM3v32lk1;
double BSIM3v32lkt1; double BSIM3v32lkt1;
double BSIM3v32lkt1l; double BSIM3v32lkt1l;
@ -511,14 +511,14 @@ typedef struct sBSIM3v32model
double BSIM3v32lk3b; double BSIM3v32lk3b;
double BSIM3v32lw0; double BSIM3v32lw0;
double BSIM3v32lnlx; double BSIM3v32lnlx;
double BSIM3v32ldvt0; double BSIM3v32ldvt0;
double BSIM3v32ldvt1; double BSIM3v32ldvt1;
double BSIM3v32ldvt2; double BSIM3v32ldvt2;
double BSIM3v32ldvt0w; double BSIM3v32ldvt0w;
double BSIM3v32ldvt1w; double BSIM3v32ldvt1w;
double BSIM3v32ldvt2w; double BSIM3v32ldvt2w;
double BSIM3v32ldrout; double BSIM3v32ldrout;
double BSIM3v32ldsub; double BSIM3v32ldsub;
double BSIM3v32lvth0; double BSIM3v32lvth0;
double BSIM3v32lua; double BSIM3v32lua;
double BSIM3v32lua1; double BSIM3v32lua1;
@ -530,19 +530,19 @@ typedef struct sBSIM3v32model
double BSIM3v32lute; double BSIM3v32lute;
double BSIM3v32lvoff; double BSIM3v32lvoff;
double BSIM3v32ldelta; double BSIM3v32ldelta;
double BSIM3v32lrdsw; double BSIM3v32lrdsw;
double BSIM3v32lprwg; double BSIM3v32lprwg;
double BSIM3v32lprwb; double BSIM3v32lprwb;
double BSIM3v32lprt; double BSIM3v32lprt;
double BSIM3v32leta0; double BSIM3v32leta0;
double BSIM3v32letab; double BSIM3v32letab;
double BSIM3v32lpclm; double BSIM3v32lpclm;
double BSIM3v32lpdibl1; double BSIM3v32lpdibl1;
double BSIM3v32lpdibl2; double BSIM3v32lpdibl2;
double BSIM3v32lpdiblb; double BSIM3v32lpdiblb;
double BSIM3v32lpscbe1; double BSIM3v32lpscbe1;
double BSIM3v32lpscbe2; double BSIM3v32lpscbe2;
double BSIM3v32lpvag; double BSIM3v32lpvag;
double BSIM3v32lwr; double BSIM3v32lwr;
double BSIM3v32ldwg; double BSIM3v32ldwg;
double BSIM3v32ldwb; double BSIM3v32ldwb;
@ -568,27 +568,27 @@ typedef struct sBSIM3v32model
double BSIM3v32lmoin; double BSIM3v32lmoin;
/* Width Dependence */ /* Width Dependence */
double BSIM3v32wcdsc; double BSIM3v32wcdsc;
double BSIM3v32wcdscb; double BSIM3v32wcdscb;
double BSIM3v32wcdscd; double BSIM3v32wcdscd;
double BSIM3v32wcit; double BSIM3v32wcit;
double BSIM3v32wnfactor; double BSIM3v32wnfactor;
double BSIM3v32wxj; double BSIM3v32wxj;
double BSIM3v32wvsat; double BSIM3v32wvsat;
double BSIM3v32wat; double BSIM3v32wat;
double BSIM3v32wa0; double BSIM3v32wa0;
double BSIM3v32wags; double BSIM3v32wags;
double BSIM3v32wa1; double BSIM3v32wa1;
double BSIM3v32wa2; double BSIM3v32wa2;
double BSIM3v32wketa; double BSIM3v32wketa;
double BSIM3v32wnsub; double BSIM3v32wnsub;
double BSIM3v32wnpeak; double BSIM3v32wnpeak;
double BSIM3v32wngate; double BSIM3v32wngate;
double BSIM3v32wgamma1; double BSIM3v32wgamma1;
double BSIM3v32wgamma2; double BSIM3v32wgamma2;
double BSIM3v32wvbx; double BSIM3v32wvbx;
double BSIM3v32wvbm; double BSIM3v32wvbm;
double BSIM3v32wxt; double BSIM3v32wxt;
double BSIM3v32wk1; double BSIM3v32wk1;
double BSIM3v32wkt1; double BSIM3v32wkt1;
double BSIM3v32wkt1l; double BSIM3v32wkt1l;
@ -598,14 +598,14 @@ typedef struct sBSIM3v32model
double BSIM3v32wk3b; double BSIM3v32wk3b;
double BSIM3v32ww0; double BSIM3v32ww0;
double BSIM3v32wnlx; double BSIM3v32wnlx;
double BSIM3v32wdvt0; double BSIM3v32wdvt0;
double BSIM3v32wdvt1; double BSIM3v32wdvt1;
double BSIM3v32wdvt2; double BSIM3v32wdvt2;
double BSIM3v32wdvt0w; double BSIM3v32wdvt0w;
double BSIM3v32wdvt1w; double BSIM3v32wdvt1w;
double BSIM3v32wdvt2w; double BSIM3v32wdvt2w;
double BSIM3v32wdrout; double BSIM3v32wdrout;
double BSIM3v32wdsub; double BSIM3v32wdsub;
double BSIM3v32wvth0; double BSIM3v32wvth0;
double BSIM3v32wua; double BSIM3v32wua;
double BSIM3v32wua1; double BSIM3v32wua1;
@ -617,19 +617,19 @@ typedef struct sBSIM3v32model
double BSIM3v32wute; double BSIM3v32wute;
double BSIM3v32wvoff; double BSIM3v32wvoff;
double BSIM3v32wdelta; double BSIM3v32wdelta;
double BSIM3v32wrdsw; double BSIM3v32wrdsw;
double BSIM3v32wprwg; double BSIM3v32wprwg;
double BSIM3v32wprwb; double BSIM3v32wprwb;
double BSIM3v32wprt; double BSIM3v32wprt;
double BSIM3v32weta0; double BSIM3v32weta0;
double BSIM3v32wetab; double BSIM3v32wetab;
double BSIM3v32wpclm; double BSIM3v32wpclm;
double BSIM3v32wpdibl1; double BSIM3v32wpdibl1;
double BSIM3v32wpdibl2; double BSIM3v32wpdibl2;
double BSIM3v32wpdiblb; double BSIM3v32wpdiblb;
double BSIM3v32wpscbe1; double BSIM3v32wpscbe1;
double BSIM3v32wpscbe2; double BSIM3v32wpscbe2;
double BSIM3v32wpvag; double BSIM3v32wpvag;
double BSIM3v32wwr; double BSIM3v32wwr;
double BSIM3v32wdwg; double BSIM3v32wdwg;
double BSIM3v32wdwb; double BSIM3v32wdwb;
@ -655,27 +655,27 @@ typedef struct sBSIM3v32model
double BSIM3v32wmoin; double BSIM3v32wmoin;
/* Cross-term Dependence */ /* Cross-term Dependence */
double BSIM3v32pcdsc; double BSIM3v32pcdsc;
double BSIM3v32pcdscb; double BSIM3v32pcdscb;
double BSIM3v32pcdscd; double BSIM3v32pcdscd;
double BSIM3v32pcit; double BSIM3v32pcit;
double BSIM3v32pnfactor; double BSIM3v32pnfactor;
double BSIM3v32pxj; double BSIM3v32pxj;
double BSIM3v32pvsat; double BSIM3v32pvsat;
double BSIM3v32pat; double BSIM3v32pat;
double BSIM3v32pa0; double BSIM3v32pa0;
double BSIM3v32pags; double BSIM3v32pags;
double BSIM3v32pa1; double BSIM3v32pa1;
double BSIM3v32pa2; double BSIM3v32pa2;
double BSIM3v32pketa; double BSIM3v32pketa;
double BSIM3v32pnsub; double BSIM3v32pnsub;
double BSIM3v32pnpeak; double BSIM3v32pnpeak;
double BSIM3v32pngate; double BSIM3v32pngate;
double BSIM3v32pgamma1; double BSIM3v32pgamma1;
double BSIM3v32pgamma2; double BSIM3v32pgamma2;
double BSIM3v32pvbx; double BSIM3v32pvbx;
double BSIM3v32pvbm; double BSIM3v32pvbm;
double BSIM3v32pxt; double BSIM3v32pxt;
double BSIM3v32pk1; double BSIM3v32pk1;
double BSIM3v32pkt1; double BSIM3v32pkt1;
double BSIM3v32pkt1l; double BSIM3v32pkt1l;
@ -685,14 +685,14 @@ typedef struct sBSIM3v32model
double BSIM3v32pk3b; double BSIM3v32pk3b;
double BSIM3v32pw0; double BSIM3v32pw0;
double BSIM3v32pnlx; double BSIM3v32pnlx;
double BSIM3v32pdvt0; double BSIM3v32pdvt0;
double BSIM3v32pdvt1; double BSIM3v32pdvt1;
double BSIM3v32pdvt2; double BSIM3v32pdvt2;
double BSIM3v32pdvt0w; double BSIM3v32pdvt0w;
double BSIM3v32pdvt1w; double BSIM3v32pdvt1w;
double BSIM3v32pdvt2w; double BSIM3v32pdvt2w;
double BSIM3v32pdrout; double BSIM3v32pdrout;
double BSIM3v32pdsub; double BSIM3v32pdsub;
double BSIM3v32pvth0; double BSIM3v32pvth0;
double BSIM3v32pua; double BSIM3v32pua;
double BSIM3v32pua1; double BSIM3v32pua1;
@ -707,16 +707,16 @@ typedef struct sBSIM3v32model
double BSIM3v32prdsw; double BSIM3v32prdsw;
double BSIM3v32pprwg; double BSIM3v32pprwg;
double BSIM3v32pprwb; double BSIM3v32pprwb;
double BSIM3v32pprt; double BSIM3v32pprt;
double BSIM3v32peta0; double BSIM3v32peta0;
double BSIM3v32petab; double BSIM3v32petab;
double BSIM3v32ppclm; double BSIM3v32ppclm;
double BSIM3v32ppdibl1; double BSIM3v32ppdibl1;
double BSIM3v32ppdibl2; double BSIM3v32ppdibl2;
double BSIM3v32ppdiblb; double BSIM3v32ppdiblb;
double BSIM3v32ppscbe1; double BSIM3v32ppscbe1;
double BSIM3v32ppscbe2; double BSIM3v32ppscbe2;
double BSIM3v32ppvag; double BSIM3v32ppvag;
double BSIM3v32pwr; double BSIM3v32pwr;
double BSIM3v32pdwg; double BSIM3v32pdwg;
double BSIM3v32pdwb; double BSIM3v32pdwb;
@ -794,7 +794,7 @@ typedef struct sBSIM3v32model
/* Pre-calculated constants */ /* Pre-calculated constants */
/* MCJ: move to size-dependent param. */ /* MCJ: move to size-dependent param. */
double BSIM3v32vtm; double BSIM3v32vtm;
double BSIM3v32cox; double BSIM3v32cox;
double BSIM3v32cof1; double BSIM3v32cof1;
double BSIM3v32cof2; double BSIM3v32cof2;
@ -811,13 +811,13 @@ typedef struct sBSIM3v32model
double BSIM3v32unitLengthSidewallTempJctCap; double BSIM3v32unitLengthSidewallTempJctCap;
double BSIM3v32unitLengthGateSidewallTempJctCap; double BSIM3v32unitLengthGateSidewallTempJctCap;
double BSIM3v32oxideTrapDensityA; double BSIM3v32oxideTrapDensityA;
double BSIM3v32oxideTrapDensityB; double BSIM3v32oxideTrapDensityB;
double BSIM3v32oxideTrapDensityC; double BSIM3v32oxideTrapDensityC;
double BSIM3v32em; double BSIM3v32em;
double BSIM3v32ef; double BSIM3v32ef;
double BSIM3v32af; double BSIM3v32af;
double BSIM3v32kf; double BSIM3v32kf;
struct bsim3v32SizeDependParam *pSizeDependParamKnot; struct bsim3v32SizeDependParam *pSizeDependParamKnot;
@ -844,7 +844,7 @@ typedef struct sBSIM3v32model
unsigned BSIM3v32agsGiven :1; unsigned BSIM3v32agsGiven :1;
unsigned BSIM3v32a1Given :1; unsigned BSIM3v32a1Given :1;
unsigned BSIM3v32a2Given :1; unsigned BSIM3v32a2Given :1;
unsigned BSIM3v32ketaGiven :1; unsigned BSIM3v32ketaGiven :1;
unsigned BSIM3v32nsubGiven :1; unsigned BSIM3v32nsubGiven :1;
unsigned BSIM3v32npeakGiven :1; unsigned BSIM3v32npeakGiven :1;
unsigned BSIM3v32ngateGiven :1; unsigned BSIM3v32ngateGiven :1;
@ -862,14 +862,14 @@ typedef struct sBSIM3v32model
unsigned BSIM3v32k3bGiven :1; unsigned BSIM3v32k3bGiven :1;
unsigned BSIM3v32w0Given :1; unsigned BSIM3v32w0Given :1;
unsigned BSIM3v32nlxGiven :1; unsigned BSIM3v32nlxGiven :1;
unsigned BSIM3v32dvt0Given :1; unsigned BSIM3v32dvt0Given :1;
unsigned BSIM3v32dvt1Given :1; unsigned BSIM3v32dvt1Given :1;
unsigned BSIM3v32dvt2Given :1; unsigned BSIM3v32dvt2Given :1;
unsigned BSIM3v32dvt0wGiven :1; unsigned BSIM3v32dvt0wGiven :1;
unsigned BSIM3v32dvt1wGiven :1; unsigned BSIM3v32dvt1wGiven :1;
unsigned BSIM3v32dvt2wGiven :1; unsigned BSIM3v32dvt2wGiven :1;
unsigned BSIM3v32droutGiven :1; unsigned BSIM3v32droutGiven :1;
unsigned BSIM3v32dsubGiven :1; unsigned BSIM3v32dsubGiven :1;
unsigned BSIM3v32vth0Given :1; unsigned BSIM3v32vth0Given :1;
unsigned BSIM3v32uaGiven :1; unsigned BSIM3v32uaGiven :1;
unsigned BSIM3v32ua1Given :1; unsigned BSIM3v32ua1Given :1;
@ -880,20 +880,20 @@ typedef struct sBSIM3v32model
unsigned BSIM3v32u0Given :1; unsigned BSIM3v32u0Given :1;
unsigned BSIM3v32uteGiven :1; unsigned BSIM3v32uteGiven :1;
unsigned BSIM3v32voffGiven :1; unsigned BSIM3v32voffGiven :1;
unsigned BSIM3v32rdswGiven :1; unsigned BSIM3v32rdswGiven :1;
unsigned BSIM3v32prwgGiven :1; unsigned BSIM3v32prwgGiven :1;
unsigned BSIM3v32prwbGiven :1; unsigned BSIM3v32prwbGiven :1;
unsigned BSIM3v32prtGiven :1; unsigned BSIM3v32prtGiven :1;
unsigned BSIM3v32eta0Given :1; unsigned BSIM3v32eta0Given :1;
unsigned BSIM3v32etabGiven :1; unsigned BSIM3v32etabGiven :1;
unsigned BSIM3v32pclmGiven :1; unsigned BSIM3v32pclmGiven :1;
unsigned BSIM3v32pdibl1Given :1; unsigned BSIM3v32pdibl1Given :1;
unsigned BSIM3v32pdibl2Given :1; unsigned BSIM3v32pdibl2Given :1;
unsigned BSIM3v32pdiblbGiven :1; unsigned BSIM3v32pdiblbGiven :1;
unsigned BSIM3v32pscbe1Given :1; unsigned BSIM3v32pscbe1Given :1;
unsigned BSIM3v32pscbe2Given :1; unsigned BSIM3v32pscbe2Given :1;
unsigned BSIM3v32pvagGiven :1; unsigned BSIM3v32pvagGiven :1;
unsigned BSIM3v32deltaGiven :1; unsigned BSIM3v32deltaGiven :1;
unsigned BSIM3v32wrGiven :1; unsigned BSIM3v32wrGiven :1;
unsigned BSIM3v32dwgGiven :1; unsigned BSIM3v32dwgGiven :1;
unsigned BSIM3v32dwbGiven :1; unsigned BSIM3v32dwbGiven :1;
@ -906,7 +906,7 @@ typedef struct sBSIM3v32model
unsigned BSIM3v32vfbGiven :1; unsigned BSIM3v32vfbGiven :1;
/* CV model */ /* CV model */
unsigned BSIM3v32elmGiven :1; unsigned BSIM3v32elmGiven :1;
unsigned BSIM3v32cgslGiven :1; unsigned BSIM3v32cgslGiven :1;
unsigned BSIM3v32cgdlGiven :1; unsigned BSIM3v32cgdlGiven :1;
unsigned BSIM3v32ckappaGiven :1; unsigned BSIM3v32ckappaGiven :1;
@ -928,7 +928,7 @@ typedef struct sBSIM3v32model
unsigned BSIM3v32tpbswgGiven :1; unsigned BSIM3v32tpbswgGiven :1;
/* acm model */ /* acm model */
unsigned BSIM3v32hdifGiven :1; unsigned BSIM3v32hdifGiven :1;
unsigned BSIM3v32ldifGiven :1; unsigned BSIM3v32ldifGiven :1;
unsigned BSIM3v32ldGiven :1; unsigned BSIM3v32ldGiven :1;
unsigned BSIM3v32rdGiven :1; unsigned BSIM3v32rdGiven :1;
@ -949,7 +949,7 @@ typedef struct sBSIM3v32model
unsigned BSIM3v32lagsGiven :1; unsigned BSIM3v32lagsGiven :1;
unsigned BSIM3v32la1Given :1; unsigned BSIM3v32la1Given :1;
unsigned BSIM3v32la2Given :1; unsigned BSIM3v32la2Given :1;
unsigned BSIM3v32lketaGiven :1; unsigned BSIM3v32lketaGiven :1;
unsigned BSIM3v32lnsubGiven :1; unsigned BSIM3v32lnsubGiven :1;
unsigned BSIM3v32lnpeakGiven :1; unsigned BSIM3v32lnpeakGiven :1;
unsigned BSIM3v32lngateGiven :1; unsigned BSIM3v32lngateGiven :1;
@ -967,14 +967,14 @@ typedef struct sBSIM3v32model
unsigned BSIM3v32lk3bGiven :1; unsigned BSIM3v32lk3bGiven :1;
unsigned BSIM3v32lw0Given :1; unsigned BSIM3v32lw0Given :1;
unsigned BSIM3v32lnlxGiven :1; unsigned BSIM3v32lnlxGiven :1;
unsigned BSIM3v32ldvt0Given :1; unsigned BSIM3v32ldvt0Given :1;
unsigned BSIM3v32ldvt1Given :1; unsigned BSIM3v32ldvt1Given :1;
unsigned BSIM3v32ldvt2Given :1; unsigned BSIM3v32ldvt2Given :1;
unsigned BSIM3v32ldvt0wGiven :1; unsigned BSIM3v32ldvt0wGiven :1;
unsigned BSIM3v32ldvt1wGiven :1; unsigned BSIM3v32ldvt1wGiven :1;
unsigned BSIM3v32ldvt2wGiven :1; unsigned BSIM3v32ldvt2wGiven :1;
unsigned BSIM3v32ldroutGiven :1; unsigned BSIM3v32ldroutGiven :1;
unsigned BSIM3v32ldsubGiven :1; unsigned BSIM3v32ldsubGiven :1;
unsigned BSIM3v32lvth0Given :1; unsigned BSIM3v32lvth0Given :1;
unsigned BSIM3v32luaGiven :1; unsigned BSIM3v32luaGiven :1;
unsigned BSIM3v32lua1Given :1; unsigned BSIM3v32lua1Given :1;
@ -985,20 +985,20 @@ typedef struct sBSIM3v32model
unsigned BSIM3v32lu0Given :1; unsigned BSIM3v32lu0Given :1;
unsigned BSIM3v32luteGiven :1; unsigned BSIM3v32luteGiven :1;
unsigned BSIM3v32lvoffGiven :1; unsigned BSIM3v32lvoffGiven :1;
unsigned BSIM3v32lrdswGiven :1; unsigned BSIM3v32lrdswGiven :1;
unsigned BSIM3v32lprwgGiven :1; unsigned BSIM3v32lprwgGiven :1;
unsigned BSIM3v32lprwbGiven :1; unsigned BSIM3v32lprwbGiven :1;
unsigned BSIM3v32lprtGiven :1; unsigned BSIM3v32lprtGiven :1;
unsigned BSIM3v32leta0Given :1; unsigned BSIM3v32leta0Given :1;
unsigned BSIM3v32letabGiven :1; unsigned BSIM3v32letabGiven :1;
unsigned BSIM3v32lpclmGiven :1; unsigned BSIM3v32lpclmGiven :1;
unsigned BSIM3v32lpdibl1Given :1; unsigned BSIM3v32lpdibl1Given :1;
unsigned BSIM3v32lpdibl2Given :1; unsigned BSIM3v32lpdibl2Given :1;
unsigned BSIM3v32lpdiblbGiven :1; unsigned BSIM3v32lpdiblbGiven :1;
unsigned BSIM3v32lpscbe1Given :1; unsigned BSIM3v32lpscbe1Given :1;
unsigned BSIM3v32lpscbe2Given :1; unsigned BSIM3v32lpscbe2Given :1;
unsigned BSIM3v32lpvagGiven :1; unsigned BSIM3v32lpvagGiven :1;
unsigned BSIM3v32ldeltaGiven :1; unsigned BSIM3v32ldeltaGiven :1;
unsigned BSIM3v32lwrGiven :1; unsigned BSIM3v32lwrGiven :1;
unsigned BSIM3v32ldwgGiven :1; unsigned BSIM3v32ldwgGiven :1;
unsigned BSIM3v32ldwbGiven :1; unsigned BSIM3v32ldwbGiven :1;
@ -1010,7 +1010,7 @@ typedef struct sBSIM3v32model
unsigned BSIM3v32lvfbGiven :1; unsigned BSIM3v32lvfbGiven :1;
/* CV model */ /* CV model */
unsigned BSIM3v32lelmGiven :1; unsigned BSIM3v32lelmGiven :1;
unsigned BSIM3v32lcgslGiven :1; unsigned BSIM3v32lcgslGiven :1;
unsigned BSIM3v32lcgdlGiven :1; unsigned BSIM3v32lcgdlGiven :1;
unsigned BSIM3v32lckappaGiven :1; unsigned BSIM3v32lckappaGiven :1;
@ -1036,7 +1036,7 @@ typedef struct sBSIM3v32model
unsigned BSIM3v32wagsGiven :1; unsigned BSIM3v32wagsGiven :1;
unsigned BSIM3v32wa1Given :1; unsigned BSIM3v32wa1Given :1;
unsigned BSIM3v32wa2Given :1; unsigned BSIM3v32wa2Given :1;
unsigned BSIM3v32wketaGiven :1; unsigned BSIM3v32wketaGiven :1;
unsigned BSIM3v32wnsubGiven :1; unsigned BSIM3v32wnsubGiven :1;
unsigned BSIM3v32wnpeakGiven :1; unsigned BSIM3v32wnpeakGiven :1;
unsigned BSIM3v32wngateGiven :1; unsigned BSIM3v32wngateGiven :1;
@ -1054,14 +1054,14 @@ typedef struct sBSIM3v32model
unsigned BSIM3v32wk3bGiven :1; unsigned BSIM3v32wk3bGiven :1;
unsigned BSIM3v32ww0Given :1; unsigned BSIM3v32ww0Given :1;
unsigned BSIM3v32wnlxGiven :1; unsigned BSIM3v32wnlxGiven :1;
unsigned BSIM3v32wdvt0Given :1; unsigned BSIM3v32wdvt0Given :1;
unsigned BSIM3v32wdvt1Given :1; unsigned BSIM3v32wdvt1Given :1;
unsigned BSIM3v32wdvt2Given :1; unsigned BSIM3v32wdvt2Given :1;
unsigned BSIM3v32wdvt0wGiven :1; unsigned BSIM3v32wdvt0wGiven :1;
unsigned BSIM3v32wdvt1wGiven :1; unsigned BSIM3v32wdvt1wGiven :1;
unsigned BSIM3v32wdvt2wGiven :1; unsigned BSIM3v32wdvt2wGiven :1;
unsigned BSIM3v32wdroutGiven :1; unsigned BSIM3v32wdroutGiven :1;
unsigned BSIM3v32wdsubGiven :1; unsigned BSIM3v32wdsubGiven :1;
unsigned BSIM3v32wvth0Given :1; unsigned BSIM3v32wvth0Given :1;
unsigned BSIM3v32wuaGiven :1; unsigned BSIM3v32wuaGiven :1;
unsigned BSIM3v32wua1Given :1; unsigned BSIM3v32wua1Given :1;
@ -1072,20 +1072,20 @@ typedef struct sBSIM3v32model
unsigned BSIM3v32wu0Given :1; unsigned BSIM3v32wu0Given :1;
unsigned BSIM3v32wuteGiven :1; unsigned BSIM3v32wuteGiven :1;
unsigned BSIM3v32wvoffGiven :1; unsigned BSIM3v32wvoffGiven :1;
unsigned BSIM3v32wrdswGiven :1; unsigned BSIM3v32wrdswGiven :1;
unsigned BSIM3v32wprwgGiven :1; unsigned BSIM3v32wprwgGiven :1;
unsigned BSIM3v32wprwbGiven :1; unsigned BSIM3v32wprwbGiven :1;
unsigned BSIM3v32wprtGiven :1; unsigned BSIM3v32wprtGiven :1;
unsigned BSIM3v32weta0Given :1; unsigned BSIM3v32weta0Given :1;
unsigned BSIM3v32wetabGiven :1; unsigned BSIM3v32wetabGiven :1;
unsigned BSIM3v32wpclmGiven :1; unsigned BSIM3v32wpclmGiven :1;
unsigned BSIM3v32wpdibl1Given :1; unsigned BSIM3v32wpdibl1Given :1;
unsigned BSIM3v32wpdibl2Given :1; unsigned BSIM3v32wpdibl2Given :1;
unsigned BSIM3v32wpdiblbGiven :1; unsigned BSIM3v32wpdiblbGiven :1;
unsigned BSIM3v32wpscbe1Given :1; unsigned BSIM3v32wpscbe1Given :1;
unsigned BSIM3v32wpscbe2Given :1; unsigned BSIM3v32wpscbe2Given :1;
unsigned BSIM3v32wpvagGiven :1; unsigned BSIM3v32wpvagGiven :1;
unsigned BSIM3v32wdeltaGiven :1; unsigned BSIM3v32wdeltaGiven :1;
unsigned BSIM3v32wwrGiven :1; unsigned BSIM3v32wwrGiven :1;
unsigned BSIM3v32wdwgGiven :1; unsigned BSIM3v32wdwgGiven :1;
unsigned BSIM3v32wdwbGiven :1; unsigned BSIM3v32wdwbGiven :1;
@ -1097,7 +1097,7 @@ typedef struct sBSIM3v32model
unsigned BSIM3v32wvfbGiven :1; unsigned BSIM3v32wvfbGiven :1;
/* CV model */ /* CV model */
unsigned BSIM3v32welmGiven :1; unsigned BSIM3v32welmGiven :1;
unsigned BSIM3v32wcgslGiven :1; unsigned BSIM3v32wcgslGiven :1;
unsigned BSIM3v32wcgdlGiven :1; unsigned BSIM3v32wcgdlGiven :1;
unsigned BSIM3v32wckappaGiven :1; unsigned BSIM3v32wckappaGiven :1;
@ -1123,7 +1123,7 @@ typedef struct sBSIM3v32model
unsigned BSIM3v32pagsGiven :1; unsigned BSIM3v32pagsGiven :1;
unsigned BSIM3v32pa1Given :1; unsigned BSIM3v32pa1Given :1;
unsigned BSIM3v32pa2Given :1; unsigned BSIM3v32pa2Given :1;
unsigned BSIM3v32pketaGiven :1; unsigned BSIM3v32pketaGiven :1;
unsigned BSIM3v32pnsubGiven :1; unsigned BSIM3v32pnsubGiven :1;
unsigned BSIM3v32pnpeakGiven :1; unsigned BSIM3v32pnpeakGiven :1;
unsigned BSIM3v32pngateGiven :1; unsigned BSIM3v32pngateGiven :1;
@ -1141,14 +1141,14 @@ typedef struct sBSIM3v32model
unsigned BSIM3v32pk3bGiven :1; unsigned BSIM3v32pk3bGiven :1;
unsigned BSIM3v32pw0Given :1; unsigned BSIM3v32pw0Given :1;
unsigned BSIM3v32pnlxGiven :1; unsigned BSIM3v32pnlxGiven :1;
unsigned BSIM3v32pdvt0Given :1; unsigned BSIM3v32pdvt0Given :1;
unsigned BSIM3v32pdvt1Given :1; unsigned BSIM3v32pdvt1Given :1;
unsigned BSIM3v32pdvt2Given :1; unsigned BSIM3v32pdvt2Given :1;
unsigned BSIM3v32pdvt0wGiven :1; unsigned BSIM3v32pdvt0wGiven :1;
unsigned BSIM3v32pdvt1wGiven :1; unsigned BSIM3v32pdvt1wGiven :1;
unsigned BSIM3v32pdvt2wGiven :1; unsigned BSIM3v32pdvt2wGiven :1;
unsigned BSIM3v32pdroutGiven :1; unsigned BSIM3v32pdroutGiven :1;
unsigned BSIM3v32pdsubGiven :1; unsigned BSIM3v32pdsubGiven :1;
unsigned BSIM3v32pvth0Given :1; unsigned BSIM3v32pvth0Given :1;
unsigned BSIM3v32puaGiven :1; unsigned BSIM3v32puaGiven :1;
unsigned BSIM3v32pua1Given :1; unsigned BSIM3v32pua1Given :1;
@ -1159,20 +1159,20 @@ typedef struct sBSIM3v32model
unsigned BSIM3v32pu0Given :1; unsigned BSIM3v32pu0Given :1;
unsigned BSIM3v32puteGiven :1; unsigned BSIM3v32puteGiven :1;
unsigned BSIM3v32pvoffGiven :1; unsigned BSIM3v32pvoffGiven :1;
unsigned BSIM3v32prdswGiven :1; unsigned BSIM3v32prdswGiven :1;
unsigned BSIM3v32pprwgGiven :1; unsigned BSIM3v32pprwgGiven :1;
unsigned BSIM3v32pprwbGiven :1; unsigned BSIM3v32pprwbGiven :1;
unsigned BSIM3v32pprtGiven :1; unsigned BSIM3v32pprtGiven :1;
unsigned BSIM3v32peta0Given :1; unsigned BSIM3v32peta0Given :1;
unsigned BSIM3v32petabGiven :1; unsigned BSIM3v32petabGiven :1;
unsigned BSIM3v32ppclmGiven :1; unsigned BSIM3v32ppclmGiven :1;
unsigned BSIM3v32ppdibl1Given :1; unsigned BSIM3v32ppdibl1Given :1;
unsigned BSIM3v32ppdibl2Given :1; unsigned BSIM3v32ppdibl2Given :1;
unsigned BSIM3v32ppdiblbGiven :1; unsigned BSIM3v32ppdiblbGiven :1;
unsigned BSIM3v32ppscbe1Given :1; unsigned BSIM3v32ppscbe1Given :1;
unsigned BSIM3v32ppscbe2Given :1; unsigned BSIM3v32ppscbe2Given :1;
unsigned BSIM3v32ppvagGiven :1; unsigned BSIM3v32ppvagGiven :1;
unsigned BSIM3v32pdeltaGiven :1; unsigned BSIM3v32pdeltaGiven :1;
unsigned BSIM3v32pwrGiven :1; unsigned BSIM3v32pwrGiven :1;
unsigned BSIM3v32pdwgGiven :1; unsigned BSIM3v32pdwgGiven :1;
unsigned BSIM3v32pdwbGiven :1; unsigned BSIM3v32pdwbGiven :1;
@ -1184,7 +1184,7 @@ typedef struct sBSIM3v32model
unsigned BSIM3v32pvfbGiven :1; unsigned BSIM3v32pvfbGiven :1;
/* CV model */ /* CV model */
unsigned BSIM3v32pelmGiven :1; unsigned BSIM3v32pelmGiven :1;
unsigned BSIM3v32pcgslGiven :1; unsigned BSIM3v32pcgslGiven :1;
unsigned BSIM3v32pcgdlGiven :1; unsigned BSIM3v32pcgdlGiven :1;
unsigned BSIM3v32pckappaGiven :1; unsigned BSIM3v32pckappaGiven :1;
@ -1217,15 +1217,15 @@ typedef struct sBSIM3v32model
unsigned BSIM3v32bulkJctGateSideGradingCoeffGiven :1; unsigned BSIM3v32bulkJctGateSideGradingCoeffGiven :1;
unsigned BSIM3v32unitLengthGateSidewallJctCapGiven :1; unsigned BSIM3v32unitLengthGateSidewallJctCapGiven :1;
unsigned BSIM3v32jctEmissionCoeffGiven :1; unsigned BSIM3v32jctEmissionCoeffGiven :1;
unsigned BSIM3v32jctTempExponentGiven :1; unsigned BSIM3v32jctTempExponentGiven :1;
unsigned BSIM3v32oxideTrapDensityAGiven :1; unsigned BSIM3v32oxideTrapDensityAGiven :1;
unsigned BSIM3v32oxideTrapDensityBGiven :1; unsigned BSIM3v32oxideTrapDensityBGiven :1;
unsigned BSIM3v32oxideTrapDensityCGiven :1; unsigned BSIM3v32oxideTrapDensityCGiven :1;
unsigned BSIM3v32emGiven :1; unsigned BSIM3v32emGiven :1;
unsigned BSIM3v32efGiven :1; unsigned BSIM3v32efGiven :1;
unsigned BSIM3v32afGiven :1; unsigned BSIM3v32afGiven :1;
unsigned BSIM3v32kfGiven :1; unsigned BSIM3v32kfGiven :1;
unsigned BSIM3v32LintGiven :1; unsigned BSIM3v32LintGiven :1;
unsigned BSIM3v32LlGiven :1; unsigned BSIM3v32LlGiven :1;
@ -1286,8 +1286,8 @@ typedef struct sBSIM3v32model
/* model parameters */ /* model parameters */
#define BSIM3v32_MOD_CAPMOD 101 #define BSIM3v32_MOD_CAPMOD 101
#define BSIM3v32_MOD_ACMMOD 102 #define BSIM3v32_MOD_ACMMOD 102
#define BSIM3v32_MOD_MOBMOD 103 #define BSIM3v32_MOD_MOBMOD 103
#define BSIM3v32_MOD_NOIMOD 104 #define BSIM3v32_MOD_NOIMOD 104
#define BSIM3v32_MOD_TOX 105 #define BSIM3v32_MOD_TOX 105
@ -1301,14 +1301,14 @@ typedef struct sBSIM3v32model
#define BSIM3v32_MOD_A0 113 #define BSIM3v32_MOD_A0 113
#define BSIM3v32_MOD_A1 114 #define BSIM3v32_MOD_A1 114
#define BSIM3v32_MOD_A2 115 #define BSIM3v32_MOD_A2 115
#define BSIM3v32_MOD_KETA 116 #define BSIM3v32_MOD_KETA 116
#define BSIM3v32_MOD_NSUB 117 #define BSIM3v32_MOD_NSUB 117
#define BSIM3v32_MOD_NPEAK 118 #define BSIM3v32_MOD_NPEAK 118
#define BSIM3v32_MOD_NGATE 120 #define BSIM3v32_MOD_NGATE 120
#define BSIM3v32_MOD_GAMMA1 121 #define BSIM3v32_MOD_GAMMA1 121
#define BSIM3v32_MOD_GAMMA2 122 #define BSIM3v32_MOD_GAMMA2 122
#define BSIM3v32_MOD_VBX 123 #define BSIM3v32_MOD_VBX 123
#define BSIM3v32_MOD_BINUNIT 124 #define BSIM3v32_MOD_BINUNIT 124
#define BSIM3v32_MOD_VBM 125 #define BSIM3v32_MOD_VBM 125
@ -1408,7 +1408,7 @@ typedef struct sBSIM3v32model
#define BSIM3v32_MOD_LA0 258 #define BSIM3v32_MOD_LA0 258
#define BSIM3v32_MOD_LA1 259 #define BSIM3v32_MOD_LA1 259
#define BSIM3v32_MOD_LA2 260 #define BSIM3v32_MOD_LA2 260
#define BSIM3v32_MOD_LKETA 261 #define BSIM3v32_MOD_LKETA 261
#define BSIM3v32_MOD_LNSUB 262 #define BSIM3v32_MOD_LNSUB 262
#define BSIM3v32_MOD_LNPEAK 263 #define BSIM3v32_MOD_LNPEAK 263
#define BSIM3v32_MOD_LNGATE 265 #define BSIM3v32_MOD_LNGATE 265
@ -1476,7 +1476,7 @@ typedef struct sBSIM3v32model
#define BSIM3v32_MOD_LCDSCD 327 #define BSIM3v32_MOD_LCDSCD 327
#define BSIM3v32_MOD_LAGS 328 #define BSIM3v32_MOD_LAGS 328
#define BSIM3v32_MOD_LFRINGE 331 #define BSIM3v32_MOD_LFRINGE 331
#define BSIM3v32_MOD_LELM 332 #define BSIM3v32_MOD_LELM 332
@ -1505,7 +1505,7 @@ typedef struct sBSIM3v32model
#define BSIM3v32_MOD_WA0 388 #define BSIM3v32_MOD_WA0 388
#define BSIM3v32_MOD_WA1 389 #define BSIM3v32_MOD_WA1 389
#define BSIM3v32_MOD_WA2 390 #define BSIM3v32_MOD_WA2 390
#define BSIM3v32_MOD_WKETA 391 #define BSIM3v32_MOD_WKETA 391
#define BSIM3v32_MOD_WNSUB 392 #define BSIM3v32_MOD_WNSUB 392
#define BSIM3v32_MOD_WNPEAK 393 #define BSIM3v32_MOD_WNPEAK 393
#define BSIM3v32_MOD_WNGATE 395 #define BSIM3v32_MOD_WNGATE 395
@ -1602,7 +1602,7 @@ typedef struct sBSIM3v32model
#define BSIM3v32_MOD_PA0 518 #define BSIM3v32_MOD_PA0 518
#define BSIM3v32_MOD_PA1 519 #define BSIM3v32_MOD_PA1 519
#define BSIM3v32_MOD_PA2 520 #define BSIM3v32_MOD_PA2 520
#define BSIM3v32_MOD_PKETA 521 #define BSIM3v32_MOD_PKETA 521
#define BSIM3v32_MOD_PNSUB 522 #define BSIM3v32_MOD_PNSUB 522
#define BSIM3v32_MOD_PNPEAK 523 #define BSIM3v32_MOD_PNPEAK 523
#define BSIM3v32_MOD_PNGATE 525 #define BSIM3v32_MOD_PNGATE 525
@ -1811,8 +1811,8 @@ typedef struct sBSIM3v32model
#include "bsim3v32ext.h" #include "bsim3v32ext.h"
extern void BSIM3v32evaluate(double,double,double,BSIM3v32instance*,BSIM3v32model*, extern void BSIM3v32evaluate(double,double,double,BSIM3v32instance*,BSIM3v32model*,
double*,double*,double*, double*, double*, double*, double*, double*,double*,double*, double*, double*, double*, double*,
double*, double*, double*, double*, double*, double*, double*, double*, double*, double*, double*, double*, double*, double*,
double*, double*, double*, double*, CKTcircuit*); double*, double*, double*, double*, CKTcircuit*);
extern int BSIM3v32debug(BSIM3v32model*, BSIM3v32instance*, CKTcircuit*, int); extern int BSIM3v32debug(BSIM3v32model*, BSIM3v32instance*, CKTcircuit*, int);
extern int BSIM3v32checkModel(BSIM3v32model*, BSIM3v32instance*, CKTcircuit*); extern int BSIM3v32checkModel(BSIM3v32model*, BSIM3v32instance*, CKTcircuit*);

2
src/spicelib/devices/bsim3v32/bsim3v32ext.h
View File

@ -20,7 +20,7 @@ extern void BSIM3v32mosCap(CKTcircuit*, double, double, double, double,
double, double, double, double, double, double, double, double, double, double, double, double, double, double,
double, double, double, double, double, double, double*, double, double, double, double, double, double, double*,
double*, double*, double*, double*, double*, double*, double*, double*, double*, double*, double*, double*, double*, double*,
double*, double*, double*, double*, double*, double*, double*, double*, double*, double*, double*, double*, double*, double*,
double*); double*);
extern int BSIM3v32param(int,IFvalue*,GENinstance*,IFvalue*); extern int BSIM3v32param(int,IFvalue*,GENinstance*,IFvalue*);
extern int BSIM3v32pzLoad(GENmodel*,CKTcircuit*,SPcomplex*); extern int BSIM3v32pzLoad(GENmodel*,CKTcircuit*,SPcomplex*);

4
src/spicelib/devices/bsim3v32/bsim3v32init.c
View File

@ -52,7 +52,7 @@ SPICEdev BSIM3v32info = {
/* DEVaccept */ NULL, /* DEVaccept */ NULL,
/* DEVdestroy */ BSIM3v32destroy, /* DEVdestroy */ BSIM3v32destroy,
/* DEVmodDelete */ BSIM3v32mDelete, /* DEVmodDelete */ BSIM3v32mDelete,
/* DEVdelete */ BSIM3v32delete, /* DEVdelete */ BSIM3v32delete,
/* DEVsetic */ BSIM3v32getic, /* DEVsetic */ BSIM3v32getic,
/* DEVask */ BSIM3v32ask, /* DEVask */ BSIM3v32ask,
/* DEVmodAsk */ BSIM3v32mAsk, /* DEVmodAsk */ BSIM3v32mAsk,
@ -69,7 +69,7 @@ SPICEdev BSIM3v32info = {
#ifdef CIDER #ifdef CIDER
/* DEVdump */ NULL, /* DEVdump */ NULL,
/* DEVacct */ NULL, /* DEVacct */ NULL,
#endif #endif
/* DEVinstSize */ &BSIM3v32iSize, /* DEVinstSize */ &BSIM3v32iSize,
/* DEVmodSize */ &BSIM3v32mSize /* DEVmodSize */ &BSIM3v32mSize