devices/bsim3v32: whitespace cleanup
This commit is contained in:
parent
6801f77cc1
commit
0aee9a07c4
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@ -506,11 +506,11 @@ char *BSIM3v32names[] = {
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"Charge"
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"Charge"
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};
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};
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int BSIM3v32nSize = NUMELEMS(BSIM3v32names);
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int BSIM3v32nSize = NUMELEMS(BSIM3v32names);
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int BSIM3v32pTSize = NUMELEMS(BSIM3v32pTable);
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int BSIM3v32pTSize = NUMELEMS(BSIM3v32pTable);
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int BSIM3v32mPTSize = NUMELEMS(BSIM3v32mPTable);
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int BSIM3v32mPTSize = NUMELEMS(BSIM3v32mPTable);
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int BSIM3v32iSize = sizeof(BSIM3v32instance);
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int BSIM3v32iSize = sizeof(BSIM3v32instance);
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int BSIM3v32mSize = sizeof(BSIM3v32model);
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int BSIM3v32mSize = sizeof(BSIM3v32model);
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@ -39,9 +39,9 @@ double m;
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for (; model != NULL; model = model->BSIM3v32nextModel)
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for (; model != NULL; model = model->BSIM3v32nextModel)
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{ for (here = model->BSIM3v32instances; here!= NULL;
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{ for (here = model->BSIM3v32instances; here!= NULL;
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here = here->BSIM3v32nextInstance)
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here = here->BSIM3v32nextInstance)
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{
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{
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if (here->BSIM3v32mode >= 0)
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if (here->BSIM3v32mode >= 0)
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{ Gm = here->BSIM3v32gm;
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{ Gm = here->BSIM3v32gm;
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Gmbs = here->BSIM3v32gmbs;
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Gmbs = here->BSIM3v32gmbs;
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FwdSum = Gm + Gmbs;
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FwdSum = Gm + Gmbs;
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RevSum = 0.0;
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RevSum = 0.0;
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@ -59,7 +59,7 @@ double m;
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gbspb = 0.0;
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gbspb = 0.0;
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gbspsp = 0.0;
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gbspsp = 0.0;
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if (here->BSIM3v32nqsMod == 0)
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if (here->BSIM3v32nqsMod == 0)
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{ cggb = here->BSIM3v32cggb;
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{ cggb = here->BSIM3v32cggb;
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cgsb = here->BSIM3v32cgsb;
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cgsb = here->BSIM3v32cgsb;
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cgdb = here->BSIM3v32cgdb;
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cgdb = here->BSIM3v32cgdb;
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@ -73,19 +73,19 @@ double m;
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cddb = here->BSIM3v32cddb;
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cddb = here->BSIM3v32cddb;
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xgtg = xgtd = xgts = xgtb = 0.0;
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xgtg = xgtd = xgts = xgtb = 0.0;
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sxpart = 0.6;
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sxpart = 0.6;
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dxpart = 0.4;
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dxpart = 0.4;
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ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
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ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
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= ddxpart_dVs = 0.0;
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= ddxpart_dVs = 0.0;
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dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
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dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
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= dsxpart_dVs = 0.0;
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= dsxpart_dVs = 0.0;
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}
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}
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else
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else
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{ cggb = cgdb = cgsb = 0.0;
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{ cggb = cgdb = cgsb = 0.0;
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cbgb = cbdb = cbsb = 0.0;
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cbgb = cbdb = cbsb = 0.0;
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cdgb = cddb = cdsb = 0.0;
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cdgb = cddb = cdsb = 0.0;
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xgtg = here->BSIM3v32gtg;
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xgtg = here->BSIM3v32gtg;
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xgtd = here->BSIM3v32gtd;
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xgtd = here->BSIM3v32gtd;
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xgts = here->BSIM3v32gts;
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xgts = here->BSIM3v32gts;
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xgtb = here->BSIM3v32gtb;
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xgtb = here->BSIM3v32gtb;
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@ -95,46 +95,46 @@ double m;
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xcqsb = here->BSIM3v32cqsb * omega;
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xcqsb = here->BSIM3v32cqsb * omega;
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xcqbb = here->BSIM3v32cqbb * omega;
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xcqbb = here->BSIM3v32cqbb * omega;
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CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV
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CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV
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* here->pParam->BSIM3v32leffCV;
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* here->pParam->BSIM3v32leffCV;
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qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk);
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qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk);
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if (fabs(qcheq) <= 1.0e-5 * CoxWL)
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if (fabs(qcheq) <= 1.0e-5 * CoxWL)
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{ if (model->BSIM3v32xpart < 0.5)
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{ if (model->BSIM3v32xpart < 0.5)
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{ dxpart = 0.4;
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{ dxpart = 0.4;
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}
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}
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else if (model->BSIM3v32xpart > 0.5)
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else if (model->BSIM3v32xpart > 0.5)
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{ dxpart = 0.0;
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{ dxpart = 0.0;
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}
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}
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else
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else
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{ dxpart = 0.5;
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{ dxpart = 0.5;
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}
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}
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ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
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ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
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= ddxpart_dVs = 0.0;
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= ddxpart_dVs = 0.0;
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}
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}
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else
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else
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{ dxpart = here->BSIM3v32qdrn / qcheq;
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{ dxpart = here->BSIM3v32qdrn / qcheq;
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Cdd = here->BSIM3v32cddb;
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Cdd = here->BSIM3v32cddb;
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Csd = -(here->BSIM3v32cgdb + here->BSIM3v32cddb
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Csd = -(here->BSIM3v32cgdb + here->BSIM3v32cddb
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+ here->BSIM3v32cbdb);
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+ here->BSIM3v32cbdb);
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ddxpart_dVd = (Cdd - dxpart * (Cdd + Csd)) / qcheq;
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ddxpart_dVd = (Cdd - dxpart * (Cdd + Csd)) / qcheq;
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Cdg = here->BSIM3v32cdgb;
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Cdg = here->BSIM3v32cdgb;
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Csg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb
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Csg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb
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+ here->BSIM3v32cbgb);
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+ here->BSIM3v32cbgb);
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ddxpart_dVg = (Cdg - dxpart * (Cdg + Csg)) / qcheq;
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ddxpart_dVg = (Cdg - dxpart * (Cdg + Csg)) / qcheq;
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Cds = here->BSIM3v32cdsb;
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Cds = here->BSIM3v32cdsb;
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Css = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb
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Css = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb
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+ here->BSIM3v32cbsb);
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+ here->BSIM3v32cbsb);
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ddxpart_dVs = (Cds - dxpart * (Cds + Css)) / qcheq;
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ddxpart_dVs = (Cds - dxpart * (Cds + Css)) / qcheq;
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ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg
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ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg
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+ ddxpart_dVs);
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+ ddxpart_dVs);
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}
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}
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sxpart = 1.0 - dxpart;
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sxpart = 1.0 - dxpart;
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dsxpart_dVd = -ddxpart_dVd;
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dsxpart_dVd = -ddxpart_dVd;
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dsxpart_dVg = -ddxpart_dVg;
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dsxpart_dVg = -ddxpart_dVg;
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dsxpart_dVs = -ddxpart_dVs;
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dsxpart_dVs = -ddxpart_dVs;
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dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs);
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dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs);
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}
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}
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}
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}
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else
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else
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@ -156,7 +156,7 @@ double m;
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gbspb = here->BSIM3v32gbbs;
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gbspb = here->BSIM3v32gbbs;
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gbspdp = -(gbspg + gbspsp + gbspb);
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gbspdp = -(gbspg + gbspsp + gbspb);
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if (here->BSIM3v32nqsMod == 0)
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if (here->BSIM3v32nqsMod == 0)
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{ cggb = here->BSIM3v32cggb;
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{ cggb = here->BSIM3v32cggb;
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cgsb = here->BSIM3v32cgdb;
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cgsb = here->BSIM3v32cgdb;
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cgdb = here->BSIM3v32cgsb;
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cgdb = here->BSIM3v32cgsb;
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@ -170,19 +170,19 @@ double m;
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cddb = -(here->BSIM3v32cdsb + cgdb + cbdb);
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cddb = -(here->BSIM3v32cdsb + cgdb + cbdb);
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xgtg = xgtd = xgts = xgtb = 0.0;
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xgtg = xgtd = xgts = xgtb = 0.0;
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sxpart = 0.4;
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sxpart = 0.4;
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dxpart = 0.6;
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dxpart = 0.6;
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ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
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ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
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= ddxpart_dVs = 0.0;
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= ddxpart_dVs = 0.0;
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dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
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dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
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= dsxpart_dVs = 0.0;
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= dsxpart_dVs = 0.0;
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}
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}
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else
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else
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{ cggb = cgdb = cgsb = 0.0;
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{ cggb = cgdb = cgsb = 0.0;
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cbgb = cbdb = cbsb = 0.0;
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cbgb = cbdb = cbsb = 0.0;
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cdgb = cddb = cdsb = 0.0;
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cdgb = cddb = cdsb = 0.0;
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xgtg = here->BSIM3v32gtg;
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xgtg = here->BSIM3v32gtg;
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xgtd = here->BSIM3v32gts;
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xgtd = here->BSIM3v32gts;
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xgts = here->BSIM3v32gtd;
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xgts = here->BSIM3v32gtd;
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xgtb = here->BSIM3v32gtb;
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xgtb = here->BSIM3v32gtb;
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@ -192,50 +192,50 @@ double m;
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xcqsb = here->BSIM3v32cqdb * omega;
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xcqsb = here->BSIM3v32cqdb * omega;
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xcqbb = here->BSIM3v32cqbb * omega;
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xcqbb = here->BSIM3v32cqbb * omega;
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CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV
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CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV
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* here->pParam->BSIM3v32leffCV;
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* here->pParam->BSIM3v32leffCV;
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qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk);
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qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk);
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if (fabs(qcheq) <= 1.0e-5 * CoxWL)
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if (fabs(qcheq) <= 1.0e-5 * CoxWL)
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{ if (model->BSIM3v32xpart < 0.5)
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{ if (model->BSIM3v32xpart < 0.5)
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{ sxpart = 0.4;
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{ sxpart = 0.4;
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}
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}
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else if (model->BSIM3v32xpart > 0.5)
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else if (model->BSIM3v32xpart > 0.5)
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{ sxpart = 0.0;
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{ sxpart = 0.0;
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}
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}
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else
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else
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{ sxpart = 0.5;
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{ sxpart = 0.5;
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}
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}
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dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
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dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
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= dsxpart_dVs = 0.0;
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= dsxpart_dVs = 0.0;
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}
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}
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else
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else
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{ sxpart = here->BSIM3v32qdrn / qcheq;
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{ sxpart = here->BSIM3v32qdrn / qcheq;
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Css = here->BSIM3v32cddb;
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Css = here->BSIM3v32cddb;
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Cds = -(here->BSIM3v32cgdb + here->BSIM3v32cddb
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Cds = -(here->BSIM3v32cgdb + here->BSIM3v32cddb
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+ here->BSIM3v32cbdb);
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+ here->BSIM3v32cbdb);
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dsxpart_dVs = (Css - sxpart * (Css + Cds)) / qcheq;
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dsxpart_dVs = (Css - sxpart * (Css + Cds)) / qcheq;
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Csg = here->BSIM3v32cdgb;
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Csg = here->BSIM3v32cdgb;
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Cdg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb
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Cdg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb
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+ here->BSIM3v32cbgb);
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+ here->BSIM3v32cbgb);
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dsxpart_dVg = (Csg - sxpart * (Csg + Cdg)) / qcheq;
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dsxpart_dVg = (Csg - sxpart * (Csg + Cdg)) / qcheq;
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Csd = here->BSIM3v32cdsb;
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Csd = here->BSIM3v32cdsb;
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Cdd = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb
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Cdd = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb
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+ here->BSIM3v32cbsb);
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+ here->BSIM3v32cbsb);
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dsxpart_dVd = (Csd - sxpart * (Csd + Cdd)) / qcheq;
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dsxpart_dVd = (Csd - sxpart * (Csd + Cdd)) / qcheq;
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dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg
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dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg
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+ dsxpart_dVs);
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+ dsxpart_dVs);
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}
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}
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dxpart = 1.0 - sxpart;
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dxpart = 1.0 - sxpart;
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ddxpart_dVd = -dsxpart_dVd;
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ddxpart_dVd = -dsxpart_dVd;
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ddxpart_dVg = -dsxpart_dVg;
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ddxpart_dVg = -dsxpart_dVg;
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ddxpart_dVs = -dsxpart_dVs;
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ddxpart_dVs = -dsxpart_dVs;
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ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs);
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ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs);
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}
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}
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}
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}
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T1 = *(ckt->CKTstate0 + here->BSIM3v32qdef) * here->BSIM3v32gtau;
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T1 = *(ckt->CKTstate0 + here->BSIM3v32qdef) * here->BSIM3v32gtau;
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gdpr = here->BSIM3v32drainConductance;
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gdpr = here->BSIM3v32drainConductance;
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gspr = here->BSIM3v32sourceConductance;
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gspr = here->BSIM3v32sourceConductance;
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gds = here->BSIM3v32gds;
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gds = here->BSIM3v32gds;
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capbd = here->BSIM3v32capbd;
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capbd = here->BSIM3v32capbd;
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capbs = here->BSIM3v32capbs;
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capbs = here->BSIM3v32capbs;
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GSoverlapCap = here->BSIM3v32cgso;
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GSoverlapCap = here->BSIM3v32cgso;
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GDoverlapCap = here->BSIM3v32cgdo;
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GDoverlapCap = here->BSIM3v32cgdo;
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GBoverlapCap = here->pParam->BSIM3v32cgbo;
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GBoverlapCap = here->pParam->BSIM3v32cgbo;
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xcdgb = (cdgb - GDoverlapCap) * omega;
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xcdgb = (cdgb - GDoverlapCap) * omega;
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xcddb = (cddb + capbd + GDoverlapCap) * omega;
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xcddb = (cddb + capbd + GDoverlapCap) * omega;
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@ -255,106 +255,106 @@ double m;
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xcsdb = -(cgdb + cbdb + cddb) * omega;
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xcsdb = -(cgdb + cbdb + cddb) * omega;
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xcssb = (capbs + GSoverlapCap - (cgsb + cbsb + cdsb)) * omega;
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xcssb = (capbs + GSoverlapCap - (cgsb + cbsb + cdsb)) * omega;
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xcggb = (cggb + GDoverlapCap + GSoverlapCap + GBoverlapCap)
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xcggb = (cggb + GDoverlapCap + GSoverlapCap + GBoverlapCap)
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* omega;
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* omega;
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xcgdb = (cgdb - GDoverlapCap ) * omega;
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xcgdb = (cgdb - GDoverlapCap ) * omega;
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xcgsb = (cgsb - GSoverlapCap) * omega;
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xcgsb = (cgsb - GSoverlapCap) * omega;
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xcbgb = (cbgb - GBoverlapCap) * omega;
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xcbgb = (cbgb - GBoverlapCap) * omega;
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xcbdb = (cbdb - capbd ) * omega;
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xcbdb = (cbdb - capbd ) * omega;
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xcbsb = (cbsb - capbs ) * omega;
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xcbsb = (cbsb - capbs ) * omega;
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m = here->BSIM3v32m;
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m = here->BSIM3v32m;
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*(here->BSIM3v32GgPtr + 1) += m * xcggb;
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*(here->BSIM3v32GgPtr + 1) += m * xcggb;
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*(here->BSIM3v32BbPtr + 1) -=
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*(here->BSIM3v32BbPtr + 1) -=
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m * (xcbgb + xcbdb + xcbsb);
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m * (xcbgb + xcbdb + xcbsb);
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*(here->BSIM3v32DPdpPtr + 1) += m * xcddb;
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*(here->BSIM3v32DPdpPtr + 1) += m * xcddb;
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*(here->BSIM3v32SPspPtr + 1) += m * xcssb;
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*(here->BSIM3v32SPspPtr + 1) += m * xcssb;
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*(here->BSIM3v32GbPtr + 1) -=
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*(here->BSIM3v32GbPtr + 1) -=
|
||||||
m * (xcggb + xcgdb + xcgsb);
|
m * (xcggb + xcgdb + xcgsb);
|
||||||
*(here->BSIM3v32GdpPtr + 1) += m * xcgdb;
|
*(here->BSIM3v32GdpPtr + 1) += m * xcgdb;
|
||||||
*(here->BSIM3v32GspPtr + 1) += m * xcgsb;
|
*(here->BSIM3v32GspPtr + 1) += m * xcgsb;
|
||||||
*(here->BSIM3v32BgPtr + 1) += m * xcbgb;
|
*(here->BSIM3v32BgPtr + 1) += m * xcbgb;
|
||||||
*(here->BSIM3v32BdpPtr + 1) += m * xcbdb;
|
*(here->BSIM3v32BdpPtr + 1) += m * xcbdb;
|
||||||
*(here->BSIM3v32BspPtr + 1) += m * xcbsb;
|
*(here->BSIM3v32BspPtr + 1) += m * xcbsb;
|
||||||
*(here->BSIM3v32DPgPtr + 1) += m * xcdgb;
|
*(here->BSIM3v32DPgPtr + 1) += m * xcdgb;
|
||||||
*(here->BSIM3v32DPbPtr + 1) -=
|
*(here->BSIM3v32DPbPtr + 1) -=
|
||||||
m * (xcdgb + xcddb + xcdsb);
|
m * (xcdgb + xcddb + xcdsb);
|
||||||
*(here->BSIM3v32DPspPtr + 1) += m * xcdsb;
|
*(here->BSIM3v32DPspPtr + 1) += m * xcdsb;
|
||||||
*(here->BSIM3v32SPgPtr + 1) += m * xcsgb;
|
*(here->BSIM3v32SPgPtr + 1) += m * xcsgb;
|
||||||
*(here->BSIM3v32SPbPtr + 1) -=
|
*(here->BSIM3v32SPbPtr + 1) -=
|
||||||
m * (xcsgb + xcsdb + xcssb);
|
m * (xcsgb + xcsdb + xcssb);
|
||||||
*(here->BSIM3v32SPdpPtr + 1) += m * xcsdb;
|
*(here->BSIM3v32SPdpPtr + 1) += m * xcsdb;
|
||||||
|
|
||||||
*(here->BSIM3v32DdPtr) += m * gdpr;
|
*(here->BSIM3v32DdPtr) += m * gdpr;
|
||||||
*(here->BSIM3v32SsPtr) += m * gspr;
|
*(here->BSIM3v32SsPtr) += m * gspr;
|
||||||
*(here->BSIM3v32BbPtr) +=
|
*(here->BSIM3v32BbPtr) +=
|
||||||
m * (gbd + gbs - here->BSIM3v32gbbs);
|
m * (gbd + gbs - here->BSIM3v32gbbs);
|
||||||
*(here->BSIM3v32DPdpPtr) +=
|
*(here->BSIM3v32DPdpPtr) +=
|
||||||
m * (gdpr + gds + gbd + RevSum +
|
m * (gdpr + gds + gbd + RevSum +
|
||||||
dxpart * xgtd + T1 * ddxpart_dVd +
|
dxpart * xgtd + T1 * ddxpart_dVd +
|
||||||
gbdpdp);
|
gbdpdp);
|
||||||
*(here->BSIM3v32SPspPtr) +=
|
*(here->BSIM3v32SPspPtr) +=
|
||||||
m * (gspr + gds + gbs + FwdSum +
|
m * (gspr + gds + gbs + FwdSum +
|
||||||
sxpart * xgts + T1 * dsxpart_dVs +
|
sxpart * xgts + T1 * dsxpart_dVs +
|
||||||
gbspsp);
|
gbspsp);
|
||||||
|
|
||||||
*(here->BSIM3v32DdpPtr) -= m * gdpr;
|
*(here->BSIM3v32DdpPtr) -= m * gdpr;
|
||||||
*(here->BSIM3v32SspPtr) -= m * gspr;
|
*(here->BSIM3v32SspPtr) -= m * gspr;
|
||||||
|
|
||||||
*(here->BSIM3v32BgPtr) -= m * here->BSIM3v32gbgs;
|
*(here->BSIM3v32BgPtr) -= m * here->BSIM3v32gbgs;
|
||||||
*(here->BSIM3v32BdpPtr) -= m * (gbd - gbbdp);
|
*(here->BSIM3v32BdpPtr) -= m * (gbd - gbbdp);
|
||||||
*(here->BSIM3v32BspPtr) -= m * (gbs - gbbsp);
|
*(here->BSIM3v32BspPtr) -= m * (gbs - gbbsp);
|
||||||
|
|
||||||
*(here->BSIM3v32DPdPtr) -= m * gdpr;
|
*(here->BSIM3v32DPdPtr) -= m * gdpr;
|
||||||
*(here->BSIM3v32DPgPtr) +=
|
*(here->BSIM3v32DPgPtr) +=
|
||||||
m * (Gm + dxpart * xgtg + T1 * ddxpart_dVg +
|
m * (Gm + dxpart * xgtg + T1 * ddxpart_dVg +
|
||||||
gbdpg);
|
gbdpg);
|
||||||
*(here->BSIM3v32DPbPtr) -=
|
*(here->BSIM3v32DPbPtr) -=
|
||||||
m * (gbd - Gmbs - dxpart * xgtb -
|
m * (gbd - Gmbs - dxpart * xgtb -
|
||||||
T1 * ddxpart_dVb - gbdpb);
|
T1 * ddxpart_dVb - gbdpb);
|
||||||
*(here->BSIM3v32DPspPtr) -=
|
*(here->BSIM3v32DPspPtr) -=
|
||||||
m * (gds + FwdSum - dxpart * xgts -
|
m * (gds + FwdSum - dxpart * xgts -
|
||||||
T1 * ddxpart_dVs - gbdpsp);
|
T1 * ddxpart_dVs - gbdpsp);
|
||||||
|
|
||||||
*(here->BSIM3v32SPgPtr) -=
|
*(here->BSIM3v32SPgPtr) -=
|
||||||
m * (Gm - sxpart * xgtg - T1 * dsxpart_dVg -
|
m * (Gm - sxpart * xgtg - T1 * dsxpart_dVg -
|
||||||
gbspg);
|
gbspg);
|
||||||
*(here->BSIM3v32SPsPtr) -= m * gspr;
|
*(here->BSIM3v32SPsPtr) -= m * gspr;
|
||||||
*(here->BSIM3v32SPbPtr) -=
|
*(here->BSIM3v32SPbPtr) -=
|
||||||
m * (gbs + Gmbs - sxpart * xgtb -
|
m * (gbs + Gmbs - sxpart * xgtb -
|
||||||
T1 * dsxpart_dVb - gbspb);
|
T1 * dsxpart_dVb - gbspb);
|
||||||
*(here->BSIM3v32SPdpPtr) -=
|
*(here->BSIM3v32SPdpPtr) -=
|
||||||
m * (gds + RevSum - sxpart * xgtd -
|
m * (gds + RevSum - sxpart * xgtd -
|
||||||
T1 * dsxpart_dVd - gbspdp);
|
T1 * dsxpart_dVd - gbspdp);
|
||||||
|
|
||||||
*(here->BSIM3v32GgPtr) -= m * xgtg;
|
*(here->BSIM3v32GgPtr) -= m * xgtg;
|
||||||
*(here->BSIM3v32GbPtr) -= m * xgtb;
|
*(here->BSIM3v32GbPtr) -= m * xgtb;
|
||||||
*(here->BSIM3v32GdpPtr) -= m * xgtd;
|
*(here->BSIM3v32GdpPtr) -= m * xgtd;
|
||||||
*(here->BSIM3v32GspPtr) -= m * xgts;
|
*(here->BSIM3v32GspPtr) -= m * xgts;
|
||||||
|
|
||||||
if (here->BSIM3v32nqsMod)
|
if (here->BSIM3v32nqsMod)
|
||||||
{
|
{
|
||||||
*(here->BSIM3v32QqPtr + 1) +=
|
*(here->BSIM3v32QqPtr + 1) +=
|
||||||
m * omega * ScalingFactor;
|
m * omega * ScalingFactor;
|
||||||
*(here->BSIM3v32QgPtr + 1) -= m * xcqgb;
|
*(here->BSIM3v32QgPtr + 1) -= m * xcqgb;
|
||||||
*(here->BSIM3v32QdpPtr + 1) -= m * xcqdb;
|
*(here->BSIM3v32QdpPtr + 1) -= m * xcqdb;
|
||||||
*(here->BSIM3v32QspPtr + 1) -= m * xcqsb;
|
*(here->BSIM3v32QspPtr + 1) -= m * xcqsb;
|
||||||
*(here->BSIM3v32QbPtr + 1) -= m * xcqbb;
|
*(here->BSIM3v32QbPtr + 1) -= m * xcqbb;
|
||||||
|
|
||||||
*(here->BSIM3v32QqPtr) += m * here->BSIM3v32gtau;
|
*(here->BSIM3v32QqPtr) += m * here->BSIM3v32gtau;
|
||||||
|
|
||||||
*(here->BSIM3v32DPqPtr) +=
|
*(here->BSIM3v32DPqPtr) +=
|
||||||
m * (dxpart * here->BSIM3v32gtau);
|
m * (dxpart * here->BSIM3v32gtau);
|
||||||
*(here->BSIM3v32SPqPtr) +=
|
*(here->BSIM3v32SPqPtr) +=
|
||||||
m * (sxpart * here->BSIM3v32gtau);
|
m * (sxpart * here->BSIM3v32gtau);
|
||||||
*(here->BSIM3v32GqPtr) -= m * here->BSIM3v32gtau;
|
*(here->BSIM3v32GqPtr) -= m * here->BSIM3v32gtau;
|
||||||
|
|
||||||
*(here->BSIM3v32QgPtr) += m * xgtg;
|
*(here->BSIM3v32QgPtr) += m * xgtg;
|
||||||
*(here->BSIM3v32QdpPtr) += m * xgtd;
|
*(here->BSIM3v32QdpPtr) += m * xgtd;
|
||||||
*(here->BSIM3v32QspPtr) += m * xgts;
|
*(here->BSIM3v32QspPtr) += m * xgts;
|
||||||
*(here->BSIM3v32QbPtr) += m * xgtb;
|
*(here->BSIM3v32QbPtr) += m * xgtb;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
return(OK);
|
return(OK);
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -19,7 +19,7 @@
|
||||||
|
|
||||||
int
|
int
|
||||||
BSIM3v32ask (CKTcircuit *ckt, GENinstance *inst, int which, IFvalue *value,
|
BSIM3v32ask (CKTcircuit *ckt, GENinstance *inst, int which, IFvalue *value,
|
||||||
IFvalue *select)
|
IFvalue *select)
|
||||||
{
|
{
|
||||||
BSIM3v32instance *here = (BSIM3v32instance*)inst;
|
BSIM3v32instance *here = (BSIM3v32instance*)inst;
|
||||||
|
|
||||||
|
|
@ -32,9 +32,9 @@ BSIM3v32instance *here = (BSIM3v32instance*)inst;
|
||||||
case BSIM3v32_W:
|
case BSIM3v32_W:
|
||||||
value->rValue = here->BSIM3v32w;
|
value->rValue = here->BSIM3v32w;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_M:
|
case BSIM3v32_M:
|
||||||
value->rValue = here->BSIM3v32m;
|
value->rValue = here->BSIM3v32m;
|
||||||
return (OK);
|
return (OK);
|
||||||
case BSIM3v32_AS:
|
case BSIM3v32_AS:
|
||||||
value->rValue = here->BSIM3v32sourceArea;
|
value->rValue = here->BSIM3v32sourceArea;
|
||||||
return(OK);
|
return(OK);
|
||||||
|
|
@ -94,11 +94,11 @@ BSIM3v32instance *here = (BSIM3v32instance*)inst;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_SOURCECONDUCT:
|
case BSIM3v32_SOURCECONDUCT:
|
||||||
value->rValue = here->BSIM3v32sourceConductance;
|
value->rValue = here->BSIM3v32sourceConductance;
|
||||||
value->rValue *= here->BSIM3v32m;
|
value->rValue *= here->BSIM3v32m;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_DRAINCONDUCT:
|
case BSIM3v32_DRAINCONDUCT:
|
||||||
value->rValue = here->BSIM3v32drainConductance;
|
value->rValue = here->BSIM3v32drainConductance;
|
||||||
value->rValue *= here->BSIM3v32m;
|
value->rValue *= here->BSIM3v32m;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_VBD:
|
case BSIM3v32_VBD:
|
||||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32vbd);
|
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32vbd);
|
||||||
|
|
@ -114,103 +114,103 @@ BSIM3v32instance *here = (BSIM3v32instance*)inst;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_CD:
|
case BSIM3v32_CD:
|
||||||
value->rValue = here->BSIM3v32cd;
|
value->rValue = here->BSIM3v32cd;
|
||||||
value->rValue *= here->BSIM3v32m;
|
value->rValue *= here->BSIM3v32m;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_CBS:
|
case BSIM3v32_CBS:
|
||||||
value->rValue = here->BSIM3v32cbs;
|
value->rValue = here->BSIM3v32cbs;
|
||||||
value->rValue *= here->BSIM3v32m;
|
value->rValue *= here->BSIM3v32m;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_CBD:
|
case BSIM3v32_CBD:
|
||||||
value->rValue = here->BSIM3v32cbd;
|
value->rValue = here->BSIM3v32cbd;
|
||||||
value->rValue *= here->BSIM3v32m;
|
value->rValue *= here->BSIM3v32m;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_GM:
|
case BSIM3v32_GM:
|
||||||
value->rValue = here->BSIM3v32gm;
|
value->rValue = here->BSIM3v32gm;
|
||||||
value->rValue *= here->BSIM3v32m;
|
value->rValue *= here->BSIM3v32m;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_GDS:
|
case BSIM3v32_GDS:
|
||||||
value->rValue = here->BSIM3v32gds;
|
value->rValue = here->BSIM3v32gds;
|
||||||
value->rValue *= here->BSIM3v32m;
|
value->rValue *= here->BSIM3v32m;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_GMBS:
|
case BSIM3v32_GMBS:
|
||||||
value->rValue = here->BSIM3v32gmbs;
|
value->rValue = here->BSIM3v32gmbs;
|
||||||
value->rValue *= here->BSIM3v32m;
|
value->rValue *= here->BSIM3v32m;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_GBD:
|
case BSIM3v32_GBD:
|
||||||
value->rValue = here->BSIM3v32gbd;
|
value->rValue = here->BSIM3v32gbd;
|
||||||
value->rValue *= here->BSIM3v32m;
|
value->rValue *= here->BSIM3v32m;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_GBS:
|
case BSIM3v32_GBS:
|
||||||
value->rValue = here->BSIM3v32gbs;
|
value->rValue = here->BSIM3v32gbs;
|
||||||
value->rValue *= here->BSIM3v32m;
|
value->rValue *= here->BSIM3v32m;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_QB:
|
case BSIM3v32_QB:
|
||||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qb);
|
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qb);
|
||||||
value->rValue *= here->BSIM3v32m;
|
value->rValue *= here->BSIM3v32m;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_CQB:
|
case BSIM3v32_CQB:
|
||||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32cqb);
|
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32cqb);
|
||||||
value->rValue *= here->BSIM3v32m;
|
value->rValue *= here->BSIM3v32m;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_QG:
|
case BSIM3v32_QG:
|
||||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qg);
|
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qg);
|
||||||
value->rValue *= here->BSIM3v32m;
|
value->rValue *= here->BSIM3v32m;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_CQG:
|
case BSIM3v32_CQG:
|
||||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32cqg);
|
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32cqg);
|
||||||
value->rValue *= here->BSIM3v32m;
|
value->rValue *= here->BSIM3v32m;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_QD:
|
case BSIM3v32_QD:
|
||||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qd);
|
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qd);
|
||||||
value->rValue *= here->BSIM3v32m;
|
value->rValue *= here->BSIM3v32m;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_CQD:
|
case BSIM3v32_CQD:
|
||||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32cqd);
|
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32cqd);
|
||||||
value->rValue *= here->BSIM3v32m;
|
value->rValue *= here->BSIM3v32m;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_CGG:
|
case BSIM3v32_CGG:
|
||||||
value->rValue = here->BSIM3v32cggb;
|
value->rValue = here->BSIM3v32cggb;
|
||||||
value->rValue *= here->BSIM3v32m;
|
value->rValue *= here->BSIM3v32m;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_CGD:
|
case BSIM3v32_CGD:
|
||||||
value->rValue = here->BSIM3v32cgdb;
|
value->rValue = here->BSIM3v32cgdb;
|
||||||
value->rValue *= here->BSIM3v32m;
|
value->rValue *= here->BSIM3v32m;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_CGS:
|
case BSIM3v32_CGS:
|
||||||
value->rValue = here->BSIM3v32cgsb;
|
value->rValue = here->BSIM3v32cgsb;
|
||||||
value->rValue *= here->BSIM3v32m;
|
value->rValue *= here->BSIM3v32m;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_CDG:
|
case BSIM3v32_CDG:
|
||||||
value->rValue = here->BSIM3v32cdgb;
|
value->rValue = here->BSIM3v32cdgb;
|
||||||
value->rValue *= here->BSIM3v32m;
|
value->rValue *= here->BSIM3v32m;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_CDD:
|
case BSIM3v32_CDD:
|
||||||
value->rValue = here->BSIM3v32cddb;
|
value->rValue = here->BSIM3v32cddb;
|
||||||
value->rValue *= here->BSIM3v32m;
|
value->rValue *= here->BSIM3v32m;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_CDS:
|
case BSIM3v32_CDS:
|
||||||
value->rValue = here->BSIM3v32cdsb;
|
value->rValue = here->BSIM3v32cdsb;
|
||||||
value->rValue *= here->BSIM3v32m;
|
value->rValue *= here->BSIM3v32m;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_CBG:
|
case BSIM3v32_CBG:
|
||||||
value->rValue = here->BSIM3v32cbgb;
|
value->rValue = here->BSIM3v32cbgb;
|
||||||
value->rValue *= here->BSIM3v32m;
|
value->rValue *= here->BSIM3v32m;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_CBDB:
|
case BSIM3v32_CBDB:
|
||||||
value->rValue = here->BSIM3v32cbdb;
|
value->rValue = here->BSIM3v32cbdb;
|
||||||
value->rValue *= here->BSIM3v32m;
|
value->rValue *= here->BSIM3v32m;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_CBSB:
|
case BSIM3v32_CBSB:
|
||||||
value->rValue = here->BSIM3v32cbsb;
|
value->rValue = here->BSIM3v32cbsb;
|
||||||
value->rValue *= here->BSIM3v32m;
|
value->rValue *= here->BSIM3v32m;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_CAPBD:
|
case BSIM3v32_CAPBD:
|
||||||
value->rValue = here->BSIM3v32capbd;
|
value->rValue = here->BSIM3v32capbd;
|
||||||
value->rValue *= here->BSIM3v32m;
|
value->rValue *= here->BSIM3v32m;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_CAPBS:
|
case BSIM3v32_CAPBS:
|
||||||
value->rValue = here->BSIM3v32capbs;
|
value->rValue = here->BSIM3v32capbs;
|
||||||
value->rValue *= here->BSIM3v32m;
|
value->rValue *= here->BSIM3v32m;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_VON:
|
case BSIM3v32_VON:
|
||||||
value->rValue = here->BSIM3v32von;
|
value->rValue = here->BSIM3v32von;
|
||||||
|
|
@ -220,11 +220,11 @@ BSIM3v32instance *here = (BSIM3v32instance*)inst;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_QBS:
|
case BSIM3v32_QBS:
|
||||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qbs);
|
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qbs);
|
||||||
value->rValue *= here->BSIM3v32m;
|
value->rValue *= here->BSIM3v32m;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_QBD:
|
case BSIM3v32_QBD:
|
||||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qbd);
|
value->rValue = *(ckt->CKTstate0 + here->BSIM3v32qbd);
|
||||||
value->rValue *= here->BSIM3v32m;
|
value->rValue *= here->BSIM3v32m;
|
||||||
return(OK);
|
return(OK);
|
||||||
default:
|
default:
|
||||||
return(E_BADPARM);
|
return(E_BADPARM);
|
||||||
|
|
|
||||||
|
|
@ -31,416 +31,416 @@ FILE *fplog;
|
||||||
if ((fplog = fopen("b3v32check.log", "w")) != NULL)
|
if ((fplog = fopen("b3v32check.log", "w")) != NULL)
|
||||||
{ pParam = here->pParam;
|
{ pParam = here->pParam;
|
||||||
|
|
||||||
fprintf (fplog,
|
fprintf (fplog,
|
||||||
"BSIM3 Model (Supports: v3.2, v3.2.2, v3.2.3, v3.2.4)\n");
|
"BSIM3 Model (Supports: v3.2, v3.2.2, v3.2.3, v3.2.4)\n");
|
||||||
fprintf (fplog, "Parameter Checking.\n");
|
fprintf (fplog, "Parameter Checking.\n");
|
||||||
fprintf (fplog, "Model = %s\n", model->BSIM3v32modName);
|
fprintf (fplog, "Model = %s\n", model->BSIM3v32modName);
|
||||||
fprintf (fplog, "W = %g, L = %g, M = %g\n", here->BSIM3v32w,
|
fprintf (fplog, "W = %g, L = %g, M = %g\n", here->BSIM3v32w,
|
||||||
here->BSIM3v32l, here->BSIM3v32m);
|
here->BSIM3v32l, here->BSIM3v32m);
|
||||||
|
|
||||||
if ((strcmp(model->BSIM3v32version, "3.2.4")) && (strcmp(model->BSIM3v32version, "3.24"))
|
if ((strcmp(model->BSIM3v32version, "3.2.4")) && (strcmp(model->BSIM3v32version, "3.24"))
|
||||||
&& (strcmp(model->BSIM3v32version, "3.2.3")) && (strcmp(model->BSIM3v32version, "3.23"))
|
&& (strcmp(model->BSIM3v32version, "3.2.3")) && (strcmp(model->BSIM3v32version, "3.23"))
|
||||||
&& (strcmp(model->BSIM3v32version, "3.2.2")) && (strcmp(model->BSIM3v32version, "3.22"))
|
&& (strcmp(model->BSIM3v32version, "3.2.2")) && (strcmp(model->BSIM3v32version, "3.22"))
|
||||||
&& (strcmp(model->BSIM3v32version, "3.2")) && (strcmp(model->BSIM3v32version, "3.20")))
|
&& (strcmp(model->BSIM3v32version, "3.2")) && (strcmp(model->BSIM3v32version, "3.20")))
|
||||||
{
|
{
|
||||||
fprintf (fplog,
|
fprintf (fplog,
|
||||||
"Warning: This model supports BSIM3v3.2, BSIM3v3.2.2, BSIM3v3.2.3, BSIM3v3.2.4\n");
|
"Warning: This model supports BSIM3v3.2, BSIM3v3.2.2, BSIM3v3.2.3, BSIM3v3.2.4\n");
|
||||||
fprintf (fplog,
|
fprintf (fplog,
|
||||||
"You specified a wrong version number. Working now with BSIM3v3.2.4.\n");
|
"You specified a wrong version number. Working now with BSIM3v3.2.4.\n");
|
||||||
printf ("Warning: This model supports BSIM3v3.2, BSIM3v3.2.2, BSIM3v3.2.3, BSIM3v3.2.4\n");
|
printf ("Warning: This model supports BSIM3v3.2, BSIM3v3.2.2, BSIM3v3.2.3, BSIM3v3.2.4\n");
|
||||||
printf ("You specified a wrong version number. Working now with BSIM3v3.2.4.\n");
|
printf ("You specified a wrong version number. Working now with BSIM3v3.2.4.\n");
|
||||||
}
|
}
|
||||||
|
|
||||||
if (pParam->BSIM3v32nlx < -pParam->BSIM3v32leff)
|
if (pParam->BSIM3v32nlx < -pParam->BSIM3v32leff)
|
||||||
{ fprintf(fplog, "Fatal: Nlx = %g is less than -Leff.\n",
|
{ fprintf(fplog, "Fatal: Nlx = %g is less than -Leff.\n",
|
||||||
pParam->BSIM3v32nlx);
|
pParam->BSIM3v32nlx);
|
||||||
printf("Fatal: Nlx = %g is less than -Leff.\n",
|
printf("Fatal: Nlx = %g is less than -Leff.\n",
|
||||||
pParam->BSIM3v32nlx);
|
pParam->BSIM3v32nlx);
|
||||||
Fatal_Flag = 1;
|
Fatal_Flag = 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (model->BSIM3v32tox <= 0.0)
|
if (model->BSIM3v32tox <= 0.0)
|
||||||
{ fprintf(fplog, "Fatal: Tox = %g is not positive.\n",
|
{ fprintf(fplog, "Fatal: Tox = %g is not positive.\n",
|
||||||
model->BSIM3v32tox);
|
model->BSIM3v32tox);
|
||||||
printf("Fatal: Tox = %g is not positive.\n", model->BSIM3v32tox);
|
printf("Fatal: Tox = %g is not positive.\n", model->BSIM3v32tox);
|
||||||
Fatal_Flag = 1;
|
Fatal_Flag = 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (model->BSIM3v32toxm <= 0.0)
|
if (model->BSIM3v32toxm <= 0.0)
|
||||||
{ fprintf(fplog, "Fatal: Toxm = %g is not positive.\n",
|
{ fprintf(fplog, "Fatal: Toxm = %g is not positive.\n",
|
||||||
model->BSIM3v32toxm);
|
model->BSIM3v32toxm);
|
||||||
printf("Fatal: Toxm = %g is not positive.\n", model->BSIM3v32toxm);
|
printf("Fatal: Toxm = %g is not positive.\n", model->BSIM3v32toxm);
|
||||||
Fatal_Flag = 1;
|
Fatal_Flag = 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (pParam->BSIM3v32npeak <= 0.0)
|
if (pParam->BSIM3v32npeak <= 0.0)
|
||||||
{ fprintf(fplog, "Fatal: Nch = %g is not positive.\n",
|
{ fprintf(fplog, "Fatal: Nch = %g is not positive.\n",
|
||||||
pParam->BSIM3v32npeak);
|
pParam->BSIM3v32npeak);
|
||||||
printf("Fatal: Nch = %g is not positive.\n",
|
printf("Fatal: Nch = %g is not positive.\n",
|
||||||
pParam->BSIM3v32npeak);
|
pParam->BSIM3v32npeak);
|
||||||
Fatal_Flag = 1;
|
Fatal_Flag = 1;
|
||||||
}
|
}
|
||||||
if (pParam->BSIM3v32nsub <= 0.0)
|
if (pParam->BSIM3v32nsub <= 0.0)
|
||||||
{ fprintf(fplog, "Fatal: Nsub = %g is not positive.\n",
|
{ fprintf(fplog, "Fatal: Nsub = %g is not positive.\n",
|
||||||
pParam->BSIM3v32nsub);
|
pParam->BSIM3v32nsub);
|
||||||
printf("Fatal: Nsub = %g is not positive.\n",
|
printf("Fatal: Nsub = %g is not positive.\n",
|
||||||
pParam->BSIM3v32nsub);
|
pParam->BSIM3v32nsub);
|
||||||
Fatal_Flag = 1;
|
Fatal_Flag = 1;
|
||||||
}
|
}
|
||||||
if (pParam->BSIM3v32ngate < 0.0)
|
if (pParam->BSIM3v32ngate < 0.0)
|
||||||
{ fprintf(fplog, "Fatal: Ngate = %g is not positive.\n",
|
{ fprintf(fplog, "Fatal: Ngate = %g is not positive.\n",
|
||||||
pParam->BSIM3v32ngate);
|
pParam->BSIM3v32ngate);
|
||||||
printf("Fatal: Ngate = %g Ngate is not positive.\n",
|
printf("Fatal: Ngate = %g Ngate is not positive.\n",
|
||||||
pParam->BSIM3v32ngate);
|
pParam->BSIM3v32ngate);
|
||||||
Fatal_Flag = 1;
|
Fatal_Flag = 1;
|
||||||
}
|
}
|
||||||
if (pParam->BSIM3v32ngate > 1.e25)
|
if (pParam->BSIM3v32ngate > 1.e25)
|
||||||
{ fprintf(fplog, "Fatal: Ngate = %g is too high.\n",
|
{ fprintf(fplog, "Fatal: Ngate = %g is too high.\n",
|
||||||
pParam->BSIM3v32ngate);
|
pParam->BSIM3v32ngate);
|
||||||
printf("Fatal: Ngate = %g Ngate is too high\n",
|
printf("Fatal: Ngate = %g Ngate is too high\n",
|
||||||
pParam->BSIM3v32ngate);
|
pParam->BSIM3v32ngate);
|
||||||
Fatal_Flag = 1;
|
Fatal_Flag = 1;
|
||||||
}
|
}
|
||||||
if (pParam->BSIM3v32xj <= 0.0)
|
if (pParam->BSIM3v32xj <= 0.0)
|
||||||
{ fprintf(fplog, "Fatal: Xj = %g is not positive.\n",
|
{ fprintf(fplog, "Fatal: Xj = %g is not positive.\n",
|
||||||
pParam->BSIM3v32xj);
|
pParam->BSIM3v32xj);
|
||||||
printf("Fatal: Xj = %g is not positive.\n", pParam->BSIM3v32xj);
|
printf("Fatal: Xj = %g is not positive.\n", pParam->BSIM3v32xj);
|
||||||
Fatal_Flag = 1;
|
Fatal_Flag = 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (pParam->BSIM3v32dvt1 < 0.0)
|
if (pParam->BSIM3v32dvt1 < 0.0)
|
||||||
{ fprintf(fplog, "Fatal: Dvt1 = %g is negative.\n",
|
{ fprintf(fplog, "Fatal: Dvt1 = %g is negative.\n",
|
||||||
pParam->BSIM3v32dvt1);
|
pParam->BSIM3v32dvt1);
|
||||||
printf("Fatal: Dvt1 = %g is negative.\n", pParam->BSIM3v32dvt1);
|
printf("Fatal: Dvt1 = %g is negative.\n", pParam->BSIM3v32dvt1);
|
||||||
Fatal_Flag = 1;
|
Fatal_Flag = 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (pParam->BSIM3v32dvt1w < 0.0)
|
if (pParam->BSIM3v32dvt1w < 0.0)
|
||||||
{ fprintf(fplog, "Fatal: Dvt1w = %g is negative.\n",
|
{ fprintf(fplog, "Fatal: Dvt1w = %g is negative.\n",
|
||||||
pParam->BSIM3v32dvt1w);
|
pParam->BSIM3v32dvt1w);
|
||||||
printf("Fatal: Dvt1w = %g is negative.\n", pParam->BSIM3v32dvt1w);
|
printf("Fatal: Dvt1w = %g is negative.\n", pParam->BSIM3v32dvt1w);
|
||||||
Fatal_Flag = 1;
|
Fatal_Flag = 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (pParam->BSIM3v32w0 == -pParam->BSIM3v32weff)
|
if (pParam->BSIM3v32w0 == -pParam->BSIM3v32weff)
|
||||||
{ fprintf(fplog, "Fatal: (W0 + Weff) = 0 causing divided-by-zero.\n");
|
{ fprintf(fplog, "Fatal: (W0 + Weff) = 0 causing divided-by-zero.\n");
|
||||||
printf("Fatal: (W0 + Weff) = 0 causing divided-by-zero.\n");
|
printf("Fatal: (W0 + Weff) = 0 causing divided-by-zero.\n");
|
||||||
Fatal_Flag = 1;
|
Fatal_Flag = 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (pParam->BSIM3v32dsub < 0.0)
|
if (pParam->BSIM3v32dsub < 0.0)
|
||||||
{ fprintf(fplog, "Fatal: Dsub = %g is negative.\n", pParam->BSIM3v32dsub);
|
{ fprintf(fplog, "Fatal: Dsub = %g is negative.\n", pParam->BSIM3v32dsub);
|
||||||
printf("Fatal: Dsub = %g is negative.\n", pParam->BSIM3v32dsub);
|
printf("Fatal: Dsub = %g is negative.\n", pParam->BSIM3v32dsub);
|
||||||
Fatal_Flag = 1;
|
Fatal_Flag = 1;
|
||||||
}
|
}
|
||||||
if (pParam->BSIM3v32b1 == -pParam->BSIM3v32weff)
|
if (pParam->BSIM3v32b1 == -pParam->BSIM3v32weff)
|
||||||
{ fprintf(fplog, "Fatal: (B1 + Weff) = 0 causing divided-by-zero.\n");
|
{ fprintf(fplog, "Fatal: (B1 + Weff) = 0 causing divided-by-zero.\n");
|
||||||
printf("Fatal: (B1 + Weff) = 0 causing divided-by-zero.\n");
|
printf("Fatal: (B1 + Weff) = 0 causing divided-by-zero.\n");
|
||||||
Fatal_Flag = 1;
|
Fatal_Flag = 1;
|
||||||
}
|
}
|
||||||
if (pParam->BSIM3v32u0temp <= 0.0)
|
if (pParam->BSIM3v32u0temp <= 0.0)
|
||||||
{ fprintf(fplog, "Fatal: u0 at current temperature = %g is not positive.\n", pParam->BSIM3v32u0temp);
|
{ fprintf(fplog, "Fatal: u0 at current temperature = %g is not positive.\n", pParam->BSIM3v32u0temp);
|
||||||
printf("Fatal: u0 at current temperature = %g is not positive.\n",
|
printf("Fatal: u0 at current temperature = %g is not positive.\n",
|
||||||
pParam->BSIM3v32u0temp);
|
pParam->BSIM3v32u0temp);
|
||||||
Fatal_Flag = 1;
|
Fatal_Flag = 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Check delta parameter */
|
/* Check delta parameter */
|
||||||
if (pParam->BSIM3v32delta < 0.0)
|
if (pParam->BSIM3v32delta < 0.0)
|
||||||
{ fprintf(fplog, "Fatal: Delta = %g is less than zero.\n",
|
{ fprintf(fplog, "Fatal: Delta = %g is less than zero.\n",
|
||||||
pParam->BSIM3v32delta);
|
pParam->BSIM3v32delta);
|
||||||
printf("Fatal: Delta = %g is less than zero.\n", pParam->BSIM3v32delta);
|
printf("Fatal: Delta = %g is less than zero.\n", pParam->BSIM3v32delta);
|
||||||
Fatal_Flag = 1;
|
Fatal_Flag = 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (pParam->BSIM3v32vsattemp <= 0.0)
|
if (pParam->BSIM3v32vsattemp <= 0.0)
|
||||||
{ fprintf(fplog, "Fatal: Vsat at current temperature = %g is not positive.\n", pParam->BSIM3v32vsattemp);
|
{ fprintf(fplog, "Fatal: Vsat at current temperature = %g is not positive.\n", pParam->BSIM3v32vsattemp);
|
||||||
printf("Fatal: Vsat at current temperature = %g is not positive.\n",
|
printf("Fatal: Vsat at current temperature = %g is not positive.\n",
|
||||||
pParam->BSIM3v32vsattemp);
|
pParam->BSIM3v32vsattemp);
|
||||||
Fatal_Flag = 1;
|
Fatal_Flag = 1;
|
||||||
}
|
}
|
||||||
/* Check Rout parameters */
|
/* Check Rout parameters */
|
||||||
if (pParam->BSIM3v32pclm <= 0.0)
|
if (pParam->BSIM3v32pclm <= 0.0)
|
||||||
{ fprintf(fplog, "Fatal: Pclm = %g is not positive.\n", pParam->BSIM3v32pclm);
|
{ fprintf(fplog, "Fatal: Pclm = %g is not positive.\n", pParam->BSIM3v32pclm);
|
||||||
printf("Fatal: Pclm = %g is not positive.\n", pParam->BSIM3v32pclm);
|
printf("Fatal: Pclm = %g is not positive.\n", pParam->BSIM3v32pclm);
|
||||||
Fatal_Flag = 1;
|
Fatal_Flag = 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (pParam->BSIM3v32drout < 0.0)
|
if (pParam->BSIM3v32drout < 0.0)
|
||||||
{ fprintf(fplog, "Fatal: Drout = %g is negative.\n", pParam->BSIM3v32drout);
|
{ fprintf(fplog, "Fatal: Drout = %g is negative.\n", pParam->BSIM3v32drout);
|
||||||
printf("Fatal: Drout = %g is negative.\n", pParam->BSIM3v32drout);
|
printf("Fatal: Drout = %g is negative.\n", pParam->BSIM3v32drout);
|
||||||
Fatal_Flag = 1;
|
Fatal_Flag = 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (pParam->BSIM3v32pscbe2 <= 0.0)
|
if (pParam->BSIM3v32pscbe2 <= 0.0)
|
||||||
{ fprintf(fplog, "Warning: Pscbe2 = %g is not positive.\n",
|
{ fprintf(fplog, "Warning: Pscbe2 = %g is not positive.\n",
|
||||||
pParam->BSIM3v32pscbe2);
|
pParam->BSIM3v32pscbe2);
|
||||||
printf("Warning: Pscbe2 = %g is not positive.\n", pParam->BSIM3v32pscbe2);
|
printf("Warning: Pscbe2 = %g is not positive.\n", pParam->BSIM3v32pscbe2);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* acm model */
|
/* acm model */
|
||||||
if (model->BSIM3v32acmMod == 0) {
|
if (model->BSIM3v32acmMod == 0) {
|
||||||
if (model->BSIM3v32unitLengthSidewallJctCap > 0.0 ||
|
if (model->BSIM3v32unitLengthSidewallJctCap > 0.0 ||
|
||||||
model->BSIM3v32unitLengthGateSidewallJctCap > 0.0)
|
model->BSIM3v32unitLengthGateSidewallJctCap > 0.0)
|
||||||
{
|
{
|
||||||
if (here->BSIM3v32drainPerimeter < pParam->BSIM3v32weff)
|
if (here->BSIM3v32drainPerimeter < pParam->BSIM3v32weff)
|
||||||
{ fprintf(fplog, "Warning: Pd = %g is less than W.\n",
|
{ fprintf(fplog, "Warning: Pd = %g is less than W.\n",
|
||||||
here->BSIM3v32drainPerimeter);
|
here->BSIM3v32drainPerimeter);
|
||||||
printf("Warning: Pd = %g is less than W.\n",
|
printf("Warning: Pd = %g is less than W.\n",
|
||||||
here->BSIM3v32drainPerimeter);
|
here->BSIM3v32drainPerimeter);
|
||||||
}
|
}
|
||||||
if (here->BSIM3v32sourcePerimeter < pParam->BSIM3v32weff)
|
if (here->BSIM3v32sourcePerimeter < pParam->BSIM3v32weff)
|
||||||
{ fprintf(fplog, "Warning: Ps = %g is less than W.\n",
|
{ fprintf(fplog, "Warning: Ps = %g is less than W.\n",
|
||||||
here->BSIM3v32sourcePerimeter);
|
here->BSIM3v32sourcePerimeter);
|
||||||
printf("Warning: Ps = %g is less than W.\n",
|
printf("Warning: Ps = %g is less than W.\n",
|
||||||
here->BSIM3v32sourcePerimeter);
|
here->BSIM3v32sourcePerimeter);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if (pParam->BSIM3v32noff < 0.1)
|
if (pParam->BSIM3v32noff < 0.1)
|
||||||
{ fprintf(fplog, "Warning: Noff = %g is too small.\n",
|
{ fprintf(fplog, "Warning: Noff = %g is too small.\n",
|
||||||
pParam->BSIM3v32noff);
|
pParam->BSIM3v32noff);
|
||||||
printf("Warning: Noff = %g is too small.\n", pParam->BSIM3v32noff);
|
printf("Warning: Noff = %g is too small.\n", pParam->BSIM3v32noff);
|
||||||
}
|
}
|
||||||
if (pParam->BSIM3v32noff > 4.0)
|
if (pParam->BSIM3v32noff > 4.0)
|
||||||
{ fprintf(fplog, "Warning: Noff = %g is too large.\n",
|
{ fprintf(fplog, "Warning: Noff = %g is too large.\n",
|
||||||
pParam->BSIM3v32noff);
|
pParam->BSIM3v32noff);
|
||||||
printf("Warning: Noff = %g is too large.\n", pParam->BSIM3v32noff);
|
printf("Warning: Noff = %g is too large.\n", pParam->BSIM3v32noff);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (pParam->BSIM3v32voffcv < -0.5)
|
if (pParam->BSIM3v32voffcv < -0.5)
|
||||||
{ fprintf(fplog, "Warning: Voffcv = %g is too small.\n",
|
{ fprintf(fplog, "Warning: Voffcv = %g is too small.\n",
|
||||||
pParam->BSIM3v32voffcv);
|
pParam->BSIM3v32voffcv);
|
||||||
printf("Warning: Voffcv = %g is too small.\n", pParam->BSIM3v32voffcv);
|
printf("Warning: Voffcv = %g is too small.\n", pParam->BSIM3v32voffcv);
|
||||||
}
|
}
|
||||||
if (pParam->BSIM3v32voffcv > 0.5)
|
if (pParam->BSIM3v32voffcv > 0.5)
|
||||||
{ fprintf(fplog, "Warning: Voffcv = %g is too large.\n",
|
{ fprintf(fplog, "Warning: Voffcv = %g is too large.\n",
|
||||||
pParam->BSIM3v32voffcv);
|
pParam->BSIM3v32voffcv);
|
||||||
printf("Warning: Voffcv = %g is too large.\n", pParam->BSIM3v32voffcv);
|
printf("Warning: Voffcv = %g is too large.\n", pParam->BSIM3v32voffcv);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (model->BSIM3v32ijth < 0.0)
|
if (model->BSIM3v32ijth < 0.0)
|
||||||
{ fprintf(fplog, "Fatal: Ijth = %g cannot be negative.\n",
|
{ fprintf(fplog, "Fatal: Ijth = %g cannot be negative.\n",
|
||||||
model->BSIM3v32ijth);
|
model->BSIM3v32ijth);
|
||||||
printf("Fatal: Ijth = %g cannot be negative.\n", model->BSIM3v32ijth);
|
printf("Fatal: Ijth = %g cannot be negative.\n", model->BSIM3v32ijth);
|
||||||
Fatal_Flag = 1;
|
Fatal_Flag = 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Check capacitance parameters */
|
/* Check capacitance parameters */
|
||||||
if (pParam->BSIM3v32clc < 0.0)
|
if (pParam->BSIM3v32clc < 0.0)
|
||||||
{ fprintf(fplog, "Fatal: Clc = %g is negative.\n", pParam->BSIM3v32clc);
|
{ fprintf(fplog, "Fatal: Clc = %g is negative.\n", pParam->BSIM3v32clc);
|
||||||
printf("Fatal: Clc = %g is negative.\n", pParam->BSIM3v32clc);
|
printf("Fatal: Clc = %g is negative.\n", pParam->BSIM3v32clc);
|
||||||
Fatal_Flag = 1;
|
Fatal_Flag = 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (pParam->BSIM3v32moin < 5.0)
|
if (pParam->BSIM3v32moin < 5.0)
|
||||||
{ fprintf(fplog, "Warning: Moin = %g is too small.\n",
|
{ fprintf(fplog, "Warning: Moin = %g is too small.\n",
|
||||||
pParam->BSIM3v32moin);
|
pParam->BSIM3v32moin);
|
||||||
printf("Warning: Moin = %g is too small.\n", pParam->BSIM3v32moin);
|
printf("Warning: Moin = %g is too small.\n", pParam->BSIM3v32moin);
|
||||||
}
|
}
|
||||||
if (pParam->BSIM3v32moin > 25.0)
|
if (pParam->BSIM3v32moin > 25.0)
|
||||||
{ fprintf(fplog, "Warning: Moin = %g is too large.\n",
|
{ fprintf(fplog, "Warning: Moin = %g is too large.\n",
|
||||||
pParam->BSIM3v32moin);
|
pParam->BSIM3v32moin);
|
||||||
printf("Warning: Moin = %g is too large.\n", pParam->BSIM3v32moin);
|
printf("Warning: Moin = %g is too large.\n", pParam->BSIM3v32moin);
|
||||||
}
|
}
|
||||||
|
|
||||||
if(model->BSIM3v32capMod ==3) {
|
if(model->BSIM3v32capMod ==3) {
|
||||||
if (pParam->BSIM3v32acde < 0.4)
|
if (pParam->BSIM3v32acde < 0.4)
|
||||||
{ fprintf(fplog, "Warning: Acde = %g is too small.\n",
|
{ fprintf(fplog, "Warning: Acde = %g is too small.\n",
|
||||||
pParam->BSIM3v32acde);
|
pParam->BSIM3v32acde);
|
||||||
printf("Warning: Acde = %g is too small.\n", pParam->BSIM3v32acde);
|
printf("Warning: Acde = %g is too small.\n", pParam->BSIM3v32acde);
|
||||||
}
|
}
|
||||||
if (pParam->BSIM3v32acde > 1.6)
|
if (pParam->BSIM3v32acde > 1.6)
|
||||||
{ fprintf(fplog, "Warning: Acde = %g is too large.\n",
|
{ fprintf(fplog, "Warning: Acde = %g is too large.\n",
|
||||||
pParam->BSIM3v32acde);
|
pParam->BSIM3v32acde);
|
||||||
printf("Warning: Acde = %g is too large.\n", pParam->BSIM3v32acde);
|
printf("Warning: Acde = %g is too large.\n", pParam->BSIM3v32acde);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if (model->BSIM3v32paramChk ==1)
|
if (model->BSIM3v32paramChk ==1)
|
||||||
{
|
{
|
||||||
/* Check L and W parameters */
|
/* Check L and W parameters */
|
||||||
if (pParam->BSIM3v32leff <= 5.0e-8)
|
if (pParam->BSIM3v32leff <= 5.0e-8)
|
||||||
{ fprintf(fplog, "Warning: Leff = %g may be too small.\n",
|
{ fprintf(fplog, "Warning: Leff = %g may be too small.\n",
|
||||||
pParam->BSIM3v32leff);
|
pParam->BSIM3v32leff);
|
||||||
printf("Warning: Leff = %g may be too small.\n",
|
printf("Warning: Leff = %g may be too small.\n",
|
||||||
pParam->BSIM3v32leff);
|
pParam->BSIM3v32leff);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (pParam->BSIM3v32leffCV <= 5.0e-8)
|
if (pParam->BSIM3v32leffCV <= 5.0e-8)
|
||||||
{ fprintf(fplog, "Warning: Leff for CV = %g may be too small.\n",
|
{ fprintf(fplog, "Warning: Leff for CV = %g may be too small.\n",
|
||||||
pParam->BSIM3v32leffCV);
|
pParam->BSIM3v32leffCV);
|
||||||
printf("Warning: Leff for CV = %g may be too small.\n",
|
printf("Warning: Leff for CV = %g may be too small.\n",
|
||||||
pParam->BSIM3v32leffCV);
|
pParam->BSIM3v32leffCV);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (pParam->BSIM3v32weff <= 1.0e-7)
|
if (pParam->BSIM3v32weff <= 1.0e-7)
|
||||||
{ fprintf(fplog, "Warning: Weff = %g may be too small.\n",
|
{ fprintf(fplog, "Warning: Weff = %g may be too small.\n",
|
||||||
pParam->BSIM3v32weff);
|
pParam->BSIM3v32weff);
|
||||||
printf("Warning: Weff = %g may be too small.\n",
|
printf("Warning: Weff = %g may be too small.\n",
|
||||||
pParam->BSIM3v32weff);
|
pParam->BSIM3v32weff);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (pParam->BSIM3v32weffCV <= 1.0e-7)
|
if (pParam->BSIM3v32weffCV <= 1.0e-7)
|
||||||
{ fprintf(fplog, "Warning: Weff for CV = %g may be too small.\n",
|
{ fprintf(fplog, "Warning: Weff for CV = %g may be too small.\n",
|
||||||
pParam->BSIM3v32weffCV);
|
pParam->BSIM3v32weffCV);
|
||||||
printf("Warning: Weff for CV = %g may be too small.\n",
|
printf("Warning: Weff for CV = %g may be too small.\n",
|
||||||
pParam->BSIM3v32weffCV);
|
pParam->BSIM3v32weffCV);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Check threshold voltage parameters */
|
/* Check threshold voltage parameters */
|
||||||
if (pParam->BSIM3v32nlx < 0.0)
|
if (pParam->BSIM3v32nlx < 0.0)
|
||||||
{ fprintf(fplog, "Warning: Nlx = %g is negative.\n", pParam->BSIM3v32nlx);
|
{ fprintf(fplog, "Warning: Nlx = %g is negative.\n", pParam->BSIM3v32nlx);
|
||||||
printf("Warning: Nlx = %g is negative.\n", pParam->BSIM3v32nlx);
|
printf("Warning: Nlx = %g is negative.\n", pParam->BSIM3v32nlx);
|
||||||
}
|
}
|
||||||
if (model->BSIM3v32tox < 1.0e-9)
|
if (model->BSIM3v32tox < 1.0e-9)
|
||||||
{ fprintf(fplog, "Warning: Tox = %g is less than 10A.\n",
|
{ fprintf(fplog, "Warning: Tox = %g is less than 10A.\n",
|
||||||
model->BSIM3v32tox);
|
model->BSIM3v32tox);
|
||||||
printf("Warning: Tox = %g is less than 10A.\n", model->BSIM3v32tox);
|
printf("Warning: Tox = %g is less than 10A.\n", model->BSIM3v32tox);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (pParam->BSIM3v32npeak <= 1.0e15)
|
if (pParam->BSIM3v32npeak <= 1.0e15)
|
||||||
{ fprintf(fplog, "Warning: Nch = %g may be too small.\n",
|
{ fprintf(fplog, "Warning: Nch = %g may be too small.\n",
|
||||||
pParam->BSIM3v32npeak);
|
pParam->BSIM3v32npeak);
|
||||||
printf("Warning: Nch = %g may be too small.\n",
|
printf("Warning: Nch = %g may be too small.\n",
|
||||||
pParam->BSIM3v32npeak);
|
pParam->BSIM3v32npeak);
|
||||||
}
|
}
|
||||||
else if (pParam->BSIM3v32npeak >= 1.0e21)
|
else if (pParam->BSIM3v32npeak >= 1.0e21)
|
||||||
{ fprintf(fplog, "Warning: Nch = %g may be too large.\n",
|
{ fprintf(fplog, "Warning: Nch = %g may be too large.\n",
|
||||||
pParam->BSIM3v32npeak);
|
pParam->BSIM3v32npeak);
|
||||||
printf("Warning: Nch = %g may be too large.\n",
|
printf("Warning: Nch = %g may be too large.\n",
|
||||||
pParam->BSIM3v32npeak);
|
pParam->BSIM3v32npeak);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (pParam->BSIM3v32nsub <= 1.0e14)
|
if (pParam->BSIM3v32nsub <= 1.0e14)
|
||||||
{ fprintf(fplog, "Warning: Nsub = %g may be too small.\n",
|
{ fprintf(fplog, "Warning: Nsub = %g may be too small.\n",
|
||||||
pParam->BSIM3v32nsub);
|
pParam->BSIM3v32nsub);
|
||||||
printf("Warning: Nsub = %g may be too small.\n",
|
printf("Warning: Nsub = %g may be too small.\n",
|
||||||
pParam->BSIM3v32nsub);
|
pParam->BSIM3v32nsub);
|
||||||
}
|
}
|
||||||
else if (pParam->BSIM3v32nsub >= 1.0e21)
|
else if (pParam->BSIM3v32nsub >= 1.0e21)
|
||||||
{ fprintf(fplog, "Warning: Nsub = %g may be too large.\n",
|
{ fprintf(fplog, "Warning: Nsub = %g may be too large.\n",
|
||||||
pParam->BSIM3v32nsub);
|
pParam->BSIM3v32nsub);
|
||||||
printf("Warning: Nsub = %g may be too large.\n",
|
printf("Warning: Nsub = %g may be too large.\n",
|
||||||
pParam->BSIM3v32nsub);
|
pParam->BSIM3v32nsub);
|
||||||
}
|
}
|
||||||
|
|
||||||
if ((pParam->BSIM3v32ngate > 0.0) &&
|
if ((pParam->BSIM3v32ngate > 0.0) &&
|
||||||
(pParam->BSIM3v32ngate <= 1.e18))
|
(pParam->BSIM3v32ngate <= 1.e18))
|
||||||
{ fprintf(fplog, "Warning: Ngate = %g is less than 1.E18cm^-3.\n",
|
{ fprintf(fplog, "Warning: Ngate = %g is less than 1.E18cm^-3.\n",
|
||||||
pParam->BSIM3v32ngate);
|
pParam->BSIM3v32ngate);
|
||||||
printf("Warning: Ngate = %g is less than 1.E18cm^-3.\n",
|
printf("Warning: Ngate = %g is less than 1.E18cm^-3.\n",
|
||||||
pParam->BSIM3v32ngate);
|
pParam->BSIM3v32ngate);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (pParam->BSIM3v32dvt0 < 0.0)
|
if (pParam->BSIM3v32dvt0 < 0.0)
|
||||||
{ fprintf(fplog, "Warning: Dvt0 = %g is negative.\n",
|
{ fprintf(fplog, "Warning: Dvt0 = %g is negative.\n",
|
||||||
pParam->BSIM3v32dvt0);
|
pParam->BSIM3v32dvt0);
|
||||||
printf("Warning: Dvt0 = %g is negative.\n", pParam->BSIM3v32dvt0);
|
printf("Warning: Dvt0 = %g is negative.\n", pParam->BSIM3v32dvt0);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (fabs(1.0e-6 / (pParam->BSIM3v32w0 + pParam->BSIM3v32weff)) > 10.0)
|
if (fabs(1.0e-6 / (pParam->BSIM3v32w0 + pParam->BSIM3v32weff)) > 10.0)
|
||||||
{ fprintf(fplog, "Warning: (W0 + Weff) may be too small.\n");
|
{ fprintf(fplog, "Warning: (W0 + Weff) may be too small.\n");
|
||||||
printf("Warning: (W0 + Weff) may be too small.\n");
|
printf("Warning: (W0 + Weff) may be too small.\n");
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Check subthreshold parameters */
|
/* Check subthreshold parameters */
|
||||||
if (pParam->BSIM3v32nfactor < 0.0)
|
if (pParam->BSIM3v32nfactor < 0.0)
|
||||||
{ fprintf(fplog, "Warning: Nfactor = %g is negative.\n",
|
{ fprintf(fplog, "Warning: Nfactor = %g is negative.\n",
|
||||||
pParam->BSIM3v32nfactor);
|
pParam->BSIM3v32nfactor);
|
||||||
printf("Warning: Nfactor = %g is negative.\n", pParam->BSIM3v32nfactor);
|
printf("Warning: Nfactor = %g is negative.\n", pParam->BSIM3v32nfactor);
|
||||||
}
|
}
|
||||||
if (pParam->BSIM3v32cdsc < 0.0)
|
if (pParam->BSIM3v32cdsc < 0.0)
|
||||||
{ fprintf(fplog, "Warning: Cdsc = %g is negative.\n",
|
{ fprintf(fplog, "Warning: Cdsc = %g is negative.\n",
|
||||||
pParam->BSIM3v32cdsc);
|
pParam->BSIM3v32cdsc);
|
||||||
printf("Warning: Cdsc = %g is negative.\n", pParam->BSIM3v32cdsc);
|
printf("Warning: Cdsc = %g is negative.\n", pParam->BSIM3v32cdsc);
|
||||||
}
|
}
|
||||||
if (pParam->BSIM3v32cdscd < 0.0)
|
if (pParam->BSIM3v32cdscd < 0.0)
|
||||||
{ fprintf(fplog, "Warning: Cdscd = %g is negative.\n",
|
{ fprintf(fplog, "Warning: Cdscd = %g is negative.\n",
|
||||||
pParam->BSIM3v32cdscd);
|
pParam->BSIM3v32cdscd);
|
||||||
printf("Warning: Cdscd = %g is negative.\n", pParam->BSIM3v32cdscd);
|
printf("Warning: Cdscd = %g is negative.\n", pParam->BSIM3v32cdscd);
|
||||||
}
|
}
|
||||||
/* Check DIBL parameters */
|
/* Check DIBL parameters */
|
||||||
if (pParam->BSIM3v32eta0 < 0.0)
|
if (pParam->BSIM3v32eta0 < 0.0)
|
||||||
{ fprintf(fplog, "Warning: Eta0 = %g is negative.\n",
|
{ fprintf(fplog, "Warning: Eta0 = %g is negative.\n",
|
||||||
pParam->BSIM3v32eta0);
|
pParam->BSIM3v32eta0);
|
||||||
printf("Warning: Eta0 = %g is negative.\n", pParam->BSIM3v32eta0);
|
printf("Warning: Eta0 = %g is negative.\n", pParam->BSIM3v32eta0);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Check Abulk parameters */
|
/* Check Abulk parameters */
|
||||||
if (fabs(1.0e-6 / (pParam->BSIM3v32b1 + pParam->BSIM3v32weff)) > 10.0)
|
if (fabs(1.0e-6 / (pParam->BSIM3v32b1 + pParam->BSIM3v32weff)) > 10.0)
|
||||||
{ fprintf(fplog, "Warning: (B1 + Weff) may be too small.\n");
|
{ fprintf(fplog, "Warning: (B1 + Weff) may be too small.\n");
|
||||||
printf("Warning: (B1 + Weff) may be too small.\n");
|
printf("Warning: (B1 + Weff) may be too small.\n");
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
/* Check Saturation parameters */
|
/* Check Saturation parameters */
|
||||||
if (pParam->BSIM3v32a2 < 0.01)
|
if (pParam->BSIM3v32a2 < 0.01)
|
||||||
{ fprintf(fplog, "Warning: A2 = %g is too small. Set to 0.01.\n", pParam->BSIM3v32a2);
|
{ fprintf(fplog, "Warning: A2 = %g is too small. Set to 0.01.\n", pParam->BSIM3v32a2);
|
||||||
printf("Warning: A2 = %g is too small. Set to 0.01.\n",
|
printf("Warning: A2 = %g is too small. Set to 0.01.\n",
|
||||||
pParam->BSIM3v32a2);
|
pParam->BSIM3v32a2);
|
||||||
pParam->BSIM3v32a2 = 0.01;
|
pParam->BSIM3v32a2 = 0.01;
|
||||||
}
|
}
|
||||||
else if (pParam->BSIM3v32a2 > 1.0)
|
else if (pParam->BSIM3v32a2 > 1.0)
|
||||||
{ fprintf(fplog, "Warning: A2 = %g is larger than 1. A2 is set to 1 and A1 is set to 0.\n",
|
{ fprintf(fplog, "Warning: A2 = %g is larger than 1. A2 is set to 1 and A1 is set to 0.\n",
|
||||||
pParam->BSIM3v32a2);
|
pParam->BSIM3v32a2);
|
||||||
printf("Warning: A2 = %g is larger than 1. A2 is set to 1 and A1 is set to 0.\n",
|
printf("Warning: A2 = %g is larger than 1. A2 is set to 1 and A1 is set to 0.\n",
|
||||||
pParam->BSIM3v32a2);
|
pParam->BSIM3v32a2);
|
||||||
pParam->BSIM3v32a2 = 1.0;
|
pParam->BSIM3v32a2 = 1.0;
|
||||||
pParam->BSIM3v32a1 = 0.0;
|
pParam->BSIM3v32a1 = 0.0;
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
if (pParam->BSIM3v32rdsw < 0.0)
|
if (pParam->BSIM3v32rdsw < 0.0)
|
||||||
{ fprintf(fplog, "Warning: Rdsw = %g is negative. Set to zero.\n",
|
{ fprintf(fplog, "Warning: Rdsw = %g is negative. Set to zero.\n",
|
||||||
pParam->BSIM3v32rdsw);
|
pParam->BSIM3v32rdsw);
|
||||||
printf("Warning: Rdsw = %g is negative. Set to zero.\n",
|
printf("Warning: Rdsw = %g is negative. Set to zero.\n",
|
||||||
pParam->BSIM3v32rdsw);
|
pParam->BSIM3v32rdsw);
|
||||||
pParam->BSIM3v32rdsw = 0.0;
|
pParam->BSIM3v32rdsw = 0.0;
|
||||||
pParam->BSIM3v32rds0 = 0.0;
|
pParam->BSIM3v32rds0 = 0.0;
|
||||||
}
|
}
|
||||||
else if ((pParam->BSIM3v32rds0 > 0.0) && (pParam->BSIM3v32rds0 < 0.001))
|
else if ((pParam->BSIM3v32rds0 > 0.0) && (pParam->BSIM3v32rds0 < 0.001))
|
||||||
{ fprintf(fplog, "Warning: Rds at current temperature = %g is less than 0.001 ohm. Set to zero.\n",
|
{ fprintf(fplog, "Warning: Rds at current temperature = %g is less than 0.001 ohm. Set to zero.\n",
|
||||||
pParam->BSIM3v32rds0);
|
pParam->BSIM3v32rds0);
|
||||||
printf("Warning: Rds at current temperature = %g is less than 0.001 ohm. Set to zero.\n",
|
printf("Warning: Rds at current temperature = %g is less than 0.001 ohm. Set to zero.\n",
|
||||||
pParam->BSIM3v32rds0);
|
pParam->BSIM3v32rds0);
|
||||||
pParam->BSIM3v32rds0 = 0.0;
|
pParam->BSIM3v32rds0 = 0.0;
|
||||||
}
|
}
|
||||||
if (pParam->BSIM3v32vsattemp < 1.0e3)
|
if (pParam->BSIM3v32vsattemp < 1.0e3)
|
||||||
{ fprintf(fplog, "Warning: Vsat at current temperature = %g may be too small.\n", pParam->BSIM3v32vsattemp);
|
{ fprintf(fplog, "Warning: Vsat at current temperature = %g may be too small.\n", pParam->BSIM3v32vsattemp);
|
||||||
printf("Warning: Vsat at current temperature = %g may be too small.\n", pParam->BSIM3v32vsattemp);
|
printf("Warning: Vsat at current temperature = %g may be too small.\n", pParam->BSIM3v32vsattemp);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (pParam->BSIM3v32pdibl1 < 0.0)
|
if (pParam->BSIM3v32pdibl1 < 0.0)
|
||||||
{ fprintf(fplog, "Warning: Pdibl1 = %g is negative.\n",
|
{ fprintf(fplog, "Warning: Pdibl1 = %g is negative.\n",
|
||||||
pParam->BSIM3v32pdibl1);
|
pParam->BSIM3v32pdibl1);
|
||||||
printf("Warning: Pdibl1 = %g is negative.\n", pParam->BSIM3v32pdibl1);
|
printf("Warning: Pdibl1 = %g is negative.\n", pParam->BSIM3v32pdibl1);
|
||||||
}
|
}
|
||||||
if (pParam->BSIM3v32pdibl2 < 0.0)
|
if (pParam->BSIM3v32pdibl2 < 0.0)
|
||||||
{ fprintf(fplog, "Warning: Pdibl2 = %g is negative.\n",
|
{ fprintf(fplog, "Warning: Pdibl2 = %g is negative.\n",
|
||||||
pParam->BSIM3v32pdibl2);
|
pParam->BSIM3v32pdibl2);
|
||||||
printf("Warning: Pdibl2 = %g is negative.\n", pParam->BSIM3v32pdibl2);
|
printf("Warning: Pdibl2 = %g is negative.\n", pParam->BSIM3v32pdibl2);
|
||||||
}
|
}
|
||||||
/* Check overlap capacitance parameters */
|
/* Check overlap capacitance parameters */
|
||||||
if (model->BSIM3v32cgdo < 0.0)
|
if (model->BSIM3v32cgdo < 0.0)
|
||||||
{ fprintf(fplog, "Warning: cgdo = %g is negative. Set to zero.\n", model->BSIM3v32cgdo);
|
{ fprintf(fplog, "Warning: cgdo = %g is negative. Set to zero.\n", model->BSIM3v32cgdo);
|
||||||
printf("Warning: cgdo = %g is negative. Set to zero.\n", model->BSIM3v32cgdo);
|
printf("Warning: cgdo = %g is negative. Set to zero.\n", model->BSIM3v32cgdo);
|
||||||
model->BSIM3v32cgdo = 0.0;
|
model->BSIM3v32cgdo = 0.0;
|
||||||
}
|
}
|
||||||
if (model->BSIM3v32cgso < 0.0)
|
if (model->BSIM3v32cgso < 0.0)
|
||||||
{ fprintf(fplog, "Warning: cgso = %g is negative. Set to zero.\n", model->BSIM3v32cgso);
|
{ fprintf(fplog, "Warning: cgso = %g is negative. Set to zero.\n", model->BSIM3v32cgso);
|
||||||
printf("Warning: cgso = %g is negative. Set to zero.\n", model->BSIM3v32cgso);
|
printf("Warning: cgso = %g is negative. Set to zero.\n", model->BSIM3v32cgso);
|
||||||
model->BSIM3v32cgso = 0.0;
|
model->BSIM3v32cgso = 0.0;
|
||||||
}
|
}
|
||||||
if (model->BSIM3v32cgbo < 0.0)
|
if (model->BSIM3v32cgbo < 0.0)
|
||||||
{ fprintf(fplog, "Warning: cgbo = %g is negative. Set to zero.\n", model->BSIM3v32cgbo);
|
{ fprintf(fplog, "Warning: cgbo = %g is negative. Set to zero.\n", model->BSIM3v32cgbo);
|
||||||
printf("Warning: cgbo = %g is negative. Set to zero.\n", model->BSIM3v32cgbo);
|
printf("Warning: cgbo = %g is negative. Set to zero.\n", model->BSIM3v32cgbo);
|
||||||
model->BSIM3v32cgbo = 0.0;
|
model->BSIM3v32cgbo = 0.0;
|
||||||
}
|
}
|
||||||
|
|
||||||
}/* loop for the parameter check for warning messages */
|
}/* loop for the parameter check for warning messages */
|
||||||
fclose(fplog);
|
fclose(fplog);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{ fprintf(stderr, "Warning: Can't open log file. Parameter checking skipped.\n");
|
{ fprintf(stderr, "Warning: Can't open log file. Parameter checking skipped.\n");
|
||||||
|
|
|
||||||
|
|
@ -32,20 +32,20 @@ double cbd, cbhat, cbs, cd, cdhat, tol, vgd, vgdo, vgs;
|
||||||
{ /* loop through all the instances of the model */
|
{ /* loop through all the instances of the model */
|
||||||
for (here = model->BSIM3v32instances; here != NULL ;
|
for (here = model->BSIM3v32instances; here != NULL ;
|
||||||
here=here->BSIM3v32nextInstance)
|
here=here->BSIM3v32nextInstance)
|
||||||
{
|
{
|
||||||
vbs = model->BSIM3v32type
|
vbs = model->BSIM3v32type
|
||||||
* (*(ckt->CKTrhsOld+here->BSIM3v32bNode)
|
* (*(ckt->CKTrhsOld+here->BSIM3v32bNode)
|
||||||
- *(ckt->CKTrhsOld+here->BSIM3v32sNodePrime));
|
- *(ckt->CKTrhsOld+here->BSIM3v32sNodePrime));
|
||||||
vgs = model->BSIM3v32type
|
vgs = model->BSIM3v32type
|
||||||
* (*(ckt->CKTrhsOld+here->BSIM3v32gNode)
|
* (*(ckt->CKTrhsOld+here->BSIM3v32gNode)
|
||||||
- *(ckt->CKTrhsOld+here->BSIM3v32sNodePrime));
|
- *(ckt->CKTrhsOld+here->BSIM3v32sNodePrime));
|
||||||
vds = model->BSIM3v32type
|
vds = model->BSIM3v32type
|
||||||
* (*(ckt->CKTrhsOld+here->BSIM3v32dNodePrime)
|
* (*(ckt->CKTrhsOld+here->BSIM3v32dNodePrime)
|
||||||
- *(ckt->CKTrhsOld+here->BSIM3v32sNodePrime));
|
- *(ckt->CKTrhsOld+here->BSIM3v32sNodePrime));
|
||||||
vbd = vbs - vds;
|
vbd = vbs - vds;
|
||||||
vgd = vgs - vds;
|
vgd = vgs - vds;
|
||||||
vgdo = *(ckt->CKTstate0 + here->BSIM3v32vgs)
|
vgdo = *(ckt->CKTstate0 + here->BSIM3v32vgs)
|
||||||
- *(ckt->CKTstate0 + here->BSIM3v32vds);
|
- *(ckt->CKTstate0 + here->BSIM3v32vds);
|
||||||
delvbs = vbs - *(ckt->CKTstate0 + here->BSIM3v32vbs);
|
delvbs = vbs - *(ckt->CKTstate0 + here->BSIM3v32vbs);
|
||||||
delvbd = vbd - *(ckt->CKTstate0 + here->BSIM3v32vbd);
|
delvbd = vbd - *(ckt->CKTstate0 + here->BSIM3v32vbd);
|
||||||
delvgs = vgs - *(ckt->CKTstate0 + here->BSIM3v32vgs);
|
delvgs = vgs - *(ckt->CKTstate0 + here->BSIM3v32vgs);
|
||||||
|
|
@ -54,47 +54,47 @@ double cbd, cbhat, cbs, cd, cdhat, tol, vgd, vgdo, vgs;
|
||||||
|
|
||||||
cd = here->BSIM3v32cd - here->BSIM3v32cbd;
|
cd = here->BSIM3v32cd - here->BSIM3v32cbd;
|
||||||
if (here->BSIM3v32mode >= 0)
|
if (here->BSIM3v32mode >= 0)
|
||||||
{ cd += here->BSIM3v32csub;
|
{ cd += here->BSIM3v32csub;
|
||||||
cdhat = cd - here->BSIM3v32gbd * delvbd
|
cdhat = cd - here->BSIM3v32gbd * delvbd
|
||||||
+ (here->BSIM3v32gmbs + here->BSIM3v32gbbs) * delvbs
|
+ (here->BSIM3v32gmbs + here->BSIM3v32gbbs) * delvbs
|
||||||
+ (here->BSIM3v32gm + here->BSIM3v32gbgs) * delvgs
|
+ (here->BSIM3v32gm + here->BSIM3v32gbgs) * delvgs
|
||||||
+ (here->BSIM3v32gds + here->BSIM3v32gbds) * delvds;
|
+ (here->BSIM3v32gds + here->BSIM3v32gbds) * delvds;
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{ cdhat = cd + (here->BSIM3v32gmbs - here->BSIM3v32gbd) * delvbd
|
{ cdhat = cd + (here->BSIM3v32gmbs - here->BSIM3v32gbd) * delvbd
|
||||||
+ here->BSIM3v32gm * delvgd - here->BSIM3v32gds * delvds;
|
+ here->BSIM3v32gm * delvgd - here->BSIM3v32gds * delvds;
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* check convergence
|
* check convergence
|
||||||
*/
|
*/
|
||||||
if ((here->BSIM3v32off == 0) || (!(ckt->CKTmode & MODEINITFIX)))
|
if ((here->BSIM3v32off == 0) || (!(ckt->CKTmode & MODEINITFIX)))
|
||||||
{ tol = ckt->CKTreltol * MAX(fabs(cdhat), fabs(cd))
|
{ tol = ckt->CKTreltol * MAX(fabs(cdhat), fabs(cd))
|
||||||
+ ckt->CKTabstol;
|
+ ckt->CKTabstol;
|
||||||
if (fabs(cdhat - cd) >= tol)
|
if (fabs(cdhat - cd) >= tol)
|
||||||
{ ckt->CKTnoncon++;
|
{ ckt->CKTnoncon++;
|
||||||
return(OK);
|
return(OK);
|
||||||
}
|
}
|
||||||
cbs = here->BSIM3v32cbs;
|
cbs = here->BSIM3v32cbs;
|
||||||
cbd = here->BSIM3v32cbd;
|
cbd = here->BSIM3v32cbd;
|
||||||
if (here->BSIM3v32mode >= 0)
|
if (here->BSIM3v32mode >= 0)
|
||||||
{ cbhat = cbs + cbd - here->BSIM3v32csub
|
{ cbhat = cbs + cbd - here->BSIM3v32csub
|
||||||
+ here->BSIM3v32gbd * delvbd
|
+ here->BSIM3v32gbd * delvbd
|
||||||
+ (here->BSIM3v32gbs - here->BSIM3v32gbbs) * delvbs
|
+ (here->BSIM3v32gbs - here->BSIM3v32gbbs) * delvbs
|
||||||
- here->BSIM3v32gbgs * delvgs
|
- here->BSIM3v32gbgs * delvgs
|
||||||
- here->BSIM3v32gbds * delvds;
|
- here->BSIM3v32gbds * delvds;
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{ cbhat = cbs + cbd - here->BSIM3v32csub
|
{ cbhat = cbs + cbd - here->BSIM3v32csub
|
||||||
+ here->BSIM3v32gbs * delvbs
|
+ here->BSIM3v32gbs * delvbs
|
||||||
+ (here->BSIM3v32gbd - here->BSIM3v32gbbs) * delvbd
|
+ (here->BSIM3v32gbd - here->BSIM3v32gbbs) * delvbd
|
||||||
- here->BSIM3v32gbgs * delvgd
|
- here->BSIM3v32gbgs * delvgd
|
||||||
+ here->BSIM3v32gbds * delvds;
|
+ here->BSIM3v32gbds * delvds;
|
||||||
}
|
}
|
||||||
tol = ckt->CKTreltol * MAX(fabs(cbhat),
|
tol = ckt->CKTreltol * MAX(fabs(cbhat),
|
||||||
fabs(cbs + cbd - here->BSIM3v32csub)) + ckt->CKTabstol;
|
fabs(cbs + cbd - here->BSIM3v32csub)) + ckt->CKTabstol;
|
||||||
if (fabs(cbhat - (cbs + cbd - here->BSIM3v32csub)) > tol)
|
if (fabs(cbhat - (cbs + cbd - here->BSIM3v32csub)) > tol)
|
||||||
{ ckt->CKTnoncon++;
|
{ ckt->CKTnoncon++;
|
||||||
return(OK);
|
return(OK);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -28,8 +28,8 @@ BSIM3v32instance *here;
|
||||||
for (; model ; model = model->BSIM3v32nextModel)
|
for (; model ; model = model->BSIM3v32nextModel)
|
||||||
{ prev = &(model->BSIM3v32instances);
|
{ prev = &(model->BSIM3v32instances);
|
||||||
for (here = *prev; here ; here = *prev)
|
for (here = *prev; here ; here = *prev)
|
||||||
{ if (here->BSIM3v32name == name || (fast && here==*fast))
|
{ if (here->BSIM3v32name == name || (fast && here==*fast))
|
||||||
{ *prev= here->BSIM3v32nextInstance;
|
{ *prev= here->BSIM3v32nextInstance;
|
||||||
FREE(here);
|
FREE(here);
|
||||||
return(OK);
|
return(OK);
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -23,18 +23,18 @@ BSIM3v32instance *here;
|
||||||
|
|
||||||
for (; model ; model = model->BSIM3v32nextModel)
|
for (; model ; model = model->BSIM3v32nextModel)
|
||||||
{ for (here = model->BSIM3v32instances; here; here = here->BSIM3v32nextInstance)
|
{ for (here = model->BSIM3v32instances; here; here = here->BSIM3v32nextInstance)
|
||||||
{
|
{
|
||||||
if (!here->BSIM3v32icVBSGiven)
|
if (!here->BSIM3v32icVBSGiven)
|
||||||
{ here->BSIM3v32icVBS = *(ckt->CKTrhs + here->BSIM3v32bNode)
|
{ here->BSIM3v32icVBS = *(ckt->CKTrhs + here->BSIM3v32bNode)
|
||||||
- *(ckt->CKTrhs + here->BSIM3v32sNode);
|
- *(ckt->CKTrhs + here->BSIM3v32sNode);
|
||||||
}
|
}
|
||||||
if (!here->BSIM3v32icVDSGiven)
|
if (!here->BSIM3v32icVDSGiven)
|
||||||
{ here->BSIM3v32icVDS = *(ckt->CKTrhs + here->BSIM3v32dNode)
|
{ here->BSIM3v32icVDS = *(ckt->CKTrhs + here->BSIM3v32dNode)
|
||||||
- *(ckt->CKTrhs + here->BSIM3v32sNode);
|
- *(ckt->CKTrhs + here->BSIM3v32sNode);
|
||||||
}
|
}
|
||||||
if (!here->BSIM3v32icVGSGiven)
|
if (!here->BSIM3v32icVGSGiven)
|
||||||
{ here->BSIM3v32icVGS = *(ckt->CKTrhs + here->BSIM3v32gNode)
|
{ here->BSIM3v32icVGS = *(ckt->CKTrhs + here->BSIM3v32gNode)
|
||||||
- *(ckt->CKTrhs + here->BSIM3v32sNode);
|
- *(ckt->CKTrhs + here->BSIM3v32sNode);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
||||||
File diff suppressed because it is too large
Load Diff
|
|
@ -334,30 +334,30 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value)
|
||||||
value->rValue = model->BSIM3v32tpbswg;
|
value->rValue = model->BSIM3v32tpbswg;
|
||||||
return(OK);
|
return(OK);
|
||||||
|
|
||||||
/* acm model */
|
/* acm model */
|
||||||
case BSIM3v32_MOD_HDIF:
|
case BSIM3v32_MOD_HDIF:
|
||||||
value->rValue = model->BSIM3v32hdif;
|
value->rValue = model->BSIM3v32hdif;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_MOD_LDIF:
|
case BSIM3v32_MOD_LDIF:
|
||||||
value->rValue = model->BSIM3v32ldif;
|
value->rValue = model->BSIM3v32ldif;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_MOD_LD:
|
case BSIM3v32_MOD_LD:
|
||||||
value->rValue = model->BSIM3v32ld;
|
value->rValue = model->BSIM3v32ld;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_MOD_RD:
|
case BSIM3v32_MOD_RD:
|
||||||
value->rValue = model->BSIM3v32rd;
|
value->rValue = model->BSIM3v32rd;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_MOD_RS:
|
case BSIM3v32_MOD_RS:
|
||||||
value->rValue = model->BSIM3v32rs;
|
value->rValue = model->BSIM3v32rs;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_MOD_RDC:
|
case BSIM3v32_MOD_RDC:
|
||||||
value->rValue = model->BSIM3v32rdc;
|
value->rValue = model->BSIM3v32rdc;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_MOD_RSC:
|
case BSIM3v32_MOD_RSC:
|
||||||
value->rValue = model->BSIM3v32rsc;
|
value->rValue = model->BSIM3v32rsc;
|
||||||
return(OK);
|
return(OK);
|
||||||
|
|
||||||
/* Length dependence */
|
/* Length dependence */
|
||||||
case BSIM3v32_MOD_LCDSC :
|
case BSIM3v32_MOD_LCDSC :
|
||||||
value->rValue = model->BSIM3v32lcdsc;
|
value->rValue = model->BSIM3v32lcdsc;
|
||||||
return(OK);
|
return(OK);
|
||||||
|
|
@ -609,7 +609,7 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value)
|
||||||
value->rValue = model->BSIM3v32lvoffcv;
|
value->rValue = model->BSIM3v32lvoffcv;
|
||||||
return(OK);
|
return(OK);
|
||||||
|
|
||||||
/* Width dependence */
|
/* Width dependence */
|
||||||
case BSIM3v32_MOD_WCDSC :
|
case BSIM3v32_MOD_WCDSC :
|
||||||
value->rValue = model->BSIM3v32wcdsc;
|
value->rValue = model->BSIM3v32wcdsc;
|
||||||
return(OK);
|
return(OK);
|
||||||
|
|
@ -861,7 +861,7 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value)
|
||||||
value->rValue = model->BSIM3v32wvoffcv;
|
value->rValue = model->BSIM3v32wvoffcv;
|
||||||
return(OK);
|
return(OK);
|
||||||
|
|
||||||
/* Cross-term dependence */
|
/* Cross-term dependence */
|
||||||
case BSIM3v32_MOD_PCDSC :
|
case BSIM3v32_MOD_PCDSC :
|
||||||
value->rValue = model->BSIM3v32pcdsc;
|
value->rValue = model->BSIM3v32pcdsc;
|
||||||
return(OK);
|
return(OK);
|
||||||
|
|
@ -968,13 +968,13 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value)
|
||||||
value->rValue = model->BSIM3v32pdvt1w;
|
value->rValue = model->BSIM3v32pdvt1w;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_MOD_PDVT2W :
|
case BSIM3v32_MOD_PDVT2W :
|
||||||
value->rValue = model->BSIM3v32pdvt2w;
|
value->rValue = model->BSIM3v32pdvt2w;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_MOD_PDROUT :
|
case BSIM3v32_MOD_PDROUT :
|
||||||
value->rValue = model->BSIM3v32pdrout;
|
value->rValue = model->BSIM3v32pdrout;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_MOD_PDSUB :
|
case BSIM3v32_MOD_PDSUB :
|
||||||
value->rValue = model->BSIM3v32pdsub;
|
value->rValue = model->BSIM3v32pdsub;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_MOD_PVTH0:
|
case BSIM3v32_MOD_PVTH0:
|
||||||
value->rValue = model->BSIM3v32pvth0;
|
value->rValue = model->BSIM3v32pvth0;
|
||||||
|
|
@ -1114,7 +1114,7 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value)
|
||||||
return(OK);
|
return(OK);
|
||||||
|
|
||||||
case BSIM3v32_MOD_TNOM :
|
case BSIM3v32_MOD_TNOM :
|
||||||
value->rValue = model->BSIM3v32tnom;
|
value->rValue = model->BSIM3v32tnom;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_MOD_CGSO:
|
case BSIM3v32_MOD_CGSO:
|
||||||
value->rValue = model->BSIM3v32cgso;
|
value->rValue = model->BSIM3v32cgso;
|
||||||
|
|
@ -1238,11 +1238,11 @@ BSIM3v32mAsk (CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value)
|
||||||
return(OK);
|
return(OK);
|
||||||
|
|
||||||
case BSIM3v32_MOD_XL:
|
case BSIM3v32_MOD_XL:
|
||||||
value->rValue = model->BSIM3v32xl;
|
value->rValue = model->BSIM3v32xl;
|
||||||
return(OK);
|
return(OK);
|
||||||
case BSIM3v32_MOD_XW:
|
case BSIM3v32_MOD_XW:
|
||||||
value->rValue = model->BSIM3v32xw;
|
value->rValue = model->BSIM3v32xw;
|
||||||
return(OK);
|
return(OK);
|
||||||
|
|
||||||
case BSIM3v32_MOD_NOIA:
|
case BSIM3v32_MOD_NOIA:
|
||||||
value->rValue = model->BSIM3v32oxideTrapDensityA;
|
value->rValue = model->BSIM3v32oxideTrapDensityA;
|
||||||
|
|
|
||||||
|
|
@ -27,7 +27,7 @@ BSIM3v32model **oldmod;
|
||||||
for (; *model ; model = &((*model)->BSIM3v32nextModel))
|
for (; *model ; model = &((*model)->BSIM3v32nextModel))
|
||||||
{ if ((*model)->BSIM3v32modName == modname ||
|
{ if ((*model)->BSIM3v32modName == modname ||
|
||||||
(modfast && *model == modfast))
|
(modfast && *model == modfast))
|
||||||
goto delgot;
|
goto delgot;
|
||||||
oldmod = model;
|
oldmod = model;
|
||||||
}
|
}
|
||||||
return(E_NOMOD);
|
return(E_NOMOD);
|
||||||
|
|
@ -44,4 +44,3 @@ delgot:
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -121,14 +121,14 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod)
|
||||||
case BSIM3v32_MOD_NPEAK:
|
case BSIM3v32_MOD_NPEAK:
|
||||||
mod->BSIM3v32npeak = value->rValue;
|
mod->BSIM3v32npeak = value->rValue;
|
||||||
mod->BSIM3v32npeakGiven = TRUE;
|
mod->BSIM3v32npeakGiven = TRUE;
|
||||||
if (mod->BSIM3v32npeak > 1.0e20)
|
if (mod->BSIM3v32npeak > 1.0e20)
|
||||||
mod->BSIM3v32npeak *= 1.0e-6;
|
mod->BSIM3v32npeak *= 1.0e-6;
|
||||||
break;
|
break;
|
||||||
case BSIM3v32_MOD_NGATE:
|
case BSIM3v32_MOD_NGATE:
|
||||||
mod->BSIM3v32ngate = value->rValue;
|
mod->BSIM3v32ngate = value->rValue;
|
||||||
mod->BSIM3v32ngateGiven = TRUE;
|
mod->BSIM3v32ngateGiven = TRUE;
|
||||||
if (mod->BSIM3v32ngate > 1.0e23)
|
if (mod->BSIM3v32ngate > 1.0e23)
|
||||||
mod->BSIM3v32ngate *= 1.0e-6;
|
mod->BSIM3v32ngate *= 1.0e-6;
|
||||||
break;
|
break;
|
||||||
case BSIM3v32_MOD_GAMMA1:
|
case BSIM3v32_MOD_GAMMA1:
|
||||||
mod->BSIM3v32gamma1 = value->rValue;
|
mod->BSIM3v32gamma1 = value->rValue;
|
||||||
|
|
@ -466,7 +466,7 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod)
|
||||||
mod->BSIM3v32rscGiven = TRUE;
|
mod->BSIM3v32rscGiven = TRUE;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
/* Length dependence */
|
/* Length dependence */
|
||||||
case BSIM3v32_MOD_LCDSC :
|
case BSIM3v32_MOD_LCDSC :
|
||||||
mod->BSIM3v32lcdsc = value->rValue;
|
mod->BSIM3v32lcdsc = value->rValue;
|
||||||
mod->BSIM3v32lcdscGiven = TRUE;
|
mod->BSIM3v32lcdscGiven = TRUE;
|
||||||
|
|
@ -530,14 +530,14 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod)
|
||||||
case BSIM3v32_MOD_LNPEAK:
|
case BSIM3v32_MOD_LNPEAK:
|
||||||
mod->BSIM3v32lnpeak = value->rValue;
|
mod->BSIM3v32lnpeak = value->rValue;
|
||||||
mod->BSIM3v32lnpeakGiven = TRUE;
|
mod->BSIM3v32lnpeakGiven = TRUE;
|
||||||
if (mod->BSIM3v32lnpeak > 1.0e20)
|
if (mod->BSIM3v32lnpeak > 1.0e20)
|
||||||
mod->BSIM3v32lnpeak *= 1.0e-6;
|
mod->BSIM3v32lnpeak *= 1.0e-6;
|
||||||
break;
|
break;
|
||||||
case BSIM3v32_MOD_LNGATE:
|
case BSIM3v32_MOD_LNGATE:
|
||||||
mod->BSIM3v32lngate = value->rValue;
|
mod->BSIM3v32lngate = value->rValue;
|
||||||
mod->BSIM3v32lngateGiven = TRUE;
|
mod->BSIM3v32lngateGiven = TRUE;
|
||||||
if (mod->BSIM3v32lngate > 1.0e23)
|
if (mod->BSIM3v32lngate > 1.0e23)
|
||||||
mod->BSIM3v32lngate *= 1.0e-6;
|
mod->BSIM3v32lngate *= 1.0e-6;
|
||||||
break;
|
break;
|
||||||
case BSIM3v32_MOD_LGAMMA1:
|
case BSIM3v32_MOD_LGAMMA1:
|
||||||
mod->BSIM3v32lgamma1 = value->rValue;
|
mod->BSIM3v32lgamma1 = value->rValue;
|
||||||
|
|
@ -809,7 +809,7 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod)
|
||||||
mod->BSIM3v32lvoffcvGiven = TRUE;
|
mod->BSIM3v32lvoffcvGiven = TRUE;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
/* Width dependence */
|
/* Width dependence */
|
||||||
case BSIM3v32_MOD_WCDSC :
|
case BSIM3v32_MOD_WCDSC :
|
||||||
mod->BSIM3v32wcdsc = value->rValue;
|
mod->BSIM3v32wcdsc = value->rValue;
|
||||||
mod->BSIM3v32wcdscGiven = TRUE;
|
mod->BSIM3v32wcdscGiven = TRUE;
|
||||||
|
|
@ -873,14 +873,14 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod)
|
||||||
case BSIM3v32_MOD_WNPEAK:
|
case BSIM3v32_MOD_WNPEAK:
|
||||||
mod->BSIM3v32wnpeak = value->rValue;
|
mod->BSIM3v32wnpeak = value->rValue;
|
||||||
mod->BSIM3v32wnpeakGiven = TRUE;
|
mod->BSIM3v32wnpeakGiven = TRUE;
|
||||||
if (mod->BSIM3v32wnpeak > 1.0e20)
|
if (mod->BSIM3v32wnpeak > 1.0e20)
|
||||||
mod->BSIM3v32wnpeak *= 1.0e-6;
|
mod->BSIM3v32wnpeak *= 1.0e-6;
|
||||||
break;
|
break;
|
||||||
case BSIM3v32_MOD_WNGATE:
|
case BSIM3v32_MOD_WNGATE:
|
||||||
mod->BSIM3v32wngate = value->rValue;
|
mod->BSIM3v32wngate = value->rValue;
|
||||||
mod->BSIM3v32wngateGiven = TRUE;
|
mod->BSIM3v32wngateGiven = TRUE;
|
||||||
if (mod->BSIM3v32wngate > 1.0e23)
|
if (mod->BSIM3v32wngate > 1.0e23)
|
||||||
mod->BSIM3v32wngate *= 1.0e-6;
|
mod->BSIM3v32wngate *= 1.0e-6;
|
||||||
break;
|
break;
|
||||||
case BSIM3v32_MOD_WGAMMA1:
|
case BSIM3v32_MOD_WGAMMA1:
|
||||||
mod->BSIM3v32wgamma1 = value->rValue;
|
mod->BSIM3v32wgamma1 = value->rValue;
|
||||||
|
|
@ -1152,7 +1152,7 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod)
|
||||||
mod->BSIM3v32wvoffcvGiven = TRUE;
|
mod->BSIM3v32wvoffcvGiven = TRUE;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
/* Cross-term dependence */
|
/* Cross-term dependence */
|
||||||
case BSIM3v32_MOD_PCDSC :
|
case BSIM3v32_MOD_PCDSC :
|
||||||
mod->BSIM3v32pcdsc = value->rValue;
|
mod->BSIM3v32pcdsc = value->rValue;
|
||||||
mod->BSIM3v32pcdscGiven = TRUE;
|
mod->BSIM3v32pcdscGiven = TRUE;
|
||||||
|
|
@ -1216,14 +1216,14 @@ BSIM3v32mParam(int param, IFvalue *value, GENmodel *inMod)
|
||||||
case BSIM3v32_MOD_PNPEAK:
|
case BSIM3v32_MOD_PNPEAK:
|
||||||
mod->BSIM3v32pnpeak = value->rValue;
|
mod->BSIM3v32pnpeak = value->rValue;
|
||||||
mod->BSIM3v32pnpeakGiven = TRUE;
|
mod->BSIM3v32pnpeakGiven = TRUE;
|
||||||
if (mod->BSIM3v32pnpeak > 1.0e20)
|
if (mod->BSIM3v32pnpeak > 1.0e20)
|
||||||
mod->BSIM3v32pnpeak *= 1.0e-6;
|
mod->BSIM3v32pnpeak *= 1.0e-6;
|
||||||
break;
|
break;
|
||||||
case BSIM3v32_MOD_PNGATE:
|
case BSIM3v32_MOD_PNGATE:
|
||||||
mod->BSIM3v32pngate = value->rValue;
|
mod->BSIM3v32pngate = value->rValue;
|
||||||
mod->BSIM3v32pngateGiven = TRUE;
|
mod->BSIM3v32pngateGiven = TRUE;
|
||||||
if (mod->BSIM3v32pngate > 1.0e23)
|
if (mod->BSIM3v32pngate > 1.0e23)
|
||||||
mod->BSIM3v32pngate *= 1.0e-6;
|
mod->BSIM3v32pngate *= 1.0e-6;
|
||||||
break;
|
break;
|
||||||
case BSIM3v32_MOD_PGAMMA1:
|
case BSIM3v32_MOD_PGAMMA1:
|
||||||
mod->BSIM3v32pgamma1 = value->rValue;
|
mod->BSIM3v32pgamma1 = value->rValue;
|
||||||
|
|
|
||||||
|
|
@ -63,7 +63,7 @@
|
||||||
|
|
||||||
static double
|
static double
|
||||||
StrongInversionNoiseEvalNew(double Vds, BSIM3v32model *model,
|
StrongInversionNoiseEvalNew(double Vds, BSIM3v32model *model,
|
||||||
BSIM3v32instance *here, double freq, double temp)
|
BSIM3v32instance *here, double freq, double temp)
|
||||||
{
|
{
|
||||||
struct bsim3v32SizeDependParam *pParam;
|
struct bsim3v32SizeDependParam *pParam;
|
||||||
double cd, esat, DelClm, EffFreq, N0, Nl;
|
double cd, esat, DelClm, EffFreq, N0, Nl;
|
||||||
|
|
@ -74,8 +74,8 @@ double T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, Ssi;
|
||||||
esat = 2.0 * pParam->BSIM3v32vsattemp / here->BSIM3v32ueff;
|
esat = 2.0 * pParam->BSIM3v32vsattemp / here->BSIM3v32ueff;
|
||||||
if(model->BSIM3v32em<=0.0) DelClm = 0.0;
|
if(model->BSIM3v32em<=0.0) DelClm = 0.0;
|
||||||
else {
|
else {
|
||||||
T0 = ((((Vds - here->BSIM3v32Vdseff) / pParam->BSIM3v32litl)
|
T0 = ((((Vds - here->BSIM3v32Vdseff) / pParam->BSIM3v32litl)
|
||||||
+ model->BSIM3v32em) / esat);
|
+ model->BSIM3v32em) / esat);
|
||||||
DelClm = pParam->BSIM3v32litl * log (MAX(T0, N_MINLOG));
|
DelClm = pParam->BSIM3v32litl * log (MAX(T0, N_MINLOG));
|
||||||
}
|
}
|
||||||
EffFreq = pow(freq, model->BSIM3v32ef);
|
EffFreq = pow(freq, model->BSIM3v32ef);
|
||||||
|
|
@ -84,7 +84,7 @@ double T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, Ssi;
|
||||||
* pParam->BSIM3v32leff * pParam->BSIM3v32leff;
|
* pParam->BSIM3v32leff * pParam->BSIM3v32leff;
|
||||||
N0 = model->BSIM3v32cox * here->BSIM3v32Vgsteff / CHARGE;
|
N0 = model->BSIM3v32cox * here->BSIM3v32Vgsteff / CHARGE;
|
||||||
Nl = model->BSIM3v32cox * here->BSIM3v32Vgsteff
|
Nl = model->BSIM3v32cox * here->BSIM3v32Vgsteff
|
||||||
* (1.0 - here->BSIM3v32AbovVgst2Vtm * here->BSIM3v32Vdseff) / CHARGE;
|
* (1.0 - here->BSIM3v32AbovVgst2Vtm * here->BSIM3v32Vdseff) / CHARGE;
|
||||||
|
|
||||||
T3 = model->BSIM3v32oxideTrapDensityA
|
T3 = model->BSIM3v32oxideTrapDensityA
|
||||||
* log(MAX(((N0 + 2.0e14) / (Nl + 2.0e14)), N_MINLOG));
|
* log(MAX(((N0 + 2.0e14) / (Nl + 2.0e14)), N_MINLOG));
|
||||||
|
|
@ -109,7 +109,7 @@ double T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, Ssi;
|
||||||
|
|
||||||
static double
|
static double
|
||||||
StrongInversionNoiseEvalOld(double vgs, double vds, BSIM3v32model *model,
|
StrongInversionNoiseEvalOld(double vgs, double vds, BSIM3v32model *model,
|
||||||
BSIM3v32instance *here, double freq, double temp)
|
BSIM3v32instance *here, double freq, double temp)
|
||||||
{
|
{
|
||||||
struct bsim3v32SizeDependParam *pParam;
|
struct bsim3v32SizeDependParam *pParam;
|
||||||
double cd, esat, DelClm, EffFreq, N0, Nl, Vgst;
|
double cd, esat, DelClm, EffFreq, N0, Nl, Vgst;
|
||||||
|
|
@ -124,7 +124,7 @@ StrongInversionNoiseEvalOld(double vgs, double vds, BSIM3v32model *model,
|
||||||
{
|
{
|
||||||
esat = 2.0 * pParam->BSIM3v32vsattemp / here->BSIM3v32ueff;
|
esat = 2.0 * pParam->BSIM3v32vsattemp / here->BSIM3v32ueff;
|
||||||
T0 = ((((vds - here->BSIM3v32vdsat) / pParam->BSIM3v32litl) +
|
T0 = ((((vds - here->BSIM3v32vdsat) / pParam->BSIM3v32litl) +
|
||||||
model->BSIM3v32em) / esat);
|
model->BSIM3v32em) / esat);
|
||||||
DelClm = pParam->BSIM3v32litl * log (MAX (T0, N_MINLOG));
|
DelClm = pParam->BSIM3v32litl * log (MAX (T0, N_MINLOG));
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
|
|
@ -132,13 +132,13 @@ StrongInversionNoiseEvalOld(double vgs, double vds, BSIM3v32model *model,
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
if (model->BSIM3v32em <= 0.0) /* flicker noise modified -JX */
|
if (model->BSIM3v32em <= 0.0) /* flicker noise modified -JX */
|
||||||
DelClm = 0.0;
|
DelClm = 0.0;
|
||||||
else if (vds > here->BSIM3v32vdsat)
|
else if (vds > here->BSIM3v32vdsat)
|
||||||
{
|
{
|
||||||
esat = 2.0 * pParam->BSIM3v32vsattemp / here->BSIM3v32ueff;
|
esat = 2.0 * pParam->BSIM3v32vsattemp / here->BSIM3v32ueff;
|
||||||
T0 = ((((vds - here->BSIM3v32vdsat) / pParam->BSIM3v32litl) +
|
T0 = ((((vds - here->BSIM3v32vdsat) / pParam->BSIM3v32litl) +
|
||||||
model->BSIM3v32em) / esat);
|
model->BSIM3v32em) / esat);
|
||||||
DelClm = pParam->BSIM3v32litl * log (MAX (T0, N_MINLOG));
|
DelClm = pParam->BSIM3v32litl * log (MAX (T0, N_MINLOG));
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
|
|
@ -176,7 +176,7 @@ StrongInversionNoiseEvalOld(double vgs, double vds, BSIM3v32model *model,
|
||||||
|
|
||||||
int
|
int
|
||||||
BSIM3v32noise (int mode, int operation, GENmodel *inModel, CKTcircuit *ckt,
|
BSIM3v32noise (int mode, int operation, GENmodel *inModel, CKTcircuit *ckt,
|
||||||
Ndata *data, double *OnDens)
|
Ndata *data, double *OnDens)
|
||||||
{
|
{
|
||||||
NOISEAN *job = (NOISEAN *) ckt->CKTcurJob;
|
NOISEAN *job = (NOISEAN *) ckt->CKTcurJob;
|
||||||
|
|
||||||
|
|
@ -200,292 +200,292 @@ int i;
|
||||||
/* define the names of the noise sources */
|
/* define the names of the noise sources */
|
||||||
static char *BSIM3v32nNames[BSIM3v32NSRCS] =
|
static char *BSIM3v32nNames[BSIM3v32NSRCS] =
|
||||||
{ /* Note that we have to keep the order */
|
{ /* Note that we have to keep the order */
|
||||||
".rd", /* noise due to rd */
|
".rd", /* noise due to rd */
|
||||||
/* consistent with the index definitions */
|
/* consistent with the index definitions */
|
||||||
".rs", /* noise due to rs */
|
".rs", /* noise due to rs */
|
||||||
/* in BSIM3v32defs.h */
|
/* in BSIM3v32defs.h */
|
||||||
".id", /* noise due to id */
|
".id", /* noise due to id */
|
||||||
".1overf", /* flicker (1/f) noise */
|
".1overf", /* flicker (1/f) noise */
|
||||||
"" /* total transistor noise */
|
"" /* total transistor noise */
|
||||||
};
|
};
|
||||||
|
|
||||||
for (; model != NULL; model = model->BSIM3v32nextModel)
|
for (; model != NULL; model = model->BSIM3v32nextModel)
|
||||||
{ for (here = model->BSIM3v32instances; here != NULL;
|
{ for (here = model->BSIM3v32instances; here != NULL;
|
||||||
here = here->BSIM3v32nextInstance)
|
here = here->BSIM3v32nextInstance)
|
||||||
{ pParam = here->pParam;
|
{ pParam = here->pParam;
|
||||||
switch (operation)
|
switch (operation)
|
||||||
{ case N_OPEN:
|
{ case N_OPEN:
|
||||||
/* see if we have to to produce a summary report */
|
/* see if we have to to produce a summary report */
|
||||||
/* if so, name all the noise generators */
|
/* if so, name all the noise generators */
|
||||||
|
|
||||||
if (job->NStpsSm != 0)
|
if (job->NStpsSm != 0)
|
||||||
{ switch (mode)
|
{ switch (mode)
|
||||||
{ case N_DENS:
|
{ case N_DENS:
|
||||||
for (i = 0; i < BSIM3v32NSRCS; i++)
|
for (i = 0; i < BSIM3v32NSRCS; i++)
|
||||||
{ (void) sprintf(name, "onoise.%s%s",
|
{ (void) sprintf(name, "onoise.%s%s",
|
||||||
here->BSIM3v32name,
|
here->BSIM3v32name,
|
||||||
BSIM3v32nNames[i]);
|
BSIM3v32nNames[i]);
|
||||||
data->namelist = TREALLOC(IFuid, data->namelist, data->numPlots + 1);
|
data->namelist = TREALLOC(IFuid, data->namelist, data->numPlots + 1);
|
||||||
if (!data->namelist)
|
if (!data->namelist)
|
||||||
return(E_NOMEM);
|
return(E_NOMEM);
|
||||||
SPfrontEnd->IFnewUid (ckt,
|
SPfrontEnd->IFnewUid (ckt,
|
||||||
&(data->namelist[data->numPlots++]),
|
&(data->namelist[data->numPlots++]),
|
||||||
NULL, name, UID_OTHER,
|
NULL, name, UID_OTHER,
|
||||||
NULL);
|
NULL);
|
||||||
/* we've added one more plot */
|
/* we've added one more plot */
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
case INT_NOIZ:
|
case INT_NOIZ:
|
||||||
for (i = 0; i < BSIM3v32NSRCS; i++)
|
for (i = 0; i < BSIM3v32NSRCS; i++)
|
||||||
{ (void) sprintf(name, "onoise_total.%s%s",
|
{ (void) sprintf(name, "onoise_total.%s%s",
|
||||||
here->BSIM3v32name,
|
here->BSIM3v32name,
|
||||||
BSIM3v32nNames[i]);
|
BSIM3v32nNames[i]);
|
||||||
data->namelist = TREALLOC(IFuid, data->namelist, data->numPlots + 1);
|
data->namelist = TREALLOC(IFuid, data->namelist, data->numPlots + 1);
|
||||||
if (!data->namelist)
|
if (!data->namelist)
|
||||||
return(E_NOMEM);
|
return(E_NOMEM);
|
||||||
SPfrontEnd->IFnewUid (ckt,
|
SPfrontEnd->IFnewUid (ckt,
|
||||||
&(data->namelist[data->numPlots++]),
|
&(data->namelist[data->numPlots++]),
|
||||||
NULL, name, UID_OTHER,
|
NULL, name, UID_OTHER,
|
||||||
NULL);
|
NULL);
|
||||||
/* we've added one more plot */
|
/* we've added one more plot */
|
||||||
|
|
||||||
(void) sprintf(name, "inoise_total.%s%s",
|
(void) sprintf(name, "inoise_total.%s%s",
|
||||||
here->BSIM3v32name,
|
here->BSIM3v32name,
|
||||||
BSIM3v32nNames[i]);
|
BSIM3v32nNames[i]);
|
||||||
data->namelist = TREALLOC(IFuid, data->namelist, data->numPlots + 1);
|
data->namelist = TREALLOC(IFuid, data->namelist, data->numPlots + 1);
|
||||||
if (!data->namelist)
|
if (!data->namelist)
|
||||||
return(E_NOMEM);
|
return(E_NOMEM);
|
||||||
SPfrontEnd->IFnewUid (ckt,
|
SPfrontEnd->IFnewUid (ckt,
|
||||||
&(data->namelist[data->numPlots++]),
|
&(data->namelist[data->numPlots++]),
|
||||||
NULL, name, UID_OTHER,
|
NULL, name, UID_OTHER,
|
||||||
NULL);
|
NULL);
|
||||||
/* we've added one more plot */
|
/* we've added one more plot */
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
case N_CALC:
|
case N_CALC:
|
||||||
m = here->BSIM3v32m;
|
m = here->BSIM3v32m;
|
||||||
switch (mode)
|
switch (mode)
|
||||||
{ case N_DENS:
|
{ case N_DENS:
|
||||||
NevalSrc(&noizDens[BSIM3v32RDNOIZ],
|
NevalSrc(&noizDens[BSIM3v32RDNOIZ],
|
||||||
&lnNdens[BSIM3v32RDNOIZ], ckt, THERMNOISE,
|
&lnNdens[BSIM3v32RDNOIZ], ckt, THERMNOISE,
|
||||||
here->BSIM3v32dNodePrime, here->BSIM3v32dNode,
|
here->BSIM3v32dNodePrime, here->BSIM3v32dNode,
|
||||||
here->BSIM3v32drainConductance * m);
|
here->BSIM3v32drainConductance * m);
|
||||||
|
|
||||||
NevalSrc(&noizDens[BSIM3v32RSNOIZ],
|
NevalSrc(&noizDens[BSIM3v32RSNOIZ],
|
||||||
&lnNdens[BSIM3v32RSNOIZ], ckt, THERMNOISE,
|
&lnNdens[BSIM3v32RSNOIZ], ckt, THERMNOISE,
|
||||||
here->BSIM3v32sNodePrime, here->BSIM3v32sNode,
|
here->BSIM3v32sNodePrime, here->BSIM3v32sNode,
|
||||||
here->BSIM3v32sourceConductance * m);
|
here->BSIM3v32sourceConductance * m);
|
||||||
|
|
||||||
switch( model->BSIM3v32noiMod )
|
switch( model->BSIM3v32noiMod )
|
||||||
{ case 1:
|
{ case 1:
|
||||||
case 3:
|
case 3:
|
||||||
NevalSrc(&noizDens[BSIM3v32IDNOIZ],
|
NevalSrc(&noizDens[BSIM3v32IDNOIZ],
|
||||||
&lnNdens[BSIM3v32IDNOIZ], ckt,
|
&lnNdens[BSIM3v32IDNOIZ], ckt,
|
||||||
THERMNOISE, here->BSIM3v32dNodePrime,
|
THERMNOISE, here->BSIM3v32dNodePrime,
|
||||||
here->BSIM3v32sNodePrime,
|
here->BSIM3v32sNodePrime,
|
||||||
(2.0 / 3.0 * fabs(here->BSIM3v32gm
|
(2.0 / 3.0 * fabs(here->BSIM3v32gm
|
||||||
+ here->BSIM3v32gds
|
+ here->BSIM3v32gds
|
||||||
+ here->BSIM3v32gmbs)) * m);
|
+ here->BSIM3v32gmbs)) * m);
|
||||||
break;
|
break;
|
||||||
case 2:
|
case 2:
|
||||||
case 4:
|
case 4:
|
||||||
/* Added revision dependent code */
|
/* Added revision dependent code */
|
||||||
if (model->BSIM3v32intVersion == BSIM3v32V324)
|
if (model->BSIM3v32intVersion == BSIM3v32V324)
|
||||||
{
|
{
|
||||||
NevalSrc(&noizDens[BSIM3v32IDNOIZ],
|
NevalSrc(&noizDens[BSIM3v32IDNOIZ],
|
||||||
&lnNdens[BSIM3v32IDNOIZ], ckt,
|
&lnNdens[BSIM3v32IDNOIZ], ckt,
|
||||||
THERMNOISE, here->BSIM3v32dNodePrime,
|
THERMNOISE, here->BSIM3v32dNodePrime,
|
||||||
here->BSIM3v32sNodePrime,
|
here->BSIM3v32sNodePrime,
|
||||||
(m * here->BSIM3v32ueff
|
(m * here->BSIM3v32ueff
|
||||||
* fabs(here->BSIM3v32qinv)
|
* fabs(here->BSIM3v32qinv)
|
||||||
/ (pParam->BSIM3v32leff * pParam->BSIM3v32leff
|
/ (pParam->BSIM3v32leff * pParam->BSIM3v32leff
|
||||||
+ here->BSIM3v32ueff * fabs(here->BSIM3v32qinv)
|
+ here->BSIM3v32ueff * fabs(here->BSIM3v32qinv)
|
||||||
* here->BSIM3v32rds))); /* bugfix */
|
* here->BSIM3v32rds))); /* bugfix */
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{ /* for all versions lower then 3.2.4 */
|
{ /* for all versions lower then 3.2.4 */
|
||||||
NevalSrc(&noizDens[BSIM3v32IDNOIZ],
|
NevalSrc(&noizDens[BSIM3v32IDNOIZ],
|
||||||
&lnNdens[BSIM3v32IDNOIZ], ckt,
|
&lnNdens[BSIM3v32IDNOIZ], ckt,
|
||||||
THERMNOISE, here->BSIM3v32dNodePrime,
|
THERMNOISE, here->BSIM3v32dNodePrime,
|
||||||
here->BSIM3v32sNodePrime,
|
here->BSIM3v32sNodePrime,
|
||||||
(m * here->BSIM3v32ueff
|
(m * here->BSIM3v32ueff
|
||||||
* fabs(here->BSIM3v32qinv
|
* fabs(here->BSIM3v32qinv
|
||||||
/ (pParam->BSIM3v32leff
|
/ (pParam->BSIM3v32leff
|
||||||
* pParam->BSIM3v32leff))));
|
* pParam->BSIM3v32leff))));
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
NevalSrc(&noizDens[BSIM3v32FLNOIZ], NULL,
|
NevalSrc(&noizDens[BSIM3v32FLNOIZ], NULL,
|
||||||
ckt, N_GAIN, here->BSIM3v32dNodePrime,
|
ckt, N_GAIN, here->BSIM3v32dNodePrime,
|
||||||
here->BSIM3v32sNodePrime, (double) 0.0);
|
here->BSIM3v32sNodePrime, (double) 0.0);
|
||||||
|
|
||||||
switch( model->BSIM3v32noiMod )
|
switch( model->BSIM3v32noiMod )
|
||||||
{ case 1:
|
{ case 1:
|
||||||
case 4:
|
case 4:
|
||||||
noizDens[BSIM3v32FLNOIZ] *= m * model->BSIM3v32kf
|
noizDens[BSIM3v32FLNOIZ] *= m * model->BSIM3v32kf
|
||||||
* exp(model->BSIM3v32af
|
* exp(model->BSIM3v32af
|
||||||
* log(MAX(fabs(here->BSIM3v32cd),
|
* log(MAX(fabs(here->BSIM3v32cd),
|
||||||
N_MINLOG)))
|
N_MINLOG)))
|
||||||
/ (pow(data->freq, model->BSIM3v32ef)
|
/ (pow(data->freq, model->BSIM3v32ef)
|
||||||
* pParam->BSIM3v32leff
|
* pParam->BSIM3v32leff
|
||||||
* pParam->BSIM3v32leff
|
* pParam->BSIM3v32leff
|
||||||
* model->BSIM3v32cox);
|
* model->BSIM3v32cox);
|
||||||
break;
|
break;
|
||||||
case 2:
|
case 2:
|
||||||
case 3:
|
case 3:
|
||||||
vgs = *(ckt->CKTstates[0] + here->BSIM3v32vgs);
|
vgs = *(ckt->CKTstates[0] + here->BSIM3v32vgs);
|
||||||
vds = *(ckt->CKTstates[0] + here->BSIM3v32vds);
|
vds = *(ckt->CKTstates[0] + here->BSIM3v32vds);
|
||||||
if (vds < 0.0)
|
if (vds < 0.0)
|
||||||
{ vds = -vds;
|
{ vds = -vds;
|
||||||
vgs = vgs + vds;
|
vgs = vgs + vds;
|
||||||
}
|
}
|
||||||
/* Added revision dependent code */
|
/* Added revision dependent code */
|
||||||
if (model->BSIM3v32intVersion == BSIM3v32V324)
|
if (model->BSIM3v32intVersion == BSIM3v32V324)
|
||||||
{
|
{
|
||||||
Ssi = StrongInversionNoiseEvalNew(vds, model,
|
Ssi = StrongInversionNoiseEvalNew(vds, model,
|
||||||
here, data->freq, ckt->CKTtemp);
|
here, data->freq, ckt->CKTtemp);
|
||||||
T10 = model->BSIM3v32oxideTrapDensityA
|
T10 = model->BSIM3v32oxideTrapDensityA
|
||||||
* 8.62e-5 * ckt->CKTtemp;
|
* 8.62e-5 * ckt->CKTtemp;
|
||||||
T11 = pParam->BSIM3v32weff
|
T11 = pParam->BSIM3v32weff
|
||||||
* pParam->BSIM3v32leff
|
* pParam->BSIM3v32leff
|
||||||
* pow(data->freq, model->BSIM3v32ef)
|
* pow(data->freq, model->BSIM3v32ef)
|
||||||
* 4.0e36;
|
* 4.0e36;
|
||||||
Swi = T10 / T11 * here->BSIM3v32cd
|
Swi = T10 / T11 * here->BSIM3v32cd
|
||||||
* here->BSIM3v32cd;
|
* here->BSIM3v32cd;
|
||||||
T1 = Swi + Ssi;
|
T1 = Swi + Ssi;
|
||||||
if (T1 > 0.0)
|
if (T1 > 0.0)
|
||||||
noizDens[BSIM3v32FLNOIZ] *= m * (Ssi * Swi) / T1;
|
noizDens[BSIM3v32FLNOIZ] *= m * (Ssi * Swi) / T1;
|
||||||
else
|
else
|
||||||
noizDens[BSIM3v32FLNOIZ] *= 0.0;
|
noizDens[BSIM3v32FLNOIZ] *= 0.0;
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{ /* for all versions lower then 3.2.4 */
|
{ /* for all versions lower then 3.2.4 */
|
||||||
if (vgs >= here->BSIM3v32von + 0.1)
|
if (vgs >= here->BSIM3v32von + 0.1)
|
||||||
{
|
{
|
||||||
Ssi = StrongInversionNoiseEvalOld(vgs, vds, model,
|
Ssi = StrongInversionNoiseEvalOld(vgs, vds, model,
|
||||||
here, data->freq, ckt->CKTtemp);
|
here, data->freq, ckt->CKTtemp);
|
||||||
noizDens[BSIM3v32FLNOIZ] *= m * Ssi;
|
noizDens[BSIM3v32FLNOIZ] *= m * Ssi;
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
pParam = here->pParam;
|
pParam = here->pParam;
|
||||||
T10 = model->BSIM3v32oxideTrapDensityA
|
T10 = model->BSIM3v32oxideTrapDensityA
|
||||||
* 8.62e-5 * ckt->CKTtemp;
|
* 8.62e-5 * ckt->CKTtemp;
|
||||||
T11 = pParam->BSIM3v32weff
|
T11 = pParam->BSIM3v32weff
|
||||||
* pParam-> BSIM3v32leff
|
* pParam-> BSIM3v32leff
|
||||||
* pow (data->freq, model->BSIM3v32ef)
|
* pow (data->freq, model->BSIM3v32ef)
|
||||||
* 4.0e36;
|
* 4.0e36;
|
||||||
Swi = T10 / T11 * here->BSIM3v32cd * here->BSIM3v32cd;
|
Swi = T10 / T11 * here->BSIM3v32cd * here->BSIM3v32cd;
|
||||||
|
|
||||||
Slimit = StrongInversionNoiseEvalOld(
|
Slimit = StrongInversionNoiseEvalOld(
|
||||||
here->BSIM3v32von + 0.1, vds, model,
|
here->BSIM3v32von + 0.1, vds, model,
|
||||||
here, data->freq, ckt->CKTtemp);
|
here, data->freq, ckt->CKTtemp);
|
||||||
T1 = Swi + Slimit;
|
T1 = Swi + Slimit;
|
||||||
if (T1 > 0.0)
|
if (T1 > 0.0)
|
||||||
noizDens[BSIM3v32FLNOIZ] *= m * (Slimit * Swi) / T1;
|
noizDens[BSIM3v32FLNOIZ] *= m * (Slimit * Swi) / T1;
|
||||||
else
|
else
|
||||||
noizDens[BSIM3v32FLNOIZ] *= 0.0;
|
noizDens[BSIM3v32FLNOIZ] *= 0.0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
lnNdens[BSIM3v32FLNOIZ] =
|
lnNdens[BSIM3v32FLNOIZ] =
|
||||||
log(MAX(noizDens[BSIM3v32FLNOIZ], N_MINLOG));
|
log(MAX(noizDens[BSIM3v32FLNOIZ], N_MINLOG));
|
||||||
|
|
||||||
noizDens[BSIM3v32TOTNOIZ] = noizDens[BSIM3v32RDNOIZ]
|
noizDens[BSIM3v32TOTNOIZ] = noizDens[BSIM3v32RDNOIZ]
|
||||||
+ noizDens[BSIM3v32RSNOIZ]
|
+ noizDens[BSIM3v32RSNOIZ]
|
||||||
+ noizDens[BSIM3v32IDNOIZ]
|
+ noizDens[BSIM3v32IDNOIZ]
|
||||||
+ noizDens[BSIM3v32FLNOIZ];
|
+ noizDens[BSIM3v32FLNOIZ];
|
||||||
lnNdens[BSIM3v32TOTNOIZ] =
|
lnNdens[BSIM3v32TOTNOIZ] =
|
||||||
log(MAX(noizDens[BSIM3v32TOTNOIZ], N_MINLOG));
|
log(MAX(noizDens[BSIM3v32TOTNOIZ], N_MINLOG));
|
||||||
|
|
||||||
*OnDens += noizDens[BSIM3v32TOTNOIZ];
|
*OnDens += noizDens[BSIM3v32TOTNOIZ];
|
||||||
|
|
||||||
if (data->delFreq == 0.0)
|
if (data->delFreq == 0.0)
|
||||||
{ /* if we haven't done any previous
|
{ /* if we haven't done any previous
|
||||||
integration, we need to initialize our
|
integration, we need to initialize our
|
||||||
"history" variables.
|
"history" variables.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
for (i = 0; i < BSIM3v32NSRCS; i++)
|
for (i = 0; i < BSIM3v32NSRCS; i++)
|
||||||
{ here->BSIM3v32nVar[LNLSTDENS][i] =
|
{ here->BSIM3v32nVar[LNLSTDENS][i] =
|
||||||
lnNdens[i];
|
lnNdens[i];
|
||||||
}
|
}
|
||||||
|
|
||||||
/* clear out our integration variables
|
/* clear out our integration variables
|
||||||
if it's the first pass
|
if it's the first pass
|
||||||
*/
|
*/
|
||||||
if (data->freq ==
|
if (data->freq ==
|
||||||
job->NstartFreq)
|
job->NstartFreq)
|
||||||
{ for (i = 0; i < BSIM3v32NSRCS; i++)
|
{ for (i = 0; i < BSIM3v32NSRCS; i++)
|
||||||
{ here->BSIM3v32nVar[OUTNOIZ][i] = 0.0;
|
{ here->BSIM3v32nVar[OUTNOIZ][i] = 0.0;
|
||||||
here->BSIM3v32nVar[INNOIZ][i] = 0.0;
|
here->BSIM3v32nVar[INNOIZ][i] = 0.0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{ /* data->delFreq != 0.0,
|
{ /* data->delFreq != 0.0,
|
||||||
we have to integrate.
|
we have to integrate.
|
||||||
*/
|
*/
|
||||||
for (i = 0; i < BSIM3v32NSRCS; i++)
|
for (i = 0; i < BSIM3v32NSRCS; i++)
|
||||||
{ if (i != BSIM3v32TOTNOIZ)
|
{ if (i != BSIM3v32TOTNOIZ)
|
||||||
{ tempOnoise = Nintegrate(noizDens[i],
|
{ tempOnoise = Nintegrate(noizDens[i],
|
||||||
lnNdens[i],
|
lnNdens[i],
|
||||||
here->BSIM3v32nVar[LNLSTDENS][i],
|
here->BSIM3v32nVar[LNLSTDENS][i],
|
||||||
data);
|
data);
|
||||||
tempInoise = Nintegrate(noizDens[i]
|
tempInoise = Nintegrate(noizDens[i]
|
||||||
* data->GainSqInv, lnNdens[i]
|
* data->GainSqInv, lnNdens[i]
|
||||||
+ data->lnGainInv,
|
+ data->lnGainInv,
|
||||||
here->BSIM3v32nVar[LNLSTDENS][i]
|
here->BSIM3v32nVar[LNLSTDENS][i]
|
||||||
+ data->lnGainInv, data);
|
+ data->lnGainInv, data);
|
||||||
here->BSIM3v32nVar[LNLSTDENS][i] =
|
here->BSIM3v32nVar[LNLSTDENS][i] =
|
||||||
lnNdens[i];
|
lnNdens[i];
|
||||||
data->outNoiz += tempOnoise;
|
data->outNoiz += tempOnoise;
|
||||||
data->inNoise += tempInoise;
|
data->inNoise += tempInoise;
|
||||||
if (job->NStpsSm != 0)
|
if (job->NStpsSm != 0)
|
||||||
{ here->BSIM3v32nVar[OUTNOIZ][i]
|
{ here->BSIM3v32nVar[OUTNOIZ][i]
|
||||||
+= tempOnoise;
|
+= tempOnoise;
|
||||||
here->BSIM3v32nVar[OUTNOIZ][BSIM3v32TOTNOIZ]
|
here->BSIM3v32nVar[OUTNOIZ][BSIM3v32TOTNOIZ]
|
||||||
+= tempOnoise;
|
+= tempOnoise;
|
||||||
here->BSIM3v32nVar[INNOIZ][i]
|
here->BSIM3v32nVar[INNOIZ][i]
|
||||||
+= tempInoise;
|
+= tempInoise;
|
||||||
here->BSIM3v32nVar[INNOIZ][BSIM3v32TOTNOIZ]
|
here->BSIM3v32nVar[INNOIZ][BSIM3v32TOTNOIZ]
|
||||||
+= tempInoise;
|
+= tempInoise;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
if (data->prtSummary)
|
if (data->prtSummary)
|
||||||
{ for (i = 0; i < BSIM3v32NSRCS; i++)
|
{ for (i = 0; i < BSIM3v32NSRCS; i++)
|
||||||
{ /* print a summary report */
|
{ /* print a summary report */
|
||||||
data->outpVector[data->outNumber++]
|
data->outpVector[data->outNumber++]
|
||||||
= noizDens[i];
|
= noizDens[i];
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
case INT_NOIZ:
|
case INT_NOIZ:
|
||||||
/* already calculated, just output */
|
/* already calculated, just output */
|
||||||
if (job->NStpsSm != 0)
|
if (job->NStpsSm != 0)
|
||||||
{ for (i = 0; i < BSIM3v32NSRCS; i++)
|
{ for (i = 0; i < BSIM3v32NSRCS; i++)
|
||||||
{ data->outpVector[data->outNumber++]
|
{ data->outpVector[data->outNumber++]
|
||||||
= here->BSIM3v32nVar[OUTNOIZ][i];
|
= here->BSIM3v32nVar[OUTNOIZ][i];
|
||||||
data->outpVector[data->outNumber++]
|
data->outpVector[data->outNumber++]
|
||||||
= here->BSIM3v32nVar[INNOIZ][i];
|
= here->BSIM3v32nVar[INNOIZ][i];
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
case N_CLOSE:
|
case N_CLOSE:
|
||||||
/* do nothing, the main calling routine will close */
|
/* do nothing, the main calling routine will close */
|
||||||
return (OK);
|
return (OK);
|
||||||
break; /* the plots */
|
break; /* the plots */
|
||||||
} /* switch (operation) */
|
} /* switch (operation) */
|
||||||
} /* for here */
|
} /* for here */
|
||||||
} /* for model */
|
} /* for model */
|
||||||
|
|
||||||
return(OK);
|
return(OK);
|
||||||
|
|
|
||||||
|
|
@ -39,8 +39,8 @@ double m;
|
||||||
for (; model != NULL; model = model->BSIM3v32nextModel)
|
for (; model != NULL; model = model->BSIM3v32nextModel)
|
||||||
{ for (here = model->BSIM3v32instances; here!= NULL;
|
{ for (here = model->BSIM3v32instances; here!= NULL;
|
||||||
here = here->BSIM3v32nextInstance)
|
here = here->BSIM3v32nextInstance)
|
||||||
{
|
{
|
||||||
if (here->BSIM3v32mode >= 0)
|
if (here->BSIM3v32mode >= 0)
|
||||||
{ Gm = here->BSIM3v32gm;
|
{ Gm = here->BSIM3v32gm;
|
||||||
Gmbs = here->BSIM3v32gmbs;
|
Gmbs = here->BSIM3v32gmbs;
|
||||||
FwdSum = Gm + Gmbs;
|
FwdSum = Gm + Gmbs;
|
||||||
|
|
@ -73,19 +73,19 @@ double m;
|
||||||
cddb = here->BSIM3v32cddb;
|
cddb = here->BSIM3v32cddb;
|
||||||
|
|
||||||
xgtg = xgtd = xgts = xgtb = 0.0;
|
xgtg = xgtd = xgts = xgtb = 0.0;
|
||||||
sxpart = 0.6;
|
sxpart = 0.6;
|
||||||
dxpart = 0.4;
|
dxpart = 0.4;
|
||||||
ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
|
ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
|
||||||
= ddxpart_dVs = 0.0;
|
= ddxpart_dVs = 0.0;
|
||||||
dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
|
dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
|
||||||
= dsxpart_dVs = 0.0;
|
= dsxpart_dVs = 0.0;
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{ cggb = cgdb = cgsb = 0.0;
|
{ cggb = cgdb = cgsb = 0.0;
|
||||||
cbgb = cbdb = cbsb = 0.0;
|
cbgb = cbdb = cbsb = 0.0;
|
||||||
cdgb = cddb = cdsb = 0.0;
|
cdgb = cddb = cdsb = 0.0;
|
||||||
|
|
||||||
xgtg = here->BSIM3v32gtg;
|
xgtg = here->BSIM3v32gtg;
|
||||||
xgtd = here->BSIM3v32gtd;
|
xgtd = here->BSIM3v32gtd;
|
||||||
xgts = here->BSIM3v32gts;
|
xgts = here->BSIM3v32gts;
|
||||||
xgtb = here->BSIM3v32gtb;
|
xgtb = here->BSIM3v32gtb;
|
||||||
|
|
@ -95,46 +95,46 @@ double m;
|
||||||
xcqsb = here->BSIM3v32cqsb;
|
xcqsb = here->BSIM3v32cqsb;
|
||||||
xcqbb = here->BSIM3v32cqbb;
|
xcqbb = here->BSIM3v32cqbb;
|
||||||
|
|
||||||
CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV
|
CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV
|
||||||
* here->pParam->BSIM3v32leffCV;
|
* here->pParam->BSIM3v32leffCV;
|
||||||
qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk);
|
qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk);
|
||||||
if (fabs(qcheq) <= 1.0e-5 * CoxWL)
|
if (fabs(qcheq) <= 1.0e-5 * CoxWL)
|
||||||
{ if (model->BSIM3v32xpart < 0.5)
|
{ if (model->BSIM3v32xpart < 0.5)
|
||||||
{ dxpart = 0.4;
|
{ dxpart = 0.4;
|
||||||
}
|
}
|
||||||
else if (model->BSIM3v32xpart > 0.5)
|
else if (model->BSIM3v32xpart > 0.5)
|
||||||
{ dxpart = 0.0;
|
{ dxpart = 0.0;
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{ dxpart = 0.5;
|
{ dxpart = 0.5;
|
||||||
}
|
}
|
||||||
ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
|
ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
|
||||||
= ddxpart_dVs = 0.0;
|
= ddxpart_dVs = 0.0;
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{ dxpart = here->BSIM3v32qdrn / qcheq;
|
{ dxpart = here->BSIM3v32qdrn / qcheq;
|
||||||
Cdd = here->BSIM3v32cddb;
|
Cdd = here->BSIM3v32cddb;
|
||||||
Csd = -(here->BSIM3v32cgdb + here->BSIM3v32cddb
|
Csd = -(here->BSIM3v32cgdb + here->BSIM3v32cddb
|
||||||
+ here->BSIM3v32cbdb);
|
+ here->BSIM3v32cbdb);
|
||||||
ddxpart_dVd = (Cdd - dxpart * (Cdd + Csd)) / qcheq;
|
ddxpart_dVd = (Cdd - dxpart * (Cdd + Csd)) / qcheq;
|
||||||
Cdg = here->BSIM3v32cdgb;
|
Cdg = here->BSIM3v32cdgb;
|
||||||
Csg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb
|
Csg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb
|
||||||
+ here->BSIM3v32cbgb);
|
+ here->BSIM3v32cbgb);
|
||||||
ddxpart_dVg = (Cdg - dxpart * (Cdg + Csg)) / qcheq;
|
ddxpart_dVg = (Cdg - dxpart * (Cdg + Csg)) / qcheq;
|
||||||
|
|
||||||
Cds = here->BSIM3v32cdsb;
|
Cds = here->BSIM3v32cdsb;
|
||||||
Css = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb
|
Css = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb
|
||||||
+ here->BSIM3v32cbsb);
|
+ here->BSIM3v32cbsb);
|
||||||
ddxpart_dVs = (Cds - dxpart * (Cds + Css)) / qcheq;
|
ddxpart_dVs = (Cds - dxpart * (Cds + Css)) / qcheq;
|
||||||
|
|
||||||
ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg
|
ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg
|
||||||
+ ddxpart_dVs);
|
+ ddxpart_dVs);
|
||||||
}
|
}
|
||||||
sxpart = 1.0 - dxpart;
|
sxpart = 1.0 - dxpart;
|
||||||
dsxpart_dVd = -ddxpart_dVd;
|
dsxpart_dVd = -ddxpart_dVd;
|
||||||
dsxpart_dVg = -ddxpart_dVg;
|
dsxpart_dVg = -ddxpart_dVg;
|
||||||
dsxpart_dVs = -ddxpart_dVs;
|
dsxpart_dVs = -ddxpart_dVs;
|
||||||
dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs);
|
dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg + dsxpart_dVs);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
|
|
@ -156,7 +156,7 @@ double m;
|
||||||
gbspb = here->BSIM3v32gbbs;
|
gbspb = here->BSIM3v32gbbs;
|
||||||
gbspdp = -(gbspg + gbspsp + gbspb);
|
gbspdp = -(gbspg + gbspsp + gbspb);
|
||||||
|
|
||||||
if (here->BSIM3v32nqsMod == 0)
|
if (here->BSIM3v32nqsMod == 0)
|
||||||
{ cggb = here->BSIM3v32cggb;
|
{ cggb = here->BSIM3v32cggb;
|
||||||
cgsb = here->BSIM3v32cgdb;
|
cgsb = here->BSIM3v32cgdb;
|
||||||
cgdb = here->BSIM3v32cgsb;
|
cgdb = here->BSIM3v32cgsb;
|
||||||
|
|
@ -170,19 +170,19 @@ double m;
|
||||||
cddb = -(here->BSIM3v32cdsb + cgdb + cbdb);
|
cddb = -(here->BSIM3v32cdsb + cgdb + cbdb);
|
||||||
|
|
||||||
xgtg = xgtd = xgts = xgtb = 0.0;
|
xgtg = xgtd = xgts = xgtb = 0.0;
|
||||||
sxpart = 0.4;
|
sxpart = 0.4;
|
||||||
dxpart = 0.6;
|
dxpart = 0.6;
|
||||||
ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
|
ddxpart_dVd = ddxpart_dVg = ddxpart_dVb
|
||||||
= ddxpart_dVs = 0.0;
|
= ddxpart_dVs = 0.0;
|
||||||
dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
|
dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
|
||||||
= dsxpart_dVs = 0.0;
|
= dsxpart_dVs = 0.0;
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{ cggb = cgdb = cgsb = 0.0;
|
{ cggb = cgdb = cgsb = 0.0;
|
||||||
cbgb = cbdb = cbsb = 0.0;
|
cbgb = cbdb = cbsb = 0.0;
|
||||||
cdgb = cddb = cdsb = 0.0;
|
cdgb = cddb = cdsb = 0.0;
|
||||||
|
|
||||||
xgtg = here->BSIM3v32gtg;
|
xgtg = here->BSIM3v32gtg;
|
||||||
xgtd = here->BSIM3v32gts;
|
xgtd = here->BSIM3v32gts;
|
||||||
xgts = here->BSIM3v32gtd;
|
xgts = here->BSIM3v32gtd;
|
||||||
xgtb = here->BSIM3v32gtb;
|
xgtb = here->BSIM3v32gtb;
|
||||||
|
|
@ -192,51 +192,51 @@ double m;
|
||||||
xcqsb = here->BSIM3v32cqdb;
|
xcqsb = here->BSIM3v32cqdb;
|
||||||
xcqbb = here->BSIM3v32cqbb;
|
xcqbb = here->BSIM3v32cqbb;
|
||||||
|
|
||||||
CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV
|
CoxWL = model->BSIM3v32cox * here->pParam->BSIM3v32weffCV
|
||||||
* here->pParam->BSIM3v32leffCV;
|
* here->pParam->BSIM3v32leffCV;
|
||||||
qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk);
|
qcheq = -(here->BSIM3v32qgate + here->BSIM3v32qbulk);
|
||||||
if (fabs(qcheq) <= 1.0e-5 * CoxWL)
|
if (fabs(qcheq) <= 1.0e-5 * CoxWL)
|
||||||
{ if (model->BSIM3v32xpart < 0.5)
|
{ if (model->BSIM3v32xpart < 0.5)
|
||||||
{ sxpart = 0.4;
|
{ sxpart = 0.4;
|
||||||
}
|
}
|
||||||
else if (model->BSIM3v32xpart > 0.5)
|
else if (model->BSIM3v32xpart > 0.5)
|
||||||
{ sxpart = 0.0;
|
{ sxpart = 0.0;
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{ sxpart = 0.5;
|
{ sxpart = 0.5;
|
||||||
}
|
}
|
||||||
dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
|
dsxpart_dVd = dsxpart_dVg = dsxpart_dVb
|
||||||
= dsxpart_dVs = 0.0;
|
= dsxpart_dVs = 0.0;
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{ sxpart = here->BSIM3v32qdrn / qcheq;
|
{ sxpart = here->BSIM3v32qdrn / qcheq;
|
||||||
Css = here->BSIM3v32cddb;
|
Css = here->BSIM3v32cddb;
|
||||||
Cds = -(here->BSIM3v32cgdb + here->BSIM3v32cddb
|
Cds = -(here->BSIM3v32cgdb + here->BSIM3v32cddb
|
||||||
+ here->BSIM3v32cbdb);
|
+ here->BSIM3v32cbdb);
|
||||||
dsxpart_dVs = (Css - sxpart * (Css + Cds)) / qcheq;
|
dsxpart_dVs = (Css - sxpart * (Css + Cds)) / qcheq;
|
||||||
Csg = here->BSIM3v32cdgb;
|
Csg = here->BSIM3v32cdgb;
|
||||||
Cdg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb
|
Cdg = -(here->BSIM3v32cggb + here->BSIM3v32cdgb
|
||||||
+ here->BSIM3v32cbgb);
|
+ here->BSIM3v32cbgb);
|
||||||
dsxpart_dVg = (Csg - sxpart * (Csg + Cdg)) / qcheq;
|
dsxpart_dVg = (Csg - sxpart * (Csg + Cdg)) / qcheq;
|
||||||
|
|
||||||
Csd = here->BSIM3v32cdsb;
|
Csd = here->BSIM3v32cdsb;
|
||||||
Cdd = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb
|
Cdd = -(here->BSIM3v32cgsb + here->BSIM3v32cdsb
|
||||||
+ here->BSIM3v32cbsb);
|
+ here->BSIM3v32cbsb);
|
||||||
dsxpart_dVd = (Csd - sxpart * (Csd + Cdd)) / qcheq;
|
dsxpart_dVd = (Csd - sxpart * (Csd + Cdd)) / qcheq;
|
||||||
|
|
||||||
dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg
|
dsxpart_dVb = -(dsxpart_dVd + dsxpart_dVg
|
||||||
+ dsxpart_dVs);
|
+ dsxpart_dVs);
|
||||||
}
|
}
|
||||||
dxpart = 1.0 - sxpart;
|
dxpart = 1.0 - sxpart;
|
||||||
ddxpart_dVd = -dsxpart_dVd;
|
ddxpart_dVd = -dsxpart_dVd;
|
||||||
ddxpart_dVg = -dsxpart_dVg;
|
ddxpart_dVg = -dsxpart_dVg;
|
||||||
ddxpart_dVs = -dsxpart_dVs;
|
ddxpart_dVs = -dsxpart_dVs;
|
||||||
ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs);
|
ddxpart_dVb = -(ddxpart_dVd + ddxpart_dVg + ddxpart_dVs);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
T1 = *(ckt->CKTstate0 + here->BSIM3v32qdef) * here->BSIM3v32gtau;
|
T1 = *(ckt->CKTstate0 + here->BSIM3v32qdef) * here->BSIM3v32gtau;
|
||||||
gdpr = here->BSIM3v32drainConductance;
|
gdpr = here->BSIM3v32drainConductance;
|
||||||
gspr = here->BSIM3v32sourceConductance;
|
gspr = here->BSIM3v32sourceConductance;
|
||||||
gds = here->BSIM3v32gds;
|
gds = here->BSIM3v32gds;
|
||||||
|
|
@ -245,9 +245,9 @@ double m;
|
||||||
capbd = here->BSIM3v32capbd;
|
capbd = here->BSIM3v32capbd;
|
||||||
capbs = here->BSIM3v32capbs;
|
capbs = here->BSIM3v32capbs;
|
||||||
|
|
||||||
GSoverlapCap = here->BSIM3v32cgso;
|
GSoverlapCap = here->BSIM3v32cgso;
|
||||||
GDoverlapCap = here->BSIM3v32cgdo;
|
GDoverlapCap = here->BSIM3v32cgdo;
|
||||||
GBoverlapCap = here->pParam->BSIM3v32cgbo;
|
GBoverlapCap = here->pParam->BSIM3v32cgbo;
|
||||||
|
|
||||||
xcdgb = (cdgb - GDoverlapCap);
|
xcdgb = (cdgb - GDoverlapCap);
|
||||||
xcddb = (cddb + capbd + GDoverlapCap);
|
xcddb = (cddb + capbd + GDoverlapCap);
|
||||||
|
|
@ -266,7 +266,7 @@ double m;
|
||||||
xcbsb = (cbsb - capbs);
|
xcbsb = (cbsb - capbs);
|
||||||
xcbbb = -(xcbgb + xcbdb + xcbsb);
|
xcbbb = -(xcbgb + xcbdb + xcbsb);
|
||||||
|
|
||||||
m = here->BSIM3v32m;
|
m = here->BSIM3v32m;
|
||||||
|
|
||||||
*(here->BSIM3v32GgPtr ) += m * (xcggb * s->real);
|
*(here->BSIM3v32GgPtr ) += m * (xcggb * s->real);
|
||||||
*(here->BSIM3v32GgPtr +1) += m * (xcggb * s->imag);
|
*(here->BSIM3v32GgPtr +1) += m * (xcggb * s->imag);
|
||||||
|
|
@ -319,22 +319,22 @@ double m;
|
||||||
*(here->BSIM3v32BspPtr) -= m * (gbs - gbbsp);
|
*(here->BSIM3v32BspPtr) -= m * (gbs - gbbsp);
|
||||||
|
|
||||||
*(here->BSIM3v32DPgPtr) += Gm + dxpart * xgtg
|
*(here->BSIM3v32DPgPtr) += Gm + dxpart * xgtg
|
||||||
+ T1 * ddxpart_dVg + gbdpg;
|
+ T1 * ddxpart_dVg + gbdpg;
|
||||||
*(here->BSIM3v32DPdpPtr) += gdpr + gds + gbd + RevSum
|
*(here->BSIM3v32DPdpPtr) += gdpr + gds + gbd + RevSum
|
||||||
+ dxpart * xgtd + T1 * ddxpart_dVd + gbdpdp;
|
+ dxpart * xgtd + T1 * ddxpart_dVd + gbdpdp;
|
||||||
*(here->BSIM3v32DPspPtr) -= gds + FwdSum - dxpart * xgts
|
*(here->BSIM3v32DPspPtr) -= gds + FwdSum - dxpart * xgts
|
||||||
- T1 * ddxpart_dVs - gbdpsp;
|
- T1 * ddxpart_dVs - gbdpsp;
|
||||||
*(here->BSIM3v32DPbPtr) -= gbd - Gmbs - dxpart * xgtb
|
*(here->BSIM3v32DPbPtr) -= gbd - Gmbs - dxpart * xgtb
|
||||||
- T1 * ddxpart_dVb - gbdpb;
|
- T1 * ddxpart_dVb - gbdpb;
|
||||||
|
|
||||||
*(here->BSIM3v32SPgPtr) -= Gm - sxpart * xgtg
|
*(here->BSIM3v32SPgPtr) -= Gm - sxpart * xgtg
|
||||||
- T1 * dsxpart_dVg - gbspg;
|
- T1 * dsxpart_dVg - gbspg;
|
||||||
*(here->BSIM3v32SPspPtr) += gspr + gds + gbs + FwdSum
|
*(here->BSIM3v32SPspPtr) += gspr + gds + gbs + FwdSum
|
||||||
+ sxpart * xgts + T1 * dsxpart_dVs + gbspsp;
|
+ sxpart * xgts + T1 * dsxpart_dVs + gbspsp;
|
||||||
*(here->BSIM3v32SPbPtr) -= gbs + Gmbs - sxpart * xgtb
|
*(here->BSIM3v32SPbPtr) -= gbs + Gmbs - sxpart * xgtb
|
||||||
- T1 * dsxpart_dVb - gbspb;
|
- T1 * dsxpart_dVb - gbspb;
|
||||||
*(here->BSIM3v32SPdpPtr) -= gds + RevSum - sxpart * xgtd
|
*(here->BSIM3v32SPdpPtr) -= gds + RevSum - sxpart * xgtd
|
||||||
- T1 * dsxpart_dVd - gbspdp;
|
- T1 * dsxpart_dVd - gbspdp;
|
||||||
|
|
||||||
*(here->BSIM3v32GgPtr) -= xgtg;
|
*(here->BSIM3v32GgPtr) -= xgtg;
|
||||||
*(here->BSIM3v32GbPtr) -= xgtb;
|
*(here->BSIM3v32GbPtr) -= xgtb;
|
||||||
|
|
|
||||||
File diff suppressed because it is too large
Load Diff
|
|
@ -28,8 +28,8 @@ BSIM3v32instance *here;
|
||||||
|
|
||||||
for (; model != NULL; model = model->BSIM3v32nextModel)
|
for (; model != NULL; model = model->BSIM3v32nextModel)
|
||||||
{ for (here = model->BSIM3v32instances; here != NULL;
|
{ for (here = model->BSIM3v32instances; here != NULL;
|
||||||
here = here->BSIM3v32nextInstance)
|
here = here->BSIM3v32nextInstance)
|
||||||
{
|
{
|
||||||
#ifdef STEPDEBUG
|
#ifdef STEPDEBUG
|
||||||
debugtemp = *timeStep;
|
debugtemp = *timeStep;
|
||||||
#endif /* STEPDEBUG */
|
#endif /* STEPDEBUG */
|
||||||
|
|
@ -38,7 +38,7 @@ BSIM3v32instance *here;
|
||||||
CKTterr(here->BSIM3v32qd,ckt,timeStep);
|
CKTterr(here->BSIM3v32qd,ckt,timeStep);
|
||||||
#ifdef STEPDEBUG
|
#ifdef STEPDEBUG
|
||||||
if(debugtemp != *timeStep)
|
if(debugtemp != *timeStep)
|
||||||
{ printf("device %s reduces step from %g to %g\n",
|
{ printf("device %s reduces step from %g to %g\n",
|
||||||
here->BSIM3v32name,debugtemp,*timeStep);
|
here->BSIM3v32name,debugtemp,*timeStep);
|
||||||
}
|
}
|
||||||
#endif /* STEPDEBUG */
|
#endif /* STEPDEBUG */
|
||||||
|
|
|
||||||
|
|
@ -1217,7 +1217,7 @@ typedef struct sBSIM3v32model
|
||||||
unsigned BSIM3v32bulkJctGateSideGradingCoeffGiven :1;
|
unsigned BSIM3v32bulkJctGateSideGradingCoeffGiven :1;
|
||||||
unsigned BSIM3v32unitLengthGateSidewallJctCapGiven :1;
|
unsigned BSIM3v32unitLengthGateSidewallJctCapGiven :1;
|
||||||
unsigned BSIM3v32jctEmissionCoeffGiven :1;
|
unsigned BSIM3v32jctEmissionCoeffGiven :1;
|
||||||
unsigned BSIM3v32jctTempExponentGiven :1;
|
unsigned BSIM3v32jctTempExponentGiven :1;
|
||||||
|
|
||||||
unsigned BSIM3v32oxideTrapDensityAGiven :1;
|
unsigned BSIM3v32oxideTrapDensityAGiven :1;
|
||||||
unsigned BSIM3v32oxideTrapDensityBGiven :1;
|
unsigned BSIM3v32oxideTrapDensityBGiven :1;
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue