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pre-master-45

2a942a2161 · Improve comment. · Updated 2025-08-31 15:10:17 +02:00
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Branches

KLU-6+11-rebase-master-17_July_2023

152d6f21c4 · Fix a bug, not finding any instance parameters for PSP or R2_CMC · Updated 2023-07-21 14:19:02 +02:00    luke

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dw_sparse-update-14b

990d3a92d3 · llvm format · Updated 2023-06-18 10:07:09 +02:00
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KLU-6+11-rebase-master-5_Mag_2023

3147468ecb · Provide its own instal directory also for debug, · Updated 2023-06-03 18:33:59 +02:00    luke

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osdi_klu2

6d5fe8c77f · integrate OSDI with KLU · Updated 2023-05-13 17:14:52 +02:00    luke

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osdi_klu

602dfedfec · integrate OSDI with KLU · Updated 2023-05-13 15:30:17 +02:00    luke

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osdi_mfactor

c080f08044 · make accessible · Updated 2023-05-03 00:04:05 +02:00    luke

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hv_concat_ds

e1076a3979 · Add another test: don't concatenate .param line, but replace '+' by '.param' · Updated 2023-04-18 15:35:29 +02:00    luke

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pre-master-40

48ddbb4819 · Command 'listing r': No extra formatting, truncation etc. · Updated 2023-03-31 11:16:26 +02:00    luke

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hv_noise_xspice

03623f3759 · Add noise capability to XSPICE code models · Updated 2023-03-29 14:28:48 +02:00    luke

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fix_calcop_transient

c318d2b9fa · (fix) CALC_OP during transient analysis in OSDI interface · Updated 2023-03-01 13:50:35 +01:00    luke

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markus_osdi

97f31d5a20 · fix memory leak more rigorously · Updated 2023-02-22 17:59:32 +01:00    luke

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osdi-extension

a5738ed583 · implement typedpnjlim as optional limiter for verilog-a models · Updated 2023-02-01 23:25:28 +01:00    luke

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fix_aliasparam_osdi

aa450dd65b · osdi: fix sigfault when using aliasparam · Updated 2023-02-01 21:23:59 +01:00    luke

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fix_i686_align

8648393846 · use _Alignof(max_align_t) instead of sizeof(max_align_t) · Updated 2023-01-31 19:18:03 +01:00    luke

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pre-master-39

2d936f1e8f · In the ngspice shared library the fcn ivers is called · Updated 2023-01-30 10:56:03 +01:00    luke

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fix_osdi_init_crash

9f5d1c34f1 · properly abort for invalid OSDI paramters · Updated 2023-01-16 16:58:00 +01:00    luke

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hv-ota-cm

8d8ce26fd6 · Simple OTA, still without limits, other parameters missing as well, · Updated 2023-01-05 16:57:13 +01:00    luke

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dw_bsim4diode_for_bsim32

f613188728 · adaption trap tunnel currents for bsim3.2 · Updated 2023-01-01 17:53:17 +01:00
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veriloga_osdi3

3af1536042 · slightly optimize predictor · Updated 2022-12-10 23:43:48 +01:00    luke

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veriloga_osdi

ccdb8de644 · add predictor to compile_min · Updated 2022-11-17 14:42:21 +01:00    luke

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