2022-12-16 15:48:09 +01:00
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*Sample netlist for BSIM-CMG
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* (exec-spice "ngspice %s" t)
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*Inverter DC
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.include Modelcards/modelcard.nmos
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.include Modelcards/modelcard.pmos
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* --- Voltage Sources ---
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vdd supply 0 dc=1.0
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vsig vin 0 dc=0.5 sin (0.5 0.5 1MEG)
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NP1 vout vin supply supply BSIMCMG_osdi_P
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NN1 vout vin 0 0 BSIMCMG_osdi_N
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* --- DC Analysis ---
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2023-02-07 11:03:10 +01:00
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.dc vsig 0 1 0.01
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2022-12-16 15:48:09 +01:00
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* --- Transient Analysis ---
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2023-02-07 11:03:10 +01:00
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*.tran 10n 2u
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2022-12-16 15:48:09 +01:00
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.control
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2023-01-25 13:12:27 +01:00
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* pre_osdi ../osdi_libs/bsimcmg.osdi
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2022-12-16 15:48:09 +01:00
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set xbrushwidth=3
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run
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2023-08-30 14:23:25 +02:00
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let gain:10 = deriv(-V(vout))/10
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plot v(vout) gain:10
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2022-12-16 15:48:09 +01:00
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.endc
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.end
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