2022-01-14 18:33:01 +01:00
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Example of VSRC as voltage ports
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* https://qucs-help.readthedocs.io/en/spice4qucs/RF.html fig. 13.2
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*
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*
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V1 in 0 dc 0 ac 1 portnum 1 z0 50 ; pwr 0.001 freq 2.3e9
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C1 in 0 318.3n
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L1 in out 1.592m
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C2 out 0 318.3n
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V2 out 0 dc 0 ac 0 portnum 2 z0 50 ; pwr 0.002 freq 3.2e9
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.sp dec 100 1 1e6 0
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.control
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run
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display
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2022-01-15 10:16:44 +01:00
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set xbrushwidth=5
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set xgridwidth=2
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2022-01-14 18:33:01 +01:00
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plot mag(S_1_1) mag(S_1_2) mag(S_2_1) mag(S_2_2)
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plot S_1_1 smithgrid
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plot S_1_2 polar
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2022-01-15 10:16:44 +01:00
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set hcopydevtype = svg
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hardcopy plot_1.svg S_1_2 polar
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hardcopy plot_2.svg S_1_1 smithgrid
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2022-08-28 17:52:55 +02:00
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* set colors, tested with MS Windows
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set color0=white ; background
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set color1=black ; circumference, reflection magnitue = 1
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set color18=red ; grid for const resistance
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set color19=blue ; grid for const reactance
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set color4=darkgreen ; data 1
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set color5=orange ; data 2
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plot S_1_1 S_1_2 smithgrid
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2022-01-14 18:33:01 +01:00
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.endc
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.end
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