2018-05-18 15:58:45 +02:00
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*****************==== Inverter ====*******************
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*********** VDMOS ****************************
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vdd 1 0 5
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.subckt inv out in vdd vss
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2018-12-22 22:16:03 +01:00
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mp1 out in vdd p1
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mn1 out in vss n1
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2018-05-18 15:58:45 +02:00
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.ends
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xinv 3 2 1 0 inv
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Vin 2 0 Pulse (0 5 10n 10n 10n 140n 300n)
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.tran 1n 1u
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.control
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run
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* current and output in a single plot
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plot v(2) v(3)
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.endc
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.model N1 vdmos cgdmin=0.2p cgdmax=1p a=2 cgs=0.5p rg=5k rb=1e9 cjo=0.1p
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.model P1 vdmos cgdmin=0.2p cgdmax=1p a=2 cgs=0.5p rg=5k rb=1e9 cjo=0.1p pchan
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.end
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