46 lines
1.4 KiB
SourcePawn
46 lines
1.4 KiB
SourcePawn
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*** NMOS and PMOS transistors PSP103.6 IHP Open PDK (Id-Vgs, Vbs) (Id-Vds, Vgs) (Id-Vgs, T) ***
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xm02 2 1 3 4 sg13_lv_nmos l=0.15u w=0.495u as=0.131175p ad=0.131175p ps=1.52u pd=1.52u
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vgsn 1 0 3.5
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vdsn 2 0 0.1
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vssn 3 0 0
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vbsn 4 0 0
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xm01 22 11 33 44 sg13_lv_pmos l=0.15u w=0.99u as=0.26235p ad=0.26235p ps=2.51u pd=2.51u
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vgsp 11 0 -3.5
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vdsp 22 0 -0.1
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vssp 33 0 0
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vbsp 44 0 0
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* IHP Open PDK
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.lib "D:\Spice_general\IHP-Open-PDK\ihp-sg13g2\libs.tech\ngspice\models\cornerMOSlv.lib" mos_tt
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.control
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pre_osdi ../lib/ngspice/psp103.osdi
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set xgridwidth=2
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set xbrushwidth=3
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* NMOS
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dc vgsn 0 1.5 0.05 vbsn 0 -1.5 -0.3
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plot vssn#branch ylabel 'Id vs. Vgs, Vbs 0 ... -1.5'
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plot abs(vssn#branch) ylog ylabel 'Id vs. Vgs, Vbs 0 ... -1.5'
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dc vdsn 0 1.6 0.01 vgsn 0 1.6 0.2
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plot vssn#branch ylabel 'Id vs. Vds, Vgs 0 ... 1.6'
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dc vgsn 0 1.5 0.05 temp -40 160 40
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plot vssn#branch ylabel 'Id vs. Vds, Temp. -40 ... 160'
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plot abs(vssn#branch) ylog ylabel 'Id vs. Vds, Temp. -40 ... 160'
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* PMOS
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dc vgsp 0 -1.5 -0.05 vbsp 0 1.5 0.3
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plot vssp#branch ylabel 'Id vs. Vgs, Vbs 0 ... 1.5'
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plot abs(vssp#branch) ylog ylabel 'Id vs. Vgs, Vbs 0 ... 1.5'
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dc vdsp 0 -1.6 -0.01 vgsp 0 -1.6 -0.2
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plot vssp#branch ylabel 'Id vs. Vds, Vgs 0 ... -1.6'
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dc vgsp 0 -1.5 -0.05 temp -40 160 40
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plot vssp#branch ylabel 'Id vs. Vds, Temp. -40 ... 160'
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plot abs(vssp#branch) ylog ylabel 'Id vs. Vds, Temp. -40 ... 160'
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.endc
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.end
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