mirror of https://github.com/YosysHQ/nextpnr.git
Signed-off-by: David Shah <dave@ds0.me> |
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| .. | ||
| .gitignore | ||
| README.md | ||
| blinky.v | ||
| report.py | ||
| simple.py | ||
| simple.sh | ||
| simple_timing.py | ||
README.md
Generic Architecture Example
This contains a simple, artificial, example of the nextpnr generic API.
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simple.py procedurally generates a simple FPGA architecture with IO at the edges, logic slices in all other tiles, and interconnect only between adjacent tiles
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simple_timing.py annotates cells with timing data (this is a separate script that must be run after packing)
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report.py stores design information after place-and-route to blinky.txt in place of real bitstream generation
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Run simple.sh to build an example design on the FPGA above