nextpnr/himbaechel
Miodrag Milanović b8a6559a3f
gatemate: add CP lines as clock and general routing [sc-184] (#1638)
* gatemate: add alternate clock routes

* use additional pins

* Fix clock router and timings

* Fix DDR nets

* Test passtrough concept

* remove not used variable

* wip

* handle pip masks

* Cleanup

* create CPE_CPLINES cells and set properties on them

* Fix pip masking

* rough code to break cplines into subnets

* add ports to cell

* mux bridges need cell bel pins too

* fix multiplier output register packing

* remove empty if

* Fix ODDR

* Add options to disable some pips

* Use resources info

* mask field to resource field

* produce valid netlist with propagation netlist at least

* adapt reassign_cplines for internal resource pips

* Handle block and resources

* fix formatting

* It is required to set all mandatory properties now

* arch API for resources

* current progress

* Add option to skip bridges

* perform per-wire resource congestion costing

* Added no-cpe-cp option

* resource bugfix

* comment out spammy debug message

* Fix routing conflicts issues

* allow only some pass trough for clock router

* handle inversion bits for pass signals

* verify inversion before/after assigning bridges

* we care only if there is net

* Revert "we care only if there is net"

This reverts commit 3da2769e31.

* Revert "verify inversion before/after assigning bridges"

This reverts commit 8613ee17c8.

* chipdb version bump

* clangformat

* cleanup

* cleanup

* Initial conversion to GroupId

* Keep group info in pip extra

* Cleanup headers

* Initialize resource efficiently

* Addressing review comments

* improve resource docs

* Make CP lines not use as clocks as default

---------

Co-authored-by: Lofty <dan.ravensloft@gmail.com>
2026-02-25 08:22:16 +01:00
..
himbaechel_dbgen himbaechel: Extend API to enable cell delay override (#1535) 2025-08-20 06:32:18 +02:00
uarch gatemate: add CP lines as clock and general routing [sc-184] (#1638) 2026-02-25 08:22:16 +01:00
.gitignore himbächel: Initial implementation 2023-05-13 08:26:41 +02:00
CMakeLists.txt Gatemate FPGA initial support (#1473) 2025-04-22 16:41:01 +02:00
arch.cc himbaechel: fix parsing vopt memory issue (#1614) 2025-12-12 14:11:34 +01:00
arch.h gatemate: add CP lines as clock and general routing [sc-184] (#1638) 2026-02-25 08:22:16 +01:00
arch_pybindings.cc himbaechel: Add Python binding for get_tile_wire_range 2025-06-25 18:37:17 +02:00
arch_pybindings.h himbächel: Initial implementation 2023-05-13 08:26:41 +02:00
archdefs.h Add GroupId related calls to Himbaechel API (#1399) 2024-12-05 13:59:33 +01:00
chipdb.h himbaechel: Extend API to enable cell delay override (#1535) 2025-08-20 06:32:18 +02:00
himbaechel_api.cc himbaechel: Extend API to enable cell delay override (#1535) 2025-08-20 06:32:18 +02:00
himbaechel_api.h gatemate: add CP lines as clock and general routing [sc-184] (#1638) 2026-02-25 08:22:16 +01:00
himbaechel_constids.h himbächel: Initial implementation 2023-05-13 08:26:41 +02:00
himbaechel_gfxids.h Add GroupId related calls to Himbaechel API (#1399) 2024-12-05 13:59:33 +01:00
himbaechel_helpers.cc himbaechel: Add support for new constants API 2023-11-07 09:00:03 +01:00
himbaechel_helpers.h clangformat 2024-09-30 14:51:33 +02:00
main.cc himbaechel: add uarch specific options parsing (#1582) 2025-10-21 14:41:53 +02:00