mirror of https://github.com/YosysHQ/nextpnr.git
145 lines
3.0 KiB
C
145 lines
3.0 KiB
C
/*
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* nextpnr -- Next Generation Place and Route
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*
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* Copyright (C) 2024 The Project Peppercorn Authors.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#ifndef GATEMATE_EXTRA_DATA_H
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#define GATEMATE_EXTRA_DATA_H
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#include "nextpnr.h"
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NEXTPNR_NAMESPACE_BEGIN
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NPNR_PACKED_STRUCT(struct GateMateTileExtraDataPOD {
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uint8_t die;
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uint8_t bit_x;
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uint8_t bit_y;
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uint8_t tile_x;
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uint8_t tile_y;
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uint8_t prim_id;
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uint16_t dummy;
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});
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NPNR_PACKED_STRUCT(struct GateMatePipExtraDataPOD {
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int32_t name;
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uint8_t bits;
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uint8_t value;
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uint8_t flags;
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uint8_t type;
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uint8_t plane;
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uint8_t dummy1;
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uint16_t dummy2;
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});
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NPNR_PACKED_STRUCT(struct GateMateBelPinConstraintPOD {
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int32_t name;
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int16_t constr_x;
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int16_t constr_y;
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int16_t constr_z;
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int16_t dummy;
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});
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NPNR_PACKED_STRUCT(struct GateMateBelExtraDataPOD { RelSlice<GateMateBelPinConstraintPOD> constraints; });
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NPNR_PACKED_STRUCT(struct GateMatePadExtraDataPOD {
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uint16_t x;
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uint16_t y;
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uint16_t z;
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uint16_t dummy;
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});
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NPNR_PACKED_STRUCT(struct GateMateTimingExtraDataPOD {
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int32_t name;
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TimingValue delay;
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});
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NPNR_PACKED_STRUCT(struct GateMateSpeedGradeExtraDataPOD { RelSlice<GateMateTimingExtraDataPOD> timings; });
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NPNR_PACKED_STRUCT(struct GateMateDieRegionPOD {
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int32_t name;
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uint16_t x1;
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uint16_t y1;
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uint16_t x2;
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uint16_t y2;
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});
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NPNR_PACKED_STRUCT(struct GateMateChipExtraDataPOD { RelSlice<GateMateDieRegionPOD> dies; });
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enum MuxFlags
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{
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MUX_INVERT = 1,
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MUX_VISIBLE = 2,
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MUX_CONFIG = 4,
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MUX_ROUTING = 8,
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};
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enum PipExtra
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{
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PIP_EXTRA_MUX = 1,
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};
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enum CPEFunction
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{
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C_ADDF = 1,
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C_ADDF2 = 2,
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C_MULT = 3,
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C_MX4 = 4,
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C_EN_CIN = 5,
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C_CONCAT = 6,
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C_ADDCIN = 7,
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};
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enum CPE_Z
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{
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CPE_LT_U_Z = 0,
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CPE_LT_L_Z = 1,
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CPE_FF_U_Z = 2,
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CPE_FF_L_Z = 3,
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CPE_RAMIO_U_Z = 4,
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CPE_RAMIO_L_Z = 5,
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CPE_COMP_Z = 6,
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CPE_CPLINES_Z = 7,
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CPE_LT_FULL_Z = 8,
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CPE_BRIDGE_Z = 9,
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RAM_FULL_Z = 10,
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RAM_HALF_L_Z = 11,
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};
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enum ClusterPlacement
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{
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PLACE_DB_CONSTR = 32,
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};
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struct PllCfgRecord
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{
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double weight;
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double f_core;
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double f_dco;
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double f_core_delta;
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double core_weight;
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int32_t K;
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int32_t N1;
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int32_t N2;
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int32_t M1;
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int32_t M2;
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int32_t PDIV1;
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};
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NEXTPNR_NAMESPACE_END
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#endif
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