YRabbit cc273c1257 gowin: Himbaechel. Handle SDP OCE ...

Semi-dual port BSRAM (in Gowin terminology) has the same feature as
Single Port - the CE and OCE signals must be synchronized.

Such a sin has not yet been noticed for Dual Port.

Signed-off-by: YRabbit <[email protected]>

2024-02-09 08:04:08 +01:00

..

himbaechel_dbgen

himbaechel: Fix when more then 32k unique node shapes

2023-11-22 17:11:27 +01:00

uarch

gowin: Himbaechel. Handle SDP OCE

2024-02-09 08:04:08 +01:00

.gitignore

himbächel: Initial implementation

2023-05-13 08:26:41 +02:00

arch_pybindings.cc

himbaechel: Add discovery of uarch and chipdb

2023-09-15 08:23:43 +02:00

arch_pybindings.h

himbächel: Initial implementation

2023-05-13 08:26:41 +02:00

arch.cc

himbaechel: Switch default back to router1 for now

2023-11-17 09:09:59 +01:00

arch.h

Add ability to override Cluster methods in Himbaechel

2023-12-11 13:53:52 +01:00

archdefs.h

himbaechel: Initial timing support

2023-09-08 09:55:49 +02:00

chipdb.h

himbaechel: Add support for new constants API

2023-11-07 09:00:03 +01:00

family.cmake

himbaechel: Adding a xilinx uarch for xc7 with prjxray

2023-11-14 17:12:09 +01:00

himbaechel_api.cc

Add ability to override Cluster methods in Himbaechel

2023-12-11 13:53:52 +01:00

himbaechel_api.h

Add ability to override Cluster methods in Himbaechel

2023-12-11 13:53:52 +01:00

himbaechel_constids.h

himbächel: Initial implementation

2023-05-13 08:26:41 +02:00

himbaechel_helpers.cc

himbaechel: Add support for new constants API

2023-11-07 09:00:03 +01:00

himbaechel_helpers.h

himbaechel: Add support for new constants API

2023-11-07 09:00:03 +01:00

main.cc

himbaechel: Add discovery of uarch and chipdb

2023-09-15 08:23:43 +02:00