nextpnr/himbaechel/uarch/gatemate/tests
Miodrag Milanović 2d7d1e2408
gatemate: optimizations and cleanups (#1517)
* Add log output

* Optimize CC_LUT1

* Update tests

* Optimize CC_LUT2 as well

* Use init enumerations

* Merge DFF in MX4

* Move repack code

* Move ramio code to pack_cpe

* Merge LUT1/2 to ADDF inputs

* Note actual CPE ports

* Merge DFF in ADDF

* Update FF params and ports first

* Check if DFFs are compatible before merging

* Optimize DFF/Latch

* Add reporting of optimized cells

* Optimize MX2/4

* Add statistics

* Use special nets for VCC/GND to skip using name

* Add warning for carry chain split

* Merge FFs where possible

* Cleanup

* Keep statistics out for now

* Add logs for packing sections

* review fixes

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Co-authored-by: Lofty <dan.ravensloft@gmail.com>
2025-07-17 08:50:24 +02:00
..
lut.cc gatemate: optimizations and cleanups (#1517) 2025-07-17 08:50:24 +02:00
main.cc Gatemate FPGA initial support (#1473) 2025-04-22 16:41:01 +02:00
testing.cc gatemate: optimizations and cleanups (#1517) 2025-07-17 08:50:24 +02:00
testing.h gatemate: optimizations and cleanups (#1517) 2025-07-17 08:50:24 +02:00