nextpnr/ecp5
Ross Schlaikjer 6625284950
Handle register timing case
2020-04-29 13:58:52 -04:00
..
docs Remove comment about the USRMCLK primitive being untested. 2020-04-02 21:35:35 -06:00
resource
.gitignore
arch.cc Handle register timing case 2020-04-29 13:58:52 -04:00
arch.h ecp5: Proper support for '12k' device 2020-03-13 11:22:11 +00:00
arch_place.cc ecp5: Improve bounding box accuracy 2020-02-03 11:38:31 +00:00
arch_pybindings.cc python: Expose PlaceStrength enum and isValidBelForCell on ecp5 2020-01-26 20:32:02 +00:00
arch_pybindings.h
archdefs.h Alter MULT18X18D timing db based on register config 2020-04-28 20:01:29 -04:00
baseconfigs.cc
bitstream.cc ecp5: Fix CSDECODE bitgen 2020-04-15 20:25:56 +01:00
bitstream.h
cells.cc Improve handling of unused inout port bits 2020-02-25 14:26:47 +00:00
cells.h
config.cc
config.h
constids.inc
dcu_bitstream.h
family.cmake Add TRELLIS_PROGRAM_PREFIX 2020-04-11 22:05:30 +02:00
gfx.cc Few more caught by clang 2020-01-18 15:58:09 +01:00
gfx.h
globals.cc ecp5: Use dedicated routing for ECLKs where possible 2020-04-14 19:20:13 +01:00
globals.h
iotypes.inc ecp5: Add support for top pseudo diff outputs 2020-01-15 11:43:12 +00:00
lpf.cc Fix assertion failure on invalid LOCATE input. 2020-04-05 21:42:45 -06:00
main.cc ecp5: Proper support for '12k' device 2020-03-13 11:22:11 +00:00
pack.cc Alter MULT18X18D timing db based on register config 2020-04-28 20:01:29 -04:00
pio.cc ecp5: Add support for top pseudo diff outputs 2020-01-15 11:43:12 +00:00
pio.h
trellis_import.py ecp5: Add SPICB0 IO support 2020-01-20 20:30:14 +00:00