mirror of https://github.com/YosysHQ/nextpnr.git
175787b2f0
Adding freeing of the addition/subtraction mode switch PIP. We're limiting optimization to just one constant input—cases with two constant inputs are rare, and this raises questions about how such ALUs are generated in synthesis. LUT knowledge calculations have been replaced with table constants—faster and easier to verify. Addresses https://github.com/YosysHQ/apicula/issues/514 Signed-off-by: YRabbit <rabbit@yrabbit.cyou> |
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| example | ||
| gatemate | ||
| gowin | ||
| ng-ultra | ||
| xilinx | ||