mirror of https://github.com/YosysHQ/nextpnr.git
f1fc47e139
chore: seems like working pcf feat: add reg support and clean up chore: add clean up delay io check and add cell timing min-max delay fix rebase error better pcf syntax add regex support for prohibit command fix regex and repeat create fix cell can potentially have no bel fix IO chore: clean up chore: review comment feat: set pseudo cell loc by wire info yosys based IO insert finalise final finalise |
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|---|---|---|
| .. | ||
| examples | ||
| synth | ||
| viaduct | ||
| CMakeLists.txt | ||
| arch.cc | ||
| arch.h | ||
| arch_pybindings.cc | ||
| arch_pybindings.h | ||
| archdefs.h | ||
| cells.cc | ||
| cells.h | ||
| chipdb.cc | ||
| main.cc | ||
| pack.cc | ||
| viaduct_api.cc | ||
| viaduct_api.h | ||
| viaduct_constids.h | ||
| viaduct_helpers.cc | ||
| viaduct_helpers.h | ||