mirror of https://github.com/YosysHQ/nextpnr.git
3eb682bcbb
* Add bridge support * Use bridge only if CPE is unused * do not use CPE_MULT for MUX routing * Fixed and documented * delay for CPE_BRIDGE * Convert bridge pips into bels Co-authored-by: Miodrag Milanovic <mmicko@gmail.com> * recursively reassign bridges * reconnect cell ports to new nets * handle inversion bits * sort data in output for easier compare * one to be removed after testing * debug message * Remove need for notifyPipChange * use same logic for detecting bridge pips * make sure that the pip used is the one assigned * one wire may feed multiple ports * remove #if * clean up wire binding * add debugging * fix * clangformat * put back to error * use tile instead of getting name out of bel/pip * bump chipdb * adressing review comments * Addressed last one --------- Co-authored-by: Lofty <dan.ravensloft@gmail.com> |
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| .. | ||
| himbaechel_dbgen | ||
| uarch | ||
| .gitignore | ||
| CMakeLists.txt | ||
| arch.cc | ||
| arch.h | ||
| arch_pybindings.cc | ||
| arch_pybindings.h | ||
| archdefs.h | ||
| chipdb.h | ||
| himbaechel_api.cc | ||
| himbaechel_api.h | ||
| himbaechel_constids.h | ||
| himbaechel_gfxids.h | ||
| himbaechel_helpers.cc | ||
| himbaechel_helpers.h | ||
| main.cc | ||