mirror of https://github.com/YosysHQ/nextpnr.git
1ce187ab5a
* Gowin. BUGFIX. BSRAM SP separation. The new SP cell must inherit the byte size - 8 or 9 bits. Signed-off-by: YRabbit <rabbit@yrabbit.cyou> * Gowin. Byte Enables processing in SP. Single Port with a data width of 32/36 is internally configured as Dual Port with 16/18. Even and odd words are processed separately by ports A and B. With the advent of byte enable support, it became necessary to switch these signals differently. Signed-off-by: YRabbit <rabbit@yrabbit.cyou> --------- Signed-off-by: YRabbit <rabbit@yrabbit.cyou> |
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| .. | ||
| himbaechel_dbgen | ||
| uarch | ||
| .gitignore | ||
| CMakeLists.txt | ||
| arch.cc | ||
| arch.h | ||
| arch_pybindings.cc | ||
| arch_pybindings.h | ||
| archdefs.h | ||
| chipdb.h | ||
| himbaechel_api.cc | ||
| himbaechel_api.h | ||
| himbaechel_constids.h | ||
| himbaechel_gfxids.h | ||
| himbaechel_helpers.cc | ||
| himbaechel_helpers.h | ||
| main.cc | ||