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gen
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Bump gatemate chip database
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2025-11-10 12:05:33 +01:00 |
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tests
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himbaechel: add uarch specific options parsing (#1582)
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2025-10-21 14:41:53 +02:00 |
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CMakeLists.txt
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gatemate: add iopath delays (#1537)
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2025-08-22 11:07:34 +02:00 |
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bitstream.cc
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gatemate: use CPE bridge (#1538)
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2025-09-02 18:00:01 +02:00 |
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ccf.cc
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gatemate: additional region handling (#1583)
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2025-10-21 13:47:07 +02:00 |
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cells.cc
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gatemate: support multiple clock distribution strategies (#1574)
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2025-10-15 15:33:21 +02:00 |
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config.cc
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gatemate: use CPE bridge (#1538)
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2025-09-02 18:00:01 +02:00 |
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config.h
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gatemate: use CPE bridge (#1538)
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2025-09-02 18:00:01 +02:00 |
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constids.inc
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gatemate: additional region handling (#1583)
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2025-10-21 13:47:07 +02:00 |
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delay.cc
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gatemate: additional region handling (#1583)
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2025-10-21 13:47:07 +02:00 |
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extra_data.h
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gatemate: cleanup of PLL and BUFG (#1562)
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2025-09-30 13:00:02 +02:00 |
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gatemate.cc
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himbaechel: add uarch specific options parsing (#1582)
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2025-10-21 14:41:53 +02:00 |
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gatemate.h
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himbaechel: add uarch specific options parsing (#1582)
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2025-10-21 14:41:53 +02:00 |
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gatemate_util.h
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gatemate: optimizations and cleanups (#1517)
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2025-07-17 08:50:24 +02:00 |
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gfx.cc
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Use improved CPE model (#1503)
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2025-07-07 10:14:48 +02:00 |
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gfxids.inc
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Gatemate FPGA initial support (#1473)
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2025-04-22 16:41:01 +02:00 |
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pack.cc
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himbaechel: add uarch specific options parsing (#1582)
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2025-10-21 14:41:53 +02:00 |
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pack.h
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gatemate: additional region handling (#1583)
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2025-10-21 13:47:07 +02:00 |
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pack_bram.cc
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gatemate: cleanup of PLL and BUFG (#1562)
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2025-09-30 13:00:02 +02:00 |
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pack_clocking.cc
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gatemate: properly name timing and operational mode (#1587)
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2025-10-21 13:46:34 +02:00 |
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pack_cpe.cc
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gatemate: additional region handling (#1583)
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2025-10-21 13:47:07 +02:00 |
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pack_io.cc
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gatemate: handle default parameters for IO (#1595)
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2025-10-28 08:16:02 +01:00 |
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pack_mult.cc
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gatemate: input register packing
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2025-12-09 13:22:07 +00:00 |
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pack_serdes.cc
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gatemate: fix SERDES CDR parameters (#1596)
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2025-10-28 09:49:55 +01:00 |
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pll.cc
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gatemate: fix SER_CLK wiring from CLKIN to PLL (#1523)
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2025-07-29 11:26:49 +02:00 |
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route_clock.cc
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gatemate: Include and use connection timing data (#1559)
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2025-09-30 09:13:29 +02:00 |
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route_mult.cc
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gatemate: Include and use connection timing data (#1559)
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2025-09-30 09:13:29 +02:00 |
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