Commit Graph

  • 19d220560a reporting Miodrag Milanovic 2025-09-25 10:46:32 +0200
  • a0adbb7490 cleanup Miodrag Milanovic 2025-09-25 10:34:27 +0200
  • ff249419ef Copy clocks for multi die Miodrag Milanovic 2025-09-25 10:19:53 +0200
  • c3b5e9bdc6 Fix some tests Miodrag Milanovic 2025-09-15 16:54:11 +0200
  • b7784c7ff0 Inverted input on ODDR Miodrag Milanovic 2025-09-22 14:35:44 +0200
  • a1ee31000a clangformat Miodrag Milanovic 2025-09-22 11:58:42 +0200
  • f62a78fa36 find working layout Miodrag Milanovic 2025-09-18 12:45:40 +0200
  • 7a3d2ec309 cleanups Miodrag Milanovic 2025-09-17 13:13:33 +0200
  • 4a62c29b46 move placement decision for later Miodrag Milanovic 2025-09-17 11:01:23 +0200
  • 97de6934ab Move data structures Miodrag Milanovic 2025-09-17 10:32:14 +0200
  • 38a7c3315b move rewire code Miodrag Milanovic 2025-09-17 09:28:53 +0200
  • 03c4dde797 Use connectPorts Miodrag Milanovic 2025-09-17 09:24:02 +0200
  • cbb1ef0358 Check SER_CLK more Miodrag Milanovic 2025-09-17 09:19:27 +0200
  • 8381827fa5
    gatemate: Include and use connection timing data (#1559) Miodrag Milanović 2025-09-30 09:13:29 +0200
  • 8f8181c717 rust: extend example_printnets to demo iterators Lofty 2025-09-26 12:09:25 +0100
  • 0ee8181733 rust: rework ownership model Lofty 2025-09-25 09:09:55 +0100
  • 03d1e18245 add revisits in clock router Lofty 2025-09-26 12:39:44 +0100
  • 52f84c9733 rust: extend example_printnets to demo iterators Lofty 2025-09-26 12:09:25 +0100
  • 4a319f72fd rust: rework ownership model Lofty 2025-09-25 09:09:55 +0100
  • 863b503924 change to assert Miodrag Milanovic 2025-09-24 14:08:13 +0200
  • 2e4ef6f71f
    rust: small updates (#1560) Lofty 2025-09-24 12:59:30 +0100
  • 14d9d7362f rust: small updates Lofty 2025-09-23 20:14:20 +0100
  • 22041ed5df
    Gowin. GW5A chips. Implement the DCS primitive. (#1558) YRabbit 2025-09-23 20:42:33 +1000
  • 4950822a0b Require version 1.8 Miodrag Milanovic 2025-09-23 08:08:50 +0200
  • 9d78cad06a remove dead code Miodrag Milanovic 2025-09-23 08:06:33 +0200
  • 7f1de2cd4c clangformat Miodrag Milanovic 2025-09-23 08:00:57 +0200
  • 4bebc07d1c Gowin. GW5A chips. Implement the DCS primitive. YRabbit 2025-09-21 08:57:34 +1000
  • 1742d09edb
    Gowin. GW5A series PLLs. (#1557) YRabbit 2025-09-20 15:51:01 +1000
  • 3b10152f8f weakly-bind non-global clocks Lofty 2025-09-18 12:45:22 +0100
  • 99a8c6ddb3 Gowin. GW5A series PLLs. YRabbit 2025-09-17 20:25:54 +1000
  • 4ab735c690
    Gowin. Optimize ALU. (#1556) YRabbit 2025-09-17 15:50:41 +1000
  • aaf105b561 Gowin. Optimize ALU. YRabbit 2025-09-17 08:55:46 +1000
  • 980545cfd9 add time spent to route_clock Miodrag Milanovic 2025-09-16 14:04:06 +0200
  • 6a80c42651 route clocks from source to sink Lofty 2025-09-16 11:00:44 +0100
  • a48acec92e route clocks from source to sink lofty/pips-clockrouter Lofty 2025-09-16 11:00:44 +0100
  • efff6f90f3 Revert "Do not use actual pip delay, determine best by number of passed pips" Lofty 2025-09-16 09:36:35 +0100
  • 80255e3611 log number of clock net users Lofty 2025-09-16 09:34:50 +0100
  • 5ce34b5964 another multiplier fix Lofty 2025-09-16 08:38:05 +0100
  • 395554aefe another multiplier fix Lofty 2025-09-16 08:29:45 +0100
  • a3f94eaf2a another multiplier fix Lofty 2025-09-16 08:13:32 +0100
  • 731f906f9a another multiplier fix Lofty 2025-09-16 08:00:07 +0100
  • e3fa85b8b2 another multiplier fix Lofty 2025-09-15 17:42:10 +0100
  • c347941727 another multiplier fix Lofty 2025-09-15 16:01:27 +0100
  • ea85132f17 another multiplier fix Lofty 2025-09-15 15:48:12 +0100
  • 2452061824 another multiplier fix Lofty 2025-09-15 12:08:00 +0100
  • bd6e9cd3c1 another multiplier fix Lofty 2025-09-15 11:05:26 +0100
  • b119041585 another multiplier fix Lofty 2025-09-15 10:43:19 +0100
  • 20cf497e15 another multiplier fix Lofty 2025-09-15 10:37:05 +0100
  • 50a18611ef another multiplier fix Lofty 2025-09-15 10:32:37 +0100
  • 500840ae6b another multiplier fix Lofty 2025-09-15 10:18:30 +0100
  • 50299469fc another multiplier fix Lofty 2025-09-15 09:48:22 +0100
  • e2d882b056 another multiplier fix Lofty 2025-09-15 09:31:36 +0100
  • 9a1c25d83b another multiplier fix Lofty 2025-09-15 09:21:19 +0100
  • 59285f3332 another multiplier fix Lofty 2025-09-15 09:13:04 +0100
  • 2583f01e29 another multiplier fix Lofty 2025-09-15 09:05:52 +0100
  • 14030606a8 another multiplier fix Lofty 2025-09-15 09:00:17 +0100
  • bc52b33f94 another multiplier fix Lofty 2025-09-15 08:46:25 +0100
  • b4ef4cace9 another mult fix Lofty 2025-09-12 17:26:20 +0100
  • 1ba1829a8f more multiplier fixes Lofty 2025-09-12 16:47:45 +0100
  • 0412ef7144 proper parameter check Miodrag Milanovic 2025-09-12 15:30:26 +0200
  • 00cf81e463
    gatemate: fix static and handle dynamic FIFO almost full/empty offsets (#1555) Patrick Urban 2025-09-12 15:02:28 +0200
  • 485def603a optimize Miodrag Milanovic 2025-09-12 14:14:57 +0200
  • 84095955d0 gatemate/pack_bram: handle dynamic almost full/empty offsets Patrick Urban 2025-09-12 13:55:37 +0200
  • c66e422dd0 Do not use actual pip delay, determine best by number of passed pips Miodrag Milanovic 2025-09-12 13:39:37 +0200
  • 48cb371d27 fix clock routing Miodrag Milanovic 2025-09-12 10:54:46 +0200
  • 2823ea385a add PLL delays Miodrag Milanovic 2025-09-12 10:52:54 +0200
  • f24630c02b tried fixing clock router Miodrag Milanovic 2025-09-11 18:48:50 +0200
  • 10765f7516 cleanup Miodrag Milanovic 2025-09-11 15:20:46 +0200
  • 65d47d0183 add pip delays Miodrag Milanovic 2025-09-11 13:17:52 +0200
  • 30ebf540c3 do not need node delay Miodrag Milanovic 2025-09-11 11:28:26 +0200
  • ce0a37f666 a few multiplier router fixes Lofty 2025-09-11 15:54:02 +0100
  • 09db7c3fb7 gatemate/pack_bram: fifo read/write pointers are 16 bit wide Patrick Urban 2025-09-11 16:44:30 +0200
  • 9c107213cd gatemate/pack_bram: fix CC_FIFO_40K almost full/empty parameters Patrick Urban 2025-09-11 14:20:11 +0200
  • 72960a052e add plane info for node pips Miodrag Milanovic 2025-09-11 11:07:48 +0200
  • f669ed54e6 convert nodes to pips Miodrag Milanovic 2025-09-11 10:35:13 +0200
  • 33a91cb196 improved estimateDelay formula lofty/gatemate-estimatedelay2 Lofty 2025-09-10 13:53:47 +0100
  • b8d2372019 gatemate: BUFG must be optional Miodrag Milanovic 2025-09-10 14:42:47 +0200
  • 8ac7ed161a
    gatemate: code cleanup and netlist fix (#1554) Miodrag Milanović 2025-09-10 14:04:42 +0200
  • 5263f8c437 gatemate: code cleanup and netlist fix Miodrag Milanovic 2025-09-10 13:51:23 +0200
  • f4f031bf16 disable diagonal pips (with r2 debug code) lut_perm Lofty 2025-09-09 12:14:22 +0100
  • 8d99682f5e updated check Miodrag Milanovic 2025-09-08 19:10:17 +0200
  • 0c19b43501 do not use diagonal pips Miodrag Milanovic 2025-09-08 18:14:09 +0200
  • 0b9d7d7be2 gatemate: lut permutation arch changes Miodrag Milanovic 2025-09-08 17:24:31 +0200
  • 9715a1d565
    heap: Allow chains to ripup other chains (opt-in only) (#1552) nextpnr-0.9 myrtle 2025-09-05 09:02:19 +0200
  • 141abe60a6
    gatemate: cleanup BRAM handling (#1551) Miodrag Milanović 2025-09-05 08:37:29 +0200
  • 2f65614f48 heap: Allow chains to ripup other chains (opt-in only) gatecat 2025-09-04 18:20:44 +0200
  • cd1e403c0d Implement getBelValidityConflict for gatemate gatecat/place-confl-api-update gatecat 2025-09-04 17:17:24 +0200
  • 9c6b106195 archapi: Add new getBelValidityConflict API gatecat 2025-09-04 16:59:36 +0200
  • 30ca3e073c archapi: Remove never-properly-used getConflictingBelCell API gatecat 2025-09-04 16:51:03 +0200
  • 78a369f0c4 gatemate: cleanup BRAM handling Miodrag Milanovic 2025-09-04 15:56:22 +0200
  • 21bfda4165
    gatemate: fix fourgroup for multi die (#1550) Miodrag Milanović 2025-09-03 12:20:11 +0200
  • 3a6ba439c8 gatemate: fix fourgroup for multi die Miodrag Milanovic 2025-09-03 11:59:50 +0200
  • f238e2c4a5
    okami: remove (#1549) Lofty 2025-09-02 18:42:07 +0100
  • 3eb682bcbb
    gatemate: use CPE bridge (#1538) Miodrag Milanović 2025-09-02 18:00:01 +0200
  • 8063541665 okami: remove Lofty 2025-09-02 16:55:06 +0100
  • 4b0a3779fb Addressed last one Miodrag Milanovic 2025-09-02 17:22:35 +0200
  • b178430cd7 adressing review comments Miodrag Milanovic 2025-09-02 17:06:59 +0200
  • ade5e11883 bump chipdb Miodrag Milanovic 2025-09-02 14:05:03 +0200
  • 7f3eacf8c3 use tile instead of getting name out of bel/pip Miodrag Milanovic 2025-09-02 14:02:25 +0200
  • c88b9fa0f8 put back to error Miodrag Milanovic 2025-09-02 13:55:12 +0200