mirror of https://github.com/YosysHQ/nextpnr.git
static: Fix NaN on a big xilinx design
Signed-off-by: gatecat <gatecat@ds0.me>
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dd4d3056eb
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fcaafbaa08
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@ -343,7 +343,7 @@ class StaticPlacer
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auto &nd = nets.back();
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auto &nd = nets.back();
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nd.ni = ni;
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nd.ni = ni;
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nd.skip = (ni->driver.cell == nullptr); // (or global buffer?)
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nd.skip = (ni->driver.cell == nullptr || cfg.glbBufTypes.count(ni->driver.cell->type));
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nd.ports.resize(ni->users.capacity() + 1); // +1 for the driver
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nd.ports.resize(ni->users.capacity() + 1); // +1 for the driver
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nd.ports.back().ref = ni->driver;
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nd.ports.back().ref = ni->driver;
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for (auto usr : ni->users.enumerate()) {
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for (auto usr : ni->users.enumerate()) {
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@ -798,6 +798,7 @@ class StaticPlacer
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port.max_exp.at(axis) = std::exp(emax);
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port.max_exp.at(axis) = std::exp(emax);
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net.max_exp.at(axis) += port.max_exp.at(axis);
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net.max_exp.at(axis) += port.max_exp.at(axis);
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net.x_max_exp.at(axis) += loc.at(axis) * port.max_exp.at(axis);
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net.x_max_exp.at(axis) += loc.at(axis) * port.max_exp.at(axis);
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NPNR_ASSERT(std::isfinite(net.x_max_exp.at(axis)));
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} else {
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} else {
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port.max_exp.at(axis) = PlacerPort::invalid;
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port.max_exp.at(axis) = PlacerPort::invalid;
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}
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}
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@ -831,12 +832,14 @@ class StaticPlacer
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d_min = (min_sum * (pd.min_exp.at(axis) * (1.0f - wl_coeff.at(axis) * loc.at(axis))) +
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d_min = (min_sum * (pd.min_exp.at(axis) * (1.0f - wl_coeff.at(axis) * loc.at(axis))) +
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wl_coeff.at(axis) * pd.min_exp.at(axis) * x_min_sum) /
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wl_coeff.at(axis) * pd.min_exp.at(axis) * x_min_sum) /
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(min_sum * min_sum);
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(min_sum * min_sum);
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NPNR_ASSERT(std::isfinite(d_min));
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}
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}
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if (pd.has_max_exp(axis)) {
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if (pd.has_max_exp(axis)) {
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double max_sum = nd.max_exp.at(axis), x_max_sum = nd.x_max_exp.at(axis);
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double max_sum = nd.max_exp.at(axis), x_max_sum = nd.x_max_exp.at(axis);
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d_max = (max_sum * (pd.max_exp.at(axis) * (1.0f + wl_coeff.at(axis) * loc.at(axis))) -
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d_max = (max_sum * (pd.max_exp.at(axis) * (1.0f + wl_coeff.at(axis) * loc.at(axis))) -
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wl_coeff.at(axis) * pd.max_exp.at(axis) * x_max_sum) /
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wl_coeff.at(axis) * pd.max_exp.at(axis) * x_max_sum) /
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(max_sum * max_sum);
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(max_sum * max_sum);
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NPNR_ASSERT(std::isfinite(d_max));
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}
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}
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float crit = 0.0;
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float crit = 0.0;
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if (cfg.timing_driven) {
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if (cfg.timing_driven) {
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@ -853,6 +856,7 @@ class StaticPlacer
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gradient += weight * (d_min - d_max);
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gradient += weight * (d_min - d_max);
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}
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}
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NPNR_ASSERT(std::isfinite(gradient));
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return gradient;
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return gradient;
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}
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}
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@ -917,6 +921,7 @@ class StaticPlacer
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}
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}
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const float eta = 1e-1;
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const float eta = 1e-1;
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float init_dens_penalty = eta * (wirelen_sum / force_sum);
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float init_dens_penalty = eta * (wirelen_sum / force_sum);
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NPNR_ASSERT(std::isfinite(init_dens_penalty));
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log_info("initial density penalty: %f\n", init_dens_penalty);
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log_info("initial density penalty: %f\n", init_dens_penalty);
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dens_penalty.resize(groups.size(), init_dens_penalty);
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dens_penalty.resize(groups.size(), init_dens_penalty);
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update_potentials(true); // set initial potential
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update_potentials(true); // set initial potential
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@ -56,6 +56,8 @@ struct PlacerStaticCfg
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// These cell types will be randomly locked to prevent singular matrices
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// These cell types will be randomly locked to prevent singular matrices
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pool<IdString> ioBufTypes;
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pool<IdString> ioBufTypes;
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// Nets driven by these cell types will be ignored
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pool<IdString> glbBufTypes;
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int hpwl_scale_x = 1;
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int hpwl_scale_x = 1;
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int hpwl_scale_y = 1;
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int hpwl_scale_y = 1;
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bool timing_driven = false;
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bool timing_driven = false;
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@ -68,9 +70,8 @@ struct PlacerStaticCfg
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int logic_groups = 2;
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int logic_groups = 2;
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// this is an optional callback to override the area of a cell e.g. based on configuration
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// this is an optional callback to override the area of a cell e.g. based on configuration
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std::function<std::optional<StaticRect>(Context *, const CellInfo *)> get_cell_area_override = [](Context *, const CellInfo *) {
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std::function<std::optional<StaticRect>(Context *, const CellInfo *)> get_cell_area_override =
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return std::optional<StaticRect>{};
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[](Context *, const CellInfo *) { return std::optional<StaticRect>{}; };
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};
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};
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};
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extern bool placer_static(Context *ctx, PlacerStaticCfg cfg);
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extern bool placer_static(Context *ctx, PlacerStaticCfg cfg);
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@ -302,6 +302,11 @@ void XilinxImpl::configurePlacerStatic(PlacerStaticCfg &cfg)
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cfg.hpwl_scale_x = 2;
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cfg.hpwl_scale_x = 2;
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cfg.hpwl_scale_y = 1;
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cfg.hpwl_scale_y = 1;
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cfg.glbBufTypes.insert(id_PSEUDO_GND);
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cfg.glbBufTypes.insert(id_PSEUDO_VCC);
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cfg.glbBufTypes.insert(id_BUFGCTRL);
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cfg.glbBufTypes.insert(id_BUFG_BUFG);
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{
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{
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cfg.cell_groups.emplace_back();
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cfg.cell_groups.emplace_back();
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auto &comb = cfg.cell_groups.back();
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auto &comb = cfg.cell_groups.back();
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