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wip

This commit is contained in:
Miodrag Milanovic 2025-12-17 08:31:51 +01:00
parent 581c42c9cd
commit e4f8c7d24c
4 changed files with 65 additions and 4 deletions
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2
himbaechel/uarch/gatemate/extra_data.h
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@ -43,6 +43,8 @@ NPNR_PACKED_STRUCT(struct GateMatePipExtraDataPOD {
uint8_t plane;
uint8_t dummy1;
uint16_t dummy2;
uint32_t data;
uint32_t mask;
});
NPNR_PACKED_STRUCT(struct GateMateBelPinConstraintPOD {

56
himbaechel/uarch/gatemate/gatemate.cc
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@ -186,6 +186,45 @@ void GateMateImpl::init(Context *ctx)
}
if (!die_name.empty() && !found)
log_error("Unable to select forced die '%s'.\n", die_name.c_str());
pip_data = std::vector<uint32_t>(ctx->getGridDimX() * ctx->getGridDimY());
pip_mask = std::vector<uint32_t>(ctx->getGridDimX() * ctx->getGridDimY());
for (int y = 0; y < ctx->getGridDimY(); y++) {
for (int x = 0; x < ctx->getGridDimX(); x++) {
int tile = y * ctx->getGridDimX() + x;
pip_data[tile] = 0;
pip_mask[tile] = 0;
}
}
}
void GateMateImpl::notifyPipChange(PipId pip, NetInfo *net)
{
const auto &extra_data = *pip_extra_data(pip);
if (extra_data.type == PipExtra::PIP_EXTRA_MUX && extra_data.mask == 0)
return;
if (net) { // bind
//printf("BIND [%s] %s -> %s\n",ctx->getPipName(pip)[0].c_str(ctx),ctx->getPipName(pip)[2].c_str(ctx),ctx->getPipName(pip)[1].c_str(ctx));
pip_data[pip.tile] |= extra_data.data;
pip_mask[pip.tile] |= extra_data.mask;
} else { //unbind
//printf("UNBIND [%s] %s -> %s\n",ctx->getPipName(pip)[0].c_str(ctx),ctx->getPipName(pip)[2].c_str(ctx),ctx->getPipName(pip)[1].c_str(ctx));
uint32_t data = 0;
uint32_t mask = 0;
for (auto &p : ctx->base_pip2net) {
if (p.first != pip && p.first.tile == pip.tile) {
data |= pip_data[pip.tile];
mask |= pip_mask[pip.tile];
}
}
pip_data[pip.tile] = data;
pip_mask[pip.tile] = mask;
}
}
bool GateMateImpl::isBelLocationValid(BelId bel, bool explain_invalid) const
@ -323,14 +362,27 @@ bool GateMateImpl::checkPipAvail(PipId pip) const
{
IdStringList names = ctx->getPipName(pip);
const auto &extra_data = *pip_extra_data(pip);
if (extra_data.type == PipExtra::PIP_EXTRA_MUX
if (extra_data.type == PipExtra::PIP_EXTRA_MUX && extra_data.mask != 0) {
if (pip_mask[pip.tile] & extra_data.mask) {
//printf("Checking [%s] %s -> %s %08x %08x\n",ctx->getPipName(pip)[0].c_str(ctx),ctx->getPipName(pip)[2].c_str(ctx),ctx->getPipName(pip)[1].c_str(ctx), pip_mask[pip.tile], extra_data.mask);
if ((pip_data[pip.tile] & extra_data.mask) != extra_data.data) {
//printf("Blocking [%s] %s -> %s\n",ctx->getPipName(pip)[0].c_str(ctx),ctx->getPipName(pip)[2].c_str(ctx),ctx->getPipName(pip)[1].c_str(ctx));
return false;
}
} else {
//printf("Skipping [%s] %s -> %s\n",ctx->getPipName(pip)[0].c_str(ctx),ctx->getPipName(pip)[2].c_str(ctx),ctx->getPipName(pip)[1].c_str(ctx));
}
}
/*if (extra_data.type == PipExtra::PIP_EXTRA_MUX
&& extra_data.value == 1
&& IdString(extra_data.name).in(ctx->id("LUT2_00"),ctx->id("LUT2_01"),ctx->id("LUT2_02"),ctx->id("LUT2_03"))) {
//printf("%s %s %s\n", names[0].c_str(ctx), names[1].c_str(ctx), names[2].c_str(ctx));
if (names[1].in(ctx->id("CPE.D0_00_int"),ctx->id("CPE.D0_01_int"),ctx->id("CPE.D0_02_int"),ctx->id("CPE.D0_03_int")))
return false;
}
}*/
if (extra_data.type != PipExtra::PIP_EXTRA_MUX || (extra_data.flags & MUX_ROUTING) == 0)
return true;

5
himbaechel/uarch/gatemate/gatemate.h
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@ -56,6 +56,7 @@ struct GateMateImpl : HimbaechelAPI
void expandBoundingBox(BoundingBox &bb) const override;
bool checkPipAvail(PipId pip) const override;
bool checkPipAvailForNet(PipId pip, const NetInfo *net) const override { return checkPipAvail(pip); };
void notifyPipChange(PipId pip, NetInfo *net) override;
bool isBelLocationValid(BelId bel, bool explain_invalid = false) const override;
delay_t estimateDelay(WireId src, WireId dst) const override;
@ -109,7 +110,9 @@ struct GateMateImpl : HimbaechelAPI
MultiDieStrategy strategy;
dict<int, IdString> index_to_die;
dict<IdString, int> die_to_index;
std::vector<uint32_t> pip_data;
std::vector<uint32_t> pip_mask;
private:
bool getChildPlacement(const BaseClusterInfo *cluster, Loc root_loc,
std::vector<std::pair<CellInfo *, BelId>> &placement) const;

6
himbaechel/uarch/gatemate/gen/arch_gen.py
View File

@ -73,6 +73,8 @@ class PipExtraData(BBAStruct):
value: int = 0
invert: int = 0
plane: int = 0
data: int = 0
mask: int = 0
def serialise_lists(self, context: str, bba: BBAWriter):
pass
@ -85,6 +87,8 @@ class PipExtraData(BBAStruct):
bba.u8(self.plane)
bba.u8(0)
bba.u16(0)
bba.u32(self.data)
bba.u32(self.mask)
@dataclass
class BelPinConstraint(BBAStruct):
@ -310,7 +314,7 @@ def main():
plane = int(mux.name[10:12])
if mux.name == "CPE.C_SN":
mux_flags |= MUX_ROUTING
pp.extra_data = PipExtraData(PIP_EXTRA_MUX, ch.strs.id(mux.name), mux.bits, mux.value, mux_flags, plane)
pp.extra_data = PipExtraData(PIP_EXTRA_MUX, ch.strs.id(mux.name), mux.bits, mux.value, mux_flags, plane, mux.data, mux.mask)
if type_name in new_wires:
for wire in sorted(new_wires[type_name]):
delay = wire_delay[wire]