mirror of https://github.com/YosysHQ/nextpnr.git
Remove unused advanced timing constraint API
This API was simply an attractive nuisance as no code was ever developed to actually process timing constraints (other than clock constraints which use a different API). While I do want to consider basic false path support, among other things, in the near future; I plan for this to use a new API that doesn't add complexity to the BaseCtx/Context monstrosity and that is easier to use on the timing analysis side. Signed-off-by: gatecat <gatecat@ds0.me>
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@ -104,13 +104,6 @@ std::string IdStringList::str(const Context *ctx) const
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return s;
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}
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TimingConstrObjectId BaseCtx::timingWildcardObject()
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{
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TimingConstrObjectId id;
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id.index = 0;
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return id;
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}
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std::string &StrRingBuffer::next()
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{
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std::string &s = buffer.at(index++);
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@ -119,76 +112,6 @@ std::string &StrRingBuffer::next()
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return s;
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}
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TimingConstrObjectId BaseCtx::timingClockDomainObject(NetInfo *clockDomain)
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{
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NPNR_ASSERT(clockDomain->clkconstr != nullptr);
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if (clockDomain->clkconstr->domain_tmg_id != TimingConstrObjectId()) {
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return clockDomain->clkconstr->domain_tmg_id;
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} else {
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TimingConstraintObject obj;
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TimingConstrObjectId id;
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id.index = int(constraintObjects.size());
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obj.id = id;
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obj.type = TimingConstraintObject::CLOCK_DOMAIN;
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obj.entity = clockDomain->name;
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clockDomain->clkconstr->domain_tmg_id = id;
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constraintObjects.push_back(obj);
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return id;
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}
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}
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TimingConstrObjectId BaseCtx::timingNetObject(NetInfo *net)
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{
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if (net->tmg_id != TimingConstrObjectId()) {
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return net->tmg_id;
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} else {
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TimingConstraintObject obj;
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TimingConstrObjectId id;
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id.index = int(constraintObjects.size());
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obj.id = id;
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obj.type = TimingConstraintObject::NET;
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obj.entity = net->name;
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constraintObjects.push_back(obj);
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net->tmg_id = id;
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return id;
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}
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}
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TimingConstrObjectId BaseCtx::timingCellObject(CellInfo *cell)
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{
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if (cell->tmg_id != TimingConstrObjectId()) {
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return cell->tmg_id;
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} else {
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TimingConstraintObject obj;
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TimingConstrObjectId id;
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id.index = int(constraintObjects.size());
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obj.id = id;
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obj.type = TimingConstraintObject::CELL;
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obj.entity = cell->name;
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constraintObjects.push_back(obj);
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cell->tmg_id = id;
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return id;
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}
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}
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TimingConstrObjectId BaseCtx::timingPortObject(CellInfo *cell, IdString port)
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{
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if (cell->ports.at(port).tmg_id != TimingConstrObjectId()) {
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return cell->ports.at(port).tmg_id;
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} else {
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TimingConstraintObject obj;
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TimingConstrObjectId id;
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id.index = int(constraintObjects.size());
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obj.id = id;
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obj.type = TimingConstraintObject::CELL_PORT;
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obj.entity = cell->name;
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obj.port = port;
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constraintObjects.push_back(obj);
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cell->ports.at(port).tmg_id = id;
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return id;
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}
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}
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Property::Property() : is_string(false), str(""), intval(0) {}
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Property::Property(int64_t intval, int width) : is_string(false), intval(intval)
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@ -286,30 +209,6 @@ Property Property::from_string(const std::string &s)
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return p;
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}
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void BaseCtx::addConstraint(std::unique_ptr<TimingConstraint> constr)
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{
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for (auto fromObj : constr->from)
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constrsFrom.emplace(fromObj, constr.get());
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for (auto toObj : constr->to)
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constrsTo.emplace(toObj, constr.get());
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IdString name = constr->name;
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constraints[name] = std::move(constr);
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}
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void BaseCtx::removeConstraint(IdString constrName)
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{
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TimingConstraint *constr = constraints[constrName].get();
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for (auto fromObj : constr->from) {
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auto fromConstrs = constrsFrom.equal_range(fromObj);
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constrsFrom.erase(std::find(fromConstrs.first, fromConstrs.second, std::make_pair(fromObj, constr)));
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}
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for (auto toObj : constr->to) {
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auto toConstrs = constrsFrom.equal_range(toObj);
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constrsFrom.erase(std::find(toConstrs.first, toConstrs.second, std::make_pair(toObj, constr)));
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}
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constraints.erase(constrName);
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}
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const char *BaseCtx::nameOfBel(BelId bel) const
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{
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const Context *ctx = getCtx();
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@ -372,14 +372,6 @@ struct ArcBounds
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};
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};
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struct TimingConstrObjectId
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{
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int32_t index = -1;
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bool operator==(const TimingConstrObjectId &other) const { return index == other.index; }
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bool operator!=(const TimingConstrObjectId &other) const { return index != other.index; }
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};
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NEXTPNR_NAMESPACE_END
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namespace std {
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@ -394,15 +386,6 @@ template <> struct hash<NEXTPNR_NAMESPACE_PREFIX Loc>
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return seed;
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}
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};
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template <> struct hash<NEXTPNR_NAMESPACE_PREFIX TimingConstrObjectId>
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{
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std::size_t operator()(const NEXTPNR_NAMESPACE_PREFIX TimingConstrObjectId &obj) const noexcept
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{
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return hash<int>()(obj.index);
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}
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};
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} // namespace std
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#include "archdefs.h"
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@ -612,8 +595,6 @@ struct NetInfo : ArchNetInfo
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std::unique_ptr<ClockConstraint> clkconstr;
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TimingConstrObjectId tmg_id;
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Region *region = nullptr;
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};
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@ -629,7 +610,6 @@ struct PortInfo
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IdString name;
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NetInfo *net;
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PortType type;
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TimingConstrObjectId tmg_id;
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};
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struct CellInfo : ArchCellInfo
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@ -654,7 +634,6 @@ struct CellInfo : ArchCellInfo
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// parent.[xyz] := 0 when (constr_parent == nullptr)
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Region *region = nullptr;
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TimingConstrObjectId tmg_id;
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void addInput(IdString name);
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void addOutput(IdString name);
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@ -706,41 +685,6 @@ struct ClockConstraint
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DelayPair high;
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DelayPair low;
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DelayPair period;
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TimingConstrObjectId domain_tmg_id;
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};
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struct TimingConstraintObject
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{
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TimingConstrObjectId id;
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enum
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{
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ANYTHING,
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CLOCK_DOMAIN,
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NET,
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CELL,
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CELL_PORT
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} type;
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IdString entity; // Name of clock net; net or cell
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IdString port; // Name of port on a cell
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};
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struct TimingConstraint
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{
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IdString name;
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enum
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{
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FALSE_PATH,
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MIN_DELAY,
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MAX_DELAY,
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MULTICYCLE,
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} type;
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delay_t value;
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std::unordered_set<TimingConstrObjectId> from;
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std::unordered_set<TimingConstrObjectId> to;
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};
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// Represents the contents of a non-leaf cell in a design
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@ -768,12 +712,6 @@ struct HierarchicalCell
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std::unordered_map<IdString, IdString> hier_cells;
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};
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inline bool operator==(const std::pair<const TimingConstrObjectId, TimingConstraint *> &a,
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const std::pair<TimingConstrObjectId, TimingConstraint *> &b)
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{
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return a.first == b.first && a.second == b.second;
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}
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struct DeterministicRNG
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{
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uint64_t rngstate;
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@ -899,11 +837,6 @@ struct BaseCtx
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IdString::initialize_add(this, "", 0);
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IdString::initialize_arch(this);
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TimingConstraintObject wildcard;
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wildcard.id.index = 0;
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wildcard.type = TimingConstraintObject::ANYTHING;
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constraintObjects.push_back(wildcard);
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design_loaded = false;
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}
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@ -1014,30 +947,11 @@ struct BaseCtx
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// --------------------------------------------------------------
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// Timing Constraint API
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// constraint name -> constraint
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std::unordered_map<IdString, std::unique_ptr<TimingConstraint>> constraints;
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// object ID -> object
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std::vector<TimingConstraintObject> constraintObjects;
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// object ID -> constraint
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std::unordered_multimap<TimingConstrObjectId, TimingConstraint *> constrsFrom;
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std::unordered_multimap<TimingConstrObjectId, TimingConstraint *> constrsTo;
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TimingConstrObjectId timingWildcardObject();
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TimingConstrObjectId timingClockDomainObject(NetInfo *clockDomain);
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TimingConstrObjectId timingNetObject(NetInfo *net);
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TimingConstrObjectId timingCellObject(CellInfo *cell);
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TimingConstrObjectId timingPortObject(CellInfo *cell, IdString port);
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NetInfo *getNetByAlias(IdString alias) const
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{
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return nets.count(alias) ? nets.at(alias).get() : nets.at(net_aliases.at(alias)).get();
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}
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void addConstraint(std::unique_ptr<TimingConstraint> constr);
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void removeConstraint(IdString constrName);
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// Intended to simplify Python API
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void addClock(IdString net, float freq);
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void createRectangularRegion(IdString name, int x0, int y0, int x1, int y1);
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