mirror of https://github.com/YosysHQ/nextpnr.git
fixed some undefined behaviour
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2d81d34991
commit
b2d8123b17
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@ -372,25 +372,13 @@ void GateMatePacker::pack_mult()
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auto p_width = int_or_default(mult->params, id_P_WIDTH);
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auto p_width = int_or_default(mult->params, id_P_WIDTH);
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// Sign-extend odd A_WIDTH to even, because we're working with 2x2 multiplier cells.
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// Sign-extend odd A_WIDTH to even, because we're working with 2x2 multiplier cells.
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if (a_width % 2 == 1) {
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while (a_width < p_width || a_width % 2 == 1) {
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mult->copyPortTo(ctx->idf("A[%d]", a_width - 1), mult, ctx->idf("A[%d]", a_width));
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a_width += 1;
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}
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// Keep extending until we reach p_width
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while (a_width < p_width) {
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mult->copyPortTo(ctx->idf("A[%d]", a_width - 1), mult, ctx->idf("A[%d]", a_width));
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mult->copyPortTo(ctx->idf("A[%d]", a_width - 1), mult, ctx->idf("A[%d]", a_width));
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a_width += 1;
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a_width += 1;
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}
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}
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// Sign-extend odd B_WIDTH to even, because we're working with 2x2 multiplier cells.
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// Sign-extend odd B_WIDTH to even, because we're working with 2x2 multiplier cells.
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if (b_width % 2 == 1) {
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while (b_width < p_width || b_width % 2 == 1) {
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mult->copyPortTo(ctx->idf("B[%d]", b_width - 1), mult, ctx->idf("B[%d]", b_width));
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b_width += 1;
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}
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// Keep extending until we reach p_width
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while (b_width < p_width) {
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mult->copyPortTo(ctx->idf("B[%d]", b_width - 1), mult, ctx->idf("B[%d]", b_width));
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mult->copyPortTo(ctx->idf("B[%d]", b_width - 1), mult, ctx->idf("B[%d]", b_width));
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b_width += 1;
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b_width += 1;
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}
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}
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@ -475,7 +463,7 @@ void GateMatePacker::pack_mult()
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// Connect A passthrough output to multiplier inputs.
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// Connect A passthrough output to multiplier inputs.
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auto *a_net =
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auto *a_net =
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ctx->createNet(ctx->idf("%s$a%d_passthru", cpe_half->ports.at(id_IN1).net->name.c_str(ctx), a));
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ctx->createNet(ctx->idf("%s$%s$a%d_passthru", cpe_half->name.c_str(ctx), cpe_half->ports.at(id_IN1).net->name.c_str(ctx), a));
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cpe_half->connectPort(id_OUT, a_net);
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cpe_half->connectPort(id_OUT, a_net);
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// This may be GND/VCC; if so, clean it up.
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// This may be GND/VCC; if so, clean it up.
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@ -509,7 +497,7 @@ void GateMatePacker::pack_mult()
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// B input.
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// B input.
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for (int b = 0; b < b_width; b++) {
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for (int b = 0; b < b_width; b++) {
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auto &b_passthru = m.cols[b / 2].b_passthru;
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auto &b_passthru = m.cols.at(b / 2).b_passthru;
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auto *cpe_half = (b % 2 == 1) ? b_passthru.upper : b_passthru.lower;
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auto *cpe_half = (b % 2 == 1) ? b_passthru.upper : b_passthru.lower;
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// Connect B input passthrough cell.
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// Connect B input passthrough cell.
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