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nexus: Support for CONFIG_LMMI and CONFIG_CLKRST_CORE 

Signed-off-by: gatecat <gatecat@ds0.me>
This commit is contained in:
gatecat 2026-01-23 09:44:03 +01:00
parent ee159126e1
commit 9ae5de7c7c
4 changed files with 44 additions and 1 deletions
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7
nexus/constids.inc
View File

@ -553,6 +553,13 @@ X(CONFIG_MULTIBOOT_CORE)
X(CIBAUTOREBOOT) X(CIBAUTOREBOOT)
X(MSPIADDR) X(MSPIADDR)
X(CONFIG_LMMI)
X(CONFIG_LMMI_CORE)
X(SMCLK)
X(RSTSMCLK)
X(CONFIG_CLKRST_CORE)
X(BEL_TYPE) X(BEL_TYPE)
X(BEL_Z) X(BEL_Z)
X(CEOUTMUX) X(CEOUTMUX)

23
nexus/fasm.cc
View File

@ -540,6 +540,25 @@ struct NexusFasmWriter
ctx->parse_lattice_param_from_cell(cell, id_MSPIADDR, 32, 0).intval, 32); ctx->parse_lattice_param_from_cell(cell, id_MSPIADDR, 32, 0).intval, 32);
pop(); pop();
} }
// Write config for an CONFIG_LMMI_CORE cell
void write_lmmi(const CellInfo *cell)
{
BelId bel = cell->bel;
push_bel(bel);
write_enum(cell, "LMMI_EN", "DIS");
pop();
}
// Write config for an CONFIG_CLKRST_CORE cell
void write_cfg_clkrst(const CellInfo *cell)
{
BelId bel = cell->bel;
push_bel(bel);
write_enum(cell, "MCJTAGGSRNDIS", "EN");
write_enum(cell, "MCLMMIGSRNDIS", "EN");
write_enum(cell, "MCSEDCGSRNDIS", "EN");
write_enum(cell, "MCWDTGSRNDIS", "EN");
pop();
}
// Write config for DCC // Write config for DCC
void write_dcc(const CellInfo *cell) void write_dcc(const CellInfo *cell)
{ {
@ -1107,6 +1126,10 @@ struct NexusFasmWriter
write_dcs(ci); write_dcs(ci);
else if (ci->type == id_CONFIG_MULTIBOOT_CORE) else if (ci->type == id_CONFIG_MULTIBOOT_CORE)
write_multiboot(ci); write_multiboot(ci);
else if (ci->type == id_CONFIG_LMMI_CORE)
write_lmmi(ci);
else if (ci->type == id_CONFIG_CLKRST_CORE)
write_cfg_clkrst(ci);
blank(); blank();
} }
// Handle DCC route-throughs // Handle DCC route-throughs

2
nexus/pack.cc
View File

@ -1081,7 +1081,7 @@ struct NexusPacker
{id_PDPSC16K, id_PDPSC16K_MODE}, {id_SP16K, id_SP16K_MODE}, {id_FIFO16K, id_FIFO16K_MODE}, {id_PDPSC16K, id_PDPSC16K_MODE}, {id_SP16K, id_SP16K_MODE}, {id_FIFO16K, id_FIFO16K_MODE},
{id_SP512K, id_SP512K_MODE}, {id_DPSC512K, id_DPSC512K_MODE}, {id_PDPSC512K, id_PDPSC512K_MODE}, {id_SP512K, id_SP512K_MODE}, {id_DPSC512K, id_DPSC512K_MODE}, {id_PDPSC512K, id_PDPSC512K_MODE},
{id_PLL, id_PLL_CORE}, {id_DPHY, id_DPHY_CORE}, {id_PLL, id_PLL_CORE}, {id_DPHY, id_DPHY_CORE},
{id_MULTIBOOT, id_CONFIG_MULTIBOOT_CORE}, {id_MULTIBOOT, id_CONFIG_MULTIBOOT_CORE}, {id_CONFIG_LMMI, id_CONFIG_LMMI_CORE},
}; };
// extra prefix needed for this primitive for some reason // extra prefix needed for this primitive for some reason

13
nexus/pins.cc
View File

@ -245,6 +245,19 @@ static const dict<IdString, Arch::CellPinsData> base_cell_pin_data = {
{ {
{{}, PINSTYLE_CIB}, {{}, PINSTYLE_CIB},
}}, }},
{id_CONFIG_LMMI_CORE,
{
{id_LMMICLK, PINSTYLE_DEDI},
{id_LMMIRESETN, PINSTYLE_DEDI},
{id_RSTSMCLK, PINSTYLE_DEDI},
{id_SMCLK, PINSTYLE_DEDI},
{{}, PINSTYLE_CIB},
}},
{id_CONFIG_CLKRST_CORE,
{
{{}, PINSTYLE_DEDI},
}},
}; };
} // namespace } // namespace