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gatemate: fix typos

This commit is contained in:
Patrick Urban 2026-01-21 14:35:09 +01:00
parent 41a95e3bb2
commit 6810156525
3 changed files with 7 additions and 7 deletions
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8
himbaechel/uarch/gatemate/ccf.cc
View File

@ -103,7 +103,7 @@ struct GateMateCCFReader
if (uarch->die_to_index.count(ctx->id(value))) {
props->emplace(ctx->id(name), Property(value));
} else
log_error("Uknown value '%s' for parameter '%s' in line %d.\n", value.c_str(), name.c_str(),
log_error("Unknown value '%s' for parameter '%s' in line %d.\n", value.c_str(), name.c_str(),
lineno);
} else if (name == "SCHMITT_TRIGGER" || name == "PULLUP" || name == "PULLDOWN" || name == "KEEPER" ||
name == "FF_IBF" || name == "FF_OBF" || name == "LVDS_BOOST" || name == "LVDS_RTERM") {
@ -116,7 +116,7 @@ struct GateMateCCFReader
} else if (value == "FALSE") {
props->emplace(ctx->id(name), Property(Property::State::S0));
} else
log_error("Uknown value '%s' for parameter '%s' in line %d, must be TRUE or FALSE.\n",
log_error("Unknown value '%s' for parameter '%s' in line %d, must be TRUE or FALSE.\n",
value.c_str(), name.c_str(), lineno);
} else if (name == "SLEW") {
if (value == "1" || value == "TRUE")
@ -126,7 +126,7 @@ struct GateMateCCFReader
if (value == "FAST" || value == "SLOW") {
props->emplace(ctx->id(name), Property(value));
} else
log_error("Uknown value '%s' for parameter '%s' in line %d, must be SLOW or FAST.\n", value.c_str(),
log_error("Unknown value '%s' for parameter '%s' in line %d, must be SLOW or FAST.\n", value.c_str(),
name.c_str(), lineno);
} else if (name == "DRIVE") {
try {
@ -149,7 +149,7 @@ struct GateMateCCFReader
log_error("Parameter '%s' must be number in line %d.\n", name.c_str(), lineno);
}
} else {
log_error("Uknown parameter name '%s' in line %d.\n", name.c_str(), lineno);
log_error("Unknown parameter name '%s' in line %d.\n", name.c_str(), lineno);
}
}
}

2
himbaechel/uarch/gatemate/delay.cc
View File

@ -452,7 +452,7 @@ TimingClockingInfo GateMateImpl::getPortClockingInfo(const CellInfo *cell, IdStr
break;
}
} else {
log_error("Uknown clock signal for %s\n", name.c_str());
log_error("Unknown clock signal for %s\n", name.c_str());
}
}

4
himbaechel/uarch/gatemate/pack_clocking.cc
View File

@ -232,7 +232,7 @@ void GateMatePacker::pack_bufg()
else if (pll->getPort(id_CLK270) == in_net)
pll_out = 3;
else
log_error("Uknown connecton on BUFG to PLL.\n");
log_error("Unknown connecton on BUFG to PLL.\n");
glb_mux = glb_mux_mapping[i * 16 + pll_index * 4 + pll_out];
ci.movePortTo(id_I, uarch->glbout[die],
ctx->idf("%s_%d", in_net->driver.port.c_str(ctx), pll_index));
@ -418,7 +418,7 @@ void GateMatePacker::pack_pll()
} else {
// SER_CLK
if (clk != net_SER_CLK)
log_error("CLK_REF connected to uknown pin for cell '%s'.\n", ci.name.c_str(ctx));
log_error("CLK_REF connected to unknown pin for cell '%s'.\n", ci.name.c_str(ctx));
}
if (clk->clkconstr)
period = clk->clkconstr->period.minDelay();