mirror of https://github.com/YosysHQ/nextpnr.git
yosys based IO insert
This commit is contained in:
Kelvin Chung
parent
d4b0752273
commit
46f98920bf
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@ -34,6 +34,11 @@ struct FABulousDesignConstraints
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int lineno = 0;
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std::map<std::string, PCFCommand> commands;
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FABulousDesignConstraints(Context *ctx, const std::string &filename) : ctx(ctx), filename(filename)
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{
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setup_commands();
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}
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bool parse_loc_from_string(const std::string &s, Loc &loc) const
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{
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static const std::regex loc_re(R"(X(\d+)Y(\d+)/\w+)");
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@ -44,22 +49,28 @@ struct FABulousDesignConstraints
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return true;
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}
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FABulousDesignConstraints(Context *ctx, const std::string &filename) : ctx(ctx), filename(filename)
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// Find the iopadmap-created IO cell whose PAD port is connected to `net`.
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// Errors if multiple distinct IO cells share the same net.
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CellInfo *find_pad_peer(NetInfo *net, int line_number) const
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{
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setup_commands();
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}
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if (!net)
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return nullptr;
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NetInfo *get_or_create_vcc()
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{
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auto c = ctx->cells.count(id__CONST1_DRV) == 0 ? ctx->createCell(id__CONST1_DRV, id__CONST1_DRV)
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: ctx->cells.at(id__CONST1_DRV).get();
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return c->getPort(id_O);
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}
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NetInfo *get_or_create_gnd()
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{
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auto c = ctx->cells.count(id__CONST0_DRV) == 0 ? ctx->createCell(id__CONST0_DRV, id__CONST0_DRV)
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: ctx->cells.at(id__CONST0_DRV).get();
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return c->getPort(id_O);
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// input case
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if (net->driver.cell && net->driver.port == id_PAD)
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return net->driver.cell;
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// output case
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CellInfo *found = nullptr;
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for (auto &usr : net->users) {
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if (usr.port != id_PAD)
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continue;
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if (found && usr.cell != found)
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log_error("Multiple IO cells connected via PAD on net '%s' (on line %d)\n", net->name.c_str(ctx),
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line_number);
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found = usr.cell;
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}
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return found;
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}
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void execute_set_io_command(const po::variables_map &vm, int line_number)
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@ -67,11 +78,9 @@ struct FABulousDesignConstraints
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std::string cell = vm["cell"].as<std::string>();
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std::string pin = vm["pin"].as<std::string>();
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int width = vm["width"].as<int>();
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bool reg = vm.count("reg") > 0;
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if (width <= 0) {
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if (width <= 0)
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log_error("width must be positive (on line %d)\n", line_number);
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}
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for (int i = 0; i < width; i++) {
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std::string cellW = cell;
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@ -81,10 +90,9 @@ struct FABulousDesignConstraints
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pinW = stringf("%s[%d]", pin.c_str(), i);
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}
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auto fnd_cell = ctx->cells.find(ctx->id(cellW));
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if (fnd_cell == ctx->cells.end()) {
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auto buf_it = ctx->cells.find(ctx->id(cellW));
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if (buf_it == ctx->cells.end()) {
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log_warning("Only the following ports can be constrained:\n");
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std::vector<std::string> ports;
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std::set<std::string> printedPorts;
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for (auto &p : ctx->ports) {
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std::string portName = p.first.c_str(ctx);
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@ -103,39 +111,35 @@ struct FABulousDesignConstraints
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log_error("unmatched constraint '%s' (on line %d). Have you missed the --width parameter for multibit "
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"input?\n",
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cell.c_str(), line_number);
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} else {
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CellInfo *ci = fnd_cell->second.get();
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if (!ci->type.in(ctx->id("$nextpnr_ibuf"), ctx->id("$nextpnr_obuf"))) {
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log_error("Can only constrain IO cells (on line %d)\n", line_number);
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}
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BelId pinBel = ctx->getBelByNameStr(pinW);
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if (pinBel == BelId())
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log_error("Cannot find a pin named '%s' (on line %d). Have you missed the --width "
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"parameter for multibit pin?\n",
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pin.c_str(), line_number);
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if (ctx->getBelType(pinBel) != id_IO_1_bidirectional_frame_config_pass)
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log_error("Can only constrain to IO pins (on line %d)\n", line_number);
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if (ci->attrs.count(id_BEL))
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log_error("duplicate pin constraint on '%s' (on line %d)\n", cell.c_str(), line_number);
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auto io_cell = ctx->createCell(ctx->idf("%s_wrapped", ci->name.c_str(ctx)), ctx->getBelType(pinBel));
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io_cell->attrs = ci->attrs;
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if (ci->type == ctx->id("$nextpnr_ibuf")) {
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if (reg)
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ci->movePortTo(id_O, io_cell, id_Q);
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else
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ci->movePortTo(id_O, io_cell, id_O);
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io_cell->connectPort(id_T, get_or_create_vcc());
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} else if (ci->type == ctx->id("$nextpnr_obuf")) {
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ci->movePortTo(id_I, io_cell, id_I);
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io_cell->connectPort(id_T, get_or_create_gnd());
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}
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io_cell->attrs[id_BEL] = ctx->getBelName(pinBel).str(ctx);
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log_info("constrained '%s' to bel '%s'\n", ctx->nameOf(ci), io_cell->attrs[id_BEL].as_string().c_str());
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ctx->cells.erase(fnd_cell);
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}
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CellInfo *buf_ci = buf_it->second.get();
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if (!buf_ci->type.in(ctx->id("$nextpnr_ibuf"), ctx->id("$nextpnr_obuf"), ctx->id("$nextpnr_iobuf")))
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log_error("Can only constrain IO cells (on line %d)\n", line_number);
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CellInfo *io_cell = find_pad_peer(buf_ci->getPort(id_O), line_number);
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if (!io_cell)
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io_cell = find_pad_peer(buf_ci->getPort(id_I), line_number);
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if (!io_cell)
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log_error("No IO cell found connected to '%s' via PAD port (on line %d). "
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"Was iopadmap run in Yosys?\n",
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cellW.c_str(), line_number);
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BelId pinBel = ctx->getBelByNameStr(pinW);
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if (pinBel == BelId())
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log_error("Cannot find a pin named '%s' (on line %d). Have you missed the --width "
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"parameter for multibit pin?\n",
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pin.c_str(), line_number);
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if (ctx->getBelType(pinBel) != io_cell->type)
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log_error("Pin '%s' bel type '%s' does not match IO cell type '%s' (on line %d)\n", pinW.c_str(),
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ctx->getBelType(pinBel).c_str(ctx), io_cell->type.c_str(ctx), line_number);
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if (io_cell->attrs.count(id_BEL))
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log_error("duplicate pin constraint on '%s' (on line %d)\n", cell.c_str(), line_number);
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io_cell->attrs[id_BEL] = ctx->getBelName(pinBel).str(ctx);
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log_info("constrained '%s' to bel '%s'\n", cellW.c_str(), io_cell->attrs[id_BEL].as_string().c_str());
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}
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}
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@ -435,12 +439,12 @@ struct FABulousDesignConstraints
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void setup_commands()
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{
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// Setup set_io command
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// Syntax: set_io cell pin [--width N] [--reg]
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// Syntax: set_io cell pin [--width N]
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commands.emplace("set_io", PCFCommand("set_io", "Constrain IO cell to pin"));
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auto &set_io = commands.at("set_io");
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set_io.desc.add_options()("cell", po::value<std::string>()->required(), "Cell name")(
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"pin", po::value<std::string>()->required(), "Pin name")("width,w", po::value<int>()->default_value(1),
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"Bus width")("reg,r", "Enable register mode");
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set_io.desc.add_options()("cell", po::value<std::string>()->required(),
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"Cell name")("pin", po::value<std::string>()->required(),
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"Pin name")("width,w", po::value<int>()->default_value(1), "Bus width");
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set_io.pos.add("cell", 1);
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set_io.pos.add("pin", 1);
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set_io.handler = [this](const po::variables_map &vm, int line_number) {
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@ -616,7 +620,7 @@ struct FABulousDesignConstraints
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while (ss >> tmp)
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words.push_back(tmp);
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if (words.size() > 0) {
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if (!words.empty()) {
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// Set line number to the start of the command for error reporting
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int saved_lineno = lineno;
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lineno = command_start_line;
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@ -639,16 +643,10 @@ struct FABulousDesignConstraints
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};
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} // namespace
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// Wrapper matching the declaration used by fabulous.cc
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void fabulous_pcf(Context *ctx, const std::string &filename)
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{
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FABulousDesignConstraints PCF(ctx, filename);
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PCF.apply_constraints();
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for (auto &fnd_cell : ctx->cells) {
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if (fnd_cell.second->type.in(ctx->id("$nextpnr_ibuf"), ctx->id("$nextpnr_obuf"))) {
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log_error("Unconstrained IO cell '%s'\n", fnd_cell.first.c_str(ctx));
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}
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}
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}
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NEXTPNR_NAMESPACE_END
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