add comment

This commit is contained in:
Miodrag Milanovic 2025-12-18 15:18:39 +01:00
parent 1c332436c7
commit 44d2c3b755
1 changed files with 1 additions and 0 deletions

View File

@ -470,6 +470,7 @@ void GateMateImpl::postRoute()
if (cell->getPort(port)) {
NetInfo *net = cell->getPort(port);
WireId src = ctx->getBelPinWire(cell->bel, port);
// In current chip db real CPE input is max 4 pips away
for (int i = 0; i < 4; i++) {
if (net->wires.count(src)) {
auto &p = net->wires.at(src);