mirror of https://github.com/YosysHQ/nextpnr.git
Cleanup
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parent
3244b09e2c
commit
36c38c5fa6
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@ -41,12 +41,8 @@ void GateMatePacker::flush_cells(bool unbind)
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void GateMatePacker::disconnect_if_gnd(CellInfo *cell, IdString input)
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{
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NetInfo *net = cell->getPort(input);
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if (!net)
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return;
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if (net == net_PACKER_GND) {
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if (cell->getPort(input) == net_PACKER_GND)
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cell->disconnectPort(input);
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}
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}
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void GateMatePacker::pack_misc()
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@ -341,7 +341,7 @@ void GateMatePacker::pack_cpe()
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ci.params[id_INIT_L02] = Property(LUT_D1, 4); // IN6
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ci.params[id_INIT_L03] = Property(LUT_D1, 4); // IN8
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ci.params[id_INIT_L11] = Property(invert, 4); // Inversion bits
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// ci.params[id_INIT_L20] = Property(LUT_D1, 4); // Always D1
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ci.params[id_INIT_L20] = Property(LUT_D1, 4); // Always D1
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ci.type = id_CPE_LT_L;
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CellInfo *upper = create_cell_ptr(id_CPE_LT_U, ctx->idf("%s$upper", ci.name.c_str(ctx)));
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@ -598,8 +598,8 @@ void GateMatePacker::pack_addf()
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ci_lower->params[id_INIT_L00] = Property(LUT_ONE, 4);
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root->disconnectPort(id_CI);
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} else {
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root->movePortTo(id_CI, ci_lower, id_IN1);
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ci_lower->params[id_INIT_L00] = Property(LUT_D0, 4); // IN5
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root->movePortTo(id_CI, ci_lower, id_IN1); // IN5
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ci_lower->params[id_INIT_L00] = Property(LUT_D0, 4);
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}
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NetInfo *ci_conn = ctx->createNet(ctx->idf("%s$ci_net", root->name.c_str(ctx)));
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@ -654,7 +654,7 @@ void GateMatePacker::pack_addf()
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merge_dff(cy, id_OUT, other_dff);
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merge_input(cy, upper, id_A, id_INIT_L00, id_IN1, id_IN2);
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merge_input(cy, upper, id_B, id_INIT_L01, id_IN3, id_IN4);
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upper->params[id_INIT_L10] = Property(LUT_XOR, 4); // XOR
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upper->params[id_INIT_L10] = Property(LUT_XOR, 4);
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upper->params[id_C_FUNCTION] = Property(merged ? C_ADDF2 : C_ADDF, 3);
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if (i == grp.size() - 1) {
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