mirror of https://github.com/YosysHQ/nextpnr.git
current progress (route zero driver too)
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parent
d1f80ca5bb
commit
1576703937
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@ -221,6 +221,27 @@ struct BitstreamBackend
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void check_multipliers()
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{
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for (auto *mult : uarch->multipliers) {
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NPNR_ASSERT(mult != nullptr);
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auto should_be_inverted = mult->constr_x % 2 == 1;
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// TODO: these are errors, but downgraded to allow providing *some* output.
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// IN8
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if (need_inversion(mult, id_IN8) != should_be_inverted)
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log_warning("%s.IN8 has wrong inversion state\n", mult->name.c_str(ctx));
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// IN5
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if (need_inversion(mult, id_IN5) != should_be_inverted)
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log_warning("%s.IN5 has wrong inversion state\n", mult->name.c_str(ctx));
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// IN1
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if (need_inversion(mult, id_IN1) != should_be_inverted)
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log_warning("%s.IN1 has wrong inversion state\n", mult->name.c_str(ctx));
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}
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log_info("===\n");
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pool<IdString> multiplier_nets;
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for (auto *mult : uarch->multipliers) {
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@ -74,6 +74,7 @@ struct GateMateImpl : HimbaechelAPI
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int preferred_die;
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std::vector<CellInfo *> multipliers;
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std::vector<std::pair<CellInfo *, CellInfo *>> multiplier_a_passthrus;
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std::vector<CellInfo *> multiplier_zero_drivers;
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private:
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bool getChildPlacement(const BaseClusterInfo *cluster, Loc root_loc,
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@ -399,6 +399,9 @@ void GateMatePacker::pack_mult()
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auto create_zero_driver = [&](IdString name) {
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auto *zero_lower = create_cell_ptr(id_CPE_DUMMY, ctx->idf("%s$zero_lower", name.c_str(ctx)));
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auto *zero_upper = create_cell_ptr(id_CPE_L2T4, ctx->idf("%s$zero", name.c_str(ctx)));
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uarch->multiplier_zero_drivers.push_back(zero_upper);
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return ZeroDriver{zero_lower, zero_upper, name};
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};
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@ -111,16 +111,25 @@ namespace {
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find_and_bind_downhill_pip(ctx, cpe_in1, cpe_in1_int, net);
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}
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void route_mult_x1y1_upper_in8(Context *ctx, NetInfo *net, CellInfo* upper, Loc loc, bool is_fourgroup_a) {
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void route_mult_x1y1_upper_in8(Context *ctx, NetInfo *net, CellInfo* upper, Loc loc, bool is_fourgroup_a, bool bind_route_start = false) {
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log_info(" routing net '%s' -> IN8 using x1y1\n", net->name.c_str(ctx));
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auto x1y1 = ctx->idf("X%dY%d", loc.x, loc.y);
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auto x2y2 = ctx->idf("X%dY%d", loc.x + 1, loc.y + 1);
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auto x4y2 = ctx->idf("X%dY%d", loc.x + 3, loc.y + 1);
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auto cpe_combout2 = ctx->getBelPinWire(upper->bel, id_OUT);
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auto cpe_out2_int = ctx->getWireByName(IdStringList::concat(x1y1, ctx->idf("CPE.OUT2_int")));
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auto out_mux_d0 = ctx->getWireByName(IdStringList::concat(x2y2, ctx->idf("OM.P12.D0")));
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auto out_mux_y = ctx->getWireByName(IdStringList::concat(x2y2, ctx->idf("OM.P12.Y")));
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auto in_mux_p12 = ctx->getWireByName(IdStringList::concat(x2y2, ctx->idf("IM.P12.D2")));
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if (bind_route_start) {
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ctx->bindWire(cpe_combout2, net, STRENGTH_LOCKED);
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find_and_bind_downhill_pip(ctx, cpe_combout2, cpe_out2_int, net);
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find_and_bind_downhill_pip(ctx, cpe_out2_int, out_mux_d0, net);
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}
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find_and_bind_downhill_pip(ctx, out_mux_d0, out_mux_y, net); // inverting
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if (is_fourgroup_a) {
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@ -287,16 +296,25 @@ namespace {
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find_and_bind_downhill_pip(ctx, in_mux_y, cpe_in1_int, net);
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}
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void route_mult_x1y2_upper_in8(Context *ctx, NetInfo *net, CellInfo* upper, Loc loc, bool is_fourgroup_a) {
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void route_mult_x1y2_upper_in8(Context *ctx, NetInfo *net, CellInfo* upper, Loc loc, bool is_fourgroup_a, bool bind_route_start = false) {
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log_info(" routing net '%s' -> IN8 using x1y2\n", net->name.c_str(ctx));
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auto x1y1 = ctx->idf("X%dY%d", loc.x, loc.y);
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auto x2y1 = ctx->idf("X%dY%d", loc.x + 1, loc.y);
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auto x2y2 = ctx->idf("X%dY%d", loc.x + 1, loc.y + 1);
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auto cpe_combout2 = ctx->getBelPinWire(upper->bel, id_OUT);
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auto cpe_out2_int = ctx->getWireByName(IdStringList::concat(x1y1, ctx->idf("CPE.OUT2_int")));
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auto out_mux_d1 = ctx->getWireByName(IdStringList::concat(x2y1, ctx->idf("OM.P10.D1")));
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auto out_mux_y = ctx->getWireByName(IdStringList::concat(x2y1, ctx->idf("OM.P10.Y")));
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auto in_mux_p10 = ctx->getWireByName(IdStringList::concat(x2y2, ctx->idf("IM.P10.D1")));
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if (bind_route_start) {
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ctx->bindWire(cpe_combout2, net, STRENGTH_LOCKED);
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find_and_bind_downhill_pip(ctx, cpe_combout2, cpe_out2_int, net);
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find_and_bind_downhill_pip(ctx, cpe_out2_int, out_mux_d1, net);
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}
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find_and_bind_downhill_pip(ctx, out_mux_d1, out_mux_y, net); // inverting
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if (is_fourgroup_a) {
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@ -381,6 +399,34 @@ void GateMateImpl::route_mult() {
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log_info(" don't know how to route net '%s' (it's four-group B, (%d, %d))\n", upper_out->name.c_str(ctx), x_within_fourgroup, y_within_fourgroup);
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}
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}
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for (auto &zero_driver : this->multiplier_zero_drivers) {
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auto *out = zero_driver->ports.at(id_OUT).net;
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auto loc = ctx->getBelLocation(zero_driver->bel);
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auto x_fourgroup = (loc.x - 3) % 4;
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auto y_fourgroup = (loc.y - 3) % 4;
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bool is_fourgroup_a = (x_fourgroup < 2 && y_fourgroup < 2) || (x_fourgroup >= 2 && y_fourgroup >= 2);
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auto x_within_fourgroup = (loc.x - 3) % 2;
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auto y_within_fourgroup = (loc.y - 3) % 2;
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log_info(" Zero driver at (%d, %d) has 4-group %c\n", loc.x, loc.y, is_fourgroup_a ? 'A' : 'B');
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log_info(" zero_driver.OUT [OUT2] = %s\n", ctx->nameOfWire(ctx->getBelPinWire(zero_driver->bel, id_OUT)));
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for (auto sink_port : zero_driver->ports.at(id_OUT).net->users)
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log_info(" -> %s.%s\n", sink_port.cell->name.c_str(ctx), sink_port.port.c_str(ctx));
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if (x_within_fourgroup == 0 && y_within_fourgroup == 0) {
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route_mult_x1y1_upper_in8(ctx, out, zero_driver, loc, is_fourgroup_a, /* bind_route_start=*/true);
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} else if (x_within_fourgroup == 0 && y_within_fourgroup == 1) {
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route_mult_x1y2_upper_in8(ctx, out, zero_driver, loc, is_fourgroup_a, /* bind_route_start=*/true);
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} else if (is_fourgroup_a) {
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log_info(" don't know how to route net '%s' (it's four-group A, (%d, %d))\n", out->name.c_str(ctx), x_within_fourgroup, y_within_fourgroup);
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} else {
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log_info(" don't know how to route net '%s' (it's four-group B, (%d, %d))\n", out->name.c_str(ctx), x_within_fourgroup, y_within_fourgroup);
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}
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}
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}
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NEXTPNR_NAMESPACE_END
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