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Tim Edwards
edbe5d6e86
to a single net (as can be done with assignments in verilog or with zero-voltage sources or zero-value resistors in SPICE). Corrected an error in the SPICE netlist reader that prevented the proper use of zero-voltage sources as net splitters.
2 lines
8 B
Plaintext
2 lines
8 B
Plaintext
1.5.223
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