in an "include" statement in either SPICE or verilog. Modified pin matching behavior to force cells in both netlists to be marked as black-box entries if either one is marked as a black-box entry (this may not be needed, but shouldn't do any harm, either). |
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|---|---|---|
| .. | ||
| Depend | ||
| Makefile | ||
| console.tcl | ||
| netgen.sh.in | ||
| netgen.tcl.in | ||
| netgenexec.c | ||
| tclnetgen.c | ||
| tkcon.tcl | ||
| tmp.out | ||