6d5946eaf2
Added MacOS (Big Sur) installation instructions.
2021-10-03 13:58:34 +02:00
18dcac73bc
Updated version to go along with the merge of pull request #31
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from Mitch Bailey.
2021-09-07 22:27:31 -04:00
1338e3beb5
Removed debugging statement.
2021-09-07 19:16:33 -07:00
df1c4c5153
Changed debug print increment from 100 -> 10000.
2021-09-07 10:19:27 -07:00
a05ede99db
Added missing newlines
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Print debug message every 100 lines
2021-09-06 18:31:38 -07:00
2d6f1f71b5
Reduce and clarify debugging message.
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Add missing new line to "Flattening non-matched subcircuits.
2021-09-02 22:29:17 -07:00
d7355cea95
Updated the vezzal docker image version for CI.
2021-08-29 19:41:14 -04:00
32585a572c
Corrected the badge link at the top of README.md to point to my
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own repository instead of a fork.
2021-08-28 13:14:11 -04:00
e773739e7d
Updated VERSION as a forced change to check continuous integration
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on github.
2021-08-06 11:37:29 -04:00
583cc3a151
Updated VERSION to go along with the merge of pull request #27 from
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Sai Charan. Subsequent mirror pushes to github should trigger the
continuous integration.
2021-08-06 11:18:56 -04:00
bdd7d25943
Update main.yml
2021-08-06 11:18:32 -04:00
903b813821
Update README.md
2021-08-06 11:18:32 -04:00
1f9d4317e3
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2021-08-06 11:18:32 -04:00
7b8086fc3a
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2021-08-06 11:18:32 -04:00
e80f70e67b
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2021-08-06 11:18:32 -04:00
6cc898b34b
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2021-08-06 11:18:32 -04:00
30bbc28c17
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2021-08-06 11:18:32 -04:00
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2021-08-06 11:18:32 -04:00
e643563d4e
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2021-08-06 11:18:32 -04:00
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f50dfd9261
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2021-08-06 11:18:32 -04:00
409ce224ad
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2021-08-06 11:18:32 -04:00
f50093e6c6
Rename README to README.md
2021-08-06 11:18:32 -04:00
a27ac8c679
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2021-08-06 11:18:32 -04:00
883755eed3
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2021-08-06 11:18:31 -04:00
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2021-08-06 11:18:31 -04:00
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2021-08-06 11:18:31 -04:00
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2021-08-06 11:18:31 -04:00
e1a3ae5619
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2021-08-06 11:18:31 -04:00
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2021-08-06 11:18:31 -04:00
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2021-08-06 11:18:31 -04:00
4468d36462
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2021-08-06 11:18:31 -04:00
b99fb96259
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2021-08-06 11:18:31 -04:00
ec8299ea14
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2021-08-06 11:18:31 -04:00
376296eda5
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2021-08-06 11:18:31 -04:00
30acb8be63
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2021-08-06 11:18:31 -04:00
7e15a26417
Create main.yml
2021-08-06 11:18:31 -04:00
21750da6c4
Corrected the Makefile in the python directory to set the
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lvs_manager.py script to be executable, or else "netgen -gui" will
not work.
2021-07-29 10:45:44 -04:00
a332c23524
Corrected an error in "series_sort" that will overwrite memory
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randomly if combining series devices that do not have an "S"
property (which is the typical case). This will normally result in
a crash.
2021-07-15 16:03:43 -04:00
064195ecc9
Reinstated some code that had been commented out that prints pin
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information for a non-matching pin in circuit1 and generates a
proxy pin in circuit2---there is some case where this is redundant,
I think, but I need to find the example.
2021-07-11 17:04:50 -04:00
88d53fab15
Correction to the verilog parser to recognize modifiers such as
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"~", "!", or "-" in front of variable names in a pin list that would
render the module behavioral verilog.
2021-07-11 12:06:16 -04:00
c287b6cd28
A previous attempt (in revision 193) to make the "lvs" script stop
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saying that pins were mismatched when pin matching was never run
accidentally resulted in pin matching not being applied to black-box
entries. This has been corrected.
2021-07-11 10:58:30 -04:00
0a0a6bcf63
Modified the handling of missing pins (again) such that netgen
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continues to allow missing pins to match unconnected pins, but
*only* on subcircuits below the top level. This essentially forces
layouts to separate merged pins with metal resistors, although
there should be an option in magic's ext2spice routine that allows
"equiv" statements, when declaring equivalence of two ports, to be
replaced by a zero volt source or zero ohm ideal resistor.
2021-07-10 13:54:14 -04:00
72ef2f2637
Corrected the pin matching so that it runs the same loop on unmatched
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pins on non-black-boxed circuits as it does not black-boxed circuits,
but specifically looking for pins that are disconnected on both sides,
since those do not appear in the node list and are not otherwise
handled. Otherwise, disconnected pins will appear to have disappeared
from the first netlist.
2021-07-10 11:25:07 -04:00
287f5963d1
Corrected an error that crept into the netgen.tcl script that causes
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the "failed pin matching" error message to appear for cells mismatching
topology (in which case pin matching is never done).
2021-07-08 08:56:52 -04:00
a984ac1a4d
Corrected an error in a recent update that handles the case where
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a final parallel or series combination needs to be done but there
are still multiple property records. The multiplier was being
incorrectly applied twice, causing an automatic mismatch in
parameter values.
2021-07-02 10:51:44 -04:00
Harald Pretl
Tim Edwards
D. Mitch Bailey
Sai Charan Lanka