Merge branch 'master' into netgen-1.5

VERSION

@@ -1 +1 @@
-1.5.224
+1.5.226

base/flatten.c

@@ -1709,6 +1709,13 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
 		}
 	    }
 	    if (match) {
+
+		/* Don't flatten if cell1 is a black box, because it	*/
+		/* can't also be flattened.				*/
+
+		if ((ecomp->num1 == 0) || (ecomp->cell1->class !=
+				CLASS_MODULE)) {
+
 		    if (ecomp->cell2) {
 		    	Fprintf(stdout, "Flattening instances of %s in cell %s (%d)"
 				" makes a better match\n", ecomp->cell2->name,
@@ -1717,6 +1724,7 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
 		    }
 		    modified++;
 		}
+	    }
 
 	    /* Reset or apply the count adjustments */
 	    if (ecomp->cell2)
@@ -1739,7 +1747,7 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
 	}
 	
 	/* Case 3:  Cell1 class is a subcircuit, and flattening	*/
-	/* it (without regard to cell1) improves the matching.	*/
+	/* it (without regard to cell2) improves the matching.	*/
 
 	else if ((ecomp->num1 != ecomp->num2) && (ecomp->cell1 != NULL) &&
 			(ecomp->num1 != 0) && (ecomp->cell1->class == CLASS_SUBCKT)) {
@@ -1767,6 +1775,13 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
 		}
 	    }
 	    if (match) {
+
+		/* Don't flatten if cell2 is a black box, because it	*/
+		/* can't also be flattened.				*/
+
+		if ((ecomp->num2 == 0) || (ecomp->cell2->class !=
+				CLASS_MODULE)) {
+
 		    if (ecomp->cell1) {
 		    	Fprintf(stdout, "Flattening instances of %s in cell %s (%d)"
 				" makes a better match\n", ecomp->cell1->name,
@@ -1775,6 +1790,7 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
 		    }
 		    modified++;
 		}
+	    }
 
 	    /* Reset or apply the count adjustments */
 	    if (ecomp->cell1)

base/netcmp.c

@@ -875,6 +875,10 @@ struct FormattedList *FormatBadNodeFragment(struct Node *N)
       for (n = pins[i]->subelement->element->nodelist; n != NULL; n = n->next){
 	if (n->pin_magic == pins[i]->subelement->pin_magic) {
 	  if ((permute == 0) && (ob->instance.name != NULL)) {
+	     /* Handle "port_match_error" */
+	     if ((ob->name[0] == 'p') && !strcmp(ob->name, "port_match_error"))
+		pinname = ob->name;
+	     else
 	        pinname = ob->name + strlen(ob->instance.name) + 1;
 	  }
 	  else if (ob->instance.name != NULL) {

base/verilog.c

@@ -2232,6 +2232,7 @@ nextinst:
 			      Node(scan->net);
 	           	   join(scan->net, nobj->name);
 	             	   scan->flags |= PORT_FOUND;
+			   obptr = nobj;
 
 			   /* Now any previous instance of the same cell must	*/
 			   /* insert the same additional pin as a no-connect.	*/