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netgen
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Merge branch 'master' into netgen-1.5

This commit is contained in:
Tim Edwards 2022-06-28 02:00:02 -04:00
parent ee92d880d7 2056b37c95
commit 7e9bd9f2a0
2 changed files with 5 additions and 2 deletions
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2
VERSION
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@ -1 +1 @@
1.5.226 1.5.227

5
base/verilog.c
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@ -2228,11 +2228,13 @@ nextinst:
obptr->next = nobj; obptr->next = nobj;
HashPtrInstall(nobj->name, nobj, &(CurrentCell->objdict)); HashPtrInstall(nobj->name, nobj, &(CurrentCell->objdict));
/* Ensure that CurrentTail is correct */
if (obptr == CurrentTail) CurrentTail = nobj;
if (LookupObject(scan->net, CurrentCell) == NULL) if (LookupObject(scan->net, CurrentCell) == NULL)
Node(scan->net); Node(scan->net);
join(scan->net, nobj->name); join(scan->net, nobj->name);
scan->flags |= PORT_FOUND; scan->flags |= PORT_FOUND;
obptr = nobj;
/* Now any previous instance of the same cell must */ /* Now any previous instance of the same cell must */
/* insert the same additional pin as a no-connect. */ /* insert the same additional pin as a no-connect. */
@ -2270,6 +2272,7 @@ nextinst:
} }
} }
} }
obptr = obptr->next;
} }
else { else {
Fprintf(stderr, "Error: Instance %s has pin %s which is " Fprintf(stderr, "Error: Instance %s has pin %s which is "