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luke
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netgen
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https://github.com/RTimothyEdwards/netgen.git
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1.5.160
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Added patch from Mitch Bailey which sorts the objects in a verilog file input so that pins occur first before nodes, as they do in a SPICE netlist. Certain parts of the comparison code depend on pins being first in the netlist, and reordering them when reading input is easier than rewriting the rest of the code.
2020-12-15 15:57:49 +01:00
1.5.160