luke
/
netgen
mirror of https://github.com/RTimothyEdwards/netgen.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity
netgen/VERSION

2 lines
8 B
Plaintext
Raw Normal View History

Having been given an example by Kareem Farid where the order of verilog netlists makes a difference to the matching (or failure thereof), I applied the same in-circuit pin matching as previously applied to mixtures of SPICE and verilog netlists. This is clearly a more robust way to handle pin order differences between parent and child than was implemented previously.
2024-02-18 21:22:40 +01:00
1.5.270