base/Makefile

MODULE = base
NETGENDIR = ..
SRCS = actel.c ccode.c greedy.c ntk.c print.c actellib.c embed.c \
 hash.c netfile.c objlist.c query.c anneal.c ext.c netcmp.c netgen.c \
 pdutils.c random.c timing.c bottomup.c flatten.c place.c spice.c \
 verilog.c wombat.c xilinx.c xillib.c
X11_SRCS = xnetgen.c

include ${NETGENDIR}/defs.mak

SRCS   += ${GR_SRCS}
DFLAGS += ${GR_DFLAGS}
DFLAGS += -DNETGEN_DATE="\"`date`\""
CFLAGS += ${GR_CFLAGS}

include ${NETGENDIR}/rules.mak
Initial commit at Mon May 18 09:27:46 EDT 2015 by tim on stravinsky 2015-05-18 09:27:46 -04:00			`MODULE = base`
			`NETGENDIR = ..`
			`SRCS = actel.c ccode.c greedy.c ntk.c print.c actellib.c embed.c \`
			`hash.c netfile.c objlist.c query.c anneal.c ext.c netcmp.c netgen.c \`
			`pdutils.c random.c timing.c bottomup.c flatten.c place.c spice.c \`
Added new handling for verilog structural netlists, and fixed 2018-04-12 17:09:10 -04:00			`verilog.c wombat.c xilinx.c xillib.c`
Initial commit at Mon May 18 09:27:46 EDT 2015 by tim on stravinsky 2015-05-18 09:27:46 -04:00			`X11_SRCS = xnetgen.c`

			`include ${NETGENDIR}/defs.mak`

			`SRCS += ${GR_SRCS}`
			`DFLAGS += ${GR_DFLAGS}`
			DFLAGS += -DNETGEN_DATE="\"`date`\""
			`CFLAGS += ${GR_CFLAGS}`

			`include ${NETGENDIR}/rules.mak`