Files
magic/extflat
Tim Edwards 44325f81e6 Corrected two errors: (1) Do not write subcircuit calls to subcircuits
that have been removed by flattening into the parent cell due to lack
of devices.  Previously the checks on writing the subcircuit and writing
the call were slightly different, leading to instances in which the
subcircuit call would be written to the netlist output without the
subcircuit being defined.  (2) Corrected an error in the "bridge" CIF/GDS
output operator.  In certain (somewhat rare) geometries, the tile behind
(instead of in front of) the corner being checked may be incorrectly
flagged as a DRC spacing error.  The fix is to ignore tiles that are
behind the corner being checked.
2020-12-28 16:54:20 -05:00
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