mirror of
https://github.com/RTimothyEdwards/magic.git
synced 2026-09-05 00:50:50 +02:00
Tim Edwards
b493334c73
simple FET device in extresist. Also: Extended the bloat-all CIF operator again, allowing the trigger layer for the bloat operation to include both CIF layers and magic layers (previously only magic layers were supported). This extension is possible due to the previous extension allowing the trigger layer and bloating layers to be on separate planes. This operator extension is useful for tagging geometry that is in the proximity of, but not overlapping, geometry on another plane.
392 lines
10 KiB
C
392 lines
10 KiB
C
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#ifndef lint
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static char rcsid[] __attribute__ ((unused)) = "$Header: /usr/cvsroot/magic-8.0/resis/ResBasic.c,v 1.3 2010/06/24 12:37:56 tim Exp $";
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#endif /* not lint */
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#include <stdio.h>
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#include <string.h>
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#include <ctype.h>
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#include <math.h>
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#include "utils/magic.h"
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#include "utils/geometry.h"
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#include "utils/geofast.h"
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#include "tiles/tile.h"
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#include "utils/hash.h"
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#include "database/database.h"
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#include "utils/malloc.h"
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#include "textio/textio.h"
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#include "extract/extract.h"
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#include "extract/extractInt.h"
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#include "windows/windows.h"
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#include "dbwind/dbwind.h"
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#include "utils/tech.h"
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#include "textio/txcommands.h"
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#include "resis/resis.h"
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int resSubDevFunc();
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/*
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*--------------------------------------------------------------------------
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*
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* resNodeIsPort --
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*
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* If the given position is inside any port declared on the tile,
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* change the node name to the port name. Remove the port
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* declaration if it was used.
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*
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*--------------------------------------------------------------------------
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*/
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void
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resNodeIsPort(node, x, y, tile)
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resNode *node;
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int x;
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int y;
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Tile *tile;
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{
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Rect *rect;
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Point p;
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resPort *pl, *lp;
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tileJunk *junk = (tileJunk *)(tile->ti_client);
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p.p_x = x;
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p.p_y = y;
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for (pl = junk->portList; pl; pl = pl->rp_nextPort)
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{
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rect = &(pl->rp_bbox);
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if (GEO_ENCLOSE(&p, rect))
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{
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node->rn_name = pl->rp_nodename;
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if (junk->portList == pl)
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junk->portList = pl->rp_nextPort;
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else
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{
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for (lp = junk->portList; lp && (lp->rp_nextPort != pl);
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lp = lp->rp_nextPort);
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lp->rp_nextPort = pl->rp_nextPort;
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}
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freeMagic(pl);
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break;
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}
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}
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}
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/*
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*--------------------------------------------------------------------------
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*
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* resAllPortNodes --
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*
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* Generate new nodes and breakpoints for every unused port declared
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* on a tile.
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*
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*--------------------------------------------------------------------------
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*/
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void
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resAllPortNodes(tile, list)
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Tile *tile;
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resNode **list;
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{
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int x, y;
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resNode *resptr;
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resPort *pl;
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tileJunk *junk = (tileJunk *)(tile->ti_client);
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for (pl = junk->portList; pl; pl = pl->rp_nextPort)
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{
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x = pl->rp_loc.p_x;
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y = pl->rp_loc.p_y;
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resptr = (resNode *) mallocMagic((unsigned)(sizeof(resNode)));
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InitializeNode(resptr, x, y, RES_NODE_ORIGIN);
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resptr->rn_status = TRUE;
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resptr->rn_noderes = 0;
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resptr->rn_name = pl->rp_nodename;
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ResAddToQueue(resptr, list);
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NEWBREAK(resptr, tile, x, y, NULL);
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freeMagic(pl);
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}
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}
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/*
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*--------------------------------------------------------------------------
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*
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* ResEachTile--for each tile, make a list of all possible current sources/
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* sinks including contacts, devices, and junctions. Once this
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* list is made, calculate the resistor nextwork for the tile.
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*
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* Results: returns TRUE or FALSE depending on whether a node was
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* involved in a merge.
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*
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* Side Effects: creates Nodes, devices, junctions, and breakpoints.
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*
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*
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*--------------------------------------------------------------------------
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*/
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bool
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ResEachTile(tile, startpoint)
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Tile *tile;
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Point *startpoint;
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{
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Tile *tp;
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resNode *resptr;
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cElement *ce;
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TileType t1, t2;
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int xj, yj, i;
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bool merged;
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tElement *tcell;
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tileJunk *tstructs= (tileJunk *)(tile->ti_client);
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ExtDevice *devptr;
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ResTileCount++;
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/* Process startpoint, if any. */
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if (IsSplit(tile))
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{
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t1 = (SplitSide(tile)) ? SplitRightType(tile) : SplitLeftType(tile);
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}
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else
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t1 = TiGetTypeExact(tile);
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if (startpoint != (Point *) NULL)
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{
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int x = startpoint->p_x;
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int y = startpoint->p_y;
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resptr = (resNode *) mallocMagic((unsigned)(sizeof(resNode)));
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InitializeNode(resptr, x, y, RES_NODE_ORIGIN);
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resptr->rn_status = TRUE;
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resptr->rn_noderes = 0;
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ResAddToQueue(resptr, &ResNodeQueue);
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NEWBREAK(resptr, tile, x, y, NULL);
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resCurrentNode = resptr;
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resNodeIsPort(resptr, x, y, tile);
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}
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if TTMaskHasType(&(ExtCurStyle->exts_deviceMask), t1)
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{
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/*
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* The device is put in the center of the tile. This is fine
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* for single tile device, but not as good for multiple ones.
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*/
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if (tstructs->tj_status & RES_TILE_DEV)
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{
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if (tstructs->deviceList->rd_fet_gate == NULL)
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{
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int x = (LEFT(tile) + RIGHT(tile)) >> 1;
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int y = (TOP(tile) + BOTTOM(tile)) >> 1;
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resptr = (resNode *) mallocMagic((unsigned)(sizeof(resNode)));
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tstructs->deviceList->rd_fet_gate = resptr;
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tcell = (tElement *) mallocMagic((unsigned)(sizeof(tElement)));
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tcell->te_thist = tstructs->deviceList;
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tcell->te_nextt = NULL;
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InitializeNode(resptr, x, y, RES_NODE_JUNCTION);
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resptr->rn_te = tcell;
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ResAddToQueue(resptr, &ResNodeQueue);
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resNodeIsPort(resptr, x, y, tile);
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NEWBREAK(resptr, tile, resptr->rn_loc.p_x,
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resptr->rn_loc.p_y, NULL);
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}
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}
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}
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#ifdef ARIEL
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if (i = ExtCurStyle->exts_plugSignalNum[t1])
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{
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tcell = (tElement *) mallocMagic((unsigned)(sizeof(tElement)));
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tcell->te_thist= ResImageAddPlug(tile, i, resCurrentNode);
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tcell->te_nextt = resCurrentNode->rn_te;
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resCurrentNode->rn_te = tcell;
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}
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if (TTMaskHasType(&ResSubsTypeBitMask,t1) &&
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(ResOptionsFlags & ResOpt_DoSubstrate))
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{
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int pNum;
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Rect tileArea;
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TileTypeBitMask *mask = &ExtCurStyle->exts_subsTransistorTypes[t1];
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TiToRect(tile,&tileArea);
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for (pNum = PL_TECHDEPBASE; pNum < DBNumPlanes; pNum++)
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{
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if (TTMaskIntersect(&DBPlaneTypes[pNum], mask))
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{
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(void)DBSrPaintArea((Tile *) NULL,
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ResUse->cu_def->cd_planes[pNum],
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&tileArea, mask, resSubDevFunc, (ClientData) tile);
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}
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}
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}
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#endif
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/* Process all the contact points */
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ce = tstructs->contactList;
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while (ce != (cElement *) NULL)
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{
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ResContactPoint *cp = ce->ce_thisc;
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cElement *oldce;
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if (cp->cp_cnode[0] == (resNode *) NULL)
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{
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ResDoContacts(cp, &ResNodeQueue, &ResResList);
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}
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oldce = ce;
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ce = ce->ce_nextc;
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freeMagic((char *)oldce);
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}
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tstructs->contactList = NULL;
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/*
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* Walk the four sides of the tile looking for adjoining connecting
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* materials.
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*/
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/* left */
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for (tp = BL(tile); BOTTOM(tp) < TOP(tile); tp=RT(tp))
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{
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t2 = TiGetRightType(tp);
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devptr = ExtCurStyle->exts_device[t2];
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if(TTMaskHasType(&(ExtCurStyle->exts_deviceMask), t2) &&
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TTMaskHasType(&(devptr->exts_deviceSDTypes[0]), t1))
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/* found device */
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{
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xj = LEFT(tile);
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yj = (TOP(tp) + BOTTOM(tp)) >> 1;
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ResNewSDDevice(tile, tp, xj, yj, RIGHTEDGE, &ResNodeQueue);
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}
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if TTMaskHasType(&(ExtCurStyle->exts_nodeConn[t1]), t2)
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/* tile is junction */
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{
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/*junction rn_loc */
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xj = LEFT(tile);
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yj = (MAX(BOTTOM(tile), BOTTOM(tp)) + MIN(TOP(tile), TOP(tp))) >> 1;
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(void) ResProcessJunction(tile, tp, xj, yj, &ResNodeQueue);
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}
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}
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/* right */
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for (tp = TR(tile); TOP(tp) > BOTTOM(tile); tp=LB(tp))
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{
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t2 = TiGetLeftType(tp);
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devptr = ExtCurStyle->exts_device[t2];
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if(TTMaskHasType(&(ExtCurStyle->exts_deviceMask), t2) &&
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TTMaskHasType(&(devptr->exts_deviceSDTypes[0]), t1))
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/* found device */
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{
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xj = RIGHT(tile);
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yj = (TOP(tp)+BOTTOM(tp))>>1;
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ResNewSDDevice(tile, tp, xj, yj, LEFTEDGE, &ResNodeQueue);
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}
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if TTMaskHasType(&ExtCurStyle->exts_nodeConn[t1], t2)
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/* tile is junction */
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{
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/*junction rn_loc */
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xj = RIGHT(tile);
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yj = (MAX(BOTTOM(tile),BOTTOM(tp)) + MIN(TOP(tile), TOP(tp))) >> 1;
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(void)ResProcessJunction(tile, tp, xj, yj, &ResNodeQueue);
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}
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}
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/* top */
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for (tp = RT(tile); RIGHT(tp) > LEFT(tile); tp=BL(tp))
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{
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t2 = TiGetBottomType(tp);
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devptr = ExtCurStyle->exts_device[t2];
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if(TTMaskHasType(&(ExtCurStyle->exts_deviceMask),t2) &&
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TTMaskHasType(&(devptr->exts_deviceSDTypes[0]),t1))
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/* found device */
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{
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yj = TOP(tile);
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xj = (LEFT(tp)+RIGHT(tp))>>1;
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ResNewSDDevice(tile,tp,xj,yj,BOTTOMEDGE, &ResNodeQueue);
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}
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if TTMaskHasType(&ExtCurStyle->exts_nodeConn[t1],t2)
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/* tile is junction */
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{
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yj = TOP(tile);
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xj = (MAX(LEFT(tile),LEFT(tp)) + MIN(RIGHT(tile),RIGHT(tp))) >> 1;
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ResProcessJunction(tile, tp, xj, yj, &ResNodeQueue);
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}
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}
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/* bottom */
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for (tp = LB(tile); LEFT(tp) < RIGHT(tile); tp=TR(tp))
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{
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t2 = TiGetTopType(tp);
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devptr = ExtCurStyle->exts_device[t2];
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if(TTMaskHasType(&(ExtCurStyle->exts_deviceMask), t2) &&
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TTMaskHasType(&(devptr->exts_deviceSDTypes[0]), t1))
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/* found device */
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{
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yj = BOTTOM(tile);
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xj = (LEFT(tp) + RIGHT(tp)) >> 1;
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ResNewSDDevice(tile, tp, xj, yj, TOPEDGE, &ResNodeQueue);
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}
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if TTMaskHasType(&(ExtCurStyle->exts_nodeConn[t1]), t2)
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/* tile is junction */
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{
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yj = BOTTOM(tile);
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xj = (MAX(LEFT(tile),LEFT(tp)) + MIN(RIGHT(tile),RIGHT(tp))) >> 1;
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ResProcessJunction(tile, tp, xj, yj, &ResNodeQueue);
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}
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}
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tstructs->tj_status |= RES_TILE_DONE;
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resAllPortNodes(tile, &ResNodeQueue);
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merged = ResCalcTileResistance(tile, tstructs, &ResNodeQueue,
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&ResNodeList);
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return(merged);
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}
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/*
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*-------------------------------------------------------------------------
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*
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* resSubDevFunc -- called when DBSrPaintArea finds a device within
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* a substrate area.
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*
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* Results: always returns 0 to keep search going.
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*
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* Side Effects: allocates substrate node.
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*
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*-------------------------------------------------------------------------
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*/
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int
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resSubDevFunc(tile,tp)
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Tile *tile,*tp;
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{
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tileJunk *junk = (tileJunk *)(tile->ti_client);
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resNode *resptr;
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tElement *tcell;
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int x,y;
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if (junk->deviceList->rd_fet_subs == NULL)
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{
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resptr = (resNode *) mallocMagic((unsigned)(sizeof(resNode)));
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junk->deviceList->rd_fet_subs = resptr;
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junk->tj_status |= RES_TILE_DEV;
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tcell = (tElement *) mallocMagic((unsigned)(sizeof(tElement)));
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tcell->te_thist = junk->deviceList;
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tcell->te_nextt = NULL;
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x = (LEFT(tile)+RIGHT(tile))>>1;
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y = (TOP(tile)+BOTTOM(tile))>>1;
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InitializeNode(resptr,x,y,RES_NODE_JUNCTION);
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resptr->rn_te = tcell;
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ResAddToQueue(resptr,&ResNodeQueue);
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NEWBREAK(resptr,tp,x,y,NULL);
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}
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return 0;
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}
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