through labels with the same text (particularly necessary for
abstract views, since the real connectivity may not be represented).
The original implementation could generate very deep subroutine call
stacks and lead to stack overflow. The new implementation performs
the same check but without the deep nesting.
if a GDS (CIF) layer is dependent on, and only on, a templayer or
layers that get hierarchically processed, it will not get added to
the list of layers needing hierarchical processing, and therefore
end up not being generated in the output.
centering wires on grid lines when using a snap grid) so that
the wire width is maintained when switching from one layer to
another, when the wire width is larger than the minimum for the
route layer.
writing vias. However, the underlying problem, which is that
stacked vias are not decomposed into their constituent parts, has
not been addressed. A "-units" option was added to the "def write"
command to force the units of the output file to be different than
the default of 1000 (nanometers). No checks are made for whether
values can be accurately represented at the specified scale.
(once corrected in an experimental branch but never merged). This
avoids changing the actual bounding box of the cell to match the
LEF bounding box, but defines a property instead and uses that
property for certain functions such as displaying the bounding box
outline or selecting the cell. This avoids certain related errors
such as the failure to extract connections to areas outside of the
fixed bounding box.
as long as the command is not attempting to modify the port.
Attempts to modify ports in non-edit cells result in an error
message that is more helpful than the previous "Exactly one label
must be present..." text.
addition to wire overlaps, and added a method when painting
contacts to draw the necessary wire extension past the contact.
Since the wiring method draws single contacts by default, this
wiring method assumes a change in direction between layers. But
the main point is to generate wire contacts without DRC errors.
the wires stay centered on a centerline with respect to each other.
Also corrected the long-standing minor issue that the outline
drawing of the wire does not update when using the mouse scroll
wheel, making it unclear that the wire size has changed until the
wire position changes.
input, which failed to update the "lastLabel" record of the cell
in the case that the placeholder label being deleted was the last
label, leading to labels being lost during GDS input.
types that have been specified as being ports or text), since the
labels are in the magic database and at a different scale. Added
code to cope with the fact that the labels may come after the
definition of the rectangle, so a rectangle identified as a port
or text label will generate an empty placeholder label, and all
new labels are checked against any empty labels in the database to
see if they are bounded by them. If so, then the empty label is
removed and the label point is replaced by the rectangle. This is
a ridiculously round-about way to deal with an under-specified
file format. . .
Cairo graphics package (magic -d XR), will map the display onto
an SVG surface and save it to a file using the Cairo SVG backend.
Due to the simplicity of the mapping, there are no options to this
plot command; it just creates a file that is a (scalable!)
replica of the layout window.
label in a DEF file is on a layer that has not been properly
mapped to a magic layer. This would apply a negative index to
a TileType bitmask and crash the program. Also: Changed the
style and colormap slightly to make the via2 and via4 styles
more visible.
labels if they are in the top-level cell of the connection search.
Otherwise, this slows the connection search way down for nets with
lots of internal labels, and can also have potentially bad consequences
if, for example, the connected network is copied to another position,
and carries all the flattened and non-hierarchically-named labels with
it.
a scaling issue in extract) which was caused by the addition of
hierarchical netlist generation. Finding hierarchical connections
requires finding instances by name, so it is vastly better to create a
hash table of instances instead of a linked list.
label specified as having type "space" automatically overrides
the "no-reconnect-labels" flag. Modified the behavior of the
label reconnect algorithm so that it searches by plane order so
that material on the highest plane that matches the reconnection
criteria is chosen over similar materials on lower planes.
where devices extracted as "device resistor" or "device capacitor"
and defining parameters (e.g., area, perimeter) will generate the
device arguments in the wrong order in the .ext file, resulting in
incorrect readback when attempting to do ext2spice, resulting in the
device being omitted from the resulting netlist.
extraction times, which is an incorrect units conversion of the
"step" parameter in the extract section. It was converting based
on the "lambda" parameter in the same section, which has to do with
the scaling of values in the output file, not the scale factor of
the database to be extracted, which is set by the current CIF output
scale. Once fixed, extraction times are minimized using the rule of
thumb mentioned in the techfile reference, which is 50 times the
minimum feature size. Also: Give the lengthy nature of extraction
on large designs no matter how well optimized, added a feature to
mark the progress of the extraction in increments of 5%. Does not
output progress for small cells that extract quickly.
Tim Edwards
Tim Edwards