Not a serious attempt to make these work but they appear to compile
so this helps CI to cover as much code as possible.
ext2sim_main standalone does not link (probably due to unclean cross
module dependencies that now exist due to libutil.a being a heap where
anything with no modular home ends up)
ext2spice/ext2spice.c: Lookup() constify call-site
ext2sim/ext2sim.c: Lookup() constify call-site
windows/windCmdAM.c: Lookup() constify call-site
Tcl_SetResult() uses cast to remove 'const' from type, the pointer
is only used to take a copy of the data, the lack of 'const' is due
to Tcl heritage when supporting C89 era compilers.
TCL9 appears to fix this, in that the macro used ends up at
Tcl_NewStringObj() which has 'const' here.
Due to use of strcasecmp() or similar C API.
Maybe HAVE_STRINGS_H is needed ? If so which platforms needs this ?
clang18 default warning cleanup (strict)
The '&' has higher precedence, so the expression of the '&' side receive
extra parentheses.
ResMakeRes.c:671:37: warning: suggest parentheses around '&&' within '||'
ResMakeRes.c:942:32: warning: suggest parentheses around '&&' within '||'
ResSimple.c:201:70: warning: suggest parentheses around '&&' within '||'
ResRex.c:1036:28: warning: suggest parentheses around '&&' within '||'
ResRex.c:1038:50: warning: suggest parentheses around '&&' within '||'
ext2sim.c:1341:47: warning: suggest parentheses around '&&' within '||'
ext2spice.c:172:44: warning: suggest parentheses around '&&' within '||'
ext2spice.c:173:49: warning: suggest parentheses around '&&' within '||'
ext2spice.c:3655:50: warning: suggest parentheses around '&&' within '||'
ext2hier.c:1412:50: warning: suggest parentheses around '&&' within '||'
gcrDebug.c:638:55: warning: suggest parentheses around '&&' within '||'
selEnum.c:323:28: warning: suggest parentheses around '&&' within '||'
GCC14 -Wall cleanup series [-Wparentheses]
warning messages about ports being electrically connected when
those ports have names that match under rules of case-insensitivity,
and the .ext file is being read for the purpose of generating a
SPICE netlist, which is case-insensitive. Also: Corrected a crash
condition when using "extract path <name>" when directory <name>
does not exist.
and ext2sim to make use of the new esSIvalue() routine, so that
it no longer depends on a preformatted string. Corrected an
issue where the esSIvalue() routine would output "a" for "atto"
which is not supported by ngspice.
2-terminal devices without complaining. The previous handling
seemed to be technically correct other than spitting out warnings
about missing terminals.
isolate the terminal areas of a device (e.g., source and drain)
and calculate their area and perimeter individually for the
device (in addition to the traditional method of calculating
area and perimeter of each resistance class for the entire node).
Also: Reworked the SPICE syntax output to generate SI values
in the range 1-1000 with the appropriate suffix (e.g., "20u")
instead of defaulting to "u" for lengths and "p" for areas.
This prevents it from producing weird units like "150000u" when
a process definition already includes a scalefactor.
Reworked the "extresist" code to use the device terminal area
and perimeter. This fixes an error in which "extresist" would
lose these values and "ext2spice" with option "extresist on"
would generate a new netlist output with zero terminal areas
and perimeters.
redundant (same name, different net). Previously, the method was
to keep the first such node and ignore all others except to add
their resistance and capacitance to the original node. This
prevented routines like "def write" from enumerating all nets
unless they had unique names. The new method keeps the additional
records including the node location where they can be found by
EFNodeVisit(), but flags them with EF_UNIQUE_NODE so that routines
like ext2spice or ext2sim can choose to ignore them. This implies
that this method could be used to reimplement "extract unique"
within "ext2spice" or "ext2sim" without altering label text. This
has not yet been implemented.
This commit makes the code (mostly) C99-compatible, enabling to compile
it without the -Wno-error=implicit-function-declaration flag. This
way, Magic becomes usable on arm64 architectures, specifically on Apple
computers with M1/M2 SoC.
traditionally been kept for backwards compatibility. However, the
operation of "ext2spice" and "ext2sim" as separate programs has
become extremely difficult to maintain, and so it has been dropped
in favor of folding both into the program as commands, as was done
a long time ago in the Tcl/Tk version.
client data generated by ext2spice and attached to a node's
nodeClient record; there is an initNodeClient() routine but no
corresponding freeNodeClient() routine. Eventually had to add a
callback function passed to EFDone() and EFFlatDone() to clean up
these entries. After doing that, valgrind reports clean for all
memory allocated within ext2spice (there are other things that are
not freed but not related to a specific command, so do not need to
be treated as leaks).
(since these are interpreted by IRSIM, the only known program to
parse .sim output)---the "ext2sim alias on" option now just moves
such statements from the ".sim" file to a ".al" file. Corrected the
ResSimMerge() routine to reverse the nodes, so that the devices
belonging to the aliased node are added to the original node, instead
of the other way around. This corrects "missing gate" and "missing SD"
errors that occur due to nodes connected through the substrate.
"ext2sim extresist on", which was being shared; that leads to
confusion, especially when using "ext2sim" to generate a node
name input file for "extresist". Also: Added a warning when two
ports are merged in a .ext file, as this can lead to numerous
incorrect entries in netlist output.
implements a method for handling ports in a subcircuit that have different
port names and indexes but are shorted together. "none" is the default
and backwards-compatible behavior that merges ports together, which will
often cause one of the ports to be optimized out of the netlist. "resistor"
will separate the port names with a 0-ohm ideal resistor. "voltage" will
separate the port names with a 0-volt voltage source. This should work
well for simulation and potentially for LVS, although its impact on LVS
has not been fully investigated.
the last commit, unfortunately. Thanks to Matt Guthaus for alerting me
to this. Also updated parts of the extresist code that remove the
dependence on ResConDCS; this is a minor update and should not affect
the operation of extresist. It is preparatory to doing more work to
support additional device types like capacitors, bipolars, and diodes.
code from extflat from type unsigned long to type TileTypeBitMask.
This increases the number of types of each to 256 and tracks the
number of types, so it should be difficult to exceed this amount.
commit, mostly relating to the scale of values in the ".nodes" file
produced by ext2sim. Making this file CIF syntax seemed unnecessary,
so I removed the CIF syntax and scaling. "extresist" can now produce
an apparently valid output on a standard cell layout. Even with the
change, the extresist output is still only pseudo-hierarchical, so
this does not preclude the need for eliminating the .sim format file
in favor of the .ext file, but it provides a working intermediate
form.
types and substrate connections. This is an intermediate step to
switching from a sim file format to an ext file format for input,
but resolves the worst issues of having the sim file not recognize
the devices or the substrate nodes. Implemented by using the sim
subcircuit format introduced in IRSIM with the "user subcircuit"
package. Implementation unfinished (work in progress).
p device; this was previously dependent only on the first character
of the extracted device model name. Since the tech file has control
over what the device layer names are but not the extracted model
names, the device layer type name is used as a backup way to determine
if the type is n or p, if that cannot be determined from the extracted
model name.
support asymmetric FETs and other devices like bipolars that have
three distinct terminals. This does not go as far as it should to
make the array independent of the number of declared terminals of
the device. However, it suffices to make, e.g., parameter "a2=area"
work for a bipolar device, and to generate the right drain and source
areas and perimeters for asymmetric (e.g., extended-drain) devices.
change from passing the HierName to passing the HierContext (of which
HierName is a part) so that more information from HierContext (such
as the cell use being visited) can be passed to the callback
procedure (largely for diagnostic purposes).
Darryl L. Miles
Tim Edwards
Alessandro De Laurenzis